From 025c92077d39c3da9db68d13cc1763a7ed22a522 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Mon, 30 Jan 2023 09:53:48 -0800 Subject: [PATCH] [RISCV] Replace multiple ifs with a switch. NFC D108961 will add more instructions to this. --- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp index a335b2d..9f5561b 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp @@ -189,16 +189,17 @@ void RISCVMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, // RISCVInstrInfo::getInstSizeInBytes expects that the total size of the // expanded instructions for each pseudo is correct in the Size field of the // tablegen definition for the pseudo. - if (MI.getOpcode() == RISCV::PseudoCALLReg || - MI.getOpcode() == RISCV::PseudoCALL || - MI.getOpcode() == RISCV::PseudoTAIL || - MI.getOpcode() == RISCV::PseudoJump) { + switch (MI.getOpcode()) { + default: + break; + case RISCV::PseudoCALLReg: + case RISCV::PseudoCALL: + case RISCV::PseudoTAIL: + case RISCV::PseudoJump: expandFunctionCall(MI, OS, Fixups, STI); MCNumEmitted += 2; return; - } - - if (MI.getOpcode() == RISCV::PseudoAddTPRel) { + case RISCV::PseudoAddTPRel: expandAddTPRel(MI, OS, Fixups, STI); MCNumEmitted += 1; return; -- 2.7.4