From 019fa346b99c600b32e1bc295ebac527a5ad825c Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sun, 15 May 2022 13:03:03 +0100 Subject: [PATCH] [X86] Adjust tests for vector widening to use freeze(poison) I incorrectly used freeze(undef) in rG1b07bd9034bd --- llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll | 6 +++--- llvm/test/CodeGen/X86/avx-intrinsics-x86.ll | 6 +++--- llvm/test/CodeGen/X86/avx512-intrinsics.ll | 12 ++++++------ llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll | 6 +++--- 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll index a4914c9..65dce44 100644 --- a/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll +++ b/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll @@ -260,7 +260,7 @@ define <4 x double> @test_mm256_castpd128_pd256_freeze(<2 x double> %a0) nounwin ; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; CHECK-NEXT: ret{{[l|q]}} - %a1 = freeze <2 x double> undef + %a1 = freeze <2 x double> poison %res = shufflevector <2 x double> %a0, <2 x double> %a1, <4 x i32> ret <4 x double> %res } @@ -306,7 +306,7 @@ define <8 x float> @test_mm256_castps128_ps256_freeze(<4 x float> %a0) nounwind ; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; CHECK-NEXT: ret{{[l|q]}} - %a1 = freeze <4 x float> undef + %a1 = freeze <4 x float> poison %res = shufflevector <4 x float> %a0, <4 x float> %a1, <8 x i32> ret <8 x float> %res } @@ -336,7 +336,7 @@ define <4 x i64> @test_mm256_castsi128_si256_freeze(<2 x i64> %a0) nounwind { ; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; CHECK-NEXT: ret{{[l|q]}} - %a1 = freeze <2 x i64> undef + %a1 = freeze <2 x i64> poison %res = shufflevector <2 x i64> %a0, <2 x i64> %a1, <4 x i32> ret <4 x i64> %res } diff --git a/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll b/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll index 293d7fa..11f38c0 100644 --- a/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll +++ b/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll @@ -1044,7 +1044,7 @@ define <4 x double> @test_mm256_castpd128_pd256_freeze(<2 x double> %a0) nounwin ; AVX512VL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 ; AVX512VL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x18,0xc0,0x01] ; AVX512VL-NEXT: ret{{[l|q]}} # encoding: [0xc3] - %a1 = freeze <2 x double> undef + %a1 = freeze <2 x double> poison %res = shufflevector <2 x double> %a0, <2 x double> %a1, <4 x i32> ret <4 x double> %res } @@ -1062,7 +1062,7 @@ define <8 x float> @test_mm256_castps128_ps256_freeze(<4 x float> %a0) nounwind ; AVX512VL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 ; AVX512VL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x18,0xc0,0x01] ; AVX512VL-NEXT: ret{{[l|q]}} # encoding: [0xc3] - %a1 = freeze <4 x float> undef + %a1 = freeze <4 x float> poison %res = shufflevector <4 x float> %a0, <4 x float> %a1, <8 x i32> ret <8 x float> %res } @@ -1080,7 +1080,7 @@ define <4 x i64> @test_mm256_castsi128_si256_freeze(<2 x i64> %a0) nounwind { ; AVX512VL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 ; AVX512VL-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 # EVEX TO VEX Compression encoding: [0xc4,0xe3,0x7d,0x18,0xc0,0x01] ; AVX512VL-NEXT: ret{{[l|q]}} # encoding: [0xc3] - %a1 = freeze <2 x i64> undef + %a1 = freeze <2 x i64> poison %res = shufflevector <2 x i64> %a0, <2 x i64> %a1, <4 x i32> ret <4 x i64> %res } diff --git a/llvm/test/CodeGen/X86/avx512-intrinsics.ll b/llvm/test/CodeGen/X86/avx512-intrinsics.ll index 12d47ce..433da4e 100644 --- a/llvm/test/CodeGen/X86/avx512-intrinsics.ll +++ b/llvm/test/CodeGen/X86/avx512-intrinsics.ll @@ -7501,7 +7501,7 @@ define <8 x double> @test_mm256_castpd128_pd256_freeze(<2 x double> %a0) nounwin ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; CHECK-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0 ; CHECK-NEXT: ret{{[l|q]}} - %a1 = freeze <2 x double> undef + %a1 = freeze <2 x double> poison %res = shufflevector <2 x double> %a0, <2 x double> %a1, <8 x i32> ret <8 x double> %res } @@ -7513,7 +7513,7 @@ define <8 x double> @test_mm256_castpd256_pd256_freeze(<4 x double> %a0) nounwin ; CHECK-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0 ; CHECK-NEXT: ret{{[l|q]}} - %a1 = freeze <4 x double> undef + %a1 = freeze <4 x double> poison %res = shufflevector <4 x double> %a0, <4 x double> %a1, <8 x i32> ret <8 x double> %res } @@ -7527,7 +7527,7 @@ define <16 x float> @test_mm256_castps128_ps512_freeze(<4 x float> %a0) nounwind ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; CHECK-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0 ; CHECK-NEXT: ret{{[l|q]}} - %a1 = freeze <4 x float> undef + %a1 = freeze <4 x float> poison %res = shufflevector <4 x float> %a0, <4 x float> %a1, <16x i32> ret <16 x float> %res } @@ -7539,7 +7539,7 @@ define <16 x float> @test_mm256_castps256_ps512_freeze(<8 x float> %a0) nounwind ; CHECK-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0 ; CHECK-NEXT: ret{{[l|q]}} - %a1 = freeze <8 x float> undef + %a1 = freeze <8 x float> poison %res = shufflevector <8 x float> %a0, <8 x float> %a1, <16x i32> ret <16 x float> %res } @@ -7553,7 +7553,7 @@ define <8 x i64> @test_mm512_castsi128_si512_freeze(<2 x i64> %a0) nounwind { ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; CHECK-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0 ; CHECK-NEXT: ret{{[l|q]}} - %a1 = freeze <2 x i64> undef + %a1 = freeze <2 x i64> poison %res = shufflevector <2 x i64> %a0, <2 x i64> %a1, <8 x i32> ret <8 x i64> %res } @@ -7565,7 +7565,7 @@ define <8 x i64> @test_mm512_castsi256_si512_pd256_freeze(<4 x i64> %a0) nounwin ; CHECK-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0 ; CHECK-NEXT: ret{{[l|q]}} - %a1 = freeze <4 x i64> undef + %a1 = freeze <4 x i64> poison %res = shufflevector <4 x i64> %a0, <4 x i64> %a1, <8 x i32> ret <8 x i64> %res } diff --git a/llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll b/llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll index f018ded..48f93c69 100644 --- a/llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll +++ b/llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll @@ -1223,7 +1223,7 @@ define <16 x half> @test_mm256_castph128_ph256_freeze(<8 x half> %a0) nounwind { ; CHECK-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; CHECK-NEXT: retq - %a1 = freeze <8 x half> undef + %a1 = freeze <8 x half> poison %res = shufflevector <8 x half> %a0, <8 x half> %a1, <16 x i32> ret <16 x half> %res } @@ -1237,7 +1237,7 @@ define <32 x half> @test_mm512_castph128_ph512_freeze(<8 x half> %a0) nounwind { ; CHECK-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0 ; CHECK-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0 ; CHECK-NEXT: retq - %a1 = freeze <8 x half> undef + %a1 = freeze <8 x half> poison %res = shufflevector <8 x half> %a0, <8 x half> %a1, <32 x i32> ret <32 x half> %res } @@ -1249,7 +1249,7 @@ define <32 x half> @test_mm512_castph256_ph512_freeze(<16 x half> %a0) nounwind ; CHECK-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 ; CHECK-NEXT: vinsertf64x4 $1, %ymm0, %zmm0, %zmm0 ; CHECK-NEXT: retq - %a1 = freeze <16 x half> undef + %a1 = freeze <16 x half> poison %res = shufflevector <16 x half> %a0, <16 x half> %a1, <32 x i32> ret <32 x half> %res } -- 2.7.4