From 01598de3ecf79176f7ae34dc0aa94d89fe570443 Mon Sep 17 00:00:00 2001 From: Krzysztof Parzyszek Date: Thu, 24 Mar 2016 20:31:41 +0000 Subject: [PATCH] [Hexagon] Be sure to treat subregisters of a CSR as CSRs as well llvm-svn: 264331 --- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp index 6ee2e8b..acc9240 100644 --- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp @@ -234,7 +234,8 @@ namespace { /// Checks if the basic block contains any instruction that needs a stack /// frame to be already in place. - bool needsStackFrame(const MachineBasicBlock &MBB, const BitVector &CSR) { + bool needsStackFrame(const MachineBasicBlock &MBB, const BitVector &CSR, + const HexagonRegisterInfo &HRI) { for (auto &I : MBB) { const MachineInstr *MI = &I; if (MI->isCall()) @@ -263,8 +264,9 @@ namespace { // a stack slot. if (TargetRegisterInfo::isVirtualRegister(R)) return true; - if (CSR[R]) - return true; + for (MCSubRegIterator S(R, &HRI, true); S.isValid(); ++S) + if (CSR[*S]) + return true; } } return false; @@ -335,10 +337,11 @@ void HexagonFrameLowering::findShrunkPrologEpilog(MachineFunction &MF, SmallVector SFBlocks; BitVector CSR(Hexagon::NUM_TARGET_REGS); for (const MCPhysReg *P = HRI.getCalleeSavedRegs(&MF); *P; ++P) - CSR[*P] = true; + for (MCSubRegIterator S(*P, &HRI, true); S.isValid(); ++S) + CSR[*S] = true; for (auto &I : MF) - if (needsStackFrame(I, CSR)) + if (needsStackFrame(I, CSR, HRI)) SFBlocks.push_back(&I); DEBUG({ -- 2.7.4