From 013b8ff7e6d5e1258119ada3e46e3bcc118b1e69 Mon Sep 17 00:00:00 2001 From: Mikhail Skvortcov Date: Mon, 30 Jan 2017 13:04:46 +0300 Subject: [PATCH] RyuJIT/ARM32: update lea lowering Commit migrated from https://github.com/dotnet/coreclr/commit/b10a7429eb95d10020b9a16837d8ae8099aa4870 --- src/coreclr/src/jit/lsraarm.cpp | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/coreclr/src/jit/lsraarm.cpp b/src/coreclr/src/jit/lsraarm.cpp index affa1de..6ed6db6 100644 --- a/src/coreclr/src/jit/lsraarm.cpp +++ b/src/coreclr/src/jit/lsraarm.cpp @@ -944,13 +944,17 @@ void Lowering::TreeNodeInfoInit(GenTree* tree) } info->dstCount = 1; + // On ARM we may need a single internal register + // (when both conditions are true then we still only need a single internal register) if ((index != nullptr) && (cns != 0)) { - NYI_ARM("GT_LEA: index and cns are not nil"); + // ARM does not support both Index and offset so we need an internal register + info->internalIntCount = 1; } else if (!emitter::emitIns_valid_imm_for_add(cns, INS_FLAGS_DONT_CARE)) { - NYI_ARM("GT_LEA: invalid imm"); + // This offset can't be contained in the add instruction, so we need an internal register + info->internalIntCount = 1; } } break; -- 2.7.4