From 002c3fb6f4f38b50ef0514247c2d55fc6ed8c6d4 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Thu, 16 Mar 2023 12:48:05 +0100 Subject: [PATCH] clk: qcom: dispcc-qcm2290: Add MDSS_CORE reset Add the MDSS_CORE reset which can be asserted to reset the state of the entire MDSS. Signed-off-by: Konrad Dybcio Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230316-topic-qcm_dispcc_reset-v1-2-dd3708853014@linaro.org --- drivers/clk/qcom/dispcc-qcm2290.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c index 2ebd9a02..cbb5f1e 100644 --- a/drivers/clk/qcom/dispcc-qcm2290.c +++ b/drivers/clk/qcom/dispcc-qcm2290.c @@ -20,6 +20,7 @@ #include "clk-regmap-divider.h" #include "common.h" #include "gdsc.h" +#include "reset.h" enum { P_BI_TCXO, @@ -445,6 +446,10 @@ static struct clk_branch disp_cc_sleep_clk = { }, }; +static const struct qcom_reset_map disp_cc_qcm2290_resets[] = { + [DISP_CC_MDSS_CORE_BCR] = { 0x2000 }, +}; + static struct gdsc mdss_gdsc = { .gdscr = 0x3000, .pd = { @@ -494,6 +499,8 @@ static const struct qcom_cc_desc disp_cc_qcm2290_desc = { .num_clks = ARRAY_SIZE(disp_cc_qcm2290_clocks), .gdscs = disp_cc_qcm2290_gdscs, .num_gdscs = ARRAY_SIZE(disp_cc_qcm2290_gdscs), + .resets = disp_cc_qcm2290_resets, + .num_resets = ARRAY_SIZE(disp_cc_qcm2290_resets), }; static const struct of_device_id disp_cc_qcm2290_match_table[] = { -- 2.7.4