From 0022e4a2ef8f20257b21b8fa27c0cb683485270b Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Tue, 10 Oct 2017 13:08:11 +0200 Subject: [PATCH] clk: renesas: r8a77995: Correct parent clock of INTC-AP According to the R-Car Gen3 Hardware Manual Errata for Rev 0.55 of September 8, 2017, the parent clock of the INTC-AP module clock on R-Car D3 is S1D2. This change has no functional impact. Signed-off-by: Geert Uytterhoeven --- drivers/clk/renesas/r8a77995-cpg-mssr.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c index e594cf8..ea4cafb 100644 --- a/drivers/clk/renesas/r8a77995-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c @@ -127,7 +127,7 @@ static const struct mssr_mod_clk r8a77995_mod_clks[] __initconst = { DEF_MOD("usb-dmac1", 331, R8A77995_CLK_S3D1), DEF_MOD("rwdt", 402, R8A77995_CLK_R), DEF_MOD("intc-ex", 407, R8A77995_CLK_CP), - DEF_MOD("intc-ap", 408, R8A77995_CLK_S3D1), + DEF_MOD("intc-ap", 408, R8A77995_CLK_S1D2), DEF_MOD("audmac0", 502, R8A77995_CLK_S3D1), DEF_MOD("hscif3", 517, R8A77995_CLK_S3D1C), DEF_MOD("hscif0", 520, R8A77995_CLK_S3D1C), -- 2.7.4