Yvan Roux [Wed, 14 Dec 2016 13:47:07 +0000 (14:47 +0100)]
Make Linaro GCC Snapshot 6.2-2016.12.
gcc/
* LINARO-VERSION: Update.
Change-Id: Ic2b94e93d8261afe8017ada35d36f7c780298a7c
Yvan Roux [Tue, 13 Dec 2016 15:40:03 +0000 (16:40 +0100)]
Merge branches/gcc-6-branch rev 243594.
Change-Id: I681a233c1e96ce184d241bab38b61cd8ac8f08a8
Yvan Roux [Fri, 9 Dec 2016 11:54:22 +0000 (12:54 +0100)]
./
Backport from trunk r240949.
2016-10-10 Andreas Tobler <andreast@gcc.gnu.org>
* configure.ac: Add aarch64-*-freebsd*.
* configure: Regenerate.
gcc/
Backport from trunk r240949.
2016-10-10 Andreas Tobler <andreast@gcc.gnu.org>
* config.gcc: Add aarch64-*-freebsd* support.
* config.host: Likewise.
* config/aarch64/aarch64-freebsd.h: New file.
* config/aarch64/t-aarch64-freebsd: Ditto.
libgcc/
Backport from trunk r240949.
2016-10-10 Andreas Tobler <andreast@gcc.gnu.org>
* config.host: Add support for aarch64-*-freebsd*.
Change-Id: I7d3ce4b84d08de4f71d5e3e5076a66b462df1bf9
Yvan Roux [Fri, 9 Dec 2016 12:02:02 +0000 (13:02 +0100)]
gcc/
Backport from trunk r241791.
2016-11-26 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64-simd.md (aarch64_crypto_sha1hv4si):
New pattern.
(aarch64_be_crypto_sha1hv4si): New pattern.
Change-Id: Icf45bee1114d9ac5097ac38477ae1fb7a1b470e1
Yvan Roux [Fri, 9 Dec 2016 11:55:15 +0000 (12:55 +0100)]
gcc/
Backport from trunk r241116, 241119.
2016-10-13 Richard Earnshaw <rearnsha@arm.com>
* arm.h (TARGET_VFP): Unconditionally define to 1.
(arm_fpu_desc): Remove 'model' field.
(TARGET_FPU_MODEL): Delete.
* arm.c (all_fpus): Don't initialize the model field.
(arm_can_inline_p): Don't check the FPU model.
* arm-fpus.def: Remove redundant model field from all FPU
descriptions.
gcc/
Backport from trunk r241118, 241119.
2016-10-13 Richard Earnshaw <rearnsha@arm.com>
* arm.h (TARGET_VFP): Delete.
(TARGET_VFPD32): Remove references to TARGET_VFP.
(TARGET_VFP3, TARGET_VFP5): Likewise.
(TARGET_VFP_SINGLE, TARGET_VFP_DOUBLE): Likewise.
(TARGET_NEON_FP16): Likewise.
(TARGET_FMA): Likewise.
(TARGET_CRYPTO): Likewise.
(TARGET_NEON): Likewise.
(SECONDARY_OUTPUT_RELOAD_CLASS): Likewise.
(FUNCTION_ARG_REGNO_P): Likewise.
* arm.c (arm_option_check_internal): Likewise.
(arm_option_override): Likewise.
(use_return_insn): Likewise.
(arm_function_value_regno_p): Likewise.
(arm_apply_result_size): Likewise.
(use_vfp_abi): Likewise.
(arm_legitimate_address_outer_p): Likewise.
(thumb2_legitimate_address_p): Likewise.
(arm_legitimate_index_p): Likewise.
(thumb2_legitimate_index_p): Likewise.
(arm_legitimate_address): Likewise.
(arm_get_vfp_saved_size): Likewise.
(arm_emit_vfp_multi_reg_pop): Likewise.
(arm_get_frame_offsets): Likewise.
(arm_save_coproc_regs): Likewise.
(arm_hard_regno_mode_ok): Likewise.
(arm_expand_epilogue_apcs_frame): Likewise.
(arm_expand_epilogue): Likewise.
(arm_file_start): Likewise.
(arm_conditional_register_usage): Likewise.
(arm_validize_comparison): Use vfp_compare_operand directly.
* arm-builtins.c (arm_init_builtins): Remove references to TARGET_VFP.
(arm_expand_vfp_builtin): Use TARGET_HARD_FLOAT for detecting
unsupported usage.
(arm_atomic_assign_expand_fenv): Likewise.
* arm.md (divsf3): Likewise.
(arm_negsi2): Likewise.
(absdf2): Likewise.
(arm_movdi): Likewise.
(arm_movt): Likewise.
(cbranchsf4): Change predicate to vfp_compare_operand.
(cbranchdf4): Change predicate to vfp_compare_operand.
(cstorehf4): Change predicate to vfp_compare_operand.
(cstoresf4): Change predicate to vfp_compare_operand.
(cstoredf4): Change predicate to vfp_compare_operand.
(vfp_pop_multiple_with_writeback): Remove references to TARGET_VFP.
(movhi_insn_arch4, movhi_bytes): Likewise.
* constraints.md (Dt): Likewise.
(Dp): Likewise.
* iterators.md (SDF): Likewise.
* predicates.md (arm_float_compare_operand): Delete.
(const_double_vcvt_power_of_two_reciprocal): Remove references to
TARGET_VFP.
(const_double_vcvt_power_of_two): Likewise.
* thumb2.md thumb2_movsi_insn): Likewise.
* vfp.md (arm_movhi_vfp, thumb2_movhi_vfp): Likewise.
(movhf_vfp): Likewise.
(arm_movsi_vfp, thumb2_movsi_vfp): Likewise.
(movdi_vfp, movdi_vfp_cortexa8): Likewise.
(movsf_vfp, thumb2_movsf_vfp): Likewise.
(movdf_vfp, thumb2_movdf_vfp): Likewise.
(movsfcc_vfp, abssf2_vfp, negsf2_vfp, addsf3_vfp): Likewise.
(subsf3_vfp, divsf3_vfp): Likewise.
(mulsf3_vfp, mulsf3negsf_vfp, negmulsf3_vfp): Likewise.
(mulsf3addsf_vfp, (mulsf3subsf_vfp, mulsf3negsfaddsf_vfp): Likewise.
(mulsf3negsfsubsf_vfp): Likewise.
(truncsisf2_vfp, fixuns_truncsfsi2, floatsisf2_vfp): Likewise.
(floatunssisf2, sqrtsf2_vfp): Likewise.
(movcc_vfp): Likewise.
(cmpsf_split_vfp, cmpsf_trap_split_vfp): Likewise.
(cmpsf_vfp, cmpsf_trap_vfp): Likewise.
(push_multi_vfp): Likewise.
(set_fpscr, get_fpscr): Likewise.
* arm-c.c (arm_cpu_builtins): Unconditionally define __VFP_FP__.
Change-Id: Ia31339f87b894f8ef9944e782ac6a8db17feb3ed
Yvan Roux [Fri, 9 Dec 2016 12:00:26 +0000 (13:00 +0100)]
gcc/
Backport from trunk r241736.
2016-11-01 Bilyan Borisov <bilyan.borisov@arm.com>
Tamar Christina <tamar.christina@arm.com>
* config/arm/arm-c.c (arm_cpu_builtins): New macro definition.
* config/arm/arm_neon.h (vmaxnm_f32): New intrinsinc.
(vmaxnmq_f32): Likewise.
(vminnm_f32): Likewise.
(vminnmq_f32): Likewise.
* config/arm/arm_neon_builtins.def (vmaxnm): New builtin.
(vminnm): Likewise.
* config/arm/neon.md (neon_<fmaxmin_op><mode>, VCVTF): New
expander.
gcc/testsuite/
Backport from trunk r241736.
2016-11-01 Bilyan Borisov <bilyan.borisov@arm.com>
* gcc.target/arm/simd/vmaxnm_f32_1.c: New.
* gcc.target/arm/simd/vmaxnmq_f32_1.c: Likewise.
* gcc.target/arm/simd/vminnm_f32_1.c: Likewise.
* gcc.target/arm/simd/vminnmq_f32_1.c: Likewise.
gcc/testsuite/
Backport from trunk r241797.
2016-11-01 Tamar Christina <tamar.christina@arm.com>
* gcc.target/arm/simd/vmaxnm_f32_1.c (dg-require-effective-target):
Check for arm_v8_neon_hw.
* gcc.target/arm/simd/vmaxnmq_f32_1.c (dg-require-effective-target):
Likewise.
* gcc.target/arm/simd/vminnm_f32_1.c (dg-require-effective-target):
Likewise.
* gcc.target/arm/simd/vminnmq_f32_1.c(dg-require-effective-target):
Likewise.
Change-Id: I30c7b57e133fa41a3ea0ada0e5819ec645d28b45
Yvan Roux [Mon, 12 Dec 2016 13:19:10 +0000 (14:19 +0100)]
gcc/testsuite/
Backport from trunk r241957.
2016-11-08 Tamar Christina <tamar.christina@arm.com>
PR testsuite/78136
* gcc.dg/cpp/trad/trad.exp
(dg-runtest): Added $srcdir/$subdir/ to Include dirs.
* gcc.dg/cpp/trad/include.c: Use local header file.
gcc/testsuite/
Backport from trunk r242500.
2016-11-16 Tamar Christina <tamar.christina@arm.com>
PR testsuite/78136
* gcc.dg/cpp/trad/trad.exp
(dg-runtest): Moved $srcdir/$subdir/ to
DEFAULT_TRADCPPFLAGS.
Change-Id: I5271fc97361a49196ea7f5f57c4bdff8a1988405
Yvan Roux [Fri, 9 Dec 2016 11:56:39 +0000 (12:56 +0100)]
gcc/
Backport from trunk r241229.
2016-10-17 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR tree-optimization/71636
* match.pd (x & ((1 << b) - 1) -> x & ~(~0 << b)): New pattern.
gcc/testsuite/
Backport from trunk r241229.
2016-10-17 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* gcc.dg/pr71636-1.c: New test-case.
* gcc.dg/pr71636-2.c: Likewise.
Change-Id: Ie3ef5051eea791320865f339cb978a2c9e94aa0f
Yvan Roux [Fri, 9 Dec 2016 12:03:30 +0000 (13:03 +0100)]
gcc/
Backport from trunk r241958.
2016-11-08 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/t-aarch64 (aarch64-c.o): Depend on TARGET_H.
Change-Id: I7ffb83dbae1adc8b69a4e8b53f8df1ef2b28a43a
Yvan Roux [Fri, 9 Dec 2016 12:01:48 +0000 (13:01 +0100)]
gcc/
Backport from trunk r241790.
2016-11-02 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.md (add<mode>3): Remove
redundant code. Don't split frame based additions.
Change-Id: Icf72194a952010ebfa4b24a9941f587a30cd38ed
Yvan Roux [Fri, 9 Dec 2016 12:01:27 +0000 (13:01 +0100)]
gcc/
Backport from trunk r241777.
2016-11-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_register_saved_on_entry): Add
function comment.
(aarch64_next_callee_save): Likewise.
(aarch64_pushwb_single_reg): Likewise.
(aarch64_gen_storewb_pair): Likewise.
(aarch64_push_regs): Likewise.
(aarch64_gen_loadwb_pair): Likewise.
(aarch64_pop_regs): Likewise.
(aarch64_gen_store_pair): Likewise.
(aarch64_gen_load_pair): Likewise.
(aarch64_save_callee_saves): Likewise.
(aarch64_restore_callee_saves): Likewise.
Change-Id: I837088871c2b9bbe651818bfd5b362ea2925e75f
Yvan Roux [Fri, 9 Dec 2016 11:59:52 +0000 (12:59 +0100)]
gcc/
Backport from trunk r241686.
2016-10-30 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* config/arm/arm.c (arm_const_not_ok_for_debug_p): Use VAR_P.
Change-Id: I5b5356a7878821d4cc26bfb7b0d61bb9f663fbe4
Yvan Roux [Fri, 9 Dec 2016 11:59:02 +0000 (12:59 +0100)]
gcc/
Backport from trunk r241508.
2016-10-25 Wilco Dijkstra <wdijkstr@arm.com>
PR target/78041
* config/arm/neon.md (ashldi3_neon): Add "r 0 i" and "&r r i" variants.
Remove partial overlap check for shift by 1.
(ashldi3_neon): Likewise.
gcc/testsuite/
Backport from trunk r241508.
2016-10-25 Wilco Dijkstra <wdijkstr@arm.com>
PR target/78041
* gcc.target/arm/pr78041.c: New test.
Change-Id: I6f5331910f3f20e8d6f0f7a00a5c855a2acfdee2
Yvan Roux [Fri, 9 Dec 2016 11:58:32 +0000 (12:58 +0100)]
gcc/
Backport from trunk r241419.
2016-10-21 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_layout_frame):
Align FP callee-saves.
gcc/
Backport from trunk r241420.
2016-10-21 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_add_constant_internal):
Add extra argument to allow emitting the move immediate.
Use add/sub with positive immediate.
(aarch64_add_constant): Add inline function.
(aarch64_add_sp): Likewise.
(aarch64_sub_sp): Likewise.
(aarch64_expand_prologue): Call aarch64_sub_sp.
(aarch64_expand_epilogue): Call aarch64_add_sp.
Decide when to leave out move.
(aarch64_output_mi_thunk): Call aarch64_add_constant.
gcc/testsuite/
Backport from trunk r241420.
2016-10-21 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.target/aarch64/test_frame_17.c: New test.
gcc/testsuite/
Backport from trunk r241421.
2016-10-21 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.target/aarch64/test_frame_17.c: New test.
Change-Id: Ie080d3e66942f0a37b2f376bc2445f88eb079f7d
Yvan Roux [Fri, 9 Dec 2016 11:53:54 +0000 (12:53 +0100)]
gcc/
Backport from trunk r240846.
2016-10-06 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64-cores.def: Add a comment before each
set of cores.
Change-Id: I123f8b902d5b5b5b2df7fce82815610ac8a3b7d6
Yvan Roux [Fri, 9 Dec 2016 11:53:10 +0000 (12:53 +0100)]
gcc/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* defaults.h (TARGET_FLT_EVAL_METHOD_NON_DEFAULT): Remove.
* system.h (TARGET_FLT_EVAL_METHOD_NON_DEFAULT): Poison.
gcc/ada/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* gcc-interface/misc.c (gnat_post_options): Remove special case for
TARGET_FLT_EVAL_METHOD_NON_DEFAULT with -fexcess-precision=standard.
gcc/c-family/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* c-opts.c (c_common_post_options): Remove special case for
TARGET_FLT_EVAL_METHOD_NON_DEFAULT with -fexcess-precision=standard
in C++.
gcc/fortran/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* options.c (gfc_post_options): Remove special case for
TARGET_FLT_EVAL_METHOD_NON_DEFAULT with -fexcess-precision=standard.
gcc/java/
Backport from trunk r240614.
2016-09-29 James Greenhalgh <james.greenhalgh@arm.com>
* lang.c (java_post_options): Remove special case for
TARGET_FLT_EVAL_METHOD_NON_DEFAULT with -fexcess-precision=standard.
Change-Id: Ibed9daab2babc566ab0213077e682be5b40c28b1
Yvan Roux [Fri, 9 Dec 2016 11:52:42 +0000 (12:52 +0100)]
gcc/
Backport from trunk r240568.
2016-09-28 Wilco Dijkstra <wdijkstr@arm.com>
PR tree-optimization/61056
* gimple-fold.c (gimple_fold_builtin_strchr):
New function to optimize strchr (s, 0) to strlen.
(gimple_fold_builtin): Add BUILT_IN_STRCHR case.
gcc/testsuite/
Backport from trunk r240568.
2016-09-28 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.dg/strlenopt-20.c: Update test.
* gcc.dg/strlenopt-21.c: Likewise.
* gcc.dg/strlenopt-22.c: Likewise.
* gcc.dg/strlenopt-22g.c: Likewise.
* gcc.dg/strlenopt-26.c: Likewise.
* gcc.dg/strlenopt-5.c: Likewise.
* gcc.dg/strlenopt-7.c: Likewise.
* gcc.dg/strlenopt-9.c: Likewise.
gcc/
Backport from trunk r240585.
2016-09-28 Wilco Dijkstra <wdijkstr@arm.com>
* gimple-fold.c (gimple_fold_builtin): After failing to fold
strchr, also try the generic folding.
Change-Id: Ie8831d320766ac5083da722a36e92d7a44051597
Yvan Roux [Fri, 9 Dec 2016 11:52:03 +0000 (12:52 +0100)]
gcc/testsuite/
Backport from trunk r240314.
2016-09-21 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/fp16-aapcs-3.c: New.
* gcc.target/arm/fp16-aapcs-4.c: New.
* gcc.target/arm/aapcs/aapcs/vfp22.c: New.
* gcc.target/arm/aapcs/aapcs/vfp23.c: New.
* gcc.target/arm/aapcs/aapcs/vfp24.c: New.
* gcc.target/arm/aapcs/aapcs/vfp25.c: New.
Change-Id: I1473ed7fc6736a8d3e77a43c47607e1ab139abac
Yvan Roux [Fri, 9 Dec 2016 11:51:10 +0000 (12:51 +0100)]
contrib/
Backport from trunk r240288.
2016-09-20 Christophe Lyon <christophe.lyon@linaro.org>
* compare_tests: Take ERROR messages into account when
comparing.
contrib/
Backport from trunk r240289.
2016-09-20 Christophe Lyon <christophe.lyon@linaro.org>
* dg-extract-results.py: Report DejaGnu error in the final
summary.
* dg-extract-results.sh: Likewise.
Change-Id: Ib15f783dedc6b017a94e01f09b1e350b0459a890
Yvan Roux [Mon, 21 Nov 2016 11:34:20 +0000 (12:34 +0100)]
gcc/
Backport from trunk r239561.
2016-08-18 Tamar Christina <tamar.christina@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* varasm.c (default_use_anchors_for_symbol_p): Reject too large decls.
gcc/
Backport from trunk r242555.
2016-11-17 Jakub Jelinek <jakub@redhat.com>
PR middle-end/78201
* varasm.c (default_use_anchors_for_symbol_p): Fix a comment typo.
Don't test decl != NULL. Don't look at DECL_SIZE, but DECL_SIZE_UNIT
instead, return false if it is NULL, or doesn't fit into uhwi, or
is larger or equal to targetm.max_anchor_offset.
gcc/testsuite/
Backport from trunk r242555.
2016-11-17 Jakub Jelinek <jakub@redhat.com>
PR middle-end/78201
* g++.dg/opt/pr78201.C: New test.
Change-Id: I7fcc9d768209fac74de3ab6a80a8ccd880bbd185
Yvan Roux [Thu, 17 Nov 2016 14:27:08 +0000 (15:27 +0100)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.
Change-Id: I0ad4888f81ce7cbdfa7794c160018c659995cb86
Yvan Roux [Thu, 17 Nov 2016 12:33:24 +0000 (13:33 +0100)]
Make Linaro GCC Snapshot 6.2-2016.11.
gcc/
* LINARO-VERSION: Update.
Change-Id: I841560d60fa1d992a033f16229f30d75108f9132
Yvan Roux [Mon, 14 Nov 2016 10:08:49 +0000 (11:08 +0100)]
Merge branches/gcc-6-branch rev 242371.
Change-Id: Ia4fb8e9e94629da786722b5e68605dc8bb971741
Yvan Roux [Wed, 9 Nov 2016 20:56:21 +0000 (21:56 +0100)]
gcc/
Revert backport from trunk r239561.
2016-08-18 Tamar Christina <tamar.christina@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* varasm.c (default_use_anchors_for_symbol_p): Reject too large
* decls.
This reverts commit
11879870dc041028bcb8d078d9ddbd7e400dd03f.
Change-Id: Iae5d442cf1a80e74f6f07817d337ce63bdf05234
Yvan Roux [Mon, 17 Oct 2016 13:36:19 +0000 (15:36 +0200)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.
Change-Id: I7c4e31f7d1db307449b3712f92b0b723d9f91716
Yvan Roux [Mon, 17 Oct 2016 12:01:19 +0000 (14:01 +0200)]
Make Linaro GCC Snapshot 6.2-2016.10.
gcc/
* LINARO-VERSION: Update.
Change-Id: I6e28b34c67b38df0cd59c7260c1ef6ef3afc3ae5
Yvan Roux [Sun, 16 Oct 2016 18:12:52 +0000 (20:12 +0200)]
Merge branches/gcc-6-branch rev 241214.
Change-Id: I2fc7e5fc01a9015199e9be293b8a7b503fd5a829
Yvan Roux [Fri, 14 Oct 2016 12:51:34 +0000 (14:51 +0200)]
gcc/
Backport from trunk r240398.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-arches.def ("armv8.1-a"): Add FL_CRC32.
("armv8.2-a"): New.
("armv8.2-a+fp16"): New.
* config/arm/arm-protos.h (FL2_ARCH8_2): New.
(FL2_FP16INST): New.
(FL2_FOR_ARCH8_2A): New.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm.c (arm_arch8_2): New.
(arm_fp16_inst): New.
(arm_option_override): Set arm_arch8_2 and arm_fp16_inst. Check
for incompatible fp16-format settings.
* config/arm/arm.h (TARGET_VFP_FP16INST): New.
(TARGET_NEON_FP16INST): New.
(arm_arch8_2): Declare.
(arm_fp16_inst): Declare.
* config/arm/bpabi.h (BE8_LINK_SPEC): Add entries for
march=armv8.2-a and march=armv8.2-a+fp16.
* config/arm/t-aprofile (Arch Matches): Add entries for armv8.2-a
and armv8.2-a+fp16.
* doc/invoke.texi (ARM Options): Add "-march=armv8.1-a",
"-march=armv8.2-a" and "-march=armv8.2-a+fp16".
gcc/
Backport from trunk r240400.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* doc/sourcebuild.texi (ARM-specific attributes): Add entries for
arm_fp16_alternative_ok and arm_fp16_none_ok.
gcc/testsuite/
Backport from trunk r240400.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* g++.dg/ext/arm-fp16/arm-fp16-ops-3.C: Use
arm_fp16_alternative_ok.
* g++.dg/ext/arm-fp16/arm-fp16-ops-4.C: Likewise.
* gcc.dg/torture/arm-fp16-int-convert-alt.c: Likewise.
* gcc/testsuite/gcc.dg/torture/arm-fp16-ops-3.c: Likewise.
* gcc/testsuite/gcc.dg/torture/arm-fp16-ops-4.c: Likewise.
* gcc.target/arm/fp16-compile-alt-1.c: Likewise.
* gcc.target/arm/fp16-compile-alt-10.c: Likewise.
* gcc.target/arm/fp16-compile-alt-11.c: Likewise.
* gcc.target/arm/fp16-compile-alt-12.c: Likewise.
* gcc.target/arm/fp16-compile-alt-2.c: Likewise.
* gcc.target/arm/fp16-compile-alt-3.c: Likewise.
* gcc.target/arm/fp16-compile-alt-4.c: Likewise.
* gcc.target/arm/fp16-compile-alt-5.c: Likewise.
* gcc.target/arm/fp16-compile-alt-6.c: Likewise.
* gcc.target/arm/fp16-compile-alt-7.c: Likewise.
* gcc.target/arm/fp16-compile-alt-8.c: Likewise.
* gcc.target/arm/fp16-compile-alt-9.c: Likewise.
* gcc.target/arm/fp16-compile-none-1.c: Use arm_fp16_none_ok.
* gcc.target/arm/fp16-compile-none-2.c: Likewise.
* gcc.target/arm/fp16-rounding-alt-1.c: Use
arm_fp16_alternative_ok.
* lib/target-supports.exp
(check_effective_target_arm_fp16_alternative_ok_nocache): New.
(check_effective_target_arm_fp16_alternative_ok): New.
(check_effective_target_arm_fp16_none_ok_nocache): New.
(check_effective_target_arm_fp16_none_ok): New.
gcc/
Backport from trunk r240401.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* doc/sourcebuild.texi (ARM-specific attributes): Add anchor for
arm_v8_1a_neon_ok. Add entries for arm_v8_2a_fp16_scalar_ok,
arm_v8_2a_fp16_scalar_hw, arm_v8_2a_fp16_neon_ok and
arm_v8_2a_fp16_neon_hw.
(Add options): Add entries for arm_v8_1a_neon, arm_v8_2a_scalar,
arm_v8_2a_neon.
gcc/testsuite/
Backport from trunk r240401.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* lib/target-supports.exp (add_options_for_arm_v8_2a_fp16_scalar):
New.
(add_options_for_arm_v8_2a_fp16_neon): New.
(check_effective_target_arm_arch_v8_2a_ok): Auto-generate.
(add_options_for_arm_arch_v8_2a): Auto-generate.
(check_effective_target_arm_arch_v8_2a_multilib): Auto-generate.
(check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): New.
(check_effective_target_arm_v8_2a_fp16_scalar_ok): New.
(check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): New.
(check_effective_target_arm_v8_2a_fp16_neon_ok): New.
(check_effective_target_arm_v8_2a_fp16_scalar_hw): New.
(check_effective_target_arm_v8_2a_fp16_neon_hw): New.
gcc/
Backport from trunk r240402.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-c.c (arm_cpu_builtins): Define
"__ARM_FEATURE_FP16_SCALAR_ARITHMETIC" and
"__ARM_FEATURE_FP16_VECTOR_ARITHMETIC".
gcc/testsuite/
Backport from trunk r240402.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/attr-fp16-arith-1.c: New.
gcc/
Backport from trunk r240403.
2016-09-23 Jiong Wang <jiong.wang@arm.com>
Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm.c (output_move_vfp): Weaken assert to allow
HImode.
(arm_hard_regno_mode_ok): Allow HImode values in VFP registers.
* config/arm/arm.md (*movhi_bytes): Disable when VFP registers are
available. Also fix some white-space.
* config/arm/vfp.md (*arm_movhi_vfp): New.
(*thumb2_movhi_vfp): New.
gcc/testsuite/
Backport from trunk r240403.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/short-vfp-1.c: New.
gcc/
Backport from trunk r240404.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm.c (arm_evpc_neon_vuzp): Add support for V8HF and
V4HF modes.
(arm_evpc_neon_vtrn): Likewise.
(arm_evpc_neon_vrev): Likewise.
(arm_evpc_neon_vext): Likewise.
* config/arm/arm_neon.h (vbsl_f16): New.
(vbslq_f16): New.
(vdup_n_f16): New.
(vdupq_n_f16): New.
(vdup_lane_f16): New.
(vdupq_lane_f16): New.
(vext_f16): New.
(vextq_f16): New.
(vmov_n_f16): New.
(vmovq_n_f16): New.
(vrev64_f16): New.
(vrev64q_f16): New.
(vtrn_f16): New.
(vtrnq_f16): New.
(vuzp_f16): New.
(vuzpq_f16): New.
(vzip_f16): New.
(vzipq_f16): New.
* config/arm/arm_neon_buillins.def (vdup_n): New (v8hf, v4hf variants).
(vdup_lane): New (v8hf, v4hf variants).
(vext): New (v8hf, v4hf variants).
(vbsl): New (v8hf, v4hf variants).
* config/arm/iterators.md (VDQWH): New.
(VH): New.
(V_double_vector_mode): Add V8HF and V4HF. Fix white-space.
(Scalar_mul_8_16): Fix white-space.
(Is_d_reg): Add V4HF and V8HF.
* config/arm/neon.md (neon_vdup_lane<mode>_internal): New.
(neon_vdup_lane<mode>): New.
(neon_vtrn<mode>_internal): Replace VDQW with VDQWH.
(*neon_vtrn<mode>_insn): Likewise.
(neon_vzip<mode>_internal): Likewise. Also fix white-space.
(*neon_vzip<mode>_insn): Likewise
(neon_vuzp<mode>_internal): Likewise.
(*neon_vuzp<mode>_insn): Likewise
* config/arm/vec-common.md (vec_perm_const<mode>): New.
gcc/testsuite/
Backport from trunk r240404.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h
(FP16_SUPPORTED): New
(expected-hfloat-16x4): Make conditional on __fp16 support.
(expected-hfloat-16x8): Likewise.
(vdup_n_f16): Disable for non-AArch64 targets.
* gcc.target/aarch64/advsimd-intrinsics/vbsl.c: Add __fp16 tests,
conditional on FP16_SUPPORTED.
* gcc.target/aarch64/advsimd-intrinsics/vdup-vmov.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vext.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrev.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc: Add support
for testing __fp16.
* gcc.target/aarch64/advsimd-intrinsics/vtrn.c: Add __fp16 tests,
conditional on FP16_SUPPORTED.
* gcc.target/aarch64/advsimd-intrinsics/vuzp.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vzip.c: Likewise.
gcc/
Backport from trunk r240407.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
Jiong Wang <jiong.wang@arm.com>
* config/arm/arm.c (coproc_secondary_reload_class): Make HFmode
available when FP16 instructions are available.
(output_move_vfp): Add support for 16-bit data moves.
(arm_validize_comparison): Fix some white-space. Support HFmode
by conversion to SFmode.
* config/arm/arm.md (truncdfhf2): Fix a comment.
(extendhfdf2): Likewise.
(cstorehf4): New.
(movsicc): Fix some white-space.
(movhfcc): New.
(movsfcc): Fix some white-space.
(*cmovhf): New.
* config/arm/vfp.md (*arm_movhi_vfp): Disable when VFP FP16
instructions are available.
(*thumb2_movhi_vfp): Likewise.
(*arm_movhi_fp16): New.
(*thumb2_movhi_fp16): New.
(*movhf_vfp_fp16): New.
(*movhf_vfp_neon): Disable when VFP FP16 instructions are
available.
(*movhf_vfp): Likewise.
(extendhfsf2): Enable when VFP FP16 instructions are available.
(truncsfhf2): Enable when VFP FP16 instructions are available.
gcc/testsuite/
Backport from trunk r240407.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/armv8_2_fp16-move-1.c: New.
* gcc.target/arm/fp16-aapcs-1.c: Update expected output.
gcc/
Backport from trunk r240411.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/iterators.md (Code iterators): Fix some white-space
in the comments.
(GLTE): New.
(ABSNEG): New
(FCVT): Moved from vfp.md.
(VCVT_HF_US_N): New.
(VCVT_SI_US_N): New.
(VCVT_HF_US): New.
(VCVTH_US): New.
(FP16_RND): New.
(absneg_str): New.
(FCVTI32typename): Moved from vfp.md.
(sup): Add UNSPEC_VCVTA_S, UNSPEC_VCVTA_U, UNSPEC_VCVTM_S,
UNSPEC_VCVTM_U, UNSPEC_VCVTN_S, UNSPEC_VCVTN_U, UNSPEC_VCVTP_S,
UNSPEC_VCVTP_U, UNSPEC_VCVT_HF_S_N, UNSPEC_VCVT_HF_U_N,
UNSPEC_VCVT_SI_S_N, UNSPEC_VCVT_SI_U_N, UNSPEC_VCVTH_S_N,
UNSPEC_VCVTH_U_N, UNSPEC_VCVTH_S and UNSPEC_VCVTH_U.
(vcvth_op): New.
(fp16_rnd_str): New.
(fp16_rnd_insn): New.
* config/arm/unspecs.md (UNSPEC_VCVT_HF_S_N): New.
(UNSPEC_VCVT_HF_U_N): New.
(UNSPEC_VCVT_SI_S_N): New.
(UNSPEC_VCVT_SI_U_N): New.
(UNSPEC_VCVTH_S): New.
(UNSPEC_VCVTH_U): New.
(UNSPEC_VCVTA_S): New.
(UNSPEC_VCVTA_U): New.
(UNSPEC_VCVTM_S): New.
(UNSPEC_VCVTM_U): New.
(UNSPEC_VCVTN_S): New.
(UNSPEC_VCVTN_U): New.
(UNSPEC_VCVTP_S): New.
(UNSPEC_VCVTP_U): New.
(UNSPEC_VCVTP_S): New.
(UNSPEC_VCVTP_U): New.
(UNSPEC_VRND): New.
(UNSPEC_VRNDA): New.
(UNSPEC_VRNDI): New.
(UNSPEC_VRNDM): New.
(UNSPEC_VRNDN): New.
(UNSPEC_VRNDP): New.
(UNSPEC_VRNDX): New.
* config/arm/vfp.md (<absneg_str>hf2): New.
(neon_vabshf): New.
(neon_v<fp16_rnd_str>hf): New.
(neon_vrndihf): New.
(addhf3): New.
(subhf3): New.
(divhf3): New.
(mulhf3): New.
(*mulsf3neghf_vfp): New.
(*negmulhf3_vfp): New.
(*mulsf3addhf_vfp): New.
(*mulhf3subhf_vfp): New.
(*mulhf3neghfaddhf_vfp): New.
(*mulhf3neghfsubhf_vfp): New.
(fmahf4): New.
(neon_vfmahf): New.
(fmsubhf4_fp16): New.
(neon_vfmshf): New.
(*fnmsubhf4): New.
(*fnmaddhf4): New.
(neon_vsqrthf): New.
(neon_vrsqrtshf): New.
(FCVT): Move to iterators.md.
(FCVTI32typename): Likewise.
(neon_vcvth<sup>hf): New.
(neon_vcvth<sup>si): New.
(neon_vcvth<sup>_nhf_unspec): New.
(neon_vcvth<sup>_nhf): New.
(neon_vcvth<sup>_nsi_unspec): New.
(neon_vcvth<sup>_nsi): New.
(neon_vcvt<vcvth_op>h<sup>si): New.
(neon_<fmaxmin_op>hf): New.
gcc/testsuite/
Backport from trunk r240411.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/armv8_2-fp16-arith-1.c: New.
* gcc.target/arm/armv8_2-fp16-conv-1.c: New.
gcc/
Backport from trunk r240415.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/iterators.md (VCVTHI): New.
(NEON_VCMP): Add UNSPEC_VCLT and UNSPEC_VCLE. Fix a long line.
(NEON_VAGLTE): New.
(VFM_LANE_AS): New.
(VH_CVTTO): New.
(V_reg): Add HF, V4HF and V8HF. Fix white-space.
(V_HALF): Add V4HF. Fix white-space.
(V_if_elem): Add HF, V4HF and V8HF. Fix white-space.
(V_s_elem): Likewise.
(V_sz_elem): Fix white-space.
(V_elem_ch): Likewise.
(VH_elem_ch): New.
(scalar_mul_constraint): Add V8HF and V4HF.
(Is_float_mode): Fix white-space.
(Is_d_reg): Add V4HF and V8HF. Fix white-space.
(q): Add HF. Fix white-space.
(float_sup): New.
(float_SUP): New.
(cmp_op_unsp): Add UNSPEC_VCALE and UNSPEC_VCALT.
(neon_vfm_lane_as): New.
* config/arm/neon.md (add<mode>3_fp16): New.
(sub<mode>3_fp16): New.
(mul<mode>3add<mode>_neon): New.
(fma<VH:mode>4_intrinsic): New.
(fmsub<VCVTF:mode>4_intrinsic): Fix white-space.
(fmsub<VH:mode>4_intrinsic): New.
(<absneg_str><mode>2): New.
(neon_v<absneg_str><mode>): New.
(neon_v<fp16_rnd_str><mode>): New.
(neon_vrsqrte<mode>): New.
(neon_vpaddv4hf): New.
(neon_vadd<mode>): New.
(neon_vsub<mode>): New.
(neon_vmulf<mode>): New.
(neon_vfma<VH:mode>): New.
(neon_vfms<VH:mode>): New.
(neon_vc<cmp_op><mode>): New.
(neon_vc<cmp_op><mode>_fp16insn): New
(neon_vc<cmp_op_unsp><mode>_fp16insn_unspec): New.
(neon_vca<cmp_op><mode>): New.
(neon_vca<cmp_op><mode>_fp16insn): New.
(neon_vca<cmp_op_unsp><mode>_fp16insn_unspec): New.
(neon_vc<cmp_op>z<mode>): New.
(neon_vabd<mode>): New.
(neon_v<maxmin>f<mode>): New.
(neon_vp<maxmin>fv4hf: New.
(neon_<fmaxmin_op><mode>): New.
(neon_vrecps<mode>): New.
(neon_vrsqrts<mode>): New.
(neon_vrecpe<mode>): New (VH variant).
(neon_vdup_lane<mode>_internal): New.
(neon_vdup_lane<mode>): New.
(neon_vcvt<sup><mode>): New (VCVTHI variant).
(neon_vcvt<sup><mode>): New (VH variant).
(neon_vcvt<sup>_n<mode>): New (VH variant).
(neon_vcvt<sup>_n<mode>): New (VCVTHI variant).
(neon_vcvt<vcvth_op><sup><mode>): New.
(neon_vmul_lane<mode>): New.
(neon_vmul_n<mode>): New.
* config/arm/unspecs.md (UNSPEC_VCALE): New
(UNSPEC_VCALT): New.
(UNSPEC_VFMA_LANE): New.
(UNSPECS_VFMS_LANE): New.
gcc/testsuite/
Backport from trunk r240415.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/armv8_2-fp16-arith-1.c: Use arm_v8_2a_fp16_neon
options. Add tests for float16x4_t and float16x8_t.
gcc/
Backport from trunk r240416.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-builtins.c (arm_init_neon_builtin): New.
(arm_init_builtins): Move body of a loop to the standalone
function arm_init_neon_builtin.
(arm_expand_neon_builtin_1): New. Update comment. Function body
moved from arm_neon_builtin with some white-space fixes.
(arm_expand_neon_builtin): Move code into the standalone function
arm_expand_neon_builtin_1.
gcc/
Backport from trunk r240421.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm-builtins.c (hf_UP): New.
(si_UP): New.
(vfp_builtin_data): New. Update comment.
(enum arm_builtins): Include "arm_vfp_builtins.def".
(ARM_BUILTIN_VFP_PATTERN_START): New.
(arm_init_vfp_builtins): New.
(arm_init_builtins): Add arm_init_vfp_builtins.
(arm_expand_vfp_builtin): New.
(arm_expand_builtins): Update for arm_expand_vfp_builtin. Fix
long line.
* config/arm/arm_vfp_builtins.def: New file.
* config/arm/t-arm (arm.o): Add arm_vfp_builtins.def.
(arm-builtins.o): Likewise.
gcc/
Backport from trunk r240422.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm_neon_builtins.def (vadd): New (v8hf, v4hf
variants).
(vmulf): New (v8hf, v4hf variants).
(vfma): New (v8hf, v4hf variants).
(vfms): New (v8hf, v4hf variants).
(vsub): New (v8hf, v4hf variants).
(vcage): New (v8hf, v4hf variants).
(vcagt): New (v8hf, v4hf variants).
(vcale): New (v8hf, v4hf variants).
(vcalt): New (v8hf, v4hf variants).
(vceq): New (v8hf, v4hf variants).
(vcgt): New (v8hf, v4hf variants).
(vcge): New (v8hf, v4hf variants).
(vcle): New (v8hf, v4hf variants).
(vclt): New (v8hf, v4hf variants).
(vceqz): New (v8hf, v4hf variants).
(vcgez): New (v8hf, v4hf variants).
(vcgtz): New (v8hf, v4hf variants).
(vcltz): New (v8hf, v4hf variants).
(vclez): New (v8hf, v4hf variants).
(vabd): New (v8hf, v4hf variants).
(vmaxf): New (v8hf, v4hf variants).
(vmaxnm): New (v8hf, v4hf variants).
(vminf): New (v8hf, v4hf variants).
(vminnm): New (v8hf, v4hf variants).
(vpmaxf): New (v4hf variant).
(vpminf): New (v4hf variant).
(vpadd): New (v4hf variant).
(vrecps): New (v8hf, v4hf variants).
(vrsqrts): New (v8hf, v4hf variants).
(vabs): New (v8hf, v4hf variants).
(vneg): New (v8hf, v4hf variants).
(vrecpe): New (v8hf, v4hf variants).
(vrnd): New (v8hf, v4hf variants).
(vrnda): New (v8hf, v4hf variants).
(vrndm): New (v8hf, v4hf variants).
(vrndn): New (v8hf, v4hf variants).
(vrndp): New (v8hf, v4hf variants).
(vrndx): New (v8hf, v4hf variants).
(vrsqrte): New (v8hf, v4hf variants).
(vmul_lane): Add v4hf and v8hf variants.
(vmul_n): Add v4hf and v8hf variants.
(vext): New (v8hf, v4hf variants).
(vcvts): New (v8hi, v4hi variants).
(vcvts): New (v8hf, v4hf variants).
(vcvtu): New (v8hi, v4hi variants).
(vcvtu): New (v8hf, v4hf variants).
(vcvts_n): New (v8hf, v4hf variants).
(vcvtu_n): New (v8hi, v4hi variants).
(vcvts_n): New (v8hi, v4hi variants).
(vcvtu_n): New (v8hf, v4hf variants).
(vbsl): New (v8hf, v4hf variants).
(vcvtas): New (v8hf, v4hf variants).
(vcvtau): New (v8hf, v4hf variants).
(vcvtms): New (v8hf, v4hf variants).
(vcvtmu): New (v8hf, v4hf variants).
(vcvtns): New (v8hf, v4hf variants).
(vcvtnu): New (v8hf, v4hf variants).
(vcvtps): New (v8hf, v4hf variants).
(vcvtpu): New (v8hf, v4hf variants).
gcc/
Backport from trunk r240423.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config.gcc (extra_headers): Add arm_fp16.h
* config/arm/arm_fp16.h: New.
* config/arm/arm_neon.h: Include "arm_fp16.h".
gcc/
Backport from trunk r240424.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm_neon.h (vabd_f16): New.
(vabdq_f16): New.
(vabs_f16): New.
(vabsq_f16): New.
(vadd_f16): New.
(vaddq_f16): New.
(vcage_f16): New.
(vcageq_f16): New.
(vcagt_f16): New.
(vcagtq_f16): New.
(vcale_f16): New.
(vcaleq_f16): New.
(vcalt_f16): New.
(vcaltq_f16): New.
(vceq_f16): New.
(vceqq_f16): New.
(vceqz_f16): New.
(vceqzq_f16): New.
(vcge_f16): New.
(vcgeq_f16): New.
(vcgez_f16): New.
(vcgezq_f16): New.
(vcgt_f16): New.
(vcgtq_f16): New.
(vcgtz_f16): New.
(vcgtzq_f16): New.
(vcle_f16): New.
(vcleq_f16): New.
(vclez_f16): New.
(vclezq_f16): New.
(vclt_f16): New.
(vcltq_f16): New.
(vcltz_f16): New.
(vcltzq_f16): New.
(vcvt_f16_s16): New.
(vcvt_f16_u16): New.
(vcvt_s16_f16): New.
(vcvt_u16_f16): New.
(vcvtq_f16_s16): New.
(vcvtq_f16_u16): New.
(vcvtq_s16_f16): New.
(vcvtq_u16_f16): New.
(vcvta_s16_f16): New.
(vcvta_u16_f16): New.
(vcvtaq_s16_f16): New.
(vcvtaq_u16_f16): New.
(vcvtm_s16_f16): New.
(vcvtm_u16_f16): New.
(vcvtmq_s16_f16): New.
(vcvtmq_u16_f16): New.
(vcvtn_s16_f16): New.
(vcvtn_u16_f16): New.
(vcvtnq_s16_f16): New.
(vcvtnq_u16_f16): New.
(vcvtp_s16_f16): New.
(vcvtp_u16_f16): New.
(vcvtpq_s16_f16): New.
(vcvtpq_u16_f16): New.
(vcvt_n_f16_s16): New.
(vcvt_n_f16_u16): New.
(vcvtq_n_f16_s16): New.
(vcvtq_n_f16_u16): New.
(vcvt_n_s16_f16): New.
(vcvt_n_u16_f16): New.
(vcvtq_n_s16_f16): New.
(vcvtq_n_u16_f16): New.
(vfma_f16): New.
(vfmaq_f16): New.
(vfms_f16): New.
(vfmsq_f16): New.
(vmax_f16): New.
(vmaxq_f16): New.
(vmaxnm_f16): New.
(vmaxnmq_f16): New.
(vmin_f16): New.
(vminq_f16): New.
(vminnm_f16): New.
(vminnmq_f16): New.
(vmul_f16): New.
(vmul_lane_f16): New.
(vmul_n_f16): New.
(vmulq_f16): New.
(vmulq_lane_f16): New.
(vmulq_n_f16): New.
(vneg_f16): New.
(vnegq_f16): New.
(vpadd_f16): New.
(vpmax_f16): New.
(vpmin_f16): New.
(vrecpe_f16): New.
(vrecpeq_f16): New.
(vrnd_f16): New.
(vrndq_f16): New.
(vrnda_f16): New.
(vrndaq_f16): New.
(vrndm_f16): New.
(vrndmq_f16): New.
(vrndn_f16): New.
(vrndnq_f16): New.
(vrndp_f16): New.
(vrndpq_f16): New.
(vrndx_f16): New.
(vrndxq_f16): New.
(vrsqrte_f16): New.
(vrsqrteq_f16): New.
(vrecps_f16): New.
(vrecpsq_f16): New.
(vrsqrts_f16): New.
(vrsqrtsq_f16): New.
(vsub_f16): New.
(vsubq_f16): New.
gcc/testsuite/
Backport from trunk r240425.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/armv8_2-fp16-neon-1.c: New.
* gcc.target/arm/armv8_2-fp16-scalar-1.c: New.
* gcc.target/arm/armv8_2-fp16-scalar-2.c: New.
* gcc.target/arm/attr-fp16-arith-1.c: Add a test of intrinsics
support.
gcc/testsuite/
Backport from trunk r240426.
2016-09-23 Jiong Wang <jiong.wang@arm.com>
Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/binary_scalar_op.inc: New.
* gcc.target/aarch64/advsimd-intrinsics/unary_scalar_op.inc: New.
* gcc.target/aarch64/advsimd-intrinsics/ternary_scalar_op.inc: New.
* gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c: New.
gcc/testsuite/
Backport from trunk r240427.
2016-09-23 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/advsimd-intrinsics/advsimd-intrinsics.exp: Enable
-march=armv8.2-a+fp16 when supported by the hardware.
* gcc.target/aarch64/advsimd-intrinsics/binary_op_float.inc: New.
* gcc.target/aarch64/advsimd-intrinsics/binary_op_no64.inc:
Add F16 tests, enabled if macro HAS_FLOAT16_VARIANT is defined. Add
semi-colons to a macro invocations.
* gcc.target/aarch64/advsimd-intrinsics/cmp_fp_op.inc: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/cmp_op.inc: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/cmp_zero_op.inc: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vabd.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vabs.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vadd.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcage.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcagt.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcale.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcalt.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vceq.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vceqz_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcge.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vcgez_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcgt.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vcgtz_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcle.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vclez_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vclt.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vcltz_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vcvt.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined. Also fix some white-space.
* gcc.target/aarch64/advsimd-intrinsics/vcvtX.inc: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvta_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtm_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtp_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vfma.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined. Also fix some long lines and white-space.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vfms.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined. Also fix some long lines and white-space.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vmax.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vmaxnm_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vmin.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vminnm_1.c: New.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vmul.c: Add F16
tests, enabled if macro __ARM_FEATURE_FP16_VECTOR_ARITHMETIC is
defined.
* gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vmul_n.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vneg.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vpXXX.inc: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vpadd.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vpmax.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vpmin.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrecpe.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrecps.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrnd.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrndX.inc: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrnda.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrndm.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrndn.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrndp.c:
Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vrndx.c:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrsqrte.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vrsqrts.c: Likewise.
* gcc.target/gcc.target/aarch64/advsimd-intrinsics/vsub.c:
Likewise.
gcc/
Backport from trunk r240541.
2016-09-27 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm.md (*arm_movsi_insn): Add "arch" attribute.
* config/arm/vfp.md (*arm_movhi_vfp): Likewise.
(*thumb2_movhi_vfp): Likewise.
(*arm_movhi_fp16): Remove predication operand from VMOV.F16
template. Expand predicable attribute to mark VMOV.F16 as not
predicable. Add "arch" attribute.
(*thumb2_movhi_fp16): Likewise.
(*arm_movsi_vfp): Break a long line. Add "arch" attribute.
(*thumb2_movsi_vfp): Add "arch" attribute.
missing/
Backport from trunk r240542.
gcc/testsuite/
Backport from trunk r240551.
2016-09-27 Jiong Wang <jiong.wang@arm.com>
* lib/target-supports.exp
(check_effective_target_arm_v8_2a_fp16_scalar_hw): Delete redundant word
in function comment.
gcc/
Backport from trunk r240622.
2016-09-29 Matthew Wahab <matthew.wahab@arm.com>
* config/arm/arm.md (*arm_movsi_insn): Replace "t2" arch attribute
with "v6t2". Move "arch" attribute above "pool_range".
* config/arm/vfp.md (*arm_movhi_vfp): Replace "t2" arch attribute
with "v6t2".
(*thumb2_movhi_vfp): Likewise.
(*arm_movhi_fp16): Likewise.
(*thumb2_movhi_fp16): Likewise.
(*arm_movsi_vfp): Remove "arch" attribute.
(*thumb2_movsi_vfp): Likewise.
gcc/testsuite/
Backport from trunk r240921.
2016-10-10 Matthew Wahab <matthew.wahab@arm.com>
Jiong Wang <jiong.wang@arm.com>
* target-supports.exp (add_options_for_arm_v8_2a_fp16_scalar): Mention
AArch64 support.
(add_options_for_arm_v8_2a_fp16_neon): Likewise.
(check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): Support
AArch64 targets.
(check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): Support
AArch64 targets.
(check_effective_target_arm_v8_2a_fp16_scalar_hw): Support AArch64
targets.
(check_effective_target_arm_v8_2a_fp16_neon_hw): Likewise.
2016-10-10 Eric Botgazou <ebotcazou@adacore.com>
gcc/testsuite/
Backport from trunk r240922.
2016-10-10 Jiong Wang <jiong.wang@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (FP16_SUPPORTED):
Enable AArch64.
* gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c: Add support for
vdup*_laneq.
* gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: New.
gcc/testsuite/
Backport from trunk r240923.
2016-10-10 Jiong Wang <jiong.wang@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c: New.
gcc/testsuite/
Backport from trunk r240924.
2016-10-10 Jiong Wang <jiong.wang@arm.com>
* gcc.target/aarch64/advsimd-intrinsics/unary_scalar_op.inc: Support FMT64.
* gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c: New.
* gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c: New.
Change-Id: I4f2c1a2c934a8c101457de5a1ce7134baebe2fb0
Yvan Roux [Sat, 15 Oct 2016 19:51:57 +0000 (21:51 +0200)]
gcc/
Backport from trunk r240791.
2016-10-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* fold-const.c (native_encode_real): Fix logic for selecting offset
to write to when BYTES_BIG_ENDIAN.
Change-Id: I0ce72bead9880c0064f34a629499271b9337cdf8
Yvan Roux [Sat, 15 Oct 2016 09:20:32 +0000 (11:20 +0200)]
gcc/
Backport from trunk r240256.
2016-09-20 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/arm_neon.h: Add gnu_inline and artificial
attributes to all inlined functions and make them extern.
gcc/
Backport from trunk r240271.
2016-09-20 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/arm_neon.h
(vst2_s64, vst2_u64, vst2_f64, vst2_s8): Add missing attributes.
(vst3_s64, vst3_u64, vst3_f64, vst3_s8): Likewise.
(vst4_s64, vst4_u64, vst4_f64, vst4_s8): Likewise.
Change-Id: Iacc298c3d1cf6a713a2ed96e8331b0794b03708a
Yvan Roux [Thu, 15 Sep 2016 14:22:12 +0000 (16:22 +0200)]
gcc/
Backport from trunk r238000.
2016-07-05 Christophe Lyon <christophe.lyon@linaro.org>
* config/arm/neon-testgen.ml: Delete.
* config/arm/neon.ml: Delete.
gcc/testsuite/
Backport from trunk r238000.
2016-07-05 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/arm/neon/polytypes.c: Move to ...
* gcc.target/arm/polytypes.c: ... here.
* gcc.target/arm/neon/pr51534.c: Move to ...
* gcc.target/arm/pr51534.c: ... here.
* gcc.target/arm/neon/vect-vcvt.c: Move to ...
* gcc.target/arm/vect-vcvt.c: ... here.
* gcc.target/arm/neon/vect-vcvtq.c: Move to ...
* gcc.target/arm/vect-vcvtq.c: ... here.
* gcc.target/arm/neon/vfp-shift-a2t2.c: Move to ...
* gcc.target/arm/vfp-shift-a2t2.c: ... here.
* gcc.target/arm/neon/vst1Q_laneu64-1.c: Move to ...
* gcc.target/arm/vst1Q_laneu64-1.c: ... here. Fix foo() prototype.
* gcc.target/arm/neon/neon.exp: Delete.
* gcc.target/arm/neon/: Delete.
gcc/testsuite/
Backport from trunk r238046.
2016-07-06 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.target/arm/vst1Q_laneu64-1.c (foo): Use unsigned char*.
Change-Id: I000858c7a70325f7b6f5b00055b34d76955b8594
Yvan Roux [Fri, 14 Oct 2016 09:03:45 +0000 (11:03 +0200)]
gcc/
Backport from trunk r237002.
2016-06-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
* doc/sourcebuild.texi (arm_acq_rel): Document new effective target.
gcc/testsuite/
Backport from trunk r237002.
2016-06-01 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp (check_effective_target_arm_acq_rel): New
procedure.
Change-Id: Iab8b0839cebaaf709e73aa30a42ad77f662e7d20
Yvan Roux [Thu, 15 Sep 2016 14:49:17 +0000 (16:49 +0200)]
gcc/
Backport from trunk r238079.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/elf.h: Use __ARM_ARCH_ISA_THUMB and __ARM_ARCH_ISA_ARM to
decide whether to prevent some libgcc routines being included for some
multilibs rather than __ARM_ARCH_6M__ and add comment to indicate the
link between this condition and the one in
libgcc/config/arm/lib1func.S.
gcc/testsuite/
Backport from trunk r238079.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp (check_effective_target_arm_cortex_m): Use
__ARM_ARCH_ISA_ARM to test for Cortex-M devices.
libgcc/
Backport from trunk r238079.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/bpabi-v6m.S: Clarify what architectures is the
implementation suitable for.
* config/arm/lib1funcs.S (__prefer_thumb__): Define among other cases
for all Thumb-1 only targets.
(NOT_ISA_TARGET_32BIT): Define for Thumb-1 only targets.
(THUMB_LDIV0): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__.
(EQUIV): Likewise.
(ARM_FUNC_ALIAS): Likewise.
(umodsi3): Add check to __ARM_ARCH_ISA_THUMB != 1 to guard the idiv
version.
(modsi3): Likewise.
(clzsi2): Test for NOT_ISA_TARGET_32BIT rather than __ARM_ARCH_6M__.
(clzdi2): Likewise.
(ctzsi2): Likewise.
(L_interwork_call_via_rX): Test for __ARM_ARCH_ISA_ARM rather than
__ARM_ARCH_6M__ in guard for checking whether it is defined.
(final includes): Test for NOT_ISA_TARGET_32BIT rather than
__ARM_ARCH_6M__ and add comment to indicate the connection between
this condition and the one in gcc/config/arm/elf.h.
* config/arm/libunwind.S: Test for __ARM_ARCH_ISA_THUMB and
__ARM_ARCH_ISA_ARM rather than __ARM_ARCH_6M__.
* config/arm/t-softfp: Likewise.
libgcc/
Backport from trunk r238080.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/lib1funcs.S (HAVE_ARM_CLZ): Define for ARMv6* or later
and ARMv5t* rather than for a fixed list of architectures.
gcc/
Backport from trunk r238081.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-arches.def (armv8-m.base): Define new architecture.
(armv8-m.main): Likewise.
(armv8-m.main+dsp): Likewise.
* config/arm/arm-protos.h (FL_FOR_ARCH8M_BASE): Define.
(FL_FOR_ARCH8M_MAIN): Likewise.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/bpabi.h: Add armv8-m.base, armv8-m.main and
armv8-m.main+dsp to BE8_LINK_SPEC.
* config/arm/arm.h (TARGET_HAVE_LDACQ): Exclude ARMv8-M.
(enum base_architecture): Add BASE_ARCH_8M_BASE and BASE_ARCH_8M_MAIN.
* config/arm/arm.c (arm_arch_name): Increase size to work with ARMv8-M
Baseline and Mainline.
(arm_option_override_internal): Also disable arm_restrict_it when
!arm_arch_notm. Update comment for -munaligned-access to also cover
ARMv8-M Baseline.
(arm_file_start): Increase buffer size for printing architecture name.
* doc/invoke.texi: Document architectures armv8-m.base, armv8-m.main
and armv8-m.main+dsp.
(mno-unaligned-access): Clarify that this is disabled by default for
ARMv8-M Baseline architectures as well.
gcc/testsuite/
Backport from trunk r238081.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp: Generate add_options_for_arm_arch_FUNC and
check_effective_target_arm_arch_FUNC_multilib for ARMv8-M Baseline and
ARMv8-M Mainline architectures.
libgcc/
Backport from trunk r238081.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/lib1funcs.S (__ARM_ARCH__): Define to 8 for ARMv8-M.
gcc/
Backport from trunk r238082.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm-protos.h: Reindent FL_FOR_* macro definitions.
gcc/
Backport from trunk r238083.
2016-07-07 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.h (TARGET_USE_MOVT): Check MOVT/MOVW availability
with TARGET_HAVE_MOVT.
(TARGET_HAVE_MOVT): Define.
* config/arm/arm.c (const_ok_for_op): Check MOVT/MOVW
availability with TARGET_HAVE_MOVT.
* config/arm/arm.md (arm_movt): Use TARGET_HAVE_MOVT to check MOVT
availability.
(addsi splitter): Use TARGET_THUMB && TARGET_HAVE_MOVT rather than
TARGET_THUMB2.
(symbol_refs movsi splitter): Remove TARGET_32BIT check.
(arm_movtas_ze): Use TARGET_HAVE_MOVT to check MOVT availability.
* config/arm/constraints.md (define_constraint "j"): Use
TARGET_HAVE_MOVT to check MOVT availability.
gcc/
Backport from trunk r238288.
2016-07-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.h (TARGET_HAVE_MOVT): Include ARMv8-M as having MOVT.
* config/arm/arm.c (arm_arch_name): (const_ok_for_op): Check MOVT/MOVW
availability with TARGET_HAVE_MOVT.
(thumb_legitimate_constant_p): Strip the high part of a label_ref.
(thumb1_rtx_costs): Also return 0 if setting a half word constant and
MOVW is available and replace (unsigned HOST_WIDE_INT) INTVAL by
UINTVAL.
(thumb1_size_rtx_costs): Make set of half word constant also cost 1
extra instruction if MOVW is available. Use a cost variable
incremented by COSTS_N_INSNS (1) when the condition match rather than
returning an arithmetic expression based on COSTS_N_INSNS. Make
constant with bottom half word zero cost 2 instruction if MOVW is
available.
* config/arm/arm.md (define_attr "arch"): Add v8mb.
(define_attr "arch_enabled"): Set to yes if arch value is v8mb and
target is ARMv8-M Baseline.
(arm_movt): New unpredicable alternative for ARMv8-M Baseline.
(arm_movtas_ze): Likewise.
* config/arm/thumb1.md (thumb1_movdi_insn): Add ARMv8-M Baseline only
alternative for constants satisfying j constraint.
(thumb1_movsi_insn): Likewise.
(movsi splitter for K alternative): Tighten condition to not trigger
if movt is available and j constraint is satisfied.
(Pe immediate splitter): Likewise.
(thumb1_movhi_insn): Add ARMv8-M Baseline only alternative for
constant fitting in an halfword to use MOVW.
* doc/sourcebuild.texi (arm_thumb1_movt_ok): Document new ARM
effective target.
gcc/testsuite/
Backport from trunk r238288.
2016-07-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp (check_effective_target_arm_thumb1_movt_ok):
Define effective target.
* gcc.target/arm/pr42574.c: Require arm_thumb1_ok and
!arm_thumb1_movt_ok to exclude ARMv8-M Baseline.
* gcc.target/arm/movhi_movw.c: New test.
* gcc.target/arm/movsi_movw.c: Likewise.
* gcc.target/arm/movdi_movw.c: Likewise.
gcc/
Backport from trunk r238289.
2016-07-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.h (TARGET_HAVE_CBZ): Define.
(TARGET_IDIV): Set for all Thumb targets provided they have hardware
divide feature.
* config/arm/arm.md (divsi3): New unpredicable alternative for ARMv8-M
Baseline. Make initial alternative TARGET_32BIT only.
(udivsi3): Likewise.
* config/arm/thumb1.md (thumb1_cbz): New define_insn.
* doc/sourcebuild.texi (arm_thumb1_cbz_ok): Document new effective
target.
gcc/testsuite/
Backport from trunk r238289.
2016-07-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* lib/target-supports.exp (check_effective_target_arm_thumb1_cbz_ok):
Add new arm_thumb1_cbz_ok effective target.
* gcc.target/arm/cbz.c: New test.
gcc/testsuite/
Backport from trunk r238331.
2016-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/pr42574.c: Add missing target keyword for the dg-do
selector and enclose boolean expression in curly braces.
gcc/
Backport from trunk r238348.
2016-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/arm.h (TARGET_HAVE_LDACQ): Enable for ARMv8-M Mainline.
(TARGET_HAVE_LDACQD): New macro.
* config/arm/sync.md (atomic_loaddi): Use TARGET_HAVE_LDACQD rather
than TARGET_HAVE_LDACQ.
(arm_load_acquire_exclusivedi): Likewise.
(arm_store_release_exclusivedi): Likewise.
gcc/testsuite/
Backport from trunk r238348.
2016-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/atomic-comp-swap-release-acquire.c: Rename into ...
* gcc.target/arm/atomic-comp-swap-release-acquire-1.c: This.
* gcc.target/arm/atomic-op-acq_rel.c: Rename into ...
* gcc.target/arm/atomic-op-acq_rel-1.c: This.
* gcc.target/arm/atomic-op-acquire.c: Rename into ...
* gcc.target/arm/atomic-op-acquire-1.c: This.
* gcc.target/arm/atomic-op-char.c: Rename into ...
* gcc.target/arm/atomic-op-char-1.c: This.
* gcc.target/arm/atomic-op-consume.c: Rename into ...
* gcc.target/arm/atomic-op-consume-1.c: This.
* gcc.target/arm/atomic-op-int.c: Rename into ...
* gcc.target/arm/atomic-op-int-1.c: This.
* gcc.target/arm/atomic-op-relaxed.c: Rename into ...
* gcc.target/arm/atomic-op-relaxed-1.c: This.
* gcc.target/arm/atomic-op-release.c: Rename into ...
* gcc.target/arm/atomic-op-release-1.c: This.
* gcc.target/arm/atomic-op-seq_cst.c: Rename into ...
* gcc.target/arm/atomic-op-seq_cst-1.c: This.
* gcc.target/arm/atomic-op-short.c: Rename into ...
* gcc.target/arm/atomic-op-short-1.c: This.
* gcc.target/arm/atomic-comp-swap-release-acquire-2.c: New test.
* gcc.target/arm/atomic-op-acq_rel-2.c: Likewise.
* gcc.target/arm/atomic-op-acquire-2.c: Likewise.
* gcc.target/arm/atomic-op-char-2.c: Likewise.
* gcc.target/arm/atomic-op-consume-2.c: Likewise.
* gcc.target/arm/atomic-op-int-2.c: Likewise.
* gcc.target/arm/atomic-op-relaxed-2.c: Likewise.
* gcc.target/arm/atomic-op-release-2.c: Likewise.
* gcc.target/arm/atomic-op-seq_cst-2.c: Likewise.
* gcc.target/arm/atomic-op-short-2.c: Likewise.
gcc/
Backport from trunk r239888.
2016-08-31 Eric Botcazou <ebotcazou@adacore.com>
* config/arm/arm.c (thumb1_size_rtx_costs) <SET>: Add missing guard.
gcc/testsuite/
Backport from trunk r241086.
2016-10-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* gcc.target/arm/movhi_movw.c: Enable test for ARM mode.
* gcc.target/arm/movsi_movw.c: Likewise.
* gcc.target/arm/movdi_movw.c: Likewise and adapt scan-assembler
directive to work on big endian targets.
Change-Id: I9fea67c44aa10d639644c90a4b436d4f809da9fc
Yvan Roux [Thu, 15 Sep 2016 14:19:44 +0000 (16:19 +0200)]
gcc/
Backport from trunk r237857.
2016-06-29 Jim Wilson <jim.wilson@linaro.org>
* config/aarch64/aarch64-cores.def (qdf24xx): Use qdf24xx tuning.
* config/aarch64/aarch64.c (qdf24xx_addrcost_table,
qdf24xx_regmove_cost, qdf24xx_tunings): New.
* config/arm/aarch64-cost-tables.h (qdf24xx_extra_costs): New.
* config/arm/arm-cores.def (qdf24xx): Use qdf24xx tuning.
* config/arm/arm.c (arm_qdf24xx_tune): New.
gcc/testsuite/
Backport from trunk r237857.
2016-06-29 Jim Wilson <jim.wilson@linaro.org>
* gcc.dg/asr_div1.c: Add aarch64 specific dg-options.
Change-Id: I6937b1e3ec6049a296ab700994cd79ea1c637979
Yvan Roux [Thu, 15 Sep 2016 11:47:52 +0000 (13:47 +0200)]
gcc/
Backport from trunk r238977.
2016-08-02 Tamar Christina <tamar.christina@arm.com>
* config/aarch64/aarch64-simd-builtins.def
(__builtin_aarch64_fmindf): Change BUILTIN_VDQF to BUILTIN_VDQF_DF.
(__builtin_aarch64_fmaxdf): Likewise.
(__builtin_aarch64_smin_nandf): Likewise.
(__builtin_aarch64_smax_nandf): Likewise.
* config/aarch64/aarch64-simd.md (<fmaxmin><mode>3): Remove.
* config/aarch64/aarch64.md (<fmaxmin><mode>3): Rename to...
(<fmaxmin><mode>3): ...this.
* config/aarch64/arm_neon.h (vmaxnm_f64): New.
(vminnm_f64): Likewise.
(vmin_f64): Likewise.
(vmax_f64): Likewise.
* config/aarch64/iterators.md (FMAXMIN): Merge with...
(FMAXMIN_UNS): ...this.
(fmaxmin): Merged with
(fmaxmin_op): ...this...
(maxmin_uns_op): ...in to this.
gcc/testsuite/
Backport from trunk r238977.
2016-08-02 Tamar Christina <tamar.christina@arm.com>
* gcc.target/aarch64/vminmaxnm.c: New.
* gcc.target/aarch64/simd/vminmaxnm_1.c (main): Add float64x1_t
tests.
gcc/
Backport from trunk r238989.
2016-02-08 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/arm_neon.h (vminnm_f64): Add back missing 'f' from
__builtin_aarch64_fmindf.
Change-Id: Iedd92bb1d08f8e4ba47b0d01d8a66df8683056f9
Yvan Roux [Wed, 14 Sep 2016 09:45:43 +0000 (11:45 +0200)]
gcc/
Backport from trunk r240102.
2016-09-12 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64-tuning-flags.def (SLOW_UNALIGNED_LDPW):
New tuning option.
* config/aarch64/aarch64.c (thunderx_tunings): Enable
AARCH64_EXTRA_TUNE_SLOW_UNALIGNED_LDPW.
(aarch64_operands_ok_for_ldpstp): Return false if
AARCH64_EXTRA_TUNE_SLOW_UNALIGNED_LDPW and the mode
was SImode and the alignment is less than 8 byte.
(aarch64_operands_adjust_ok_for_ldpstp): Likewise.
gcc/testsuite/
Backport from trunk r240102.
2016-09-12 Andrew Pinski <apinski@cavium.com>
* gcc.target/aarch64/thunderxloadpair.c: New testcase.
* gcc.target/aarch64/thunderxnoloadpair.c: New testcase.
Change-Id: I8cc39d2082b5eb901979ca677965c18b4356383b
Yvan Roux [Wed, 14 Sep 2016 09:44:51 +0000 (11:44 +0200)]
libgcc/
Backport from trunk r240033.
2016-09-07 Joseph Myers <joseph@codesourcery.com>
PR libgcc/77519
* libgcc2.c (NOTRUNC): Invert settings.
Change-Id: I1e01681bbf86d99e9106e5c2fb60d2e6990415c0
Yvan Roux [Wed, 14 Sep 2016 09:43:29 +0000 (11:43 +0200)]
gcc/
Backport from trunk r239212.
2016-08-08 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* tree-ssa-ccp.c (extend_mask): New param sgn.
Remove ORing with wi::mask.
(get_default_value): Adjust call to extend_mask to pass sign.
(evaluate_stmt): Likewise.
Change-Id: Ia929df985c53ccc0b51d35d801f93d29c850a33d
Yvan Roux [Wed, 14 Sep 2016 09:45:12 +0000 (11:45 +0200)]
libgcc/
Backport from trunk r240043.
2016-09-09 James Greenhalgh <james.greenhalgh@arm.com>
PR target/63250
* Makefile.in (lib2funcs): Build _mulhc3 and _divhc3.
* libgcc2.h (LIBGCC_HAS_HF_MODE): Conditionally define.
(HFtype): Likewise.
(HCtype): Likewise.
(__divhc3): Likewise.
(__mulhc3): Likewise.
* libgcc2.c: Support _mulhc3 and _divhc3.
Change-Id: If5fe0cfd670daca59e709646c53545186663e956
Yvan Roux [Wed, 14 Sep 2016 09:42:43 +0000 (11:42 +0200)]
gcc/
Backport from trunk r238588.
2016-07-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* tree-ssa-strlen.c (strlen_dom_walker::before_dom_children): Fix typo
in comment.
Change-Id: I8f790b9069966539b73b737277404d935a806cfb
Yvan Roux [Wed, 14 Sep 2016 09:41:07 +0000 (11:41 +0200)]
gcc/
Backport from trunk r237475.
2016-06-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* ifcvt.c (bb_ok_for_noce_multiple_sets): Allow simple lowpart
register subregs in SET_SRC.
gcc/testsuite/
Backport from trunk r237475.
2016-06-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/ifcvt_multiple_sets_subreg_1.c: New test.
Change-Id: I4ec7ce4a8f1657808d37c8500e10661401ccecf4
Yvan Roux [Wed, 7 Sep 2016 22:01:01 +0000 (00:01 +0200)]
gcc/
* LINARO-VERSION: Bump version number, post snapshot.
Change-Id: I705e185765e0ad3094bb62e98ce908b01e4d6a99
Yvan Roux [Wed, 7 Sep 2016 20:30:23 +0000 (22:30 +0200)]
Make Linaro GCC Snapshot 6.2-2016.09.
gcc/
* LINARO-VERSION: Update.
Change-Id: I960f312affa0f51c88097815dd5c0f24ff842a60
Yvan Roux [Tue, 6 Sep 2016 12:44:22 +0000 (14:44 +0200)]
gcc/testsuite/
Backport from trunk r239609.
2016-08-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* gcc.dg/cpp/warn-undef.c: Append "evaluates to 0" to dg-error.
* gcc.dg/cpp/warn-undef-2.c: Likewise.
libcpp/
Backport from trunk r239609.
2016-08-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* expr.c (eval_token): Append "evaluates to 0" to Wundef diagnostic.
Change-Id: I363be41700a632019b206fdda9b8d94a4a734432
Yvan Roux [Tue, 6 Sep 2016 12:41:14 +0000 (14:41 +0200)]
gcc/
Backport from trunk r236632.
2016-05-24 Richard Sandiford <richard.sandiford@arm.com>
* tree-vect-stmts.c (vectorizable_load): Reorder checks so that
load_lanes/grouped_load classification comes first. Don't check
whether the vectorization factor is a multiple of the group size
for load_lanes.
gcc/testsuite/
Backport from trunk r236632.
2016-05-24 Richard Sandiford <richard.sandiford@arm.com>
* gcc.dg/vect/vect-load-lanes-peeling-1.c: New test.
Change-Id: I990689cf9c5b4f1d721e51c4d76157d5670b97e5
Yvan Roux [Tue, 6 Sep 2016 12:37:40 +0000 (14:37 +0200)]
gcc/
Backport from trunk r239528.
2016-08-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/t-aprofile (MULTILIB_EXCEPTIONS): Rewrite into ...
(MULTILIB_REQUIRED): This by specifying multilib needing to be built
rather than those that should not be built.
Change-Id: I1f44a5d7ea4d48b0a73ad8f31eeaf5a97b6a7449
Yvan Roux [Tue, 6 Sep 2016 12:28:23 +0000 (14:28 +0200)]
gcc/
Backport from trunk r238960.
2016-08-01 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.h (aarch64_frame):
Remove padding0 and hardfp_offset. Add locals_offset,
initial_adjust, callee_adjust, callee_offset and final_adjust.
* config/aarch64/aarch64.c (aarch64_layout_frame):
Remove unused padding0 and hardfp_offset initializations.
Choose frame layout and set frame variables accordingly.
Use INVALID_REGNUM instead of FIRST_PSEUDO_REGISTER.
(aarch64_push_regs): Use INVALID_REGNUM, not FIRST_PSEUDO_REGISTER.
(aarch64_pop_regs): Likewise.
(aarch64_expand_prologue): Remove all decision code, just emit
prolog according to frame variables.
(aarch64_expand_epilogue): Remove all decision code, just emit
epilog according to frame variables.
(aarch64_initial_elimination_offset): Use offset to local/arg area.
gcc/testsuite/
Backport from trunk r238960.
2016-08-01 Wilco Dijkstra <wdijkstr@arm.com>
* gcc.target/aarch64/test_frame_10.c: Fix test to check for a
single stack adjustment, no writeback.
* gcc.target/aarch64/test_frame_12.c: Likewise.
* gcc.target/aarch64/test_frame_13.c: Likewise.
* gcc.target/aarch64/test_frame_15.c: Likewise.
* gcc.target/aarch64/test_frame_6.c: Likewise.
* gcc.target/aarch64/test_frame_7.c: Likewise.
* gcc.target/aarch64/test_frame_8.c: Likewise.
* gcc.target/aarch64/test_frame_16.c: New test.
Change-Id: Id4fbbe13420b85d8cd466c4ae673206b799e7adc
Yvan Roux [Tue, 6 Sep 2016 12:27:14 +0000 (14:27 +0200)]
gcc/
Backport from trunk r238346.
2016-07-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
PR rtl-optimization/71878
* lra-constraints.c (match_reload): Pass information about other
output operands. Create new unique register value if matching input
operand shares same register value as output operand being considered.
(curr_insn_transform): Record output operands already processed.
Change-Id: Ib431825058891be8dd5b6e0c90742c4bdaeb9896
Yvan Roux [Mon, 5 Sep 2016 17:08:55 +0000 (19:08 +0200)]
gcc/
Backport from trunk r239859.
2016-08-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config.gcc (*-*-*musl*): Disable gnu-indirect-function.
gcc/
Backport from trunk r239860.
2016-08-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config/linux.c (linux_libc_has_function): Return true on musl.
Change-Id: Icd70e2db3b64b05fda721452e4a08c575e7a8832
Yvan Roux [Mon, 5 Sep 2016 17:08:24 +0000 (19:08 +0200)]
gcc/
Backport from trunk r239637.
2016-08-20 Kugan Vivekanandarajah <kuganv@linaro.org>
PR tree-optimization/61839
* tree-vrp.c (two_valued_val_range_p): New.
(simplify_stmt_using_ranges): Convert CST BINOP VAR where VAR is
two-valued to VAR == VAL1 ? (CST BINOP VAL1) : (CST BINOP VAL2).
Also Convert VAR BINOP CST where VAR is two-valued to
VAR == VAL1 ? (VAL1 BINOP CST) : (VAL2 BINOP CST).
gcc/testsuite/
Backport from trunk r239637.
2016-08-20 Kugan Vivekanandarajah <kuganv@linaro.org>
PR tree-optimization/61839
* gcc.dg/tree-ssa/pr61839_1.c: New test.
* gcc.dg/tree-ssa/pr61839_2.c: New test.
* gcc.dg/tree-ssa/pr61839_3.c: New test.
* gcc.dg/tree-ssa/pr61839_4.c: New test.
Change-Id: I9b7bb676ec7169d3052ee1e28c6208a9b3f94981
Yvan Roux [Mon, 5 Sep 2016 17:07:27 +0000 (19:07 +0200)]
gcc/
Backport from trunk r239162.
2016-08-05 Kugan Vivekanandarajah <kuganv@linaro.org>
* tree-vrp.c (extract_range_basic): Check cfun->after_inlining
before folding call to __builtin_constant_p with parameters to false.
Change-Id: Ic23b3a03d47cb7f4d5a816b1254af19b79f055fe
Yvan Roux [Mon, 5 Sep 2016 17:07:04 +0000 (19:07 +0200)]
gcc/
Backport from trunk r239118.
2016-08-04 Kugan Vivekanandarajah <kuganv@linaro.org>
* tree-inline.c (remap_ssa_name): Check for POINTER_TYPE_P before
accessing SSA_NAME_PTR_INFO.
Change-Id: I3a272801ed6b23fae600359cf3af668224bab1ea
Yvan Roux [Mon, 5 Sep 2016 17:06:04 +0000 (19:06 +0200)]
gcc/
Backport from trunk r238846.
2016-07-29 Kugan Vivekanandarajah <kuganv@linaro.org>
PR middle-end/68217
* tree-vrp.c (extract_range_from_binary_expr_1): In case of signed
& sign-bit-CST, generate [-INF, 0] instead of [-INF, INF].
gcc/testsuite/
Backport from trunk r238846.
2016-07-29 Kugan Vivekanandarajah <kuganv@linaro.org>
PR middle-end/68217
* gcc.dg/pr68217.c: New test.
Change-Id: Ieffe842d5a7969b2fb17f3515e223cccaea25f30
Yvan Roux [Mon, 5 Sep 2016 17:03:51 +0000 (19:03 +0200)]
gcc/
Backport from trunk r238337.
2016-07-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* expmed.c (mult_variant, choose_mult_variant): Move declaration to...
* expmed.h: ... Here.
gcc/
Backport from trunk r238340.
2016-07-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/65951
PR tree-optimization/70923
* tree-vect-patterns.c: Include mult-synthesis.h.
(target_supports_mult_synth_alg): New function.
(synth_lshift_by_additions): Likewise.
(apply_binop_and_append_stmt): Likewise.
(vect_synth_mult_by_constant): Likewise.
(target_has_vecop_for_code): Likewise.
(vect_recog_mult_pattern): Use above functions to synthesize vector
multiplication by integer constants.
gcc/testsuite/
Backport from trunk r238340.
2016-07-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/65951
PR tree-optimization/70923
* gcc.dg/vect/vect-mult-const-pattern-1.c: New test.
* gcc.dg/vect/vect-mult-const-pattern-2.c: Likewise.
* gcc.dg/vect/pr65951.c: Likewise.
* gcc.dg/vect/vect-iv-9.c: Remove ! vect_int_mult-specific scan.
Change-Id: I6ddfc66c4dcff8b8eb8e66b8945478bd9b50867a
Yvan Roux [Mon, 5 Sep 2016 17:03:07 +0000 (19:03 +0200)]
gcc/
Backport from trunk r238254, r238763.
2016-07-12 Nathan Sidwell <nathan@acm.org>
* config/arm/arm.c (arm_option_override): Set MASK_SINGLE_PIC_BASE
when -mno-pic-data-is-text-relative is in effect, by default.
* doc/invoke.texi (mpic-data-is-text-relative): Document new
behavior and clarify.
gcc/testsuite/
Backport from trunk r238254, r238763.
2016-07-12 Nathan Sidwell <nathan@acm.org>
* gcc.target/arm/data-rel-1.c: New.
* gcc.target/arm/data-rel-2.c: New.
* gcc.target/arm/data-rel-3.c: New.
Change-Id: Ic060a8302c039cf67a098618a539c14cd3589e23
Yvan Roux [Mon, 5 Sep 2016 17:02:37 +0000 (19:02 +0200)]
gcc/
Backport from trunk r238248.
2016-07-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR middle-end/71700
* expr.c (store_constructor): Mask sign-extended bits when widening
sub-word constructor element at the start of a word.
gcc/testsuite/
Backport from trunk r238248.
2016-07-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR middle-end/71700
* gcc.c-torture/execute/pr71700.c: New test.
Change-Id: Ib37452367e4ec169ca88ada2d233bc6a608c1045
Yvan Roux [Mon, 5 Sep 2016 17:00:39 +0000 (19:00 +0200)]
gcc/
Backport from trunk r238013.
2016-07-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR rtl-optimization/71594
* ifcvt.c (noce_convert_multiple_sets): Wrap new_val or old_val
into subregs of appropriate mode before trying to emit a conditional
move.
gcc/testsuite/
Backport from trunk r238013.
2016-07-05 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR rtl-optimization/71594
* gcc.dg/torture/pr71594.c: New test.
Change-Id: I0ee49c3987adc7ee7ef5d4d6baf9712e3659f885
Yvan Roux [Mon, 5 Sep 2016 17:00:05 +0000 (19:00 +0200)]
libstdc++-v3/
Backport from trunk r237879.
2016-06-30 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/29_atomics/atomic/65913.cc: Require atomic-builtins rather
than specific target.
Change-Id: Ib9a853136e48efd6843f07b6f8a3e0ae51397f78
Yvan Roux [Mon, 5 Sep 2016 16:58:45 +0000 (18:58 +0200)]
gcc/
Backport from trunk r237250.
2016-06-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* ifcvt.c (struct noce_if_info): Add transform_name field.
(noce_try_move): Set if_info->transform_name to the function name.
(noce_try_ifelse_collapse): Likewise.
(noce_try_store_flag): Likewise.
(noce_try_inverse_constants): Likewise.
(noce_try_store_flag_constants): Likewise.
(noce_try_addcc): Likewise.
(noce_try_store_flag_mask): Likewise.
(noce_try_cmove): Likewise.
(noce_try_cmove_arith): Likewise.
(noce_try_minmax): Likewise.
(noce_try_abs): Likewise.
(noce_try_sign_mask): Likewise.
(noce_try_bitop): Likewise.
(noce_convert_multiple_sets): Likewise.
(noce_process_if_block): Print if_info->transform_name to
dump_file if transformation succeeded.
Change-Id: I53c1da692ee6f51a06cba1310bf6b96bb9a9e3f7
Yvan Roux [Mon, 5 Sep 2016 12:11:02 +0000 (14:11 +0200)]
gcc/
Backport from trunk r239960.
2016-09-02 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* cfg.c (free_original_copy_tables): Replace second assignment of
bb_copy = NULL by bb_original = NULL.
Change-Id: I9699c79e5aed78014de3cb761873ac5cae6a3b60
Yvan Roux [Sun, 4 Sep 2016 21:34:11 +0000 (23:34 +0200)]
libstdc++-v3/
Backport from trunk r239955.
2016-09-02 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
* acinclude.m4 (GLIBCXX_CONFIGURE_TESTSUITE): Check for presence of
setrlimit on both native and cross targets.
* configure: Regenerate.
Change-Id: Ia32feb614e83cd8f1b4b75997da3b4123dad572c
Yvan Roux [Sun, 4 Sep 2016 21:33:47 +0000 (23:33 +0200)]
gcc/
Backport from trunk r239923.
2016-09-01 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
New function.
(TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT): Define.
Change-Id: I7e53994786c223e43f3df1ce27d4a97649c03eb9
Yvan Roux [Sun, 4 Sep 2016 21:33:28 +0000 (23:33 +0200)]
gcc/
Backport from trunk r239919.
2016-09-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.md (*ands<mode>_compare0): New pattern.
* config/aarch64/aarch64.c (aarch64_select_cc_mode): Return CC_NZmode
for comparisons of integer ZERO_EXTEND against zero.
gcc/testsuite/
Backport from trunk r239919.
2016-09-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/ands_3.c: New test.
Change-Id: I1eb5eee3b585ebfac952786043dbd6aed6c3f953
Yvan Roux [Sun, 4 Sep 2016 21:31:52 +0000 (23:31 +0200)]
gcc/
Backport from trunk r239865.
2016-08-30 Tamar Christina <tamar.christina@arm.com>
* gcc/config/aarch64/aarch64-simd.md
(aarch64_ld2<mode>_dreg_le): New.
(aarch64_ld2<mode>_dreg_be): New.
(aarch64_ld2<mode>_dreg): Removed.
(aarch64_ld3<mode>_dreg_le): New.
(aarch64_ld3<mode>_dreg_be): New.
(aarch64_ld3<mode>_dreg): Removed.
(aarch64_ld4<mode>_dreg_le): New.
(aarch64_ld4<mode>_dreg_be): New.
(aarch64_ld4<mode>_dreg): Removed.
(aarch64_ld<VSTRUCT:nregs><VDC:mode>): Wrapper around _le, _be.
Change-Id: Id69c164ccba5a9809b24d3edb26aa4179c62250a
Yvan Roux [Sun, 4 Sep 2016 21:31:27 +0000 (23:31 +0200)]
gcc/
Backport from trunk r239739.
2016-08-24 Michael Collison <michael.collison@linaro.org>
Michael Collison <michael.collison@arm.com>
* config/arm/arm-modes.def: Add new condition code mode CC_V
to represent the overflow bit.
* config/arm/arm.c (maybe_get_arm_condition_code):
Add support for CC_Vmode.
(arm_gen_unlikely_cbranch): New function to generate common
rtl conditional branches for overflow patterns.
* config/arm/arm-protos.h: Add prototype for
arm_gen_unlikely_cbranch.
* config/arm/arm.md (addv<mode>4, add<mode>3_compareV,
addsi3_compareV_upper): New patterns to support signed
builtin overflow add operations.
(uaddv<mode>4, add<mode>3_compareC, addsi3_compareV_upper):
New patterns to support unsigned builtin add overflow operations.
(subv<mode>4, sub<mode>3_compare1): New patterns to support signed
builtin overflow subtract operations,
(usubv<mode>4): New patterns to support unsigned builtin subtract
overflow operations.
(negvsi3, negvdi3, negdi2_compare, negsi2_carryin_compare): New patterns
to support builtin overflow negate operations.
gcc/testsuite/
Backport from trunk r239739.
2016-08-24 Michael Collison <michael.collison@linaro.org>
Michael Collison <michael.collison@arm.com>
* gcc.target/arm/builtin_saddl.c: New testcase.
* gcc.target/arm/builtin_saddll.c: New testcase.
* gcc.target/arm/builtin_uaddl.c: New testcase.
* gcc.target/arm/builtin_uaddll.c: New testcase.
* gcc.target/arm/builtin_ssubl.c: New testcase.
* gcc.target/arm/builtin_ssubll.c: New testcase.
* gcc.target/arm/builtin_usubl.c: New testcase.
* gcc.target/arm/builtin_usubll.c: New testcase.
Change-Id: Ie6127770ef110e76e1e43965e448ea697806f833
Yvan Roux [Sun, 4 Sep 2016 21:30:18 +0000 (23:30 +0200)]
gcc/
Backport from trunk r237988.
2016-07-04 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64.h: Rename "ARMv8.1" to "ARMv8.1-A".
* config/aarch64/aarch64_neon.h: Likewise.
* config/aarch64/arm_neon.h: Likewise.
* config/aarch64/atomics.md: Likewise.
* config/aarch64/aarch64-simd-builtins.def: Likewise.
* doc/invoke.texi: Likewise.
Change-Id: If41d342947e7062d1477bd7f7f712188ec10fb23
Yvan Roux [Sun, 4 Sep 2016 21:29:35 +0000 (23:29 +0200)]
gcc/testsuite/
Backport from trunk r237798.
2016-06-27 Christophe Lyon <christophe.lyon@linaro.org>
* gcc.target/aarch64/advsimd-intrinsics/vget_lane.c: Add ifdef
around fp16 code.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f16_indices_1.c:
Add arm_neon_fp16_ok effective target.
* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f16_indices_1.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f16_indices_1.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f16_indices_1.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f16_indices_1.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f16_indices_1.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f16_indices_1.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f16_indices_1.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f16_indices_1.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f16_indices_1.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f16_indices_1.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f16_indices_1.c: Likewise.
Change-Id: I998a8954def599fc16a55116790b8c0f635a4ee4
Yvan Roux [Sun, 4 Sep 2016 21:29:55 +0000 (23:29 +0200)]
gcc/testsuite/
Backport from trunk r237987.
2016-07-04 Christophe Lyon <christophe.lyon@linaro.org>
* c-c++-common/asan/clone-test-1.c (main): Handle clone() failure.
Change-Id: I71234a438d4247e89b3ce309a6cb1336fdf7f90b
Yvan Roux [Sun, 4 Sep 2016 21:27:28 +0000 (23:27 +0200)]
gcc/
Backport from trunk r238818.
2016-07-28 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_pushwb_pair_reg): Rename.
(aarch64_push_reg): New function to push 1 or 2 registers.
(aarch64_pop_reg): New function to pop 1 or 2 registers.
(aarch64_expand_prologue): Use aarch64_push_regs.
(aarch64_expand_epilogue): Use aarch64_pop_regs.
Change-Id: I5765ef93ad2ff4bd971049638424c6fa8333344a
Yvan Roux [Sun, 4 Sep 2016 12:30:49 +0000 (14:30 +0200)]
gcc/
Backport from trunk r239772.
2016-08-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/70473
* config/arm/cortex-a8-neon.md (cortex_a8_vfp_muld): Reduce
reservation duration to 15 cycles.
(cortex_a8_vfp_macs): Likewise.
(cortex_a8_vfp_macd): Likewise.
(cortex_a8_vfp_divs): Likewise.
(cortex_a8_vfp_divd): Likewise.
Change-Id: I5af61ce70108b3bff57dba89c8cdd07ab628792d
Yvan Roux [Sun, 4 Sep 2016 12:30:29 +0000 (14:30 +0200)]
gcc/
Backport from trunk r239771.
2016-08-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (arm_sets_movw_movt_fusible_p): New function.
(aarch_macro_fusion_pair_p): Use above to avoid early return.
Change-Id: I07948bb47d410afc9b63578a676371eef3fa8ba0
Yvan Roux [Sun, 4 Sep 2016 11:19:10 +0000 (13:19 +0200)]
gcc/
Backport from trunk r238712.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64.c (aarch64_add_constant): New parameter "mode".
Use aarch64_internal_mov_immediate instead of aarch64_build_constant.
(aarch64_output_mi_thunk): Pass Pmode when calling aarch64_add_constant.
(aarch64_build_constant): Delete.
gcc/
Backport from trunk r238713.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64.c (aarch64_add_constant): Optimize instruction
sequences.
gcc/
Backport from trunk r238714.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64.c (aarch64_add_constant): New parameter
"frame_related_p". Generate CFA annotation when it's necessary.
(aarch64_expand_prologue): Use aarch64_add_constant.
(aarch64_expand_epilogue): Likewise.
(aarch64_output_mi_thunk): Pass "false" when calling
aarch64_add_constant.
Change-Id: Ia3b32d4fb5fa8f322bf579f1ee753c78ece429d8
Yvan Roux [Sun, 4 Sep 2016 11:17:35 +0000 (13:17 +0200)]
libgcc/
Backport from trunk r238584.
2016-07-21 Aurelien Jarno <aurelien@aurel32.net>
PR target/59833
* config/arm/ieee754-df.S (extendsfdf2): Convert sNaN to qNaN.
Change-Id: Ic9f475b0bc3bf1c5eb473b0cb9c05df69930ec72
Yvan Roux [Sun, 4 Sep 2016 11:16:30 +0000 (13:16 +0200)]
gcc/
Backport from trunk r238010.
2016-07-05 Jiong Wang <jiong.wang@arm.com>
* lra-constraints.c (process_alt_operands): Don't add spilling cost for
"offmemok".
Change-Id: I0cdc8ccb1642c7d23373ab14a6ff41d9bf4da844
Yvan Roux [Sun, 4 Sep 2016 11:15:56 +0000 (13:15 +0200)]
gcc/
Backport from trunk r237882.
2016-06-30 James Greenhalgh <james.greenhalgh@arm.com>
Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-simd.md (*aarch64_simd_vec_copy_lane<mode>):
New define_insn.
(*aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
gcc/testsuite/
Backport from trunk r237882.
2016-06-30 James Greenhalgh <james.greenhalgh@arm.com>
Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/aarch64/vget_set_lane_1.c: New test.
gcc/
Backport from trunk r237883.
2016-06-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/arm_neon.h (vcopyq_lane_f32, vcopyq_lane_f64,
vcopyq_lane_p8, vcopyq_lane_p16, vcopyq_lane_s8, vcopyq_lane_s16,
vcopyq_lane_s32, vcopyq_lane_s64, vcopyq_lane_u8, vcopyq_lane_u16,
vcopyq_lane_u32, vcopyq_lane_u64): Reimplement in C.
(vcopy_lane_f32, vcopy_lane_f64, vcopy_lane_p8, vcopy_lane_p16,
vcopy_lane_s8, vcopy_lane_s16, vcopy_lane_s32, vcopy_lane_s64,
vcopy_lane_u8, vcopy_lane_u16, vcopy_lane_u32, vcopy_lane_u64,
vcopy_laneq_f32, vcopy_laneq_f64, vcopy_laneq_p8, vcopy_laneq_p16,
vcopy_laneq_s8, vcopy_laneq_s16, vcopy_laneq_s32, vcopy_laneq_s64,
vcopy_laneq_u8, vcopy_laneq_u16, vcopy_laneq_u32, vcopy_laneq_u64,
vcopyq_laneq_f32, vcopyq_laneq_f64, vcopyq_laneq_p8, vcopyq_laneq_p16,
vcopyq_laneq_s8, vcopyq_laneq_s16, vcopyq_laneq_s32, vcopyq_laneq_s64,
vcopyq_laneq_u8, vcopyq_laneq_u16, vcopyq_laneq_u32, vcopyq_laneq_u64):
New intrinsics.
gcc/testsuite/
Backport from trunk r237883.
2016-06-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
James Greenhalgh <james.greenhalgh@arm.com>
* gcc.target/aarch64/vect_copy_lane_1.c: New test.
Change-Id: Iea96b070d229db7d5525615dc976a1b05320485c
Christophe Lyon [Thu, 25 Aug 2016 13:38:54 +0000 (15:38 +0200)]
gcc/
Backport from trunk r237956.
2016-07-04 Matthew Wahab <matthew.wahab@arm.com>
Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64-arches.def: Add "armv8.2-a".
* config/aarch64/aarch64.h (AARCH64_FL_V8_2): New.
(AARCH64_FL_F16): New.
(AARCH64_FL_FOR_ARCH8_2): New.
(AARCH64_ISA_8_2): New.
(AARCH64_ISA_F16): New.
(TARGET_FP_F16INST): New.
(TARGET_SIMD_F16INST): New.
* config/aarch64/aarch64-option-extensions.def ("fp16"): New entry.
("fp"): Disabling "fp" also disables "fp16".
* config/aarch64/aarch64-c.c (arch64_update_cpp_builtins): Conditionally define
__ARM_FEATURE_FP16_SCALAR_ARITHMETIC and __ARM_FEATURE_FP16_VECTOR_ARITHMETIC.
* doc/invoke.texi (AArch64 Options): Document "armv8.2-a" and "fp16".
gcc/
Backport from trunk r238715.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64-simd.md
(aarch64_<PERMUTE:perm_insn><PERMUTE:perm_hilo><mode>): Use VALL_F16.
(aarch64_ext<mode>): Likewise.
(aarch64_rev<REVERSE:rev_op><mode>): Likewise.
* config/aarch64/aarch64.c (aarch64_evpc_trn, aarch64_evpc_uzp,
aarch64_evpc_zip, aarch64_evpc_ext, aarch64_evpc_rev): Support V4HFmode
and V8HFmode.
* config/aarch64/arm_neon.h (__INTERLEAVE_LIST): Support float16x4_t,
float16x8_t.
(__aarch64_vdup_lane_f16, __aarch64_vdup_laneq_f16,
__aarch64_vdupq_lane_f16, __aarch64_vdupq_laneq_f16, vbsl_f16,
vbslq_f16, vdup_n_f16, vdupq_n_f16, vdup_lane_f16, vdup_laneq_f16,
vdupq_lane_f16, vdupq_laneq_f16, vduph_lane_f16, vduph_laneq_f16,
vext_f16, vextq_f16, vmov_n_f16, vmovq_n_f16, vrev64_f16, vrev64q_f16,
vtrn1_f16, vtrn1q_f16, vtrn2_f16, vtrn2q_f16, vtrn_f16, vtrnq_f16,
vuzp1_f16, vuzp1q_f16, vuzp2_f16, vuzp2q_f16, vzip1_f16, vzip2q_f16):
New.
(vmov_n_f16): Reimplement using vdup_n_f16.
(vmovq_n_f16): Reimplement using vdupq_n_f16.
gcc/
Backport from trunk r238716.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64-builtins.c (TYPES_BINOP_USS): New.
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md (aarch64_rsqrte<mode>): Extend to HF modes.
(neg<mode>2): Likewise.
(abs<mode>2): Likewise.
(<frint_pattern><mode>2): Likewise.
(l<fcvt_pattern><su_optab><VDQF:mode><fcvt_target>2): Likewise.
(<optab><VDQF:mode><fcvt_target>2): Likewise.
(<fix_trunc_optab><VDQF:mode><fcvt_target>2): Likewise.
(ftrunc<VDQF:mode>2): Likewise.
(<optab><fcvt_target><VDQF:mode>2): Likewise.
(sqrt<mode>2): Likewise.
(*sqrt<mode>2): Likewise.
(aarch64_frecpe<mode>): Likewise.
(aarch64_cm<optab><mode>): Likewise.
* config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Return false for
HF, V4HF and V8HF.
* config/aarch64/iterators.md (VHSDF, VHSDF_DF, VHSDF_SDF): New.
(VDQF_COND, fcvt_target, FCVT_TARGET, hcon): Extend mode attribute to HF modes.
(stype): New.
* config/aarch64/arm_neon.h (vdup_n_f16): New.
(vdupq_n_f16): Likewise.
(vld1_dup_f16): Use vdup_n_f16.
(vld1q_dup_f16): Use vdupq_n_f16.
(vabs_f16, vabsq_f16, vceqz_f16, vceqzq_f16, vcgez_f16, vcgezq_f16,
vcgtz_f16, vcgtzq_f16, vclez_f16, vclezq_f16, vcltz_f16, vcltzq_f16,
vcvt_f16_s16, vcvtq_f16_s16, vcvt_f16_u16, vcvtq_f16_u16, vcvt_s16_f16,
vcvtq_s16_f16, vcvt_u16_f16, vcvtq_u16_f16, vcvta_s16_f16,
vcvtaq_s16_f16, vcvta_u16_f16, vcvtaq_u16_f16, vcvtm_s16_f16,
vcvtmq_s16_f16, vcvtm_u16_f16, vcvtmq_u16_f16, vcvtn_s16_f16,
vcvtnq_s16_f16, vcvtn_u16_f16, vcvtnq_u16_f16, vcvtp_s16_f16,
vcvtpq_s16_f16, vcvtp_u16_f16, vcvtpq_u16_f16, vneg_f16, vnegq_f16,
vrecpe_f16, vrecpeq_f16, vrnd_f16, vrndq_f16, vrnda_f16, vrndaq_f16,
vrndi_f16, vrndiq_f16, vrndm_f16, vrndmq_f16, vrndn_f16, vrndnq_f16,
vrndp_f16, vrndpq_f16, vrndx_f16, vrndxq_f16, vrsqrte_f16, vrsqrteq_f16,
vsqrt_f16, vsqrtq_f16): New.
gcc/
Backport from trunk r238717.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md
(aarch64_rsqrts<mode>): Extend to HF modes.
(fabd<mode>3): Likewise.
(<FCVT_F2FIXED:fcvt_fixed_insn><VHSDF_SDF:mode>3): Likewise.
(<FCVT_FIXED2F:fcvt_fixed_insn><VHSDI_SDI:mode>3): Likewise.
(aarch64_<maxmin_uns>p<mode>): Likewise.
(<su><maxmin><mode>3): Likewise.
(<maxmin_uns><mode>3): Likewise.
(<fmaxmin><mode>3): Likewise.
(aarch64_faddp<mode>): Likewise.
(aarch64_fmulx<mode>): Likewise.
(aarch64_frecps<mode>): Likewise.
(*aarch64_fac<optab><mode>): Rename to aarch64_fac<optab><mode>.
(add<mode>3): Extend to HF modes.
(sub<mode>3): Likewise.
(mul<mode>3): Likewise.
(div<mode>3): Likewise.
(*div<mode>3): Likewise.
* config/aarch64/aarch64.c (aarch64_emit_approx_div): Return false for
HF, V4HF and V8HF.
* config/aarch64/iterators.md (VDQ_HSDI, VSDQ_HSDI): New mode iterator.
* config/aarch64/arm_neon.h (vadd_f16, vaddq_f16, vabd_f16, vabdq_f16,
vcage_f16, vcageq_f16, vcagt_f16, vcagtq_f16, vcale_f16, vcaleq_f16,
vcalt_f16, vcaltq_f16, vceq_f16, vceqq_f16, vcge_f16, vcgeq_f16,
vcgt_f16, vcgtq_f16, vcle_f16, vcleq_f16, vclt_f16, vcltq_f16,
vcvt_n_f16_s16, vcvtq_n_f16_s16, vcvt_n_f16_u16, vcvtq_n_f16_u16,
vcvt_n_s16_f16, vcvtq_n_s16_f16, vcvt_n_u16_f16, vcvtq_n_u16_f16,
vdiv_f16, vdivq_f16, vdup_lane_f16, vdup_laneq_f16, vdupq_lane_f16,
vdupq_laneq_f16, vdups_lane_f16, vdups_laneq_f16, vmax_f16, vmaxq_f16,
vmaxnm_f16, vmaxnmq_f16, vmin_f16, vminq_f16, vminnm_f16, vminnmq_f16,
vmul_f16, vmulq_f16, vmulx_f16, vmulxq_f16, vpadd_f16, vpaddq_f16,
vpmax_f16, vpmaxq_f16, vpmaxnm_f16, vpmaxnmq_f16, vpmin_f16, vpminq_f16,
vpminnm_f16, vpminnmq_f16, vrecps_f16, vrecpsq_f16, vrsqrts_f16,
vrsqrtsq_f16, vsub_f16, vsubq_f16): New.
gcc/
Backport from trunk r238718.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md (fma<mode>4, fnma<mode>4): Extend to HF
modes.
* config/aarch64/arm_neon.h (vfma_f16, vfmaq_f16, vfms_f16,
vfmsq_f16): New.
gcc/
Backport from trunk r238719.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64-simd.md (*aarch64_mulx_elt_to_64v2df): Rename to
"*aarch64_mulx_elt_from_dup<mode>".
(*aarch64_mul3_elt<mode>): Update schedule type.
(*aarch64_mul3_elt_from_dup<mode>): Likewise.
(*aarch64_fma4_elt_from_dup<mode>): Likewise.
(*aarch64_fnma4_elt_from_dup<mode>): Likewise.
* config/aarch64/iterators.md (VMUL): Supprt half precision float modes.
(f, fp): Support HF modes.
* config/aarch64/arm_neon.h (vfma_lane_f16, vfmaq_lane_f16,
vfma_laneq_f16, vfmaq_laneq_f16, vfma_n_f16, vfmaq_n_f16, vfms_lane_f16,
vfmsq_lane_f16, vfms_laneq_f16, vfmsq_laneq_f16, vfms_n_f16,
vfmsq_n_f16, vmul_lane_f16, vmulq_lane_f16, vmul_laneq_f16,
vmulq_laneq_f16, vmul_n_f16, vmulq_n_f16, vmulx_lane_f16,
vmulxq_lane_f16, vmulx_laneq_f16, vmulxq_laneq_f16): New.
gcc/
Backport from trunk r238721.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64-simd-builtins.def (reduc_smax_scal_,
reduc_smin_scal_): Use VDQIF_F16.
(reduc_smax_nan_scal_, reduc_smin_nan_scal_): Use VHSDF.
* config/aarch64/aarch64-simd.md (reduc_<maxmin_uns>_scal_<mode>):
Use VHSDF.
(aarch64_reduc_<maxmin_uns>_internal<mode>): Likewise.
* config/aarch64/iterators.md (VDQIF_F16): New.
(vp): Support HF modes.
* config/aarch64/arm_neon.h (vmaxv_f16, vmaxvq_f16, vminv_f16,
vminvq_f16, vmaxnmv_f16, vmaxnmvq_f16, vminnmv_f16, vminnmvq_f16): New.
gcc/
Backport from trunk r238722.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config.gcc (aarch64*-*-*): Install arm_fp16.h.
* config/aarch64/aarch64-builtins.c (hi_UP): New.
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64-simd.md (aarch64_frsqrte<mode>): Extend to HF
mode.
(aarch64_frecp<FRECP:frecp_suffix><mode>): Likewise.
(aarch64_cm<optab><mode>): Likewise.
* config/aarch64/aarch64.md (<frint_pattern><mode>2): Likewise.
(l<fcvt_pattern><su_optab><GPF:mode><GPI:mode>2): Likewise.
(fix_trunc<GPF:mode><GPI:mode>2): Likewise.
(sqrt<mode>2): Likewise.
(*sqrt<mode>2): Likewise.
(abs<mode>2): Likewise.
(<optab><mode>hf2): New pattern for HF mode.
(<optab>hihf2): Likewise.
* config/aarch64/arm_neon.h: Include arm_fp16.h.
* config/aarch64/iterators.md (GPF_F16, GPI_F16, VHSDF_HSDF): New.
(w1, w2, v, s, q, Vmtype, V_cmp_result, fcvt_iesize, FCVT_IESIZE):
Support HF mode.
* config/aarch64/arm_fp16.h: New file.
(vabsh_f16, vceqzh_f16, vcgezh_f16, vcgtzh_f16, vclezh_f16, vcltzh_f16,
vcvth_f16_s16, vcvth_f16_s32, vcvth_f16_s64, vcvth_f16_u16,
vcvth_f16_u32, vcvth_f16_u64, vcvth_s16_f16, vcvth_s32_f16,
vcvth_s64_f16, vcvth_u16_f16, vcvth_u32_f16, vcvth_u64_f16,
vcvtah_s16_f16, vcvtah_s32_f16, vcvtah_s64_f16, vcvtah_u16_f16,
vcvtah_u32_f16, vcvtah_u64_f16, vcvtmh_s16_f16, vcvtmh_s32_f16,
vcvtmh_s64_f16, vcvtmh_u16_f16, vcvtmh_u32_f16, vcvtmh_u64_f16,
vcvtnh_s16_f16, vcvtnh_s32_f16, vcvtnh_s64_f16, vcvtnh_u16_f16,
vcvtnh_u32_f16, vcvtnh_u64_f16, vcvtph_s16_f16, vcvtph_s32_f16,
vcvtph_s64_f16, vcvtph_u16_f16, vcvtph_u32_f16, vcvtph_u64_f16,
vnegh_f16, vrecpeh_f16, vrecpxh_f16, vrndh_f16, vrndah_f16, vrndih_f16,
vrndmh_f16, vrndnh_f16, vrndph_f16, vrndxh_f16, vrsqrteh_f16,
vsqrth_f16): New.
gcc/
Backport from trunk r238723.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64.md (<FCVT_F2FIXED:fcvt_fixed_insn>hf<mode>3):
New.
(<FCVT_FIXED2F:fcvt_fixed_insn><mode>hf3): Likewise.
(add<mode>3): Likewise.
(sub<mode>3): Likewise.
(mul<mode>3): Likewise.
(div<mode>3): Likewise.
(*div<mode>3): Likewise.
(<fmaxmin><mode>3): Extend to HF.
* config/aarch64/aarch64-simd.md (aarch64_rsqrts<mode>): Likewise.
(fabd<mode>3): Likewise.
(<FCVT_F2FIXED:fcvt_fixed_insn><VHSDF_HSDF:mode>3): Likewise.
(<FCVT_FIXED2F:fcvt_fixed_insn><VHSDI_HSDI:mode>3): Likewise.
(aarch64_fmulx<mode>): Likewise.
(aarch64_fac<optab><mode>): Likewise.
(aarch64_frecps<mode>): Likewise.
(<FCVT_F2FIXED:fcvt_fixed_insn>hfhi3): New.
(<FCVT_FIXED2F:fcvt_fixed_insn>hihf3): Likewise.
* config/aarch64/iterators.md (VHSDF_SDF): Delete.
(VSDQ_HSDI): Support HI.
(fcvt_target, FCVT_TARGET): Likewise.
* config/aarch64/arm_fp16.h (vaddh_f16, vsubh_f16, vabdh_f16,
vcageh_f16, vcagth_f16, vcaleh_f16, vcalth_f16, vceqh_f16, vcgeh_f16,
vcgth_f16, vcleh_f16, vclth_f16, vcvth_n_f16_s16, vcvth_n_f16_s32,
vcvth_n_f16_s64, vcvth_n_f16_u16, vcvth_n_f16_u32, vcvth_n_f16_u64,
vcvth_n_s16_f16, vcvth_n_s32_f16, vcvth_n_s64_f16, vcvth_n_u16_f16,
vcvth_n_u32_f16, vcvth_n_u64_f16, vdivh_f16, vmaxh_f16, vmaxnmh_f16,
vminh_f16, vminnmh_f16, vmulh_f16, vmulxh_f16, vrecpsh_f16,
vrsqrtsh_f16): New.
gcc/
Backport from trunk r238724.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/aarch64-simd-builtins.def: Register new builtins.
* config/aarch64/aarch64.md (fma, fnma): Support HF.
* config/aarch64/arm_fp16.h (vfmah_f16, vfmsh_f16): New.
gcc/
Backport from trunk r238725.
2016-07-25 Jiong Wang <jiong.wang@arm.com>
* config/aarch64/arm_neon.h (vfmah_lane_f16, vfmah_laneq_f16,
vfmsh_lane_f16, vfmsh_laneq_f16, vmulh_lane_f16, vmulh_laneq_f16,
vmulxh_lane_f16, vmulxh_laneq_f16): New.
Change-Id: I8118d32ccb84626ad42afc4181334258c7fc8e5b
Yvan Roux [Sat, 3 Sep 2016 17:18:07 +0000 (19:18 +0200)]
gcc/
Backport from trunk r237906.
2016-07-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/arm/arm.c (thumb_reload_in_hi): Delete.
* config/arm/arm-protos.h (thumb_reload_in_hi): Delete prototype.
Change-Id: I2801bb88ae9aaa978c6389ee8b7c09b365cd4c40
Yvan Roux [Sat, 3 Sep 2016 17:15:13 +0000 (19:15 +0200)]
gcc/
Backport from trunk r237851.
2016-06-29 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (cortexa53_tunings):
Increase loop alignment to 8. Set function alignment to 16.
(cortexa35_tunings): Likewise.
(cortexa57_tunings): Increase loop alignment to 8.
(cortexa72_tunings): Likewise.
(cortexa73_tunings): Likewise.
Change-Id: I37b0f888f92e5617e27afc56a2ae0f396f3790a9
Yvan Roux [Sat, 3 Sep 2016 17:13:45 +0000 (19:13 +0200)]
gcc/
Backport from trunk r237705.
2016-06-22 Andreas Schwab <schwab@suse.de>
* config/aarch64/aarch64-protos.h (aarch64_elf_asm_named_section):
Remove declaration.
Change-Id: I6251c6b1f7bd8440e91e8fe05be586de5f1d5347
Yvan Roux [Sat, 3 Sep 2016 17:13:21 +0000 (19:13 +0200)]
gcc/
Backport from trunk r237607.
2016-06-20 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.opt
(mpc-relative-literal-loads): Rename internal option name.
* config/aarch64/aarch64.c
(aarch64_nopcrelative_literal_loads): Rename to
aarch64_pcrelative_literal_loads.
(aarch64_expand_mov_immediate): Likewise.
(aarch64_secondary_reload): Likewise.
(aarch64_can_use_per_function_literal_pools_p): Likewise.
(aarch64_override_options_after_change_1): Rename and simplify logic.
(aarch64_classify_symbol): Merge large model checks into switch,
remove pc-relative load check.
Change-Id: Ie45ef06d2a93809b42915c3109121228867862fc
Yvan Roux [Sat, 3 Sep 2016 17:11:59 +0000 (19:11 +0200)]
gcc/
Backport from trunk r237277.
2016-06-09 Vladimir Makarov <vmakarov@redhat.com>
Jiong Wang <jiong.wang@arm.com>
PR rtl-optimization/70751
* lra-constraints.c (process_alt_operands): Recognize Non-pseudo spilled
into memory.
Change-Id: Id1d56eb327c732269a959b940639656756d56a96
Christophe Lyon [Tue, 30 Aug 2016 15:52:01 +0000 (17:52 +0200)]
gcc/
Backport from trunk r239610.
2016-08-19 Matthew Wahab <matthew.wahab@arm.com>
PR target/77281
* config/arm/arm.c (neon_valid_immediate): Delete declaration.
Use const_vec_duplicate to check for duplicated elements.
Change-Id: I34dade1b83eb550f04384a1b2c5c761f2db85904
Yvan Roux [Fri, 2 Sep 2016 08:09:58 +0000 (10:09 +0200)]
gcc/
Backport from trunk r237884.
2016-06-30 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (cortexa35_tunings):
Enable AES fusion. Use cortexa57_branch_cost.
(cortexa53_tunings): Use cortexa57_branch_cost.
(cortexa72_tunings): Use cortexa57_branch_cost.
Use AUTOPREFETCHER_WEAK.
(cortexa73_tunings): Use cortexa57_branch_cost.
Change-Id: Ic7f824ffc6b19c2761b0e9085109dc8961a1ef58
Yvan Roux [Fri, 2 Sep 2016 08:09:01 +0000 (10:09 +0200)]
gcc/
Backport from trunk r237597.
2016-06-20 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_modes_tieable_p):
Allow scalar/single vector modes to be tieable.
Change-Id: I66a08134bfd3a73d65bd84ad3a72bac1756caee4
Yvan Roux [Fri, 2 Sep 2016 08:08:36 +0000 (10:08 +0200)]
gcc/testsuite/
Backport from trunk r237557.
2016-06-17 Christophe Lyon <christophe.lyon@linaro.org>
* lib/target-supports.exp
(check_effective_target_arm_neon_fp16_ok_nocache): Call
arm_neon_ok and merge flags. Fix temporary test name.
(check_effective_target_arm_neonv2_ok_nocache): Call arm_neon_ok
and merge flags.
Change-Id: Id28fff4b90685733d2bf10275fc28022da341adb
Yvan Roux [Fri, 2 Sep 2016 07:59:58 +0000 (09:59 +0200)]
gcc/
Backport from trunk r237548.
2016-06-17 Szabolcs Nagy <szabolcs.nagy@arm.com>
* config/aarch64/geniterators.sh: Handle parenthesised conditions.
Change-Id: I3eb6902dd41933cd2f41d1740f84f63a1921e0b2
Yvan Roux [Fri, 2 Sep 2016 07:59:36 +0000 (09:59 +0200)]
gcc/
Backport from trunk r237506.
2016-06-16 Renlin Li <renlin.li@arm.com>
* config/aarch64/aarch64.c (aarch64_legitimize_address): Fix a typo.
Change-Id: Ia4613d97eb5da0d1839d9af77de2aa71f5479f17
Yvan Roux [Fri, 2 Sep 2016 07:59:12 +0000 (09:59 +0200)]
gcc/
Backport from trunk r237485.
2016-06-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64-simd.md (aarch64_<sur>shll_n<mode>): Clean
up parentheses. Use GET_MODE_UNIT_BITSIZE.
(aarch64_<sur>shll2_n<mode>): Likewise.
Change-Id: Ia25c220b930929a3bbaff268733b7718d1104f7c
Yvan Roux [Fri, 2 Sep 2016 07:58:35 +0000 (09:58 +0200)]
gcc/
Backport from trunk r237440.
2015-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (aarch64_mask_and_shift_for_ubfiz_p):
New function.
(aarch64_rtx_costs): Use it. Rewrite CONST_INT_P (op1) case to handle
mask+shift version.
* config/aarch64/aarch64-protos.h (aarch64_mask_and_shift_for_ubfiz_p):
New prototype.
* config/aarch64/aarch64.md (*andim_ashift<mode>_bfiz): Replace
matching condition with aarch64_mask_and_shift_for_ubfiz_p.
Change-Id: Ic17811963cafa2a514ab4db02fdde3937de01e22
Yvan Roux [Fri, 2 Sep 2016 07:56:59 +0000 (09:56 +0200)]
gcc/
Backport from trunk r237331.
2016-06-11 Jiong Wang <jiong.wang@arm.com>
PR target/71061
* config/arm/arm-protos.h (arm_attr_length_pop_multi): New declaration.
* config/arm/arm.c (arm_attr_length_pop_multi): New function to return
length for pop patterns.
(arm_attr_length_push_multi): Update comments.
* config/arm/arm.md (*load_multiple_with_writeback): Set "length"
attribute.
(*pop_multiple_with_writeback_and_return): Likewise.
(*pop_multiple_with_return): Likewise.
Change-Id: I19b35183be89cdcab6e40b6c727334342873e9ea
Yvan Roux [Fri, 2 Sep 2016 07:56:36 +0000 (09:56 +0200)]
gcc/
Backport from trunk r237313.
2016-06-10 Bernd Edlinger <bernd.edlinger@hotmail.de>
* config/arm/arm.h (pool_vector_label,
return_used_this_function): Remove.
Change-Id: Ibf0111fc72148427a644d476df130d589737929e
Yvan Roux [Fri, 2 Sep 2016 07:55:22 +0000 (09:55 +0200)]
gcc/
Backport from trunk r237251.
2016-06-09 Stefan Bruens <stefan.bruens@rwth-aachen.de>
* doc/invoke.texi (ARM Options): Use lexicographical ordering.
Correct usage of @samp vs @option, add @samp where appropriate.
Add -march={armv6k,armv6z,arm6zk}, remove -march=ep9312.
Add armv6s-m and document it, as it is no official ARM name.
Change-Id: I73253c3cc7f71a35fdaf26ddf51b135a59754784
Christophe Lyon [Tue, 30 Aug 2016 15:53:17 +0000 (17:53 +0200)]
gcc/
Backport from trunk r239733.
2016-08-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping for
-mcpu=cortex-a7, -mfpu=neon-fp16, -mfpu=fpv5-d16 and -mfpu=fp-armv8.
Fix typo in -mfpu=vfpv3-d16-fp16 mapping.
(MULTILIB_REUSE): Remove reuse rules for option set including
-mfpu=fp-armv8 and -mfpu=vfpv4
gcc/
Backport from trunk r239734.
2016-08-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
* doc/fragments.texi (MULTILIB_REUSE): Mention that only options in
MULTILIB_OPTIONS should be used. Small wording fixes.
* genmultilib: Memorize set of all option combinations in
combination_space. Detect if RHS of MULTILIB_REUSE uses an option not
found in MULTILIB_OPTIONS by checking if option set is listed in
combination_space. Output new and existing error message to stderr.
Change-Id: Icde28653fb6dc296e8c2f2f8b1745759b067b621
Yvan Roux [Thu, 1 Sep 2016 07:46:30 +0000 (09:46 +0200)]
gcc/
Backport from trunk r236914.
2016-05-31 Wladimir J. van der Laan <laanwj@gmail.com>
* config/aarch64/arm_neon.h (vdupb_laneq_s8): Remove spurious
attribute __unused__.
Change-Id: I53791af863e9417be0f614c28d8152e9abc21c37
Christophe Lyon [Tue, 30 Aug 2016 15:52:41 +0000 (17:52 +0200)]
gcc/
Backport from trunk r239710.
2016-08-23 Christophe Lyon <christophe.lyon@linaro.org>
* config/arm/arm.md (arm_movqi_insn): Swap predicable_short_it
attribute for alternatives 3 and 4.
Change-Id: Iea2ecb11b72a9ff244d14046b38e8f289d2a14f1
Christophe Lyon [Tue, 30 Aug 2016 15:51:21 +0000 (17:51 +0200)]
gcc/
Backport from trunk r239561.
2016-08-18 Tamar Christina <tamar.christina@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* varasm.c (default_use_anchors_for_symbol_p): Reject too large decls.
Change-Id: I1ed30d6a68c07c214f81cc6c75eef7d03023a1f3
Christophe Lyon [Tue, 30 Aug 2016 15:02:49 +0000 (17:02 +0200)]
gcc/
Backport from trunk r236269.
2016-05-16 Matthew Wahab <matthew.wahab@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Jiong Wang <jiong.wang@arm.com>
* config/arm/arm-c.c (arm_cpu_builtins): Use def_or_undef_macro
for __ARM_FP16_FORMAT_IEEE and __ARM_FP16_FORMAT_ALTERNATIVE.
Define __ARM_FP16_ARGS when appropriate.
* config/arm/arm.c (arm_invalid_parameter_type): Remove
declaration.
(arm_invalid_return_type): Likewise.
(TARGET_INVALID_PARAMETER_TYPE): Remove.
(TARGET_INVALID_RETURN_TYPE): Remove.
(aapcs_vfp_sub_candidate): Allow HFmode.
(aapcs_vfp_allocate): Add comment. Support HFmode.
(aapcs_vfp_allocate_return_reg): Likewise.
(struct aapcs_cp_arg_layout): Slightly reword comments for
is_return_candidate and allocate_return_reg.
(output_mov_vfp): Update assert.
(arm_hard_regno_mode_ok): Remove comment, update HF-mode
condition.
(arm_invalid_parameter_type): Remove.
(amr_invalid_return_type): Remove.
* config/arm/arm.h (TARGET_NEON_FP16): Fix definition.
* config/arm/arm.md (*arm32_movhf): Disable for TARGET_VFP.
* config/arm/vfp.md (*movhf_vfp): Enable for TARGET_VFP.
gcc/testsuite/
Backport from trunk r236269.
2016-05-16 Matthew Wahab <matthew.wahab@arm.com>
* g++.dg/ext/arm-fp16/fp16-param-1.c: Update expected output. Add
test for __ARM_FP16_ARGS.
* g++.dg/ext/arm-fp16/fp16-return-1.c: Update expected output.
* gcc.target/arm/aapcs/neon-vect10.c: New.
* gcc.target/arm/aapcs/neon-vect9.c: New.
* gcc.target/arm/aapcs/vfp18.c: New.
* gcc.target/arm/aapcs/vfp19.c: New.
* gcc.target/arm/aapcs/vfp20.c: New.
* gcc.target/arm/aapcs/vfp21.c: New.
* gcc.target/arm/fp16-aapcs-1.c: New.
* g++.target/arm/fp16-param-1.c: Update expected output. Add
test for __ARM_FP16_ARGS.
* g++.target/arm/fp16-return-1.c: Update expected output.
gcc/
Backport from trunk r237847.
2016-06-29 Matthew Wahab <matthew.wahab@arm.com>
* doc/sourcebuild.texi (Effective-Target keywords): Add entries
for arm_fp16_ok and arm_fp16_hw.
(Add Options): Add entries for arm_fp16, arm_fp16_ieee and
arm_fp16_alternative.
gcc/testsuite/
Backport from trunk r237847.
2016-06-29 Matthew Wahab <matthew.wahab@arm.com>
* lib/target-supports.exp (add_options_for_arm_fp16): Reword
comment.
(add_options_for_arm_fp16_ieee): New.
(add_options_for_arm_fp16_alternative): New.
(effective_target_arm_fp16_ok_nocache): Add to comment. Fix a
long-line.
(effective_target_arm_fp16_hw): New.
gcc/testsuite/
Backport from trunk r237849.
2016-06-29 Matthew Wahab <matthew.wahab@arm.com>
* gcc.target/arm/aapcs/neon-vect10.c: Require
-mfloat-ab=hard. Replace arm_neon_fp16_ok with arm_neon_fp16_hw.
* gcc.target/arm/aapcs/neon-vect9.c: Likewise.
* gcc.target/arm/aapcs/vfp18.c: Likewise.
* gcc.target/arm/aapcs/vfp19.c: Likewise.
* gcc.target/arm/aapcs/vfp20.c: Likewise.
* gcc.target/arm/aapcs/vfp21.c: Likewise.
* gcc.target/arm/fp16-aapcs-1.c: Require
-mfloat-ab=hard. Also simplify the test.
* gcc.target/arm/fp16-aapcs-2.c: New.
Change-Id: Ifc4d08806bae60488e8b5a7fb2375b96cab6c4f8
Christophe Lyon [Tue, 30 Aug 2016 14:59:13 +0000 (16:59 +0200)]
gcc/
Backport from trunk r235512.
2016-04-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* rtlanal.c (nonzero_bits1): Convert preprocessor check
for WORD_REGISTER_OPERATIONS to runtime check.
gcc/
Backport from trunk r235563.
2015-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.h (WORD_REGISTER_OPERATIONS): Define to 0
and explain why in a comment.
Change-Id: I4044d2555d3f71aed9c5eee924764e523c8f0f25
Christophe Lyon [Tue, 30 Aug 2016 15:49:51 +0000 (17:49 +0200)]
gcc/
Backport from trunk r239135.
2016-08-04 Andrew Pinski <apinski@cavium.com>
* config/aarch64/aarch64.c (thunderx_vector_cost): New variable.
(thunderx_tunings): Use thunderx_vector_cost instead of
generic_vector_cost.
Change-Id: Iddf9110c6827460e6fd5a74c91a4ebfc58af4b75
Christophe Lyon [Tue, 30 Aug 2016 15:48:24 +0000 (17:48 +0200)]
gcc/
Backport from trunk r238955.
2015-08-01 Alan Hayward <alan.hayward@arm.com>
PR tree-optimization/71818
* tree-vect-loop-manip.c (vect_can_advance_ivs_p): Don't advance IVs
with non invariant evolutions
gcc/testsuite/
Backport from trunk r238955.
2015-08-01 Alan Hayward <alan.hayward@arm.com>
PR tree-optimization/71818
* gcc.dg/vect/pr71818.c: New
Change-Id: I9962446c966ffe53e7000434447a002a2e7c9653
projects / platform / upstream / linaro-gcc.git / log