Junghoon Kim [Tue, 19 Feb 2019 05:16:33 +0000 (14:16 +0900)]
ARM64: defconfig: tm2: Sync with savedefconfig
Sync the tizen_tm2_defconfig with savedefconfig. Currently, whenever
rebasing the kernel tree, it requires to update the kernel version in
the defconfig file. This patch helps to avoid the above step.
Change-Id: I3fa02794b552411aa15363bcbd27f4e370d668f6
Signed-off-by: Junghoon Kim <jhoon20.kim@samsung.com>
Junghoon Kim [Tue, 19 Feb 2019 04:54:58 +0000 (13:54 +0900)]
ARM: defconfig: ordoid: Sync with savedefconfig
Sync the tizen_odroid_defconfig with savedefconfig. Whenever rebasing
the kernel tree, it requires to update the kernel version in the
defconfig file. This patch helps to avoid the above step.
Change-Id: I3bd1794ac58a4b0688134f416d33494a80764dcf
Signed-off-by: Junghoon Kim <jhoon20.kim@samsung.com>
Seung-Woo Kim [Fri, 15 Feb 2019 08:26:11 +0000 (17:26 +0900)]
ARM: dts: exynos4412-odroid-common: add mmc aliases to set fixed mmc index
Add mmc aliases to set fixed mmc index to emmc and sdcard.
Change-Id: I2a826442e86222cd0c6542c962e2c4187dad6c76
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Jaehoon Chung [Tue, 29 Mar 2016 10:43:34 +0000 (19:43 +0900)]
mmc: block: Support the fixed index for mmcblk with aliases nodes
Now, index of mmcblk is allocated in accordance with probing time.
If want to use the mmcblk1 for some device, it can use alias.
aliases {
mmc0 = &mmc0; /* mmcblk0 for eMMC */
mmc1 = &mmc2; /* mmcblk1 for SD */
mmc2 = &mmc1; /* mmcblk2 for SDIO*/
};
If there are no corresponding values, it might be allocated with
existing scheme.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
[sw0312.kim: port to v4.14
- apply to host index instead of name_idx because host index is used in this version
]
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Change-Id: I44673d62e546ea0aeedd9cac314dbfd31fdcce66
Marek Szyprowski [Wed, 13 Feb 2019 12:02:25 +0000 (13:02 +0100)]
ARM: pm: fix HYP/SVC mode mismatch when MCPM is used
MCPM does a soft reset of the CPUs and uses common cpu_resume() routine to
perform low-level platform initialization. This results in a try to install
HYP stubs for the second time for each CPU and results in false HYP/SVC
mode mismatch detection. The HYP stubs are already installed at the
beginning of the kernel initialization on the boot CPU (head.S) or in the
secondary_startup() for other CPUs. To fix this issue MCPM code should use
a cpu_resume() routine without HYP stubs installation.
This change fixes HYP/SVC mode mismatch on Samsung Exynos5422-based Odroid
XU3/XU4/HC1 boards.
Fixes:
3721924c8154 ("ARM: 8081/1: MCPM: provide infrastructure to allow for MCPM loopback")
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Change-Id: I6f6225fd2a7e57e323010af616a6fdd4774a7222
Marek Szyprowski [Thu, 14 Feb 2019 10:12:46 +0000 (11:12 +0100)]
ARM: exynos: Fix undefined instruction during Exynos5422 resume
During early system resume on Exynos5422 with performance counters enabled
the following kernel oops happens:
Internal error: Oops - undefined instruction: 0 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 1433 Comm: bash Tainted: G W 5.0.0-rc5-next-
20190208-00023-gd5fb5a8a13e6-dirty #5480
Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
PC is at reset_ctrl_regs+0x128/0x354
LR is at reset_ctrl_regs+0x124/0x354
pc : [<
c0112814>] lr : [<
c0112810>] psr:
600001d3
...
Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment none
Control:
10c5387d Table:
4451006a DAC:
00000051
Process bash (pid: 1433, stack limit = 0xb7e0e22f)
...
[<
c0112814>] (reset_ctrl_regs) from [<
c0112ad0>] (dbg_cpu_pm_notify+0x1c/0x24)
[<
c0112ad0>] (dbg_cpu_pm_notify) from [<
c014c840>] (notifier_call_chain+0x44/0x84)
[<
c014c840>] (notifier_call_chain) from [<
c014cbc0>] (__atomic_notifier_call_chain+0x7c/0x128)
[<
c014cbc0>] (__atomic_notifier_call_chain) from [<
c01ffaac>] (cpu_pm_notify+0x30/0x54)
[<
c01ffaac>] (cpu_pm_notify) from [<
c055116c>] (syscore_resume+0x98/0x3f4)
[<
c055116c>] (syscore_resume) from [<
c0189350>] (suspend_devices_and_enter+0x97c/0xe74)
[<
c0189350>] (suspend_devices_and_enter) from [<
c0189fb8>] (pm_suspend+0x770/0xc04)
[<
c0189fb8>] (pm_suspend) from [<
c0187740>] (state_store+0x6c/0xcc)
[<
c0187740>] (state_store) from [<
c09fa698>] (kobj_attr_store+0x14/0x20)
[<
c09fa698>] (kobj_attr_store) from [<
c030159c>] (sysfs_kf_write+0x4c/0x50)
[<
c030159c>] (sysfs_kf_write) from [<
c0300620>] (kernfs_fop_write+0xfc/0x1e0)
[<
c0300620>] (kernfs_fop_write) from [<
c0282be8>] (__vfs_write+0x2c/0x160)
[<
c0282be8>] (__vfs_write) from [<
c0282ea4>] (vfs_write+0xa4/0x16c)
[<
c0282ea4>] (vfs_write) from [<
c0283080>] (ksys_write+0x40/0x8c)
[<
c0283080>] (ksys_write) from [<
c0101000>] (ret_fast_syscall+0x0/0x28)
...
---[ end trace
03fc9866185939bf ]---
Undefined instruction is triggered during CP14 reset, because bits: #16
(Secure privileged invasive debug disabled) and #17 (Secure privileged
noninvasive debug disable) are set in DSCR. Those bits depend on SPNIDEN
and SPIDEN lines, which are provided by Secure JTAG hardware block. That
block in turn is powered from cluster 0 (big/Eagle), but the Exynos5422
boots on cluster 1 (LITTLE/KFC).
To fix this issue it is enough to turn on the power on the cluster 0 for
a while. This lets the Secure JTAG block to propagate the needed signals
to LITTLE/KFC cores and change their DSCR.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I0fa6618740853169bd96efeb33975f0289ac3706
Stuart Menefy [Sun, 10 Feb 2019 22:51:14 +0000 (22:51 +0000)]
clocksource: exynos_mct: Clear timer interrupt when shutdown
When shutting down the timer, ensure that after we have stopped the
timer any pending interrupts are cleared. This fixes a problem when
suspending, as interrupts are disabled before the timer is stopped,
so the timer interrupt may still be asserted, preventing the system
entering a low power state when the wfi is executed.
Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
[pending patch for mainline]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I2068bbadeb5e778bb81f772693e30a47e64dd77c
Stuart Menefy [Sun, 10 Feb 2019 22:51:13 +0000 (22:51 +0000)]
clocksource: exynos_mct: Move one-shot check from tick clear to ISR
When a timer tick occurs and the clock is in one-shot mode, the timer
needs to be stopped to prevent it triggering subsequent interrupts.
Currently this code is in exynos4_mct_tick_clear(), but as it is
only needed when an ISR occurs move it into exynos4_mct_tick_isr(),
leaving exynos4_mct_tick_clear() just doing what its name suggests it
should.
Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
[pending patch for mainline]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I1004b6947a338d27dc629f4174607663dedc1f33
Stuart Menefy [Mon, 28 Jan 2019 23:06:45 +0000 (23:06 +0000)]
ARM: exynos: Fix timeout when booting secondary CPUs
Without this fix the loop waiting for the timeout exits, but the
subsequent test to see if the timeout occurred fails.
Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
4bdf2f3f20a9de9b07f97907820c42f3a49ba63d]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: If43a148b759fa015abd46fdfb60d64fdfe3baf5f
Paul E. McKenney [Mon, 4 Feb 2019 15:01:55 +0000 (16:01 +0100)]
arm: Use common outgoing-CPU-notification code
This commit removes the open-coded CPU-offline notification with new
common code. In particular, this change avoids calling scheduler code
using RCU from an offline CPU that RCU is ignoring. This is a minimal
change. A more intrusive change might invoke the cpu_check_up_prepare()
and cpu_set_state_online() functions at CPU-online time, which would
allow onlining throw an error if the CPU did not go offline properly.
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Russell King <linux@arm.linux.org.uk>
[commit rejected in mainline, but needed on Exynos platform to fix
suspicious RCU usage during suspend/resume]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I26ba637d48fc3264e1b79507cfd0cb82bb5e6390
Viresh Kumar [Tue, 12 Feb 2019 07:06:47 +0000 (12:36 +0530)]
cpufreq: dt: Implement online/offline() callbacks
Implement the light-weight tear down and bring up helpers to reduce the
amount of work to do on CPU offline/online operation.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
[pending patch for mainline]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I02a01f0f4d5c24102bcc58089937c371cc126b65
Viresh Kumar [Tue, 12 Feb 2019 07:06:46 +0000 (12:36 +0530)]
cpufreq: Allow light-weight tear down and bring up of CPUs
The cpufreq core doesn't remove the cpufreq policy anymore on CPU
offline operation, rather that happens when the CPU device gets
unregistered from the kernel. This allows faster recovery when the CPU
comes back online. This is also very useful during system wide
suspend/resume where we offline all non-boot CPUs during suspend and
then bring them back on resume.
This commit takes the same idea a step ahead to allow drivers to do
light weight tear-down and bring-up during CPU offline and online
operations.
A new set of callbacks is introduced, online/offline(). online() gets
called when the first CPU of an inactive policy is brought up and
offline() gets called when all the CPUs of a policy are offlined.
The existing init/exit() callback get called on policy
creation/destruction. They also get called instead of online/offline()
callbacks if the online/offline() callbacks aren't provided.
This also moves around some code to get executed only for the new-policy
case going forward.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
[pending patch for mainline]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I27bd475cac802ffae345308fc145490966eda456
Marek Szyprowski [Fri, 25 Jan 2019 13:49:53 +0000 (14:49 +0100)]
devfreq: Suspend all devices on system shutdown
This way devfreq core ensures that all its devices will be set to safe
operation points before reboot operation. There are board on which some
aggressive power saving operation points are behind the capabilities of
the bootloader to properly reset the hardware and boot the board. This
way one can avoid board crash early after reboot.
Similar pattern is used in CPUfreq subsystem.
Reported-by: Markus Reichl <m.reichl@fivetechno.de>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I45467c8e02f7fedf90d1dfd5080e6143a8cb69f7
Marek Szyprowski [Fri, 18 Jan 2019 13:28:37 +0000 (14:28 +0100)]
rtc: s3c: Use generic helper to get driver data
Replace of_match_node() with of_device_get_match_data(), which removes a
few lines of code from the driver.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
[backport of mainline commit
64704c92fd19c599f20433aae1372a7ccab79a57]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I9e3a1662233334925ca9ace34609468dc8bc0a14
Marek Szyprowski [Mon, 21 Jan 2019 11:09:30 +0000 (12:09 +0100)]
rtc: s3c: Rewrite clock handling
s3c_rtc_enable/disable_clk() functions were designed to be called multiple
times without reference counting, because they were initially only used in
alarm setting/clearing functions, which can be called both when alarm is
already set or not. Later however, calls to those functions have been added to
other places in the driver - like time and /proc reading callbacks, what
results in broken alarm if any of such events happens after the alarm has
been set. Fix this by simplifying s3c_rtc_enable/disable_clk() functions
to rely on proper reference counting in clock core and move alarm enable
counter to s3c_rtc_setaie() function.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
[backport of mainline commit
5a5b614ba61cc2a89ad0dffc63d913a1a6ba1f9f]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ib72a76ea0567ece0b7b5b706f2ee3b6cca850150
Marek Szyprowski [Tue, 13 Nov 2018 11:32:50 +0000 (12:32 +0100)]
rtc: s3c-rtc: Avoid using broken ALMYEAR register
(RTC,ALM)YEAR registers of Exynos built-in RTC device contains 3 BCD
characters. s3c-rtc driver uses only 2 lower of them and supports years
from 2000..2099 range. The third BCD value is typically set to 0, but it
looks that handling of it is broken in the hardware. It sometimes
defaults to a random (even non-BCD) value. This is not an issue
for handling RTCYEAR register, because bcd2bin() properly handles only
8bit values (2 BCD characters, the third one is skipped). The problem
is however with ALMYEAR register and proper RTC alarm operation. When
YEAREN bit is set for the configured alarm, RTC hardware triggers alarm
only when ALMYEAR and RTCYEAR matches. This usually doesn't happen
because of the random noise on the third BCD character.
Fix this by simply skipping setting ALMYEAR register in alarm
configuration. This workaround fixes broken alarm operation on Exynos
built-in rtc device. My tests revealed that the issue happens on the
following Exynos series: 3250, 4210, 4412, 5250 and 5410.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
[backport of mainline commit
50c8aec4212a966817e868056efc9bfbb73337c0]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I057ae196eeaa9a2c0fee5fcf4c66625783cdfc21
Seung-Woo Kim [Thu, 14 Feb 2019 06:17:00 +0000 (15:17 +0900)]
arm64: configs: tizen_tm2_defconfig: enable syscon-reboot-mode config
To support reboot-mode, enable syscon-reboot-mode config option.
Change-Id: I27e2da1f29aa5fa271b0914fd62e38470f47b403
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Thu, 14 Feb 2019 06:15:50 +0000 (15:15 +0900)]
arm64: dts: exynos5433-tm2: add syscon-reboot-mode
Add syscon-reboot-mode dt node to support reboot mode. TM2
bootloader uses INFORM3 register to check reboot mode of kernel.
Change-Id: I2d5ee09c005f14d4fa7c274fecade920385712e3
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Thu, 14 Feb 2019 06:14:54 +0000 (15:14 +0900)]
ARM: configs: tizen_odroid: enable syscon-reboot-mode config
To support reboot-mode, enable syscon-reboot-mode config option.
Change-Id: I4fe5074f4eeaec4d27d686e5bea4eaf5820fd640
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Thu, 14 Feb 2019 06:12:28 +0000 (15:12 +0900)]
ARM: dts: trats2: add syscon-reboot-mode
Add syscon-reboot-mode dt node to support reboot mode. Trats2 uses
INFORM3 register with offset 0x80c not like odroid families.
In trats2's case, when we released the tizen-2.X with linux-3.10
kernel, it had used the INFORM3 register. That's why trats2 uses
the INFORM3 register for reboot-mode.
Change-Id: Ib7134020b493a83cc7661fe966ea40128f4f8dcc
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Thu, 14 Feb 2019 06:09:46 +0000 (15:09 +0900)]
ARM: dts: odroid: add syscon-reboot-mode
Add the syscon-reboot-mode dt node to support reboot mode.
Odroid families use INFORM2 register with offset 0x808 to let
bootloader recognize reboot mode.
Change-Id: I9876bfce4fc519026c62c53f10e1ef2107cfc256
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Thu, 14 Feb 2019 06:07:30 +0000 (15:07 +0900)]
ARM/ARM64: dts: exynos: add simple-mfd compatible to pmu dt-node
To support syscon-reboot-mode with exynos-pmu, simple-mfd
compatible is required.
Reference: Documentation/devicetree/bindings/power/reset/syscon-reboot-mode.txt
Reference: Documentation/devicetree/bindings/mfd/mfd.txt
Change-Id: I81e78cf5c7f4b3373c181886820b323dadab3d0f
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Thu, 14 Feb 2019 06:03:19 +0000 (15:03 +0900)]
soc: exynos: add reboot-mode header
Exynos platform uses a SYSCON mapped pmu register store
the reboot mode magic value for bootloader to use when
system reboot.
Add the shared header describing the values firmware expects
for different boot modes.
Change-Id: I83bfd3df79652ba55e158fc9e0a56724597ef67d
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Tue, 18 Apr 2017 01:11:01 +0000 (10:11 +0900)]
LOCAL / ARM: SAMSUNG: set chip product id as system_serial
The Exynos SoC has 64bit chip product id and it is unique for
each chip. So it can be used as system_serial.
Change-Id: Id739b865a1e355a0209841ff2ca1802b5daeabb2
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Sylwester Nawrocki [Fri, 1 Feb 2019 16:03:22 +0000 (17:03 +0100)]
soc: exynos: asv: Switch to MHz unit for frequency in ASV tables
There is no need to store the frequencies in kHz units, MHz granularity
is enough and is also used for other SoCs. Remove leading zeros in the
first column of each table and update users accordingly.
Change-Id: I07b0e0395dc6f60d16a008daa27a0ca7a3dcab78
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Sylwester Nawrocki [Wed, 30 Jan 2019 16:58:35 +0000 (17:58 +0100)]
soc: samsung: asv: Drop unnecessary cpuid local variable
Make the code more explicit by dropping the local variable and using
cpu->id directly.
Change-Id: Id97f57e15083e6928852988007d048e28b754285
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Sylwester Nawrocki [Wed, 30 Jan 2019 16:55:49 +0000 (17:55 +0100)]
soc: samsung: Split the ASV driver into common and SoC-specific part
The exynos-asv driver is re-factored as a prerequisite for adding support
for other SoCs.
Change-Id: I252a2f51d101ad39b0469ee7f31f69cd9f0120b5
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Junghoon Kim [Fri, 8 Feb 2019 06:26:58 +0000 (15:26 +0900)]
packaging: Change the kernel version of the spec files
This patch changes the kernel version of the spec files to 4.14.99.
Change-Id: Ibb04f798717f8ff1e9f5e1c6691d6ec3e9dc56ff
Signed-off-by: Junghoon Kim <jhoon20.kim@samsung.com>
Lukasz Luba [Tue, 29 Jan 2019 15:16:05 +0000 (16:16 +0100)]
drivers: power: opp: remove all OPPs registered from DT
Patch solves issue with OPPs registered from DT and not removed during
suspend. In suspend there was a warning:
[ 18.152874] ------------[ cut here ]------------
[ 18.152885] WARNING: CPU: 7 PID: 43 at drivers/base/power/opp/core.c:1367 dev_pm_opp_put_regulators+0xa8/0xb8
[ 18.152889] Modules linked in:
[ 18.152898] CPU: 7 PID: 43 Comm: cpuhp/7 Not tainted 4.14.85-00448-g64a9f12-dirty #6
[ 18.152902] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[ 18.152917] [<
c01117b0>] (unwind_backtrace) from [<
c010cf10>] (show_stack+0x20/0x24)
[ 18.152927] [<
c010cf10>] (show_stack) from [<
c0c37310>] (dump_stack+0x7c/0x9c)
[ 18.152938] [<
c0c37310>] (dump_stack) from [<
c012256c>] (__warn+0xe4/0x110)
[ 18.152946] [<
c012256c>] (__warn) from [<
c01225c8>] (warn_slowpath_null+0x30/0x38)
[ 18.152953] [<
c01225c8>] (warn_slowpath_null) from [<
c05755c4>] (dev_pm_opp_put_regulators+0xa8/0xb8)
[ 18.152963] [<
c05755c4>] (dev_pm_opp_put_regulators) from [<
c0893e44>] (cpufreq_exit+0xa4/0xb0)
[ 18.152971] [<
c0893e44>] (cpufreq_exit) from [<
c088f754>] (cpufreq_offline+0x118/0x238)
[ 18.152977] [<
c088f754>] (cpufreq_offline) from [<
c088f930>] (cpuhp_cpufreq_offline+0x18/0x20)
[ 18.152984] [<
c088f930>] (cpuhp_cpufreq_offline) from [<
c0122d18>] (cpuhp_invoke_callback+0xdc/0x964)
[ 18.152992] [<
c0122d18>] (cpuhp_invoke_callback) from [<
c01245b8>] (cpuhp_thread_fun+0x114/0x2a4)
[ 18.153002] [<
c01245b8>] (cpuhp_thread_fun) from [<
c0147298>] (smpboot_thread_fn+0x1cc/0x2f0)
[ 18.153010] [<
c0147298>] (smpboot_thread_fn) from [<
c0142bb8>] (kthread+0x130/0x168)
[ 18.153018] [<
c0142bb8>] (kthread) from [<
c0108e08>] (ret_from_fork+0x14/0x2c)
[ 18.153023] ---[ end trace
a7d94f69fabccd7c ]---
This fix introduces removing all OPPs and is similar to what is present in
current mainline.
Change-Id: I1abb9c5c887721163c24221ddcac90c35bdf8d67
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Matthias Kaehlcke [Fri, 3 Aug 2018 20:05:09 +0000 (13:05 -0700)]
PM / devfreq: Fix handling of min/max_freq == 0
Commit
ab8f58ad72c4 ("PM / devfreq: Set min/max_freq when adding the
devfreq device") initializes df->min/max_freq with the min/max OPP when
the device is added. Later commit
f1d981eaecf8 ("PM / devfreq: Use the
available min/max frequency") adds df->scaling_min/max_freq and the
following to the frequency adjustment code:
max_freq = MIN(devfreq->scaling_max_freq, devfreq->max_freq);
With the current handling of min/max_freq this is incorrect:
Even though df->max_freq is now initialized to a value != 0 user space
can still set it to 0, in this case max_freq would be 0 instead of
df->scaling_max_freq as intended. In consequence the frequency adjustment
is not performed:
if (max_freq && freq > max_freq) {
freq = max_freq;
To fix this set df->min/max freq to the min/max OPP in max/max_freq_store,
when the user passes a value of 0. This also prevents df->max_freq from
being set below the min OPP when df->min_freq is 0, and similar for
min_freq. Since it is now guaranteed that df->min/max_freq can't be 0 the
checks for this case can be removed.
Change-Id: I4092597dd0d81fd3937bf3a97a9e2639d542d030
Fixes:
f1d981eaecf8 ("PM / devfreq: Use the available min/max frequency")
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
[cw00.choi: Backported from mainline kernel]
Signed-off--by: Chanwoo Choi <cw00.choi@samsung.com>
Bjorn Andersson [Tue, 24 Apr 2018 19:46:39 +0000 (12:46 -0700)]
PM / devfreq: Drop custom MIN/MAX macros
Drop the custom MIN/MAX macros in favour of the standard min/max from
kernel.h
Change-Id: Ic519d8d2be7ec63e412221cdb55d85bad43f1be1
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
[cw00.choi: Backported from mainline kernel]
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Enric Balletbo i Serra [Wed, 4 Jul 2018 08:45:50 +0000 (10:45 +0200)]
PM / devfreq: Fix devfreq_add_device() when drivers are built as modules.
When the devfreq driver and the governor driver are built as modules,
the call to devfreq_add_device() or governor_store() fails because the
governor driver is not loaded at the time the devfreq driver loads. The
devfreq driver has a build dependency on the governor but also should
have a runtime dependency. We need to make sure that the governor driver
is loaded before the devfreq driver.
This patch fixes this bug by adding a try_then_request_governor()
function. First tries to find the governor, and then, if it is not found,
it requests the module and tries again.
Change-Id: I71cdbcc2867980714de984d0c0c2641f7eda8b46
Fixes:
1b5c1be2c88e (PM / devfreq: map devfreq drivers to governor using name)
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
[cw00.choi: Backported from mainline kernel]
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Arvind Yadav [Tue, 29 Jan 2019 05:49:02 +0000 (14:49 +0900)]
PM / devfreq: use put_device() instead of kfree()
Never directly free @dev after calling device_register() or
device_unregister(), even if device_register() returned an error.
Always use put_device() to give up the reference initialized.
Change-Id: I65b83e63daf44ff784753b2372890f07c6515a46
Signed-off-by: Arvind Yadav <arvind.yadav.cs@gmail.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
[cw00.choi: Backported from mainline kernel]
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Markus Elfring [Tue, 13 Feb 2018 21:10:42 +0000 (22:10 +0100)]
PM / devfreq: exynos-ppmu: Delete an error message for a failed memory allocation in exynos_ppmu_probe()
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Change-Id: I25ee724ab3da80f54f339c4ed54bb7bf3c30dbc8
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
[cw00.choi: Backported from mainline kernel]
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Lukasz Luba [Mon, 28 Jan 2019 11:23:48 +0000 (12:23 +0100)]
drivers: devfreq: exynos: use devm_pm_opp_add() in DMC
It change the exynos5-dmc dirver to use safe devm_pm_opp_add() function
for registering new OPPs. Thus, there device resource subsystem takes
care for removing OPPs and/or OPP table in case of deffer probe.
Change-Id: I6d5793e990ac585dca60b4b93018fec0d5e018b0
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Wed, 23 Jan 2019 20:31:47 +0000 (21:31 +0100)]
include: pm_opp: define devm_* functions for notification chain
This patch adds needed function declarations for OPP PM notification
chain registration. The prototype of function devm_pm_opp_register_notifier()
or unregister and needed inline empty definitions in case of lack of config.
Change-Id: Ied2f7e0c59a591767fb29a25f356d31bea452e26
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Wed, 23 Jan 2019 20:30:36 +0000 (21:30 +0100)]
drivers: base: opp: add devm_* for registration of notification chain
Add safe function devm_pm_opp_register_notifier() for registering
notification chain for OPP changes. The function is used in case of
deffer probe, when the device is cleaned and probe function is called
agian.
Change-Id: I188bbfaddc821489c26cb908abb05ccece831dc3
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Wed, 23 Jan 2019 18:14:41 +0000 (19:14 +0100)]
include: pm_opp: define new function devm_pm_opp_add()
Add new function declaration devm_pm_opp_add() in OPP PM subsystem.
It provides safe mechanism for registering OPPs in case of deffer probe.
The patch adds also inline empty functions in case of lack the config.
There is also declaration for devm_pm_opp_remove functions.
Change-Id: I03f14038b03f51fab2674f1cce5df78af37105c2
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Wed, 23 Jan 2019 17:36:00 +0000 (18:36 +0100)]
drivers: base: opp: add devres support and devm_* functions
The patch adds basic support for resource tracking in OPP subsystem.
From now, adding a new OPP might be done using devm_pm_opp_add() which
is safe in case of deffer probe.
When the deffer probe is used and the driver does not remove explicitly
the OPP table, it causes warnings for the next try.
With devm_pm_opp_add() the resources are freed and the next deffer probe
is safe.
There is also simple wrapper for dev_pm_opp_remove().
Change-Id: I0b8282e9faf59b34e958853a451f2e7c9a13c18b
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Wed, 23 Jan 2019 18:12:38 +0000 (19:12 +0100)]
drivers: base: opp: add allocate_opp_table() used by devres.c
The patch adds needed function for devres.c which implements
family of devm_* safe function. It is used for resource tracking
in case of deffer probe, when the driver probe function is called
a few times. The allocated OPP table must be freed and OPPs removed.
Change-Id: I9f098ea8a00bbef03ba680c4efe3b2fdf2e076d2
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Joonyoung Shim [Tue, 22 Nov 2016 06:47:52 +0000 (15:47 +0900)]
mfd: sec-core: read irq registers
On Odroid-XU3 case, this needs to succeed suspend/resume from second
time.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Change-Id: I6ae92bb1116bb3ccfdbae4769258001cedd43d44
Joonyoung Shim [Thu, 17 Nov 2016 07:43:31 +0000 (16:43 +0900)]
ARM: EXYNOS: firmware: add workaround code for suspend/resume
This comes from S.LSI kernel.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Id5b57259de9ad09d5ad712ed19ad47713f045dea
Bartlomiej Zolnierkiewicz [Mon, 15 Oct 2018 13:48:27 +0000 (15:48 +0200)]
ARM: exynos: Remove no longer needed s3c_pm_check_*() calls
Since commit
6862fdf2201a ("ARM: samsung: Limit SAMSUNG_PM_CHECK
config option to non-Exynos platforms") s3c_pm_check_*() calls
are redundant and can be removed.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit ]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Idc96a5a0d48eca57c6f7efed96e11789cec0481e
Krzysztof Kozlowski [Tue, 24 Jul 2018 16:49:46 +0000 (18:49 +0200)]
ARM: exynos: Fix imprecise abort during Exynos5422 suspend to RAM
Suspend to RAM on Odroid XU3/XU4/HC1 family (Exynos5422) causes
imprecise abort:
PM: Syncing filesystems ... done.
Freezing user space processes ... (elapsed 0.003 seconds) done.
OOM killer disabled.
Freezing remaining freezable tasks ... (elapsed 0.003 seconds) done.
wake enabled for irq 139
Disabling non-boot CPUs ...
IRQ51 no longer affine to CPU1
IRQ52 no longer affine to CPU2
IRQ53 no longer affine to CPU3
IRQ54 no longer affine to CPU4
IRQ55 no longer affine to CPU5
IRQ56 no longer affine to CPU6
cpu cpu4: Dropping the link to regulator.40
IRQ57 no longer affine to CPU7
Unhandled fault: external abort on non-linefetch (0x1008) at 0xf081a028
Internal error: : 1008 [#1] PREEMPT SMP ARM
with last call trace in exynos_suspend_enter().
The abort is caused by writing to register in secure part of sysram.
Boards booted under secure firmware (e.g. Hardkernel Odroid boards)
should access non-secure sysram.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
e0b35c1ab5ac5f0453d1093770e119bd8d63d85c]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Iaa947452e284d9df9b917e77ece381475ad717da
Krzysztof Kozlowski [Tue, 24 Jul 2018 16:49:44 +0000 (18:49 +0200)]
ARM: exynos: Store Exynos5420 register state in one variable
Instead of keeping two static variables put them into one struct which
later can grow. This will reduce number of file-scope symbols.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
687b5ae2e6c6682a2b0bda3b31a884ed564f9194]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I6717640c3d0b6d00e2d17a4bca300a42ba4ea192
Joonyoung Shim [Mon, 24 Sep 2018 11:00:56 +0000 (13:00 +0200)]
clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420
The bit of GATE_BUS_PERIS1 for CLK_SECKEY is just reserved on
exynos5422/5800, not exynos5420. Define gate clk for exynos5420 to
handle the bit only on exynos5420.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
[m.szyprow: rewrote commit subject]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <snawrocki@kernel.org>
[backport of mainline commit
d32dd2a1a0f80edad158c9a1ba5f47650d9504a0]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ibe07b14ac8bc88d18e76c9e2968ff7c08b5c3b67
Anand Moon [Thu, 27 Sep 2018 14:07:36 +0000 (14:07 +0000)]
ARM: dts: exynos: Add pin configuration for SD write protect on Odroid XU3/XU4/HC1
Add SD card write-protect pin configuration to be sure that it will be
properly pulled down to indicate write access.
Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
6135ee70cb1314681772645242beee46fcf5d185]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ic23dfd37330417d7b0724247354f1aed1a84b9de
Anand Moon [Thu, 27 Sep 2018 14:07:37 +0000 (14:07 +0000)]
ARM: dts: exynos: Update maximum frequency for eMMC to 200MHz on Odroid XU3/XU4
Set the eMMC max-frequency to 200MHz for optimal performance on Odroid
XU3/XU4 family of boards.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
4289c86c4cd7a848590e1e2c3e0e3274136b6848]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ia7470eccf05871c498d9270d49855c3dc71228f2
Anand Moon [Thu, 27 Sep 2018 14:07:35 +0000 (14:07 +0000)]
ARM: dts: exynos: Update maximum frequency for SD card to 200MHz on Odroid XU3/XU4/HC1
Set the SD max-frequency to 200MHz for optimal performance on Odroid
XU3/XU4/HC1 family of boards.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
c60b3f77f497d2720f7b841e78acfcf24fee071a]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I46d7d0ba4e8558ca1e9d54754538c9a988180bfb
Anand Moon [Thu, 27 Sep 2018 14:07:34 +0000 (14:07 +0000)]
ARM: dts: exynos: Fix LDO13 min values on Odroid XU3/XU4/HC1
From Odroid XU3/XU4/HC1 schematics the LDO13 regulator for SD2, can be
set on 1.8V or 2.8V so the minimal value should be fixed to 1.8V. This
is necessary to support UHS-I tuning (otherwise card won't be detected
during boot).
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
8fe325fa9d065aa54db4914fdaccab2169fd67a8]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ife4ea8f5f221de8be59bcba2985b099a8775cea4
Anand Moon [Thu, 27 Sep 2018 14:07:33 +0000 (14:07 +0000)]
ARM: dts: exynos: Add UHS-I bus speed support to Odroid XU3/XU4/HC1
Add support for UHS-I bus speed tuning for SDR50, DDR50 and SDR104 to
Odroid XU3/XU4/HC1 family boards.
Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
25e5566e2b6e3ea0768505f75db887d7176150ce]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ib2422e135cc46ca597a555fd4466cc01b8f504f5
Krzysztof Kozlowski [Wed, 25 Jul 2018 15:55:16 +0000 (17:55 +0200)]
ARM: dts: exynos: Add compatible for s2mps11 clocks node on Exynos542x
The bindings for s2mps11/s5m8767 clocks driver require a compatible for
clocks node. Parent MFD sec-core driver will also use it when
instantiating children.
The compatible is not needed for proper working because device will be
anyway created by parent MFD device. Add it for correctness.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
3f9d8677b73bbf62f7e53a165a88f953d1dca926]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I0ef950609cec279ff9c70242352dcba414e9ec1d
Krzysztof Kozlowski [Mon, 6 Aug 2018 16:09:33 +0000 (18:09 +0200)]
ARM: dts: exynos: Add LDO28 regulator on Exynos5422 Odroid boards
The LDO28 is used only on Odroid XU3 for Display Port. Define it so DTS
will describe entire hardware.
Depending on bootloader behavior this might affect the Display Port
because none of drivers are enabling it. By default it is off in S2MPS11
PMIC reset values. However it could be enabled by bootloader so in such
case kernel will later disable it as unused regulator.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
[backport of mainline commit
8be3e7f0785c2258479aab26c926ed9be6b9a799]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I646826a349ca66544cafcf7749a1b27416073017
Krzysztof Kozlowski [Mon, 6 Aug 2018 16:09:32 +0000 (18:09 +0200)]
ARM: dts: exynos: Disable unused PMIC regulators on Exynos5422 Odroid boards
Disable unused PMIC regulators on Exynos5422 Odroid boards to reduce
energy used. According to schematics:
1. LDO12, LDO16 and LDO24 are not connected,
2. LDO26 is not used on Odroid HC1.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
b5124e4507939e6a254968091148759de37947bb]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I1dc3fe5991857c6bb54691212f7c624362235360
Krzysztof Kozlowski [Mon, 6 Aug 2018 16:09:31 +0000 (18:09 +0200)]
ARM: dts: exynos: Add unused PMIC regulators on Exynos5422 Odroid boards
Define LDO14, LDO20-22, LDO25 and LOD29-38 unused regulators to
describe the hardware.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
8e82954979fc41426c924a9bee93d435b5639cda]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I8089ac54336ae49ea791964364ec2c69c7be9639
Krzysztof Kozlowski [Mon, 6 Aug 2018 16:09:30 +0000 (18:09 +0200)]
ARM: dts: exynos: Add missing used PMIC regulators on Exynos5422 Odroid boards
Define LDO2, LDO23 and LDO27 critical board regulators to describe the
hardware.
Suggested-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
95ac226222a6130982b9b2d924db2945b6338885]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ie54c2d746e66c4c630aa6d19b752f5957ebf3817
Mathieu Malaterre [Wed, 2 May 2018 20:11:52 +0000 (22:11 +0200)]
ARM: dts: exynos/s3c: Remove leading 0x and 0s from bindings notation
Improve the DTS files by removing all the leading "0x" and zeros to fix the
following dtc warnings:
Warning (unit_address_format): Node /XXX unit name should not have leading "0x"
Warning (unit_address_format): Node /XXX unit name should not have leading 0s
Converted using the following command:
find arch/arm/boot/dts -type f \( -iname "*.dts" -o -iname "*.dtsi" \) -exec sed -i \
-e "s/@\([0-9a-fA-FxX\.;:#]\+\)\s*{/@\L\1 {/g" -e "s/@0x\(.*\) {/@\1 \
{/g" -e "s/@0\+\(.\+\) {/@\1 {/g" {} +
For simplicity, two sed expressions were used to solve each warnings separately.
To make the regex expression more robust a few other issues were resolved,
namely setting unit-address to lower case, and adding a whitespace before the
the opening curly brace: https://elinux.org/Device_Tree_Linux#Linux_conventions
This will solve also a side effect warning:
Warning (simple_bus_reg): Node /XXX@<UPPER> simple-bus unit address format error, expected "<lower>"
This is a follow up to commit
4c9847b7375a ("dt-bindings: Remove leading 0x from bindings notation")
Reported-by: David Daney <ddaney@caviumnetworks.com>
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
[krzk: Rerun the command to include few more changes, adjust the commit msg]
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
[backport of mainline commit
edef4285afb072f8d8ddfbfa107e54c4b45c0547]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ia25a2a2ffee646520762552549ea59f57ded8f5b
Sylwester Nawrocki [Mon, 7 Jan 2019 16:50:42 +0000 (17:50 +0100)]
configs: Enable Odroid sound driver in tizen_odroid_defconfig
Change-Id: If09b313516975bc2897e539164721089fe308ecd
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Rohit kumar [Thu, 1 Nov 2018 12:38:49 +0000 (18:08 +0530)]
ASoC: core: Invoke pcm_new() for all DAI-link
Remove no_pcm check to invoke pcm_new() for backend dai-links
too. This fixes crash in hdmi codec driver during hdmi_codec_startup()
while accessing chmap_info struct. chmap_info struct memory is
allocated in pcm_new() of hdmi codec driver which is not invoked
in case of DPCM when hdmi codec driver is part of backend dai-link.
Below is the crash stack:
[ 61.635493] Unable to handle kernel NULL pointer dereference at virtual address
00000018
..
[ 61.666696] CM = 0, WnR = 1
[ 61.669778] user pgtable: 4k pages, 39-bit VAs, pgd =
ffffffc0d6633000
[ 61.676526] [
0000000000000018] *pgd=
0000000153fc8003, *pud=
0000000153fc8003, *pmd=
0000000000000000
[ 61.685793] Internal error: Oops:
96000046 [#1] PREEMPT SMP
[ 61.722955] CPU: 7 PID: 2238 Comm: aplay Not tainted 4.14.72 #21
..
[ 61.740269] PC is at hdmi_codec_startup+0x124/0x164
[ 61.745308] LR is at hdmi_codec_startup+0xe4/0x164
Change-Id: I1335d13ffb7f0fd1ba10884ff23b81b6b51a3889
Signed-off-by: Rohit kumar <rohitkr@codeaurora.org>
Sylwester Nawrocki [Wed, 7 Mar 2018 17:46:25 +0000 (18:46 +0100)]
ASoC: Use proper DT compatible string for Hardkernel Odroid boards
The Odroid boards are manufactured by Hardkernel, not Samsung. New compatible
string entries are added, with "hardkernel," instead of "samsung," vendor
prefix. Support for the old compatible strings is going to be removed after
some time.
Change-Id: I16c4892514b8399f635fa32fbe43a3dcf2f4c05a
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Sylwester Nawrocki [Wed, 14 Mar 2018 16:41:15 +0000 (17:41 +0100)]
ASoC: samsung: Use snd_soc_of_put_dai_link_codecs() in odroid.c
Now when a helper for unreferencing device nodes is available
we can get rid of the local implementation.
Change-Id: I12314edbf367f8d64c95cfb39d69f77fb5edce62
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Sylwester Nawrocki [Fri, 9 Mar 2018 17:48:54 +0000 (18:48 +0100)]
ASoC: Add snd_soc_of_put_dai_link_codecs() helper function
The code for dereferencing device nodes in the 'codecs' array is moved
to a separate function so we can avoid open coding that in drivers.
Change-Id: I08f51d2a0ee3a6c412fb430ba97fe0fb1d011e5c
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Sylwester Nawrocki [Wed, 14 Mar 2018 16:41:14 +0000 (17:41 +0100)]
ASoC: samsung: odroid: Drop sample rates that cannot be supported from hw_params()
The I2S controller can handle sample rates only up to 96000 and the CPU DAI
has already related constraint set so drop the impossible 176400, 192000
switch cases.
Change-Id: I704632e1e943f9c67170913a55763291aaa31f77
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Lukasz Luba [Fri, 11 Jan 2019 17:12:14 +0000 (18:12 +0100)]
arm: config: exynos: enable DMC driver
Enable driver for Dynamic Controller in Exynos SoCs.
Change-Id: Ic87339161b10a3a71a40b47af1d4789c997ef5a1
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Tue, 15 Jan 2019 17:59:24 +0000 (18:59 +0100)]
ARM: dts: exynos5420: change speed and parent of NoC clock
This patch changes speed to 400MHz and parent clock of NoC bus.
The old parent, which was set by bootloader, had speed 533MHz.
When the exynos-bus driver tried to change the frequency to 400MHz,
in low level the clock divider set val 2 and the actual frequency of
the bus was 266MHz. For the rest OPPs the same situation apply.
Having the right parent, meaning: PLL ratios declared and possible divider
values equal the OPPs values, if crucial for the buses.
This bus is used for data transport between GPU and DRAM. The performance
can be checked by fixing the freq of the bus (not by the ondemand governor)
and fixing the freq of GPU, then running some openGL benchmarks.
Change-Id: Ied8d9f50c7444a809670234ff62dc409f1f42a5f
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Tue, 15 Jan 2019 17:55:49 +0000 (18:55 +0100)]
clk: samsung: Export Exynos5420 CLK_MOUT_WCORE NoC clock
Patch adds ID for clock needed for changing parent of the main NoC clock.
Change-Id: I7ecc64ce7b09d0e7654bf9830e73a8328e269164
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Tue, 15 Jan 2019 17:54:26 +0000 (18:54 +0100)]
clk: samsung: add new CLK_MOUT_WCORE for NoC in Exynos5420 SoC
New clock ID (CLK_MOUT_WCORE) is needed for changing parent of the main
NoC bus clock.
Change-Id: I21dbd629d0f4529f94ca0c07982cddcef63f7cc4
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Tue, 22 Jan 2019 11:46:53 +0000 (12:46 +0100)]
arm: config: tizen: enable userspace governor in devfreq
Userspace governor provides feature of easy frequency change and is
needed by some drivers, like exynos5-dmc.
Change-Id: Iaa6ba575a0f13376b9ebc51ff4bc06ed96ead35b
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Tue, 22 Jan 2019 10:38:02 +0000 (11:38 +0100)]
arm: config: tizen: enable DMC driver in tizen_odroid
Enable driver for Dynamic Memory Controller in Exynos SoCs.
Change-Id: Iffb91a7c032d11c9bc9030716e1f546833af467f
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Fri, 11 Jan 2019 17:43:31 +0000 (18:43 +0100)]
drivers: devfreq: events: add Exynos PPMU new events
Define new performance events supported by Exynos5422 SoC counters.
The counters are built-in in Dynamic Memory Controller and provide
information regarding memory utilization.
Change-Id: Ia5feaed119cdbbdf570f8a5b3efcf231c500a2c8
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Fri, 11 Jan 2019 17:07:45 +0000 (18:07 +0100)]
arm: DT: exynos: add exynos5422 DMC device
The patch adds a new file with Dynamic Controller device and
accosiated performance counters. It provides definition of used clocks
and register sets.
Change-Id: I71d31db1f4c4f2be174adc735662f4c35f4dcf7d
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Fri, 11 Jan 2019 17:00:39 +0000 (18:00 +0100)]
drivers: devfreq: exynos5: add DMC driver
This patch adds driver for Exynos5 Dynamic Memory Controller.
The driver provides support for DVFS in DMC and DRAM.
It also supports changing timings of DRAM running with different
frequency.
Change-Id: I98a630d1f0e6639bb160e0465302ae8f3800ef92
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Fri, 11 Jan 2019 18:09:33 +0000 (19:09 +0100)]
clk: samsung: add new clocks for Exynos5422 SoC
This patch provides support for clocks needed for Dynamic Memory Controller
in Exynos5422. It also defines new PLL rates for BPLL which is used
for DMC.
Change-Id: I85d151a19a176ef5ea8057b49b0afbfb778fe5a9
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Lukasz Luba [Fri, 11 Jan 2019 18:07:38 +0000 (19:07 +0100)]
clk: samsung: add needed IDs for DMC clocks in Exynos5420
Define new IDs for clocks used by Dynamic Memory Controller in
Exynos5422 SoC.
Change-Id: Ic73d88601fa2c4631088300b930abefa25816158
Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com>
Marek Szyprowski [Fri, 7 Dec 2018 14:55:12 +0000 (15:55 +0100)]
LOCAL / PCI: workaround for PCI issues in system suspend/resume on TM2
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I31e72d43c2bc80c88049ec441aef4786839a1ff3
Marek Szyprowski [Fri, 7 Dec 2018 11:21:14 +0000 (12:21 +0100)]
LOCAL / PCI: exynos: add simple suspend/resume methods
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I255983c0cbd6ee19b39c9c229d21139a46dc22f4
Marek Szyprowski [Fri, 30 Nov 2018 09:30:17 +0000 (10:30 +0100)]
arm64: dts: exynos: Add sleep state for the sleep relevant pins
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ia3f96901af60d5a81f7c559b0111bb3ed1c2024b
Marek Szyprowski [Tue, 20 Nov 2018 14:25:47 +0000 (15:25 +0100)]
arm64: dts: exynos: Enable all PCIe regulators
According to schematic diagram, a part of PCIe is using
VDD10_MIPI2L_1.0V_AP. Enable it always for now.
Suggested-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I6a2742809237898419e417c983acb4d79eb6401f
Marek Szyprowski [Mon, 3 Dec 2018 14:43:20 +0000 (15:43 +0100)]
pinctrl: samsung: use NOIRQ phase for suspend/resume
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ibf8a51e77403bab519afa99ce826f060ec1f523e
Marek Szyprowski [Tue, 12 Jun 2018 10:55:23 +0000 (12:55 +0200)]
mmc: dw_mmc-exynos: fix potential external abort in resume_noirq()
dw_mci_exynos_resume_noirq() performs DWMMC register access without
ensuring that respective clocks are enabled. This might cause external
abort on some systems (observed on Exynos5433 based boards). Fix this
by forcing a PM runtime active state before register access. Using
SET_NOIRQ_SYSTEM_SLEEP_PM_OPS allows also to cleanup conditional code
a bit.
Suggested-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Change-Id: I172ee95730a0f45b0a2f4dea002c59928f3b1e63
Marek Szyprowski [Tue, 11 Sep 2018 06:49:39 +0000 (08:49 +0200)]
serial: samsung: Enable baud clock for UART reset procedure in resume
Ensure that baud clock is also enabled for UART reset in driver resume.
On Exynos5433 SoC this is needed to avoid external abort in UART register
writes.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I2987842ea1b38582bdbceb9ffab3ed1a3b1cbfd2
Marek Szyprowski [Wed, 19 Sep 2018 09:36:55 +0000 (11:36 +0200)]
clk: samsung: exynos5433: add workaround for NOIRQ sleep
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I53b8969337a3464eb5cd5d877ce877670895836a
Marek Szyprowski [Fri, 11 May 2018 06:50:36 +0000 (08:50 +0200)]
clk: samsung: exynos5433: Keep sclk_uart clocks enabled in suspend
All sclk_uart clocks in TOP CMU have to be kept enabled for suspend/resume
cycle, otherwise TM2(e) boards hangs before entering the suspend mode.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I198880bcee0688c9e33b1e4056b8b60819303945
Marek Szyprowski [Wed, 29 Aug 2018 16:00:13 +0000 (18:00 +0200)]
clk: samsung: exynos5433: Add suspend state for TOP, CPIF & PERIC CMUs
Before entering system suspend, one has to ensure that some clocks from
TOP, CPIF and PERIC CMUs are enabled. This is needed by the firmware
to properly perform system suspend operation. Instead of adding more and
more clocks with CRITICAL flag, simply enable those clocks directly in
respective CMU registers using 'suspend_regs' feature.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Change-Id: I1dab71d4834fcbd13634411d44ecb11775c46cde
Marek Szyprowski [Wed, 29 Aug 2018 16:00:12 +0000 (18:00 +0200)]
clk: samsung: Use NOIRQ stage for Exynos5433 clocks suspend/resume
SoC clock drivers should suspend after every other drivers in the system,
which are using clocks and resume before them. The last stage for calling
suspend device callbacks is NOIRQ stage and there exists driver, which use
that state (dwmmc-exynos), so Exynos5433 clocks driver should also use it.
During the same stage, clocks driver will be always suspended after its
clients as a direct result of proper device probe order (deferred probe
reorders the suspend call sequence).
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Change-Id: I3e15407b8d3ec2d10d706b21321ce098b14a0d50
Marek Szyprowski [Wed, 29 Aug 2018 15:50:44 +0000 (17:50 +0200)]
clk: samsung: Add support for setting registers state before suspend
Some registers of clock controller have to be set to certain values before
entering system suspend state. Till now drivers did that on their own,
but it will be easier to handle it by generic code and let drivers simply
to provide the list of registers and their state.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I9038d2b135fb8a5402015cc9e709045b085b6e04
Marek Szyprowski [Mon, 11 Jun 2018 11:30:13 +0000 (13:30 +0200)]
drm/exynos: Ensure suspended runtime PM state during system suspend
Add calls to pm_runtime_force_{suspend,resume} as SYSTEM_SLEEP_PM_OPS for
all drivers for the real Exynos DRM hardware modules. This ensures that
the resources will be released for the system PM suspend/resume cycle.
Exynos DRM core already takes care of suspending the whole display pipeline
before PM callbacks of the real devices are called.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I29ad062624f110926a091dd6ad778e50de664986
Marek Szyprowski [Thu, 17 May 2018 06:46:07 +0000 (08:46 +0200)]
drm/exynos: Suspend/resume display pipeline as early/late as possible
In the current code, exynos_drm_suspend() function is called after all
real devices (CRTCs, Encoders, etc) are suspended, because Exynos DRM
virtual platform device is created as last device in the system (as
a part of DRM registration). None of the devices for real hardware
modules has its own system suspend/resume callbacks, so it doesn't
change any order of the executed code, but it has a side-effect:
runtime PM callbacks for real devices are not executed, because those
devices are considered by PM core as already suspended. This might
cause issues on boards with complex pipelines, where something
depends on the runtime PM state of the given device.
To ensure that exynos_drm_suspend() is called before any suspend
callback from the real devices, assign it to .prepare callback. Same
for exynos_drm_resume(), using .complete callback ensures that all
real devices have been resumed when calling it.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Icb178cecfbec2cb5b71b7a2ea70bf290c89198d2
Marek Szyprowski [Mon, 11 Jun 2018 10:52:33 +0000 (12:52 +0200)]
drm/exynos: Drop useless check from exynos_drm_{suspend,resume}
The virtual Exynos DRM device has no runtime PM enabled, so checking
for its runtime suspended state is useless.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I35a181ec0367f97613d2a3344c31705aacecff48
Marek Szyprowski [Mon, 21 May 2018 06:34:49 +0000 (08:34 +0200)]
pinctrl: samsung: Fix suspend/resume for Exynos5433 GPF1..5 banks
GPF1..5 banks in Exynos5433 are located in two pinctrl devices: ALIVE and
IMEM. Although they are partially located in ALIVE section, the state of
their registers in IMEM section is lost after suspend/resume cycle. To
properly handle such case, those banks have to be defined with standard
'exynos5433_bank_type_off' type (with PINCFG_TYPE_CON_PDN and
PINCFG_TYPE_PUD_PDN register offsets). This automatically instructs
the generic Samsung pinctrl suspend/resume code to save and restore state
of those registers.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Change-Id: Ib097dca4d0a3a44a9e6216461b0e97aa090d3b16
Marek Szyprowski [Tue, 18 Sep 2018 07:35:56 +0000 (09:35 +0200)]
arm64: dts: exynos: Update DWC3 modules on Exynos5433 SoCs
Update DWC3 hardware modules to Exynos5433 specific variant: change
compatible name and add all required clocks (both to the glue node and
DWC3 core node).
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I84cf27a3c55c59043b02f77d74070b325fd99acd
Marek Szyprowski [Tue, 18 Sep 2018 07:16:21 +0000 (09:16 +0200)]
usb: dwc3: exynos: Add support for Exynos5433 variant with all clocks
DWC3 variant found in Exynos5433 SoCs requires keeping all DRD30/UHOST30
clocks enabled all the time the driver does any access to DWC3 registers,
otherwise external abort happens. So far DWC3 hardware module worked with
samsung,exynos5250-dwusb3 compatible only by luck when built into kernel:
all DRD30 clocks were left enabled by bootloader and later kept enabled
by the DRD PHY driver. However, if one tried to use Exnos DWC3 driver as
a module or performed system suspend/resume cycle, external abort
happened. This patch finally fixes this issue.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: If2cff3c68c73ef288b47ec3fe623c8b904a1e067
Marek Szyprowski [Tue, 18 Sep 2018 07:15:54 +0000 (09:15 +0200)]
usb: dwc3: exynos: Rework clock handling and prepare for new variants
Add per-variant list of clocks and manage them all together in
the single array. This is a preparation for adding new variants
of Exynos SoCs. No functional changes for existing Exynos SoCs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ib8f4c93445f88b82d08fe9e49aac60f465a44a3f
Marek Szyprowski [Mon, 17 Sep 2018 07:26:51 +0000 (09:26 +0200)]
usb: dwc3: exynos: Remove dead code
All supported Exynos variants provide respective generic PHY framework
based drivers for controlling USB PHYs, so there is no point
creating fake USB PHYs based on platform devices. While removing useless
code, remove calls to runtime PM, which have no effect.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I2c82d23cfe1daeea1b3b93f1f87de5757f17e451
Marek Szyprowski [Wed, 16 May 2018 08:34:13 +0000 (10:34 +0200)]
spi: spi-s3c64xx: Fix system resume support
Since Linux v4.10 release (commit
1d9174fbc55e "PM / Runtime: Defer
resuming of the device in pm_runtime_force_resume()"),
pm_runtime_force_resume() function doesn't runtime resume device if it was
not runtime active before system suspend. Thus, driver should not do any
register access after pm_runtime_force_resume() without checking the
runtime status of the device. To fix this issue, simply move
s3c64xx_spi_hwinit() call to s3c64xx_spi_runtime_resume() to ensure that
hardware is always properly initialized. This fixes Synchronous external
abort issue on system suspend/resume cycle on newer Exynos SoCs.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
CC: <stable@vger.kernel.org> # 4.10.x: 1c75862d8e5a spi: spi-s3c64xx: Remove unused s3c64xx_spi_hwinit()
CC: <stable@vger.kernel.org> # 4.10.x
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Andi Shyti <andi@etezian.org>
Change-Id: I34cb90a7eff4bf21162c232eb6308fb120d06d4a
Marek Szyprowski [Wed, 13 Jun 2018 12:55:45 +0000 (14:55 +0200)]
soc: samsung: Fix arm 32bit build break in Exynos PM code
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: If656a06064684707b4cea7d8cfb7f1e08c2c02f3
Marek Szyprowski [Tue, 15 May 2018 12:41:25 +0000 (14:41 +0200)]
soc: samsung: pmu: fix first suspend failure
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I68c1e0187cc6b7d533923092bc811dfa7daa9030
Marek Szyprowski [Tue, 15 May 2018 11:58:40 +0000 (13:58 +0200)]
soc: samsung: pmu: enable AUD power domain before the suspend
PMU system suspend procedure assumes that it has to turn off AUD power
domain and fails if AUD power domain is already turned off. To
make PMU happy enable AUD power domain when configuring suspend PMU
registers.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Ieb338eb79b1d99ebd0bccdac837feb88619b2068
Marek Szyprowski [Mon, 14 May 2018 07:06:03 +0000 (09:06 +0200)]
clock_source: mct vs arch_timer - fix suspend/resume support
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I87d83c16fbcf5d0151c4f298cbb540a941a5606e
Marek Szyprowski [Wed, 12 Sep 2018 07:22:25 +0000 (09:22 +0200)]
arm64: dts: exynos: Mark 1.2GHz CPU OPPs as suitable for suspend on Exynos5433
Reduce speed of both CPU clusters to 1.2GHz for suspend/resume cycle on
Exynos5433 boards. Test on TM2(e) boards proved that this made
suspend/resume stable.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: Icca296d13185cd26e16e231896e8cf1a0f5cdd68