Seung-Woo Kim [Wed, 13 May 2015 04:44:39 +0000 (13:44 +0900)]
s5p-mfc: fix state check from encoder queue_setup
MFCINST_GOT_INST state is set to encoder context with set_format
only for catpure buffer. In queue_setup of encoder called during
reqbufs, it is checked MFCINST_GOT_INST state for both capture
and output buffer. So this patch fixes to encoder to check
MFCINST_GOT_INST state only for capture buffer from queue_setup.
Change-Id: I53997d92ebf8a9bda804d101f2daf8d9731e4a47
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Hyungwon Hwang [Tue, 2 Jun 2015 09:15:36 +0000 (18:15 +0900)]
drm/exynos: ipp: fix wrong index referencing a config element
Config depends on the opreation. So it must be referenced by an
operation id, not a property id.
Change-Id: Id57a5e6d371125d85cde97cf03848ffbf0b8abfd
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Ingi Kim [Tue, 28 Apr 2015 10:59:34 +0000 (19:59 +0900)]
drm/exynos: add ARGB8888 support for ipp gsc
Basically, gsc do not support ARGB color format.
However, when mfc decodes through OMX(openmax) which is standard API
for Media Library Portability, output format was shown as ARGB format.
For support it, this patch adds ARGB8888 format support for ipp gsc driver.
Change-Id: Ie5134592eca96acd133e2c098b6fd3c92c5e2605
Signed-off-by: Ingi Kim <ingi2.kim@samsung.com>
Ingi Kim [Fri, 29 May 2015 08:07:20 +0000 (17:07 +0900)]
drm/exynos: mask alpha bit in the register when output format is XRGB8888
When color format changes YUV to RGB by ipp gsc,
the color of output image seems to come out.
The alpha value should have ignored but bits
in the GSCALER_OUT_CON register do not set to 0xff(masking alpha value)
This patch masks alpha bits in the GSCALER_OUT_CON register
when the userspace decide to use XRGB8888.
Change-Id: I78bf2d8214cbdb10568b3bb4b9af6b9bf28752a5
Signed-off-by: Ingi Kim <ingi2.kim@samsung.com>
Inki Dae [Thu, 21 May 2015 03:46:19 +0000 (20:46 -0700)]
Merge "drm/exynos: workaround to change graphic layers priority" into tizen
Andrzej Pietrasiewicz [Mon, 18 May 2015 10:14:01 +0000 (12:14 +0200)]
media: s5p-jpeg: Adjust buffer size for Exynos 4412
Eliminate iommu fault during encoding by adjusting image size
used for buffer size computation and ensuring that the buffer is not
overrun.
Change-Id: I4837ef4cd518732af8110725b50e8f4e1bd313a9
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Joonyoung Shim [Fri, 15 May 2015 07:29:00 +0000 (16:29 +0900)]
drm/exynos: workaround to change graphic layers priority
As cannot use video layer, need lower layer than default layer. So make
higher graphic layer 0 priority then graphic layer 1 priority. This is
just workaround, may need to make a interface to change layer priority
for user later.
Change-Id: If63a2f3eef6c164b5b3c3a5c801f9090a6a0a341
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Joonyoung Shim [Thu, 14 May 2015 04:56:45 +0000 (13:56 +0900)]
ARM: odroidxu3_defconfig: enable cpufreq for arm bL
Also disable CONFIG_BL_SWITCHER as any error when does stress test.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Thomas Abraham [Tue, 21 Apr 2015 15:49:05 +0000 (17:49 +0200)]
ARM: Exynos: use generic cpufreq driver for Exynos5800
The new CPU clock type allows the use of generic arm_big_little_dt
cpufreq driver for Exynos5800.
Changes by Bartlomiej:
- split Exynos5800 support from the original patch
- disable cpufreq if big.LITTLE switcher support is enabled
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Tue, 21 Apr 2015 15:49:04 +0000 (17:49 +0200)]
ARM: dts: Exynos5800: fix CPU OPP
Fix CPU operating points for Exynos5800 (it uses different
voltages than Exynos5420 and supports additional frequencies).
However don't use 2000MHz & 1900MHz OPPs (for A15 cores) and
1400MHz OPP (for A7 cores) until there is a separate DTS for
ODROID-XU3 Lite board (which doesn't support these higher
OPPs).
Based on Hardkernel's kernel for ODROID-XU3 board.
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Tue, 21 Apr 2015 15:49:03 +0000 (17:49 +0200)]
clk: samsung: exynos5800: fix cpu clock configuration data
Fix cpu clock configuration data for Exynos5800 (it uses
higher PCLK_DBG divider values than Exynos5420 and supports
additional frequencies).
Based on Hardkernel's kernel for ODROID-XU3 board.
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thomas Abraham [Tue, 21 Apr 2015 15:49:02 +0000 (17:49 +0200)]
ARM: Exynos: use generic cpufreq driver for Exynos5420
The new CPU clock type allows the use of generic arm_big_little_dt
cpufreq driver for Exynos5420.
Changes by Bartlomiej:
- split Exynos5420 support from the original patch
- disable cpufreq if big.LITTLE switcher support is enabled
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thomas Abraham [Tue, 21 Apr 2015 15:49:01 +0000 (17:49 +0200)]
ARM: dts: Exynos5420: add CPU OPP and regulator supply property
For Exynos5420 platforms, add CPU operating points and CPU
regulator supply properties for migrating from Exynos specific
cpufreq driver to using generic cpufreq driver.
Changes by Bartlomiej:
- split Exynos5420 support from the original patch
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thomas Abraham [Tue, 21 Apr 2015 15:49:00 +0000 (17:49 +0200)]
clk: samsung: exynos5420: add cpu clock configuration data and instantiate cpu clock
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5420.
Changes by Bartlomiej:
- split Exynos5420 support from the original patches
- moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Tue, 21 Apr 2015 15:48:59 +0000 (17:48 +0200)]
ARM: dts: Exynos5420/5800: add cluster regulator supply properties
Add cluster regulator supply properties as a preparation to
adding generic arm_big_little_dt cpufreq driver support for
Exynos5420 and Exynos5800 based boards.
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Tue, 21 Apr 2015 15:48:58 +0000 (17:48 +0200)]
cpufreq: arm_big_little: add cluster regulator support
Add cluster regulator support as a preparation to adding
generic arm_big_little_dt cpufreq_dt driver support for
ODROID-XU3 board. This allows arm_big_little[_dt] driver
to set not only the frequency but also the voltage (which
is obtained from operating point's voltage value) for CPU
clusters.
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Mon, 13 Apr 2015 17:47:02 +0000 (19:47 +0200)]
cpufreq: exynos: remove Exynos5250 specific cpufreq driver support
Exynos5250 based platforms have switched over to use generic
cpufreq driver for cpufreq functionality. So the Exynos
specific cpufreq support for these platforms can be removed.
The exynos-cpufreq driver itself is also removed as it is no
longer used/needed after Exynos5250 support removal.
Based on the earlier work by Thomas Abraham.
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thomas Abraham [Mon, 13 Apr 2015 17:47:01 +0000 (19:47 +0200)]
ARM: Exynos: switch to using generic cpufreq driver for Exynos5250
The new CPU clock type allows the use of generic CPUfreq driver.
Switch Exynos5250 to using generic cpufreq driver.
Changes by Bartlomiej:
- split Exynos5250 support from the original patch
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thomas Abraham [Mon, 13 Apr 2015 17:47:00 +0000 (19:47 +0200)]
ARM: dts: Exynos5250: add CPU OPP and regulator supply property
For Exynos5250 platforms, add CPU operating points and CPU
regulator supply properties for migrating from Exynos specific
cpufreq driver to using generic cpufreq driver.
Changes by Bartlomiej:
- split Exynos5250 support from the original patch
- added CPU regulator supply property for Google Spring board
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Andreas Farber <afaerber@suse.de>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thomas Abraham [Mon, 13 Apr 2015 17:46:59 +0000 (19:46 +0200)]
clk: samsung: exynos5250: add cpu clock configuration data and instantiate cpu clock
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5250.
Changes by Bartlomiej:
- split Exynos5250 support from the original patch
- moved E5250_CPU_DIV[0,1]() macros to clk-exynos5250.c
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Fri, 10 Apr 2015 17:59:02 +0000 (19:59 +0200)]
cpufreq: exynos: remove Exynos4x12 specific cpufreq driver support
Exynos4x12 based platforms have switched over to use generic
cpufreq driver for cpufreq functionality. So the Exynos
specific cpufreq support for these platforms can be removed.
Based on the earlier work by Thomas Abraham.
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Fri, 10 Apr 2015 17:59:01 +0000 (19:59 +0200)]
ARM: Exynos: switch to using generic cpufreq driver for Exynos4x12
The new CPU clock type allows the use of generic CPUfreq driver.
Switch Exynos4x12 to using generic cpufreq driver.
This patch also takes care of making ARM_EXYNOS_CPU_FREQ_BOOST_SW
config option depend on cpufreq-dt driver instead of exynos-cpufreq
one and fixes the minor issue present with the old code (support
for 'boost' mode in the exynos-cpufreq driver was enabled for all
supported SoCs even though 'boost' frequency was provided only for
Exynos4x12 ones).
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Fri, 10 Apr 2015 17:59:00 +0000 (19:59 +0200)]
ARM: dts: Exynos4x12: add CPU OPP and regulator supply property
For Exynos4x12 platforms, add CPU operating points and CPU
regulator supply properties for migrating from Exynos specific
cpufreq driver to using generic cpufreq driver.
Based on the earlier work by Thomas Abraham.
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Andreas Farber <afaerber@suse.de>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Fri, 10 Apr 2015 17:58:59 +0000 (19:58 +0200)]
clk: samsung: exynos4x12: add cpu clock configuration data and instantiate cpu clock
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos4x12.
Based on the earlier work by Thomas Abraham.
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Fri, 10 Apr 2015 17:58:58 +0000 (19:58 +0200)]
cpufreq-dt: add 'boost' mode frequencies support
Add 'boost' mode frequencies support:
- add boost-opps binding to cpufreq-dt driver bindings
- make cpufreq_init() adjust freq_table accordingly
- fix set_target() to handle boost frequencies
- add boost_supported field to struct cpufreq_dt_platform_data
- set dt_cpufreq_driver.boost_supported in dt_cpufreq_probe()
This patch makes cpufreq-dt driver aware of 'boost' mode frequencies
and prepares it for adding support for Exynos4x12 'boost' support.
boost-opps binding is currently limited to cpufreq-dt but once there is
a need for cpufreq wide and/or generic Linux device support for 'boost'
mode cpufreq-dt can be updated to handle the new code without changing
the binding itself.
The decision to make 'boost' mode support limited to cpufreq-dt driver
for now was taken because 'boost' mode is currently a niche feature and
code needed for parsing boost-opps binding is minimal and simple. More
generic (i.e. separate 'boost' OPPs list in struct device and generic
cpufreq convertion of them to freq_table format) support would need far
more code and effort to make it work. Doing it without a demonstrated
real need would be on overengineering IMHO.
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Fri, 10 Apr 2015 17:58:57 +0000 (19:58 +0200)]
cpufreq / OPP: allow allocation of extra table entries in freq_table
Prefix dev_pm_opp_init_cpufreq_table() with "__" and add a wrapper
for it to keep current users unchanged. Then add an extra_opps
parameter to __dev_pm_opp_init_cpufreq_table() to allow allocation of
extra table entries in freq_table.
This patch is a preparation for adding 'boost' mode frequencies
support to cpufreq-dt driver.
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thomas Abraham [Fri, 3 Apr 2015 16:43:49 +0000 (18:43 +0200)]
cpufreq: exynos: remove Exynos4210 specific cpufreq driver support
Exynos4210 based platforms have switched over to use generic
cpufreq driver for cpufreq functionality. So the Exynos
specific cpufreq support for these platforms can be removed.
Changes by Bartlomiej:
- dropped Exynos5250 support removal for now
- updated exynos-cpufreq.[c,h]
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thomas Abraham [Fri, 3 Apr 2015 16:43:48 +0000 (18:43 +0200)]
ARM: Exynos: switch to using generic cpufreq driver for Exynos4210
The new CPU clock type allows the use of generic CPUfreq driver.
Switch Exynos4210 to using generic cpufreq driver.
Changes by Bartlomiej:
- removed non-Exynos4210 support for now
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thomas Abraham [Fri, 3 Apr 2015 16:43:47 +0000 (18:43 +0200)]
ARM: dts: Exynos4210: add CPU OPP and regulator supply property
For Exynos4210 platforms, add CPU operating points and CPU
regulator supply properties for migrating from Exynos specific
cpufreq driver to using generic cpufreq driver.
Changes by Bartlomiej:
- removed Exynos5250 and Exynos5420 support for now
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Doug Anderson <dianders@chromium.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Andreas Faerber <afaerber@suse.de>
Cc: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Andreas Farber <afaerber@suse.de>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thomas Abraham [Fri, 3 Apr 2015 16:43:46 +0000 (18:43 +0200)]
clk: samsung: exynos4: add cpu clock configuration data and instantiate cpu clock
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos4210.
Changes by Bartlomiej:
- fixed issue with wrong dividers being setup by Common Clock Framework
(by an addition of CLK_RECALC_NEW_RATES clock flag to mout_apll clock,
without this change cpufreq-dt driver showed ~10 mA larger energy
consumption when compared to cpufreq-exynos one when "performance"
cpufreq governor was used on Exynos4210 SoC based Origen board), this
was probably meant to be workarounded by use of CLK_GET_RATE_NOCACHE
and CLK_DIVIDER_READ_ONLY clock flags in the original patchset (in
"[PATCH v12 6/6] clk: samsung: remove unused clock aliases and update
clock flags") but using these flags is not sufficient to fix the issue
observed
- removed Exynos5250 and Exynos5420 support for now
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Thomas Abraham [Fri, 3 Apr 2015 16:43:45 +0000 (18:43 +0200)]
clk: samsung: add infrastructure to register cpu clocks
The CPU clock provider supplies the clock to the CPU clock domain. The
composition and organization of the CPU clock provider could vary among
Exynos SoCs. A CPU clock provider can be composed of clock mux, dividers
and gates. This patch defines a new clock type for CPU clock provider and
adds infrastructure to register the CPU clock providers for Samsung
platforms.
Changes by Bartlomiej:
- fixed issue with setting lower dividers before the parent clock speed
was lowered (the issue resulted in lockup on Exynos4210 SoC based
Origen board when "ondemand" cpufreq governor was stress tested)
- fixed missing spin_unlock on error in exynos_cpuclk_post_rate_change()
problem by moving cfg_data search outside of the spin locked area
- removed leftover kfree() in exynos_register_cpu_clock() that could
result in dereferencing the NULL pointer on error
- moved spin_lock earlier in exynos_cpuclk_pre_rate_change() to cover
reading of E4210_SRC_CPU and E4210_DIV_CPU1 registers
- added missing "last chance" checks to wait_until_divider_stable() and
wait_until_mux_stable() (needed in case that IRQ handling took long
time to proceed and resulted in function printing incorrect error
message about timeout)
- moved E4210_CPU_DIV[0,1]() macros just before their only users,
this resulted in moving them from patch #2 to patch #3/6 ("clk:
samsung: exynos4: add cpu clock configuration data and instantiate
cpu clock")
- removed E5250_CPU_DIV[0,1](), E5420_EGL_DIV0() and E5420_KFC_DIV()
macros for now
- added my Copyrights to drivers/clk/samsung/clk-cpu.c
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Fri, 3 Apr 2015 16:43:44 +0000 (18:43 +0200)]
clk: add CLK_RECALC_NEW_RATES clock flag for Exynos cpu clock support
This flag is needed to fix the issue with wrong dividers being setup
by Common Clock Framework when using the new Exynos cpu clock support.
The issue happens because clk_core_set_rate_nolock() calls
clk_calc_new_rates(clk, rate) before both pre/post clock notifiers have
a chance to run. In case of Exynos cpu clock support pre/post clock
notifiers are registered for mout_apll clock which is a parent of armclk
cpu clock and dividers are modified in both pre and post clock notifier.
This results in wrong dividers values being later programmed by
clk_change_rate(top). To workaround the problem CLK_RECALC_NEW_RATES
flag is added and it is set for mout_apll clock later so the correct
divider values are re-calculated after both pre and post clock notifiers
had run.
For example when using "performance" governor on Exynos4210 Origen board
the cpufreq-dt driver requests to change the frequency from 1000MHz to
1200MHz and after the change state of the relevant clocks is following:
Without use of CLK_GET_RATE_NOCACHE flag:
fout_apll rate:
1200000000
fout_apll_div_2 rate:
600000000
mout_clkout_cpu rate:
600000000
div_clkout_cpu rate:
600000000
clkout_cpu rate:
600000000
mout_apll rate:
1200000000
armclk rate:
1200000000
mout_hpm rate:
1200000000
div_copy rate:
300000000
div_hpm rate:
300000000
mout_core rate:
1200000000
div_core rate:
1200000000
div_core2 rate:
1200000000
arm_clk_div_2 rate:
600000000
div_corem0 rate:
300000000
div_corem1 rate:
150000000
div_periph rate:
300000000
div_atb rate:
300000000
div_pclk_dbg rate:
150000000
sclk_apll rate:
1200000000
sclk_apll_div_2 rate:
600000000
With use of CLK_GET_RATE_NOCACHE flag:
fout_apll rate:
1200000000
fout_apll_div_2 rate:
600000000
mout_clkout_cpu rate:
600000000
div_clkout_cpu rate:
600000000
clkout_cpu rate:
600000000
mout_apll rate:
1200000000
armclk rate:
1200000000
mout_hpm rate:
1200000000
div_copy rate:
200000000
div_hpm rate:
200000000
mout_core rate:
1200000000
div_core rate:
1200000000
div_core2 rate:
1200000000
arm_clk_div_2 rate:
600000000
div_corem0 rate:
300000000
div_corem1 rate:
150000000
div_periph rate:
300000000
div_atb rate:
240000000
div_pclk_dbg rate:
120000000
sclk_apll rate:
150000000
sclk_apll_div_2 rate:
75000000
Without this change cpufreq-dt driver showed ~10 mA larger energy
consumption when compared to cpufreq-exynos one when "performance"
cpufreq governor was used on Exynos4210 SoC based Origen board.
This issue was probably meant to be workarounded by use of
CLK_GET_RATE_NOCACHE and CLK_DIVIDER_READ_ONLY clock flags in
the original Exynos cpu clock patchset (in "[PATCH v12 6/6] clk:
samsung: remove unused clock aliases and update clock flags" patch)
but usage of these flags is not sufficient to fix the issue observed.
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Bartlomiej Zolnierkiewicz [Fri, 27 Mar 2015 16:32:53 +0000 (17:32 +0100)]
cpufreq: exynos: remove dead ->need_apll_change method
Commit
26ab1c62b6e1 ("cpufreq: exynos5250: Set APLL rate
using CCF API") removed the last user of ->need_apll_change
method. Remove it and then cleanup exynos_cpufreq_scale()
accordingly.
This patch was tested on Exynos4412 SoC based Trats2 board.
There should be no functional changes caused by this patch.
Cc: Sachin Kamat <sachin.kamat@linaro.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kukjin Kim <kgene@kernel.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Seung-Woo Kim [Thu, 14 May 2015 05:08:18 +0000 (14:08 +0900)]
ARM: odroidxu3_defconfig: enable trace and debug configs
This patch enables trace and debug configs to support user trace
request.
Change-Id: I7a63a7cf9d7bb5510434db8ff2fcc4ae8f7938bb
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Wed, 22 Apr 2015 02:23:26 +0000 (11:23 +0900)]
Smack: ignore private inode for smack_file_receive
The dmabuf fd can be shared between processes via unix domain
socket. The file of dmabuf fd is came from anon_inode. The inode
has no set and get xattr operations, so it can not be shared
between processes with smack. This patch fixes just to ignore
private inode including anon_inode for smack_file_receive.
Change-Id: I1b5223ebf2fb1f810380c62096aa64a16b054057
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Acked-by: Casey Schaufler <casey@schaufler-ca.com>
Marek Szyprowski [Wed, 22 Apr 2015 13:34:43 +0000 (15:34 +0200)]
iommu: exynos: add system suspend/resume support
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Marek Szyprowski [Fri, 27 Feb 2015 07:58:14 +0000 (08:58 +0100)]
media: gscaller: fix RGB32 format id to match s5p-fimc
Testing showed that HW produces BGR32 rather then RGB32 as exposed
in the driver. The documentation seems to state the pixels are stored
in little endian order.
Change-Id: I0f7cdea461bd09ff2aac24cf6dfd001d0848b534
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Ingi Kim <ingi2.kim@samsung.com>
Marek Szyprowski [Thu, 16 Apr 2015 09:52:33 +0000 (11:52 +0200)]
media: s5p-jpeg: add RGB565 format to Exynos4 buffer size workaround
JPEG HW can access buffer beyond the image data for images, which width
or height is not properly aligned. This patch adds RGB565 format to
workaround code to solve IOMMU page fault issue. The exact needed buffer
enlargement workaround need to be determined experimentally.
Reported-by: Inha Song <ideal.song@samsung.com>
Suggested-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Inha Song [Thu, 16 Apr 2015 07:59:40 +0000 (16:59 +0900)]
packaging: change version to 4.0 from 4.0.0
This patch change version to 4.0 from 4.0.0 because of upstream tag.
Change-Id: I6ef7dfedcf1decb07ca5ab6aaec5b5f462f084fa
Signed-off-by: Inha Song <ideal.song@samsung.com>
Inha Song [Thu, 16 Apr 2015 07:56:39 +0000 (16:56 +0900)]
packaging: use upstream tags
Change-Id: Ib6eaf6e12ecc8f065b085253dbcc0c538caff511
Signed-off-by: Inha Song <ideal.song@samsung.com>
Seung-Woo Kim [Thu, 16 Apr 2015 04:29:52 +0000 (13:29 +0900)]
ARM: odroidxu3_defconfig: enable uinput config
This patch enables uinput config to support userland input driver.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Krzysztof Kozlowski [Wed, 11 Mar 2015 10:13:57 +0000 (11:13 +0100)]
ARM: EXYNOS: Fix failed second suspend on Exynos4
On Exynos4412 boards (Trats2, Odroid U3) after enabling L2 cache in
56b60b8bce4a ("ARM: 8265/1: dts: exynos4: Add nodes for L2 cache
controller") the second suspend to RAM failed. First suspend worked fine
but the next one hang just after powering down of secondary CPUs (system
consumed energy as it would be running but was not responsive).
The issue was caused by enabling delayed reset assertion for CPU0 just
after issuing power down of cores. This was introduced for Exynos4 in
13cfa6c4f7fa ("ARM: EXYNOS: Fix CPU idle clock down after CPU off").
The whole behavior is not well documented but after checking with vendor
code this should be done like this (on Exynos4):
1. Enable delayed reset assertion when system is running (for all CPUs).
2. Disable delayed reset assertion before suspending the system.
This can be done after powering off secondary CPUs.
3. Re-enable the delayed reset assertion when system is resumed.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Fixes: 13cfa6c4f7fa ("ARM: EXYNOS: Fix CPU idle clock down after CPU off")
Cc: <stable@vger.kernel.org>
Tested-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Inha Song [Tue, 17 Mar 2015 01:58:16 +0000 (10:58 +0900)]
packaging: add spec file to generate odroid-xu3 kernel by GBS
This patch add spec file to generate odroid-xu3 kernel-headers by GBS.
Signed-off-by: Inha Song <ideal.song@samsung.com>
Inha Song [Mon, 9 Mar 2015 05:21:18 +0000 (14:21 +0900)]
ARM: odroidxu3_defconfig: update configs to Linux 4.0
This patch updates odroid configs to Linux 4.0 for tizen.
Signed-off-by: Inha Song <ideal.song@samsung.com>
Chanho Park [Tue, 3 Jun 2014 10:54:53 +0000 (19:54 +0900)]
smack: add permissive mode for debugging purpose
This patch adds smack permissive mode.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Joonyoung Shim [Wed, 8 Apr 2015 07:23:52 +0000 (16:23 +0900)]
ARM: dts: exynos5420: fix clk of mali node
Need only CLK_G3D gate clock for mali and use clk_mali name to control
the clock from mali core codes.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Joonyoung Shim [Wed, 8 Apr 2015 07:22:16 +0000 (16:22 +0900)]
gpu: arm: midgard: remove clk and regulator control from exynos5422
Clk and regulator of mali will be controlled mali core codes.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Joonyoung Shim [Wed, 8 Apr 2015 04:59:45 +0000 (13:59 +0900)]
gpu: arm: midgard: add voltage scaling for devfreq
Support voltage scaling of mali regulator for devfreq.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Joonyoung Shim [Wed, 8 Apr 2015 04:23:56 +0000 (13:23 +0900)]
gpu: arm: midgard: add regulator control
Support to control regulator from mali core code instead of each
platform driver.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Joonyoung Shim [Mon, 6 Apr 2015 09:58:20 +0000 (18:58 +0900)]
gpu: arm: midgard: add ondemand_data for simple_ondemand devfreq
Need custom upthreshold and downdifferential for mali devfreq.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Joonyoung Shim [Tue, 10 Mar 2015 01:07:08 +0000 (10:07 +0900)]
gpu: arm: midgard: remove set_dma_ops
Don't use set_dma_ops since commit
9d3bfbb4df58 ("arm64: Combine
coherent and non-coherent swiotlb dma_ops")
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Marek Szyprowski [Thu, 2 Apr 2015 11:18:58 +0000 (13:18 +0200)]
arm: exynos5420.dts: add FIMC_3AA async bridge clock to GSC power domain
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Marek Szyprowski [Tue, 31 Mar 2015 11:19:38 +0000 (13:19 +0200)]
drm/exynos: fimc: fix runtime pm support
Once pm_runtime_set_active() gets called, the kernel assumes that given
device has already enabled runtime pm and will call pm_runtime_suspend() without matching pm_runtime_resume(). In case of DRM FIMC IPP driver, this
will result in calling clk_disable() without respective call to clk_enable(). This patch removes call to pm_runtime_set_active() to ensure
that pm_runtime_suspend/resume calls will match.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Marek Szyprowski [Tue, 31 Mar 2015 12:47:00 +0000 (14:47 +0200)]
i2c: exynos5: register driver early in subsys initcall to avoid probe defer
i2c bus drivers should be registered earlier than other drivers to let
important i2c devices (like pmic) get registered early enough to avoid
probe defer of other devices.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
YoungJun Cho [Thu, 12 Feb 2015 03:59:47 +0000 (12:59 +0900)]
drm/exynos: add debugfs interface and gem_info node
The memps requires gem_info with gem_names to analyze graphics
shared memory, so this patch adds gem_info node with debugfs
interface.
Signed-off-by: YoungJun Cho <yj44.cho@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Wed, 4 Mar 2015 05:05:02 +0000 (14:05 +0900)]
drm/exynos: fix to calculate offset of each plane for ipp gsc
NV12 and YUV420 formats are needed to calculate offset of each plane
in a gem buffer for ipp gsc. Without proper offset, only Y plane
can be processed, so result shows green frame. This patch fixes to
calculate offset for cbcr planes for NV12 and YUV420 formats.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Wed, 4 Mar 2015 05:05:02 +0000 (14:05 +0900)]
drm/exynos: fix to calculate offset of each plane for ipp fimc
NV12 and YUV420 formats are need to calculate offset of each plane
for ipp fimc in a gem buffer. Without proper offset, only Y plane
can be processed, so result shows green frame.
This patch fixes to calculate offset for cbcr planes for NV12 and
YUV420 formats.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Wed, 4 Mar 2015 05:05:02 +0000 (14:05 +0900)]
drm/exynos: add ARGB8888 support for ipp fimc
This patch adds ARGB8888 support for ipp fimc driver.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Fri, 9 Jan 2015 06:55:30 +0000 (15:55 +0900)]
drm/exynos: gsc: fix wrong pm_runtime state
At probe time, gsc clock is not enabled, so pm_runtime state should
be deactive. So this patch removes pm_runtime_set_active() from
gsc_probe().
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Beata Michalska [Thu, 26 Feb 2015 12:18:46 +0000 (13:18 +0100)]
drm/exynos/ipp: Validate buffer enqueue requests
As for now there is no validation of incoming buffer
enqueue request as far as the gem buffers are being
concerned. This might lead to some undesired cases
when the driver tries to operate on invalid buffers
(wiht no valid gem object handle i.e.).
Add some basic checks to rule out those potential issues.
Signed-off-by: Beata Michalska <b.michalska@samsung.com>
[mszyprow: rebased onto v3.19]
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Fri, 9 Jan 2015 06:54:00 +0000 (15:54 +0900)]
drm/exynos: gsc: prepare and unprepare gsc clock
Ths patch changes the clk_enable and clk_disable call in gsc driver
into clk_prepare_enable and clk_disable_unprepare.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Tue, 6 Jan 2015 08:32:34 +0000 (17:32 +0900)]
ARM: dts: add lcd-wb flag to gsc dt nodes for Odroid XU3 board
This patch adds lcd-wb binding flag to gsc dt nodes to bind with
exynos drm gsc driver.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Tue, 6 Jan 2015 08:09:54 +0000 (17:09 +0900)]
drm/exynos: allow multiplatform configuration for gsc
The patch removes dependency on !ARCH_MULTIPLATFORM.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Wed, 1 Jul 2015 05:02:46 +0000 (14:02 +0900)]
drm/exynos: gsc: add device tree support
This patch adds device tree support for exynos_drm_gsc. The gsc
driver is bound only when lcd-wb binding flag is set to gsc dt
node.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Seung-Woo Kim [Tue, 6 Jan 2015 08:19:04 +0000 (17:19 +0900)]
exynos-gsc: add devicetree binding optional flag for lcd-wb
This patch adds optional flag for lcd-wb of gsc. If the flag is set,
then the gsc hw is controlled by drm driver.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Mon, 23 Mar 2015 05:25:40 +0000 (14:25 +0900)]
ARM: dts: exynos5422-odroidxu3: add gpio key dt node
This patch adds gpio key dt node for power button. The dt nodes
are ported from https://github.com/hardkernel/linux.git
+refs/heads/odroidxu3-3.10.y.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Seung-Woo Kim [Mon, 23 Mar 2015 05:18:52 +0000 (14:18 +0900)]
ARM: dts: exynos5422-odroidxu3: add leds dt nodes
This patch adds leds dt nodes to support rgb led devices. The dt
nodes are ported from https://github.com/hardkernel/linux.git
+refs/heads/odroidxu3-3.10.y.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Robert Baldyga [Mon, 4 Aug 2014 06:56:32 +0000 (08:56 +0200)]
ARM: dts: add odroid-usbotg extcon support for odroid platform
This patch adds odroid-usbotg extcon dt node for odroid-u3 and
odroid-x.
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
[Adjust gpio dt node name with the odroid-usbotg driver]
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Robert Baldyga [Mon, 23 Feb 2015 14:27:13 +0000 (15:27 +0100)]
ARM: dts: exynos5422-odroidxu3: make usbdrd3 extcon client
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 9 Mar 2015 12:28:18 +0000 (13:28 +0100)]
dwc3: exynos: add software role switching code
Exynos platform doesn't have hardware OTG support, so we need to
supply mechanism of notification about cable change.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Wed, 4 Mar 2015 12:46:59 +0000 (13:46 +0100)]
ARM: dts: exynos5420: add snps,dis_u3_susphy_quirk to dwc3 controllers
It's needed for proper role switching in OTG mode.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 23 Feb 2015 14:58:30 +0000 (15:58 +0100)]
dwc3: core: fix SUSPHY problem
This is needed for OTG mode. Without this change endpoint enabling in
gadget mode fails after role switching.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 23 Feb 2015 14:44:04 +0000 (15:44 +0100)]
dwc3: core: add OTG support
Initialize OTG core if hardware runs in OTG mode.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 23 Feb 2015 15:20:48 +0000 (16:20 +0100)]
dwc3: gadget: reinitialize core after each role change
According to the Databook in case of reconnection and role switching
the core should be completely reinitialized, excepting first connection
as peripheral when core was initialized during probing.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 23 Feb 2015 11:32:19 +0000 (12:32 +0100)]
dwc3: host: don't add xhci device only if in OTG mode
OTG handling code adds xhci device automaticaly when USB host cable
is detected.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 23 Feb 2015 12:57:14 +0000 (13:57 +0100)]
dwc3: gadget: register gadget in OTG core
Gadget driver needs to be registered in OTG to perform dynamic
role switching.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 9 Mar 2015 10:20:15 +0000 (11:20 +0100)]
dwc3: gadget: add VBUS session handling
Add software VBUS session handling code.
It's necessary for OTG role switching.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 23 Feb 2015 11:01:54 +0000 (12:01 +0100)]
dwc3: add otg handling code
This code is based on DWC3 driver from https://github.com/hardkernel/linux.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 9 Mar 2015 10:12:48 +0000 (11:12 +0100)]
ARM: dts: exynos5420: set usb3_lpm_capable in dwc3 controllers
These hardware has LPM and we want to use it.
This will be necessary for OTG role switching.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 9 Mar 2015 09:29:01 +0000 (10:29 +0100)]
dwc3: make LPM configurable in DT
LPM capability is hardware property, so now it's moved to DT.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 9 Mar 2015 08:41:24 +0000 (09:41 +0100)]
dwc3: core: cleanup suspend/resume code
Remove unused cases from switch-case statement and place
dwc3_event_buffers_cleanup() function outside switch-case
as it's called in each case anyway.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 9 Mar 2015 10:09:43 +0000 (11:09 +0100)]
ARM: dts: exynos5422-odroidxu3: add odroid-usbotg extcon support
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Robert Baldyga [Mon, 9 Mar 2015 10:00:47 +0000 (11:00 +0100)]
extcon: add extcon-odroid-usbotg driver
This patch adds extcon driver for Odroid U3, U3+ and X boards.
It recognizes type of USB cable connected to Odroid board basing on
two signal lines VBUS_DET and OTG_ID (the second one is present only
on Odroid U3+ board).
Following table of states presents relationship between this signals
and detected cable type:
state | VBUS_DET | OTG_ID
-------------------------------
USB | H | H
invalid | H | L
disconn. | L | H
USB-Host | L | L
This driver is based on extcon-gpio driver.
Signed-off-by: Łukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Jaewon Kim [Tue, 2 Dec 2014 12:34:54 +0000 (21:34 +0900)]
local / usb: gadget: Add slp composite gadget
This patch adds slp composite gadget for tizen platform.
slp composite gadget code comes from android.c
Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
Marek Szyprowski [Mon, 9 Mar 2015 09:27:57 +0000 (10:27 +0100)]
ARM: dts: exynos5420: add iommu support to jpeg devices
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Andrzej Pietrasiewicz [Fri, 6 Mar 2015 10:32:39 +0000 (11:32 +0100)]
ARM: dts: exynos5420: add nodes for jpeg codec
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Andrzej Pietrasiewicz [Fri, 6 Mar 2015 10:32:40 +0000 (11:32 +0100)]
media: s5p-jpeg: add 5420 family support
JPEG IP found in Exynos5420 is similar to what is in Exynos3250, but
there are some subtle differences which this patch takes into account.
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@samsung.com>
Inha Song [Fri, 13 Feb 2015 01:12:37 +0000 (10:12 +0900)]
ARM: dts: Support audio on Exynos5422-odroidxu3 using simple-audio-card
Add MAX98090 audio codec, I2S interface and the sound nodes to support
audio on Exynos5422 SoC Based Odroid-XU3 board. Now we can support audio
in Odroid-XU3 board using simple-audio-card DT binding.
Signed-off-by: Inha Song <ideal.song@samsung.com>
Marek Szyprowski [Thu, 31 Jul 2014 11:43:17 +0000 (13:43 +0200)]
ARM: dts: exynos4412-odroid*: enable MFC device
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Jaehoon Chung [Thu, 26 Feb 2015 08:16:30 +0000 (17:16 +0900)]
ARM: dts: exynos5422-odroidxu3: use cd-gpio method to detect sd-card
To detect sd-card use the cd-gpio method.
It can decrease the interrupt for detecting sd-card.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Thu, 26 Feb 2015 07:20:46 +0000 (16:20 +0900)]
mmc: dw_mmc: enable mmc-erase capability
To use erase feature(DISCARD or SANITIZE or ERASE, etc..), set MMC_CAP_ERASE.
(In future, this feature should be enabled by default. But before enable
by default, it needs to fix the some erase issue - discussing at
Mailing-list.)
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Thu, 26 Feb 2015 07:17:48 +0000 (16:17 +0900)]
ARM: dts: exynos5422-odroidxu3: support HS400 mode for eMMC
Add "mmc_hs400_1_8v" property to use HS400 mode.
(HS400 mode is supported since eMMC5.0.)
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Seungwon Jeon [Thu, 29 Jan 2015 02:41:58 +0000 (08:11 +0530)]
ARM: dts: Add HS400 support for exynos5420 and exynos5800
HS400 timing values are added for SMDK5420, exynos5420-peach-pit
and exynos5800-peach-pi boards.
This also adds RCLK GPIO line, this gpio should be in pull-down
state.
This also enables HS400 on peach-pi and this updates the clock frequency
to 800MHz to be set as input clock to controller.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
[Alim: addressed review comments]
Jaehoon Chung [Thu, 26 Feb 2015 06:39:03 +0000 (15:39 +0900)]
ARM: dts: exynos5422-odroidxu3: support HS200 mode for eMMC
Add "mmc-hs200_1_8v" property to use HS200 mode.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Seungwon Jeon [Thu, 29 Jan 2015 02:41:57 +0000 (08:11 +0530)]
mmc: dw_mmc: exynos: Support eMMC's HS400 mode
Implements HS400 mode support for exynos host driver.
This also include some updates as new mode is added.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
[Alim: addressed review comments]
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Marek Szyprowski [Wed, 18 Feb 2015 11:11:00 +0000 (12:11 +0100)]
ARM: dts: exynos4: add nodes for jpeg codec
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Joonyoung Shim [Tue, 27 Jan 2015 06:13:51 +0000 (15:13 +0900)]
ARM: dts: exynos5422-odroidxu3: add pwm-fan node
Usage:
echo [0 - 255] > /sys/devices/platform/pwm-fan/hwmon/hwmon0/pwm1
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Jaehoon Chung [Fri, 23 Jan 2015 09:16:54 +0000 (18:16 +0900)]
regulator: s2mps11: add shutdown function
This needs for poweroff on odroid xu3 board.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Marek Szyprowski [Thu, 5 Mar 2015 08:30:47 +0000 (09:30 +0100)]
ARM: dts: add eMMC reset line for exynos5422-odroidxu3
This patch adds reset-gpios property to the eMMC slot, so the MMC driver
is able to properly reset eMMC card on system restart and thus fixes
system hang on software reboot.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Marek Szyprowski [Wed, 4 Feb 2015 15:35:58 +0000 (00:35 +0900)]
ARM: dts: add eMMC reset line for exynos4412-odroid-common
This patch adds reset-gpios property to the eMMC slot, so the MMC driver
is able to properly reset eMMC card on system restart and thus fixes
system hang on software reboot.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>