packaging: change pkgversion for Tizen/Linaro

change pkgversion like "Tizen/Linaro GCC [version] [release]" like
Tizen 2.4.
and remove prerelease string.
You can see this by typing 'gcc --version' or 'gcc -v'.

Change-Id: I27f9320f4e625d9219f0669d7ec85a38f83c8373
Signed-off-by: Chan Lee <chan45.lee@samsung.com>

packaging: define --disable-libquadmath option for all

Change-Id: I89abe2cad14da483e0b6f3489ec66ca273485b0f
Signed-off-by: Chan Lee <chan45.lee@samsung.com>

packaging: remove --enable-ssp

This configure option is not defined in gcc and ignored.

Change-Id: I2e853bc5812a248438b3825c846677d60738339f
Signed-off-by: Chan Lee <chan45.lee@samsung.com>

packaging: remove --enable-linux-futex

Change-Id: Ie235d5d438937b6f7af834fc41f3fef158df51ca
Signed-off-by: Chan Lee <chan45.lee@samsung.com>

packaging: remove --disable-libstdcxx-pch

--enable-libstdcxx-pch is default

Change-Id: I6b30a8aa2d08cd52c81aa87a804a684a0c8e16a2
Signed-off-by: Chan Lee <chan45.lee@samsung.com>

packaging: Disable builidng FORTRAN compiler
- remove fortran related gcc configure options
- remove fortran related RPM packaging rules

And qemu-accel should be update to diable fortran correctly.

Change-Id: I29a188e096d77770ccfe014c1ddd08530a3ec595
Signed-off-by: Hyung-Kyu (HQ) Choi <hk0110.choi@samsung.com>

FIXME: packaing: fix build error

{standard input}: Assembler messages:
{standard input}:183: Error: thumb conditional instruction should be in IT block -- `movcc ip,#0'
{standard input}:184: Error: thumb conditional instruction should be in IT block -- `movcs ip,#-1'
{standard input}:219: Error: thumb conditional instruction should be in IT block -- `movcc ip,#0'
{standard input}:220: Error: thumb conditional instruction should be in IT block -- `movcs ip,#-1'
Makefile:409: recipe for target 'div_qr_1n_pi1.lo' failed

Change-Id: I44bb49c1ffa8d509143bade3b4c0946ac2e00fae

FIXME: packaging: Added gmp/mpc/mpfr/cloog/isr source to build.

Change-Id: I4e73a399e17caa484db0645f4684233450b36035

FIXME: Revert "packaging: Dependency packages build integration"

This reverts commit 080b24cd93e01d07e77e1bb7d67b048516be069c.

Change-Id: Iedfe02f760be24a134c593be1d1cf777f67599fa

FIXME: Revert "--ignorearch added for rpm"

This reverts commit b13a8a51629764a352ef35791618ff75416144ed.

Change-Id: Id91caaedde29606ce32ff226adab5ef4dba60bc4

packaging: renamed gcc.spec -> linaro-gcc.spec

Change-Id: If089aa6ba827441768e8981b6f7f7a7ff9ec1818
Signed-off-by: Dongkyun, Son <dongkyun.s@samsung.com>

--ignorearch added for rpm

Without the flag build will only work for native build roots but not for OBS
cross-builds

Change-Id: If24f0675ea01e925792480944736ddc468a0ff55
Signed-off-by: Vyacheslav Barinov <v.barinov@samsung.com>

Merge "packaging: Dependency packages build integration" into tizen_base

packaging: Dependency packages build integration

Now gmp, mpfr, mpc, isl and cloog-isl are built inside GCC build and do
not require packages in OBS.

This is done due to license issues with LGPLv3 version of GNU GMP
library, we must ensure there is no way to link Tizen apps with this
library and to install it on device.

Change-Id: I9d744c4a554cfbe46a623841cc11f50084aa31c5
Signed-off-by: Vyacheslav Barinov <v.barinov@samsung.com>

packaging: removed *-static dependency

_service file need to be updated.
<services>
    <service name='gbs'>
        <param name='git-meta'>_git-meta</param>
        <param name='revision'>tizen_base</param>
        <param name='url'>ssh://review.tizen.org:29418/platform/upstream/linaro-gcc</param>
    </service>
    <service name='gbs'>
        <param name='git-meta'>_git-meta</param>
        <param name='revision'>tizen_base</param>
        <param name='url'>ssh://review.tizen.org:29418/platform/upstream/gmp</param>
    </service>
    <service name='gbs'>
        <param name='git-meta'>_git-meta</param>
        <param name='revision'>tizen_base</param>
        <param name='url'>ssh://review.tizen.org:29418/platform/upstream/mpc</param>
    </service>
    <service name='gbs'>
        <param name='git-meta'>_git-meta</param>
        <param name='revision'>tizen_base</param>
        <param name='url'>ssh://review.tizen.org:29418/platform/upstream/mpfr</param>
    </service>
    <service name='gbs'>
        <param name='git-meta'>_git-meta</param>
        <param name='revision'>tizen_base</param>
        <param name='url'>ssh://review.tizen.org:29418/platform/upstream/cloog</param>
    </service>
    <service name='gbs'>
        <param name='git-meta'>_git-meta</param>
        <param name='revision'>tizen_base</param>
        <param name='url'>ssh://review.tizen.org:29418/platform/upstream/isl</param>
    </service>
</services>

Change-Id: Iaf064836a4aec942e4a47b76eabdc45f22cd997d
Signed-off-by: Dongkyun, Son <dongkyun.s@samsung.com>

packaging: removed *-static dependency

Change-Id: Iaf064836a4aec942e4a47b76eabdc45f22cd997d
Signed-off-by: Dongkyun, Son <dongkyun.s@samsung.com>

set BASE-VER to 4.9.2

Change-Id: Ic44d0861eb202653a7e51ecf342e629fc7eac9e3
Signed-off-by: Dongkyun, Son <dongkyun.s@samsung.com>

gcc/ 2015-03-06 Christophe Lyon <christophe.lyon@linaro.org>

Backport from trunk r217707.
2014-11-18  Christophe Lyon  <christophe.lyon@linaro.org>

* config/arm/neon-testgen.ml (emit_prologue): Handle new
compile_test_optim argument.
(emit_automatics): Rename to emit_variables. Support variable
indentation of its output.
(compile_test_optim): New function.
(test_intrinsic): Call compile_test_optim.
* config/arm/neon.ml (features): Add Compiler_optim.
(ops): Add Compiler_optim feature to Vbic and Vorn.
(type_in_crypto_only): Replace 'or' by '||'.
(reinterp): Likewise.
(reinterpq): Likewise.

gcc/testsuite/
2015-03-06  Christophe Lyon  <christophe.lyon@linaro.org>

Backport from trunk r217707.
2014-11-18  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/arm/neon/vbicQs16.c: Regenerate.
* gcc.target/arm/neon/vbicQs32.c: Likewise.
* gcc.target/arm/neon/vbicQs64.c: Likewise.
* gcc.target/arm/neon/vbicQs8.c: Likewise.
* gcc.target/arm/neon/vbicQu16.c: Likewise.
* gcc.target/arm/neon/vbicQu32.c: Likewise.
* gcc.target/arm/neon/vbicQu64.c: Likewise.
* gcc.target/arm/neon/vbicQu8.c: Likewise.
* gcc.target/arm/neon/vbics16.c: Likewise.
* gcc.target/arm/neon/vbics32.c: Likewise.
* gcc.target/arm/neon/vbics64.c: Likewise.
* gcc.target/arm/neon/vbics8.c: Likewise.
* gcc.target/arm/neon/vbicu16.c: Likewise.
* gcc.target/arm/neon/vbicu32.c: Likewise.
* gcc.target/arm/neon/vbicu64.c: Likewise.
* gcc.target/arm/neon/vbicu8.c: Likewise.
* gcc.target/arm/neon/vornQs16.c: Likewise.
* gcc.target/arm/neon/vornQs32.c: Likewise.
* gcc.target/arm/neon/vornQs64.c: Likewise.
* gcc.target/arm/neon/vornQs8.c: Likewise.
* gcc.target/arm/neon/vornQu16.c: Likewise.
* gcc.target/arm/neon/vornQu32.c: Likewise.
* gcc.target/arm/neon/vornQu64.c: Likewise.
* gcc.target/arm/neon/vornQu8.c: Likewise.
* gcc.target/arm/neon/vorns16.c: Likewise.
* gcc.target/arm/neon/vorns32.c: Likewise.
* gcc.target/arm/neon/vorns64.c: Likewise.
* gcc.target/arm/neon/vorns8.c: Likewise.
* gcc.target/arm/neon/vornu16.c: Likewise.
* gcc.target/arm/neon/vornu32.c: Likewise.
* gcc.target/arm/neon/vornu64.c: Likewise.
* gcc.target/arm/neon/vornu8.c: Likewise.

Change-Id: I41608974563111a82d3113ae1973ad951b29ba29
git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221241 138bc75d-0d04-0410-961f-82ee72b054a4

Use Cortex-A17 tuning parameters for Cortex-A12

* config/arm/arm.c (arm_cortex_a12_tune): Update entries to match
Cortex-A17 tuning parameters.
* config/arm/arm-cores.def (cortex-a12): Schedule for cortex-a17.

Change-Id: I052388833c5c3f988665a8abc4ffa5a5b873d586
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@219472 138bc75d-0d04-0410-961f-82ee72b054a4

Add -mcpu=cortex-a17.cortex-a7

* config/arm/arm-cores.def (cortex-a17.cortex-a7): New entry.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* config/arm/bpabi.h (BE8_LINK_SPEC): Add mcpu=cortex-a17.cortex-a7.
* config/arm/t-aprofile: Add cortex-a17.cortex-a7 entry to
MULTILIB_MATCHES.

Change-Id: I187e367a89123ce3944cc95dc5d391dd6c359c8a
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218146 138bc75d-0d04-0410-961f-82ee72b054a4

Add Cortex-A17 support

* config/arm/arm.md (generic_sched): Specify cortexa17 in 'no' list.
Include cortex-a17.md.
* config/arm/arm.c (arm_issue_rate): Specify 2 for cortexa17.
* config/arm/arm-cores.def (cortex-a17): New entry.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* config/arm/bpabi.h (BE8_LINK_SPEC): Specify mcpu=cortex-a17.
* config/arm/cortex-a17.md: New file.
* config/arm/cortex-a17-neon.md: New file.
* config/arm/driver-arm.c (arm_cpu_table): Add entry for cortex-a17.
* config/arm/t-aprofile: Add cortex-a17 entries to MULTILIB_MATCHES.

Change-Id: Ice7a25da1b3be47c143360d47c1544959f74dce9
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218145 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-07 Marat Zakirov <m.zakirov@samsung.com>

* config/arm/thumb1.md (*thumb1_movhi_insn): Handle stack pointer.
(*thumb1_movqi_insn): Likewise.
* config/arm/thumb2.md (*thumb2_movhi_insn): Likewise.

Change-Id: Iaf99474d30284516a0c8f713376d315b94d69b08
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@213695 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ 2014-07-11 Marat Zakirov <m.zakirov@samsung.com>

PR target/61561
* config/arm/arm.md (*movhi_insn_arch4): Handle stack pointer.
(*movhi_bytes): Likewise.
(*arm_movqi_insn): Likewise.

gcc/testsuite/
2014-07-11  Marat Zakirov  <m.zakirov@samsung.com>

PR target/61561
* gcc.dg/pr61561.c: New test.

Change-Id: I977cff643e5fa4b119a3c662510bdf7664d8a2e6
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212450 138bc75d-0d04-0410-961f-82ee72b054a4

make gmp, mpc, mpfr, isl and cloog-isl deps static

Change-Id: I6af8833f6f9b45672d891ffc9a7e0cd7f83e0d65

2014-11-04 Zhenqiang Chen <zhenqiang.chen@arm.com>

Revert:
2014-11-03  Zhenqiang Chen  <zhenqiang.chen@arm.com>
* ifcvt.c (noce_emit_cmove, noce_get_alt_condition, noce_get_condition):
Allow CC mode if HAVE_cbranchcc4.

Change-Id: I59159ec53faba15957a6acce4462ba10ec0ceed1
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@217062 138bc75d-0d04-0410-961f-82ee72b054a4

Add symlink to liblto_plugin to bfd-plugins directory

Change-Id: Iefe8a944c0159af77e29d786f4ce4a5d7f1dbb92

Rework packaging for Tizen.

Change-Id: Idc6ae14ce9fcd767e45cd2285097565bdc5865ab

Make Linaro GCC 4.9-2015.02.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220723 138bc75d-0d04-0410-961f-82ee72b054a4

Merge branches/gcc-4_9-branch rev 220525

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220639 138bc75d-0d04-0410-961f-82ee72b054a4

Merge branches/gcc-4_9-branch rev 220524

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220638 138bc75d-0d04-0410-961f-82ee72b054a4

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r217175, r217185, r217186.
2014-11-06  Hale Wang  <hale.wang@arm.com>

* config/arm/arm-cores.def: Add support for
-mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
cortex-m1.small-multiply.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Regenerate.
* config/arm/arm.c: Update the rtx-costs for MUL.
* config/arm/bpabi.h: Handle
-mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
cortex-m1.small-multiply.
* doc/invoke.texi: Document
-mcpu=cortex-m0.small-multiply,cortex-m0plus.small-multiply,
cortex-m1.small-multiply.

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r217185, r217186.
2014-11-06  Hale Wang  <hale.wang@arm.com>

* gcc.target/arm/small-multiply-m0-1.c: New test for
* gcc.target/arm/small-multiply-m0-2.c: Likewise.
* gcc.target/arm/small-multiply-m0-3.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-1.c: New test for
* gcc.target/arm/small-multiply-m0plus-2.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-3.c: Likewise.
* gcc.target/arm/small-multiply-m1-1.c: New test for
* gcc.target/arm/small-multiply-m1-2.c: Likewise.
* gcc.target/arm/small-multiply-m1-3.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220575 138bc75d-0d04-0410-961f-82ee72b054a4

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r217091.
2014-11-04  Jiong Wang  <jiong.wang@arm.com>
2014-11-04  Wilco Dijkstra  <wilco.dijkstra@arm.com>

PR target/63293
* config/aarch64/aarch64.c (aarch64_expand_epiloue): Add barriers before
stack adjustment.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220574 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-27  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r217118.
2014-11-05  Alex Velenko  <Alex.Velenko@arm.com>

* simplify-rtx.c (simplify_binary_operation_1): Div check added.
* rtl.h (SUBREG_P): New macro added.

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r217118.
2014-11-05  Alex Velenko  <Alex.Velenko@arm.com>

* gcc.dg/asr-div1.c: New testcase.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220573 138bc75d-0d04-0410-961f-82ee72b054a4

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r217215.
2014-11-07  Jiong Wang  <jiong.wang@arm.com>
2014-11-07  Richard Biener  <rguenther@suse.de>

PR tree-optimization/63676
* gimple-fold.c (fold_gimple_assign): Do not fold node when
TREE_CLOBBER_P be true.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220572 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-27  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r217228.
2014-11-07  Jiong Wang  <jiong.wang@arm.com>

* gcc.dg/tree-ssa/20040204-1.c: Add aarch64*-*-* to the list.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220571 138bc75d-0d04-0410-961f-82ee72b054a4

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r219583.
2015-01-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/64460
* config/arm/arm.md (*<arith_shift_insn>_multsi): Set 'shift' to 2.
(*<arith_shift_insn>_shiftsi): Set 'shift' attr to 3.

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r217430.
2014-11-12  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

* config/arm/arm.c (*<arith_shift_insn>_shiftsi): Fix typo.

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r219583.
2015-01-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/64460
* gcc.target/arm/pr64460_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220570 138bc75d-0d04-0410-961f-82ee72b054a4

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r217431.
2014-11-12  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.h (CALL_USED_REGISTERS): Mark LR as
caller-save.
(EPILOGUE_USES): Guard the check by epilogue_completed.
* config/aarch64/aarch64.c (aarch64_layout_frame): Explictly check for
LR.
(aarch64_can_eliminate): Check LR_REGNUM liveness.

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r217431.
2014-11-12  Jiong Wang  <jiong.wang@arm.com>

* gcc.target/aarch64/lr_free_1.c: New testcase for -fomit-frame-pointer.
* gcc.target/aarch64/lr_free_2.c: New testcase for leaf
-fno-omit-frame-pointer.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220569 138bc75d-0d04-0410-961f-82ee72b054a4

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r219718.
* expmed.c (store_bit_field_using_insv): Improve warning message.
Use %wu instead of HOST_WIDE_INT_PRINT_UNSIGNED.

2015-01-15  Jiong Wang  <jiong.wang@arm.com>

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r219717.
2015-01-15  Jiong Wang  <jiong.wang@arm.com>

PR rtl-optimization/64011
* expmed.c (store_bit_field_using_insv): Warn and truncate bitsize when
there is partial overflow.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220568 138bc75d-0d04-0410-961f-82ee72b054a4

2015-02-10  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r217331.
2014-11-11  Bin Cheng  <bin.cheng@arm.com>

* sched-deps.c (sched_analyze_1): Check pending list if it is not
less than MAX_PENDING_LIST_LENGTH.
(sched_analyze_2, sched_analyze_insn, deps_analyze_insn): Ditto.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220567 138bc75d-0d04-0410-961f-82ee72b054a4

2015-02-09  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r216779.
2014-10-28  Alan Lawrence  <alan.lawrence@arm.com>

* expr.c (expand_expr_real_2): Remove code handling VEC_LSHIFT_EXPR.
* fold-const.c (const_binop): Likewise.
* cfgexpand.c (expand_debug_expr): Likewise.
* tree-inline.c (estimate_operator_cost): Likewise.
* tree-vect-generic.c (expand_vector_operations_1): Likewise.
* optabs.c (optab_for_tree_code): Likewise.
(expand_vec_shift_expr): Likewise, update comment.
* tree.def: Delete VEC_LSHIFT_EXPR, remove comment.
* optabs.h (expand_vec_shift_expr): Remove comment re. VEC_LSHIFT_EXPR.
* optabs.def: Remove vec_shl_optab.
* doc/md.texi: Remove references to vec_shr_m.

2015-02-09  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r216742.
2014-10-27  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64.c (TARGET_GIMPLE_FOLD_BUILTIN): Define again.
* config/aarch64/aarch64-builtins.c (aarch64_gimple_fold_builtin):
Restore, enable for bigendian, update to use __builtin..._scal...

2015-02-09  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r216741.
2014-10-27  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64-simd-builtins.def (reduc_smax_, reduc_smin_,
reduc_umax_, reduc_umin_, reduc_smax_nan_, reduc_smin_nan_): Remove.
(reduc_smax_scal_, reduc_smin_scal_, reduc_umax_scal_,
reduc_umin_scal_, reduc_smax_nan_scal_, reduc_smin_nan_scal_): New.

* config/aarch64/aarch64-simd.md
(reduc_<maxmin_uns>_<mode>): Rename VDQV_S variant to...
(reduc_<maxmin_uns>_internal<mode>): ...this.
(reduc_<maxmin_uns>_<mode>): New (VDQ_BHSI).
(reduc_<maxmin_uns>_scal_<mode>): New (*2).

(reduc_<maxmin_uns>_v2si): Combine with below, renaming...
(reduc_<maxmin_uns>_<mode>): Combine V2F with above, renaming...
(reduc_<maxmin_uns>_internal_<mode>): ...to this (VDQF).

* config/aarch64/arm_neon.h (vmaxv_f32, vmaxv_s8, vmaxv_s16,
vmaxv_s32, vmaxv_u8, vmaxv_u16, vmaxv_u32, vmaxvq_f32, vmaxvq_f64,
vmaxvq_s8, vmaxvq_s16, vmaxvq_s32, vmaxvq_u8, vmaxvq_u16, vmaxvq_u32,
vmaxnmv_f32, vmaxnmvq_f32, vmaxnmvq_f64, vminv_f32, vminv_s8,
vminv_s16, vminv_s32, vminv_u8, vminv_u16, vminv_u32, vminvq_f32,
vminvq_f64, vminvq_s8, vminvq_s16, vminvq_s32, vminvq_u8, vminvq_u16,
vminvq_u32, vminnmv_f32, vminnmvq_f32, vminnmvq_f64): Update to use
__builtin_aarch64_reduc_..._scal; remove vget_lane wrapper.

2015-02-09  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r216738.
2014-10-27  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64-simd-builtins.def
(reduc_splus_<mode>/VDQF, reduc_uplus_<mode>/VDQF, reduc_splus_v4sf):
Remove.
(reduc_plus_scal_<mode>, reduc_plus_scal_v4sf): New.

* config/aarch64/aarch64-simd.md (reduc_<sur>plus_mode): Remove.
(reduc_splus_<mode>, reduc_uplus_<mode>, reduc_plus_scal_<mode>): New.

(reduc_<sur>plus_mode): Change SUADDV -> UNSPEC_ADDV, rename to...
(aarch64_reduc_plus_internal<mode>): ...this.

(reduc_<sur>plus_v2si): Change SUADDV -> UNSPEC_ADDV, rename to...
(aarch64_reduc_plus_internalv2si): ...this.

(reduc_splus_<mode>/V2F): Rename to...
(aarch64_reduc_plus_internal<mode>): ...this.

* config/aarch64/iterators.md
(UNSPEC_SADDV, UNSPEC_UADDV, SUADDV): Remove.
(UNSPEC_ADDV): New.
(sur): Remove elements for UNSPEC_SADDV and UNSPEC_UADDV.

* config/aarch64/arm_neon.h (vaddv_s8, vaddv_s16, vaddv_s32, vaddv_u8,
vaddv_u16, vaddv_u32, vaddvq_s8, vaddvq_s16, vaddvq_s32, vaddvq_s64,
vaddvq_u8, vaddvq_u16, vaddvq_u32, vaddvq_u64, vaddv_f32, vaddvq_f32,
vaddvq_f64): Change __builtin_aarch64_reduc_[us]plus_... to
__builtin_aarch64_reduc_plus_scal, remove vget_lane wrapper.

2015-02-09  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r216737.
2014-10-27  Alan Lawrence  <alan.lawrence@arm.com>

PR tree-optimization/61114
* doc/md.texi (Standard Names): Add reduc_(plus,[us](min|max))|scal
optabs, and note in reduc_[us](plus|min|max) to prefer the former.

* expr.c (expand_expr_real_2): Use reduc_..._scal if available, fall
back to old reduc_...  BIT_FIELD_REF only if not.

* optabs.c (optab_for_tree_code): for REDUC_(MAX,MIN,PLUS)_EXPR,
return the reduce-to-scalar (reduc_..._scal) optab.
(scalar_reduc_to_vector): New.

* optabs.def (reduc_smax_scal_optab, reduc_smin_scal_optab,
reduc_plus_scal_optab, reduc_umax_scal_optab, reduc_umin_scal_optab):
New.

* optabs.h (scalar_reduc_to_vector): Declare.

* tree-vect-loop.c (vectorizable_reduction): Look for optabs reducing
to either scalar or vector.

2015-02-09  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r216736.
2014-10-27  Alan Lawrence  <alan.lawrence@arm.com>

PR tree-optimization/61114
* expr.c (expand_expr_real_2): For REDUC_{MIN,MAX,PLUS}_EXPR, add
extract_bit_field around optab result.

* fold-const.c (fold_unary_loc): For REDUC_{MIN,MAX,PLUS}_EXPR, produce
scalar not vector.

* tree-cfg.c (verify_gimple_assign_unary): Check result vs operand type
for REDUC_{MIN,MAX,PLUS}_EXPR.

* tree-vect-loop.c (vect_analyze_loop): Update comment.
(vect_create_epilog_for_reduction): For direct vector reduction, use
result of tree code directly without extract_bit_field.

* tree.def (REDUC_MAX_EXPR, REDUC_MIN_EXPR, REDUC_PLUS_EXPR): Update
comment.

2015-02-09  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r216734.
2014-10-27  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64.c (TARGET_GIMPLE_FOLD_BUILTIN): Comment out.
* config/aarch64/aarch64-builtins.c (aarch64_gimple_fold_builtin):
Remove using preprocessor directis.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220562 138bc75d-0d04-0410-961f-82ee72b054a4

Backport from trunk r216675.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220528 138bc75d-0d04-0410-961f-82ee72b054a4

2015-02-09  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217173, r217174, r217687.
2014-11-17  Terry Guo  <terry.guo@arm.com>

* config/arm/arm.c (arm_issue_rate): Return 2 for cortex-m7.
* config/arm/arm.md (generic_sched): Exclude cortex-m7.
(generic_vfp): Likewise.
* config/arm/cortex-m7.md: Pipeline description for cortex-m7.

2014-10-06  Hale Wang  <Hale.Wang@arm.com>

* config/arm/arm.c: Add cortex-m7 tune.
* config/arm/arm-cores.def: Use cortex-m7 tune.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220527 138bc75d-0d04-0410-961f-82ee72b054a4

[ARM,AArch64][testsuite] New Advanced SIMD intrinsics tests.

2015-02-04  Christophe Lyon  <christophe.lyon@linaro.org>

Backport from trunk r216640-r216661.
2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vuzp.c: New file.
* gcc.target/aarch64/advsimd-intrinsics/vzip.c: Likewise.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vmul.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vldX_lane.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vldX.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vld1_dup.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vdup-vmov.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vclz.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vbsl.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vaddw.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vaddl.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vaddhn.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vabdl.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vabd.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/vabal.c: New file.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/binary_sat_op.inc: New
file.
* gcc.target/aarch64/advsimd-intrinsics/vqadd.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vqsub.c: Likewise.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/unary_sat_op.inc: New
file.
* gcc.target/aarch64/advsimd-intrinsics/vqabs.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vqneg.c: Likewise.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/cmp_fp_op.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vcage.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcagt.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcale.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcalt.c: Likewise.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/cmp_op.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vceq.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcge.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcgt.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vcle.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vclt.c: Likewise.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/binary_op.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vadd.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vand.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vbic.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/veor.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vorn.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vorr.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vsub.c: Likewise.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/aarch64/advsimd-intrinsics/unary_op.inc: New file.
* gcc.target/aarch64/advsimd-intrinsics/vabs.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vneg.c: Likewise.

2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* gcc.target/arm/README.advsimd-intrinsics: New file.
* gcc.target/aarch64/advsimd-intrinsics/README: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/compute-ref-data.h:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/advsimd-intrinsics.exp:
Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vaba.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vld1.c: Likewise.
* gcc.target/aarch64/advsimd-intrinsics/vshl.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220516 138bc75d-0d04-0410-961f-82ee72b054a4

Backport from trunk r217230

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@220459 138bc75d-0d04-0410-961f-82ee72b054a4

Bump version number, post release.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219645 138bc75d-0d04-0410-961f-82ee72b054a4

Make Linaro GCC 4.9-2015.01.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219643 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-14  Yvan Roux  <yvan.roux@linaro.org>

Fix Linaro PR #902

Partial Backport from trunk r211798.
2014-06-18  Radovan Obradovic  <robradovic@mips.com>
    Tom de Vries  <tom@codesourcery.com>

* config/arm/arm.c (arm_emit_call_insn): Add IP and CC clobbers to
CALL_INSN_FUNCTION_USAGE.

Backport from trunk r209800.
2014-04-25  Tom de Vries  <tom@codesourcery.com>

* expr.c (clobber_reg_mode): New function.
* expr.h (clobber_reg): New function.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219597 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-14  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r211783.
2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/arm.c (neon_vector_mem_operand): Allow register
POST_MODIFY for neon loads and stores.
(arm_print_operand): Output post-index register for neon loads and
stores.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219596 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2015-01-14  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r218451.
2014-12-06  James Greenhalgh  <james.greenhalgh@arm.com>
    Sebastian Pop  <s.pop@samsung.com>
    Brian Rzycki  <b.rzycki@samsung.com>

PR tree-optimization/54742
* params.def (max-fsm-thread-path-insns, max-fsm-thread-length,
max-fsm-thread-paths): New.

* doc/invoke.texi (max-fsm-thread-path-insns, max-fsm-thread-length,
max-fsm-thread-paths): Documented.

* tree-cfg.c (split_edge_bb_loc): Export.
* tree-cfg.h (split_edge_bb_loc): Declared extern.

* tree-ssa-threadedge.c (simplify_control_stmt_condition): Restore the
original value of cond when simplification fails.
(fsm_find_thread_path): New.
(fsm_find_control_statement_thread_paths): New.
(thread_through_normal_block): Call find_control_statement_thread_paths.

* tree-ssa-threadupdate.c (dump_jump_thread_path): Pretty print
EDGE_FSM_THREAD.
(verify_seme): New.
(duplicate_seme_region): New.
(thread_through_all_blocks): Generate code for EDGE_FSM_THREAD edges
calling duplicate_seme_region.

* tree-ssa-threadupdate.h (jump_thread_edge_type): Add EDGE_FSM_THREAD.

gcc/testsuite/
2015-01-14  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r218451.
2014-12-06  James Greenhalgh  <james.greenhalgh@arm.com>
    Sebastian Pop  <s.pop@samsung.com>
    Brian Rzycki  <b.rzycki@samsung.com>

PR tree-optimization/54742
* gcc.dg/tree-ssa/ssa-dom-thread-6.c: New test.
* gcc.dg/tree-ssa/ssa-dom-thread-7.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219584 138bc75d-0d04-0410-961f-82ee72b054a4

Merge branches/gcc-4_9-branch rev 219502

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219549 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-13  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r217394.
2014-11-11  Andrew Pinski  <apinski@cavium.com>

Bug target/61997
* config.gcc (aarch64*-*-*): Set target_gtfiles to include
aarch64-builtins.c.
* config/aarch64/aarch64-builtins.c: Include gt-aarch64-builtins.h
at the end of the file.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219522 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-13  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r216267, r216547, r216548, r217072, r217192, r217405,
r217406, r217768.
2014-11-19  Renlin Li  <renlin.li@arm.com>

* config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FP_FAST,
__ARM_FEATURE_FMA, __ARM_FP, __ARM_FEATURE_NUMERIC_MAXMIN, __ARM_NEON_FP.

2014-11-12  Tejas Belagod  <tejas.belagod@arm.com>

* Makefile.in (TEXI_GCC_FILES): Remove arm-acle-intrinsics.texi,
arm-neon-intrinsics.texi, aarch64-acle-intrinsics.texi.
* doc/aarch64-acle-intrinsics.texi: Remove.
* doc/arm-acle-intrinsics.texi: Remove.
* doc/arm-neon-intrinsics.texi: Remove.
* doc/extend.texi: Consolidate sections AArch64 intrinsics,
ARM NEON Intrinsics, ARM ACLE Intrinsics into one ARM C Language
Extension section. Add references to public ACLE specification.

2014-11-06  Renlin Li  <renlin.li@arm.com>

* config/aarch64/aarch64.c (aarch64_architecture_version): New.
(processor): New architecture_version field.
(aarch64_override_options): Initialize aarch64_architecture_version.
* config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_ARCH,
__ARM_ARCH_PROFILE, aarch64_arch_name macro.

2014-11-04  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Fix typo in definition
of __ARM_FEATURE_IDIV.

2014-10-22  Jiong Wang <jiong.wang@arm.com>

* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Add missing '\'.

2014-10-22  Renlin Li <renlin.li@arm.com>

* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define
__ARM_FEATURE_IDIV__.

2014-10-15  Renlin Li <renlin.li@arm.com>

* config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
__ARM_BIG_ENDIAN, __ARM_SIZEOF_MINIMAL_ENUM. Add __ARM_64BIT_STATE,
__ARM_ARCH_ISA_A64, __ARM_FEATURE_CLZ, __ARM_FEATURE_IDIV,
__ARM_FEATURE_UNALIGNED, __ARM_PCS_AAPCS64, __ARM_SIZEOF_WCHAR_T.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219518 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-13  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r211789, r211790, r211791, r211792, r211793, r211794,
r211795, r211796, r211797.
2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.c (__gnu_uldivmod_helper): Remove.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi-v6m.S (__aeabi_uldivmod): Perform division using
__udivmoddi4.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_ldivmod, __aeabi_uldivmod,
push_for_divide, pop_for_divide): Use .cfi_* directives for DWARF
annotations. Fix DWARF information.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_ldivmod): Perform division using
__udivmoddi4, and fixups for negative operands.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_ldivmod): Optimise stack manipulation.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_uldivmod): Perform division using call
to __udivmoddi4.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_uldivmod): Optimise stack pointer
manipulation.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_uldivmod, __aeabi_ldivmod): Add comment
describing register usage on function entry and exit.

2014-06-18  Charles Baylis  <charles.baylis@linaro.org>

* config/arm/bpabi.S (__aeabi_uldivmod): Fix whitespace.
(__aeabi_ldivmod): Fix whitespace.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219517 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-13  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217593.
2014-11-14  Andrew Pinski  <apinski@cavium.com>

* config/aarch64/aarch64-cores.def (thunderx): Change the scheduler
over to thunderx.
* config/aarch64/aarch64.md: Include thunderx.md.
(generic_sched): Set to no for thunderx.
* config/aarch64/thunderx.md: New file.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219516 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2015-01-12  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r211075.
2014-04-30  Alan Lawrence  <alan.lawrence@arm.com>

gcc.target/arm/simd/vrev16p8_1.c: New file.
gcc.target/arm/simd/vrev16qp8_1.c: New file.
gcc.target/arm/simd/vrev16qs8_1.c: New file.
gcc.target/arm/simd/vrev16qu8_1.c: New file.
gcc.target/arm/simd/vrev16s8_1.c: New file.
gcc.target/arm/simd/vrev16u8_1.c: New file.
gcc.target/arm/simd/vrev32p16_1.c: New file.
gcc.target/arm/simd/vrev32p8_1.c: New file.
gcc.target/arm/simd/vrev32qp16_1.c: New file.
gcc.target/arm/simd/vrev32qp8_1.c: New file.
gcc.target/arm/simd/vrev32qs16_1.c: New file.
gcc.target/arm/simd/vrev32qs8_1.c: New file.
gcc.target/arm/simd/vrev32qu16_1.c: New file.
gcc.target/arm/simd/vrev32qu8_1.c: New file.
gcc.target/arm/simd/vrev32s16_1.c: New file.
gcc.target/arm/simd/vrev32s8_1.c: New file.
gcc.target/arm/simd/vrev32u16_1.c: New file.
gcc.target/arm/simd/vrev32u8_1.c: New file.
gcc.target/arm/simd/vrev64f32_1.c: New file.
gcc.target/arm/simd/vrev64p16_1.c: New file.
gcc.target/arm/simd/vrev64p8_1.c: New file.
gcc.target/arm/simd/vrev64qf32_1.c: New file.
gcc.target/arm/simd/vrev64qp16_1.c: New file.
gcc.target/arm/simd/vrev64qp8_1.c: New file.
gcc.target/arm/simd/vrev64qs16_1.c: New file.
gcc.target/arm/simd/vrev64qs32_1.c: New file.
gcc.target/arm/simd/vrev64qs8_1.c: New file.
gcc.target/arm/simd/vrev64qu16_1.c: New file.
gcc.target/arm/simd/vrev64qu32_1.c: New file.
gcc.target/arm/simd/vrev64qu8_1.c: New file.
gcc.target/arm/simd/vrev64s16_1.c: New file.
gcc.target/arm/simd/vrev64s32_1.c: New file.
gcc.target/arm/simd/vrev64s8_1.c: New file.
gcc.target/arm/simd/vrev64u16_1.c: New file.
gcc.target/arm/simd/vrev64u32_1.c: New file.
gcc.target/arm/simd/vrev64u8_1.c: New file.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219465 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-12  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217717.
2014-11-18  Felix Yang  <felix.yang@huawei.com>

* config/aarch64/aarch64.c (doloop_end): New pattern.
* config/aarch64/aarch64.md (TARGET_CAN_USE_DOLOOP_P): Implement.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219464 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-12  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217661.
2014-11-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64-cores.def (cortex-a53): Remove
AARCH64_FL_CRYPTO from feature flags.
(cortex-a57): Likewise.
(cortex-a57.cortex-a53): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219463 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-11  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r218319.
2014-12-03  Andrew Stubbs  <ams@codesourcery.com>

Revert:

2014-09-17  Andrew Stubbs  <ams@codesourcery.com>

* config/arm/arm.c (arm_option_override): Reject -mfpu=neon
when architecture is older than ARMv7.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219438 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-11  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217691.
2014-11-18  Jiong Wang  <jiong.wang@arm.com>

* lra-eliminations.c (update_reg_eliminate): Relax gcc_assert for fixed
registers.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219437 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-11  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215503.
2014-09-23  Wilco Dijkstra  <wdijkstr@arm.com>

* common/config/aarch64/aarch64-common.c:
(default_options aarch_option_optimization_table):
Default to -fsched-pressure.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219436 138bc75d-0d04-0410-961f-82ee72b054a4

2015-01-11  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r211132.
2014-06-02  Tom de Vries  <tom@codesourcery.com>

* config/aarch64/aarch64.c (aarch64_float_const_representable_p): Handle
case that x has VOIDmode.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219435 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2015-01-11  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r209620.
2014-04-22  Vidya Praveen  <vidyapraveen@arm.com>

* aarch64.md (float<GPI:mode><GPF:mode>2): Remove.
(floatuns<GPI:mode><GPF:mode>2): Remove.
(<optab><fcvt_target><GPF:mode>2): New pattern for equal width float
and floatuns conversions.
(<optab><fcvt_iesize><GPF:mode>2): New pattern for inequal width float
and floatuns conversions.
* iterators.md (fcvt_target, FCVT_TARGET): Support SF and DF modes.
(w1,w2): New mode attributes for inequal width conversions.

gcc/testsuite/
2015-01-11  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r209620.
2014-04-22  Vidya Praveen  <vidyapraveen@arm.com>

* gcc.target/aarch64/cvtf_1.c: New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219434 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2015-01-11  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217362, r217546.
2014-11-14  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

PR target/63724
        * config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Split out
        numerical immediate handling to...
        (aarch64_internal_mov_immediate): ...this. New.
        (aarch64_rtx_costs): Use aarch64_internal_mov_immediate.
        (aarch64_mov_operand_p): Relax predicate.
        * config/aarch64/aarch64.md (mov<mode>:GPI): Do not expand CONST_INTs.
        (*movsi_aarch64): Turn into define_insn_and_split and new alternative
        for 'n'.
        (*movdi_aarch64): Likewise.

2014-11-11  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64-simd.md
(aarch64_simd_bsl<mode>_internal): Remove float cases, canonicalize.
(aarch64_simd_bsl<mode>): Add gen_lowpart expressions where we
are punning between float vectors and integer vectors.

gcc/testsuite
2015-01-11  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217362.
2014-11-11  James Greenhalgh  <james.greenhalgh@arm.com>

* gcc.target/aarch64/vbslq_f64_1.c: New.
* gcc.target/aarch64/vbslq_f64_2.c: Likewise.
* gcc.target/aarch64/vbslq_u64_1.c: Likewise.
* gcc.target/aarch64/vbslq_u64_2.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@219433 138bc75d-0d04-0410-961f-82ee72b054a4

Bump version number, post release.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218633 138bc75d-0d04-0410-961f-82ee72b054a4

Make Linaro GCC 4.9-2014.12.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218631 138bc75d-0d04-0410-961f-82ee72b054a4

Merge branches/gcc-4_9-branch rev 218412

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218423 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217079, r217080.
2014-11-04  Alan Lawrence  <alan.lawrence@arm.com>

config/arm/neon.md (reduc_smin_<mode> *2): Rename to...
(reduc_smin_scal_<mode> *2): ...this; extract scalar result.
(reduc_smax_<mode> *2): Rename to...
(reduc_smax_scal_<mode> *2): ...this; extract scalar result.
(reduc_umin_<mode> *2): Rename to...
(reduc_umin_scal_<mode> *2): ...this; extract scalar result.
(reduc_umax_<mode> *2): Rename to...
(reduc_umax_scal_<mode> *2): ...this; extract scalar result.

2014-11-04  Alan Lawrence  <alan.lawrence@arm.com>

config/arm/neon.md (reduc_plus_*): Rename to...
(reduc_plus_scal_*): ...this; reduce to temp and extract scalar result.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218398 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Fix Backport from trunk r216524 (committed at r218379).
Add missing file: config/aarch64/aarch64-cost-tables.h

* config/aarch64/aarch64-cost-tables.h: New file.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218396 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217076.
2014-11-04  Michael Collison <michael.collison@linaro.org>

* config/aarch64/iterators.md (lconst_atomic): New mode attribute
to support constraints for CONST_INT in atomic operations.
* config/aarch64/atomics.md
(atomic_<atomic_optab><mode>): Use lconst_atomic constraint.
(atomic_nand<mode>): Likewise.
(atomic_fetch_<atomic_optab><mode>): Likewise.
(atomic_fetch_nand<mode>): Likewise.
(atomic_<atomic_optab>_fetch<mode>): Likewise.
(atomic_nand_fetch<mode>): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218394 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217026.
2014-11-03  Zhenqiang Chen  <zhenqiang.chen@arm.com>

* ifcvt.c (noce_emit_cmove, noce_get_alt_condition, noce_get_condition):
Allow CC mode if HAVE_cbranchcc4.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218393 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217014.
2014-11-02  Michael Collison  <michael.collison@linaro.org>

* config/arm/arm.h (CLZ_DEFINED_VALUE_AT_ZERO) : Update
to support vector modes.
(CTZ_DEFINED_VALUE_AT_ZERO): Ditto.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218391 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r216996, r216998, r216999, r217001, r217002, r217003,
r217004, r217742.
2014-11-18  James Greenhalgh  <james.greenhalgh@arm.com>

PR target/63937
* target.def (use_by_pieces_infrastructure_p): Take unsigned
HOST_WIDE_INT as the size parameter.
* targhooks.c (default_use_by_pieces_infrastructure_p): Likewise.
* targhooks.h (default_use_by_pieces_infrastructure_p): Likewise.
* config/arc/arc.c (arc_use_by_pieces_infrastructure_p)): Likewise.
* config/mips/mips.c (mips_use_by_pieces_infrastructure_p)): Likewise.
* config/s390/s390.c (s390_use_by_pieces_infrastructure_p)): Likewise.
* config/sh/sh.c (sh_use_by_pieces_infrastructure_p)): Likewise.
* config/aarch64/aarch64.c
(aarch64_use_by_pieces_infrastructure_p)): Likewise.
* doc/tm.texi: Regenerate.

2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>

* doc/tm.texi.in (MOVE_BY_PIECES_P): Remove.
(CLEAR_BY_PIECES_P): Likewise.
(SET_BY_PIECES_P): Likewise.
(STORE_BY_PIECES_P): Likewise.
* doc/tm.texi: Regenerate.
* system.h: Poison MOVE_BY_PIECES_P, CLEAR_BY_PIECES_P,
SET_BY_PIECES_P, STORE_BY_PIECES_P.
* expr.c (MOVE_BY_PIECES_P): Remove.
(CLEAR_BY_PIECES_P): Likewise.
(SET_BY_PIECES_P): Likewise.
(STORE_BY_PIECES_P): Likewise.
(can_move_by_pieces): Rewrite in terms of
targetm.use_by_pieces_infrastructure_p.
(emit_block_move_hints): Likewise.
(can_store_by_pieces): Likewise.
(store_by_pieces): Likewise.
(clear_storage_hints): Likewise.
(emit_push_insn): Likewise.
(expand_constructor): Likewise.

2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64.c
(aarch64_use_by_pieces_infrastructre_p): New.
(TARGET_USE_BY_PIECES_INFRASTRUCTURE): Likewise.
* config/aarch64/aarch64.h (STORE_BY_PIECES_P): Delete.

2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>

* config/mips/mips.h (MOVE_BY_PIECES_P): Remove.
(STORE_BY_PIECES_P): Likewise.
* config/mips/mips.c (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): New.
(mips_move_by_pieces_p): Rename to...
(mips_use_by_pieces_infrastructure_p): ...this, use new hook
parameters, use the default hook implementation as a
fall-back.

2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>

* config/sh/sh.c (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): New.
(sh_use_by_pieces_infrastructure_p): Likewise.
* config/sh/sh.h (MOVE_BY_PIECES_P): Remove.
(STORE_BY_PIECES_P): Likewise.
(SET_BY_PIECES_P): Likewise.

2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>

* config/arc/arc.c (TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): New.
(arc_use_by_pieces_infrastructure_p): Likewise.
* confir/arc/arc.h (MOVE_BY_PIECES_P): Delete.
(CAN_MOVE_BY_PIECES): Likewise.

2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>

* config/s390/s390.c (s390_use_by_pieces_infrastructure_p): New.
(TARGET_USE_BY_PIECES_INFRASTRUCTURE_P): Likewise.
* config/s390/s390.h (MOVE_BY_PIECES_P): Remove.
(CLEAR_BY_PIECES): Likewise.
(SET_BY_PIECES): Likewise.
(STORE_BY_PIECES): Likewise.

2014-11-01  James Greenhalgh  <james.greenhalgh@arm.com>

* target.def (use_by_pieces_infrastructure_p): New.
* doc/tm.texi.in (MOVE_BY_PIECES_P): Describe that this macro
is deprecated.
(STORE_BY_PIECES_P): Likewise.
(CLEAR_BY_PIECES_P): Likewise.
(SET_BY_PIECES_P): Likewise.
(TARGET_MOVE_BY_PIECES_PROFITABLE_P): Add hook.
* doc/tm.texi: Regenerate.
* expr.c (MOVE_BY_PIECES_P): Rewrite in terms of
TARGET_USE_BY_PIECES_INFRASTRUCTURE_P.
(STORE_BY_PIECES_P): Likewise.
(CLEAR_BY_PIECES_P): Likewise.
(SET_BY_PIECES_P): Likewise.
(STORE_MAX_PIECES): Move to...
* defaults.h (STORE_MAX_PIECES): ...here.
* targhooks.c (get_move_ratio): New.
(default_use_by_pieces_infrastructure_p): Likewise.
* targhooks.h (default_use_by_pieces_infrastructure_p): New.
* target.h (by_pieces_operation): New.

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217742.
2014-11-18  James Greenhalgh  <james.greenhalgh@arm.com>

PR target/63937
* gcc.dg/memset-2.c: New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218390 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r216765.
2014-10-27  Jiong Wang <jiong.wang@arm.com>

PR target/63442
* optabs.c (prepare_cmp_insn): Use "ret_mode" instead of "word_mode".

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218387 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r216638.
2014-10-24  Christophe Lyon  <christophe.lyon@linaro.org>

* lib/wrapper.exp ({tool}_maybe_build_wrapper): Clear
wrap_compile_flags before setting it.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218386 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r216630.
2014-10-24  Felix Yang  <felix.yang@huawei.com>
Jiji Jiang  <jiangjiji@huawei.com>

PR target/63173
* config/aarch64/arm_neon.h (__LD2R_FUNC): Remove macro.
(__LD3R_FUNC): Ditto.
(__LD4R_FUNC): Ditto.
(vld2_dup_s8, vld2_dup_s16, vld2_dup_s32, vld2_dup_f32, vld2_dup_f64,
 vld2_dup_u8, vld2_dup_u16, vld2_dup_u32, vld2_dup_p8, vld2_dup_p16
 vld2_dup_s64, vld2_dup_u64, vld2q_dup_s8, vld2q_dup_p8,
 vld2q_dup_s16, vld2q_dup_p16, vld2q_dup_s32, vld2q_dup_s64,
 vld2q_dup_u8, vld2q_dup_u16, vld2q_dup_u32, vld2q_dup_u64
 vld2q_dup_f32, vld2q_dup_f64): Rewrite using builtin functions.
(vld3_dup_s64, vld3_dup_u64, vld3_dup_f64, vld3_dup_s8
 vld3_dup_p8, vld3_dup_s16, vld3_dup_p16, vld3_dup_s32
 vld3_dup_u8, vld3_dup_u16, vld3_dup_u32, vld3_dup_f32
 vld3q_dup_s8, vld3q_dup_p8, vld3q_dup_s16, vld3q_dup_p16
 vld3q_dup_s32, vld3q_dup_s64, vld3q_dup_u8, vld3q_dup_u16
 vld3q_dup_u32, vld3q_dup_u64, vld3q_dup_f32, vld3q_dup_f64): Likewise.
(vld4_dup_s64, vld4_dup_u64, vld4_dup_f64, vld4_dup_s8
 vld4_dup_p8, vld4_dup_s16, vld4_dup_p16, vld4_dup_s32
 vld4_dup_u8, vld4_dup_u16, vld4_dup_u32, vld4_dup_f32
 vld4q_dup_s8, vld4q_dup_p8, vld4q_dup_s16, vld4q_dup_p16
 vld4q_dup_s32, vld4q_dup_s64, vld4q_dup_u8, vld4q_dup_u16
 vld4q_dup_u32, vld4q_dup_u64, vld4q_dup_f32, vld4q_dup_f64): Likewise.
* config/aarch64/aarch64.md (define_c_enum "unspec"): Add
UNSPEC_LD2_DUP, UNSPEC_LD3_DUP, UNSPEC_LD4_DUP.
* config/aarch64/aarch64-simd-builtins.def (ld2r, ld3r, ld4r): New
builtins.
* config/aarch64/aarch64-simd.md (aarch64_simd_ld2r<mode>): New pattern.
(aarch64_simd_ld3r<mode>): Likewise.
(aarch64_simd_ld4r<mode>): Likewise.
(aarch64_ld2r<mode>): New expand.
(aarch64_ld3r<mode>): Likewise.
(aarch64_ld4r<mode>): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218385 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r216544.
2014-10-22  Jiong Wang  <jiong.wang@arm.com>

* gcc.target/aarch64/pic-constantpool1.c: Add explicit declaration.
* gcc.target/aarch64/pic-symrefplus.c: Likewise.
* gcc.target/aarch64/reload-valid-spoff.c: Likewise.
* gcc.target/aarch64/vect.x: Likewise.
* gcc.target/aarch64/vect-ld1r.x: Add return type.
* gcc.target/aarch64/vect-fmax-fmin.c: Likewise.
* gcc.target/aarch64/vect-fp.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218384 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r217971.
2014-11-22  Uros Bizjak  <ubizjak@gmail.com>

* params.def (PARAM_MAX_COMPLETELY_PEELED_INSNS): Increase to 200.
* config/i386/i386.c (ix86_option_override_internal): Do not increase
PARAM_MAX_COMPLETELY_PEELED_INSNS.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218383 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r216543.
2014-10-22  Jiong Wang  <jiong.wang@arm.com>

* lib/compat.exp (compat-run): Remove "unresolved".
* lib/gcc-defs.exp (${tools}_check_compile): Update code logic for
unsupported testcase.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218380 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r216524.
2014-10-21  Andrew Pinski  <apinski@cavium.com>

* doc/invoke.texi (AARCH64/mtune): Document thunderx as an
available option also.
* config/aarch64/aarch64-cost-tables.h: New file.
* config/aarch64/aarch64-cores.def (thunderx): New core.
* config/aarch64/aarch64-tune.md: Regenerate.
* config/aarch64/aarch64.c: Include aarch64-cost-tables.h instead
of config/arm/aarch-cost-tables.h.
(thunderx_regmove_cost): New variable.
(thunderx_tunings): New variable.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218379 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r216517.
2014-10-21  Jiong Wang  <jiong.wang@arm.com>

* gcc.target/arm/20031108-1.c (Proc_7): Add explicit declaration.
(Proc_1): Add return type.
* gcc.target/arm/cold-lc.c (show_stack): Add explict declaration.
* gcc.target/arm/neon-modes-2.c (foo): Likewise.
* gcc.target/arm/pr43920-2.c (lseek): Likewise.
* gcc.target/arm/pr44788.c (foo): Likewise.
* gcc.target/arm/pr55642.c (abs): Likewise.
* gcc.target/arm/pr58784.c (f): Likewise.
* gcc.target/arm/pr60650.c (foo1, foo2): Likewise.
* gcc.target/arm/vfp-ldmdbs.c (bar): Likewise.
* gcc.target/arm/vfp-ldmias.c (bar): Likewise.
* gcc.target/arm/pr60650-2.c (fn1, fn2): Add return type and add type
for local variables.
* lib/target-supports.exp
(check_effective_target_arm_crypto_ok_nocache): Add declaration for
vaeseq_u8.
(check_effective_target_arm_neon_fp16_ok_nocache): Add declaration for
vcvt_f16_f32.
(check_effective_target_arm_neonv2_ok_nocache): Add declaration for
vfma_f32.
* gcc.target/arm/pr51968.c: Add -Wno-implicit-function-declaration.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218378 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215071.
2014-09-09  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/simd/int_comparisons_1.c: Tighten regexp.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218377 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r216336.
2014-10-16  Richard Earnshaw  <rearnsha@arm.com>

* config/aarch64/aarch64.c (aarch64_legitimize_address): New function.
(TARGET_LEGITIMIZE_ADDRESS): Redefine.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218375 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r216253.
2014-10-15  Renlin Li <renlin.li@arm.com>

* config/aarch64/aarch64.h (ARM_DEFAULT_PCS, arm_pcs_variant): Delete.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218374 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215865.
2014-10-03  Jing Yu  <jingyu@google.com>

* configure.ac: Add aarch64 to list of targets that support gold.
* configure: Regenerate.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218373 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215711.
2014-09-30  Terry Guo  <terry.guo@arm.com>

* config/arm/arm-cores.def (cortex-m7): New core name.
* config/arm/arm-fpus.def (fpv5-sp-d16): New fpu name.
(fpv5-d16): Ditto.
* config/arm/arm-tables.opt: Regenerated.
* config/arm/arm-tune.md: Regenerated.
* config/arm/arm.h (TARGET_VFP5): New macro.
* config/arm/bpabi.h (BE8_LINK_SPEC): Include cortex-m7.
* config/arm/vfp.md (<vrint_pattern><SDF:mode>2,
smax<mode>3, smin<mode>3): Enabled for FPU FPv5.
* doc/invoke.texi: Document new cpu and fpu names.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218371 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215707, r215842.
2014-10-03  David Sherwood  <david.sherwood@arm.com>

* ira-int.h (ira_allocno): Mark hard_regno as signed.

2014-09-30  David Sherwood  <david.sherwood@arm.com>

* ira-int.h (ira_allocno): Add "wmode" field.
* ira-build.c (create_insn_allocnos): Add new "parent" function
parameter.
* ira-conflicts.c (ira_build_conflicts): Add conflicts for registers
that cannot be accessed in wmode.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218370 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215540.
2014-09-24  Zhenqiang Chen  <zhenqiang.chen@arm.com>

PR rtl-optimization/63210
* ira-color.c (assign_hard_reg): Ignore conflict cost if the
HARD_REGNO is not available for CONFLICT_A.

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215540.
2014-09-24  Zhenqiang Chen  <zhenqiang.chen@arm.com>

* gcc.target/arm/pr63210.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218368 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215475.
2014-09-22  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.dg/vect/vect-reduc-or_1.c: New test.
* gcc.dg/vect/vect-reduc-or_2.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218367 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215473.
2014-09-22  Alan Lawrence  <alan.lawrence@arm.com>

* lib/target-supports.exp (check_effective_target_whole_vector_shift):
New.

* gcc.dg/vect/vect-reduc-mul_1.c: New test.
* gcc.dg/vect/vect-reduc-mul_2.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218366 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215177.
2014-09-11  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vset_lane_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218365 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215129.
2014-09-10  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vstN_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218364 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215126.
2014-09-10  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vldN_lane_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218363 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215078.
2014-09-09  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vldN_dup_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218362 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215077.
2014-09-09  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vld1-vst1_1.c: Rewrite to test all variants.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218361 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215072.
2014-09-09  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vldN_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218360 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215047.
2014-09-09  Tony Wang  <tony.wang@arm.com>

* gcc.target/arm/xordi3-opt.c: Disable this
test case for thumb1 target.
* gcc.target/arm/iordi3-opt.c: Ditto.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218359 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215046.
2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/61749
* config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
Use qualifier_immediate for last operand.  Rename to...
(aarch64_types_ternop_lane_qualifiers): ... This.
(TYPES_QUADOP): Rename to...
(TYPES_TERNOP_LANE): ... This.
(aarch64_simd_expand_args): Return const0_rtx when encountering user
error.  Change return of 0 to return of NULL_RTX.
(aarch64_crc32_expand_builtin): Likewise.
(aarch64_expand_builtin): Return NULL_RTX instead of 0.
ICE when expanding unknown builtin.
* config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
TERNOP_LANE qualifiers.
(sqdmlsl_lane): Likewise.
(sqdmlal_laneq): Likewise.
(sqdmlsl_laneq): Likewise.
(sqdmlal2_lane): Likewise.
(sqdmlsl2_lane): Likewise.
(sqdmlal2_laneq): Likewise.
(sqdmlsl2_laneq): Likewise.

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215046.
2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/61749
* gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218358 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215013.
2014-09-08  Joseph Myers  <joseph@codesourcery.com>

* defaults.h (LARGEST_EXPONENT_IS_NORMAL, ROUND_TOWARDS_ZERO):
Remove.
* doc/tm.texi.in (ROUND_TOWARDS_ZERO, LARGEST_EXPONENT_IS_NORMAL):
Remove.
* doc/tm.texi: Regenerate.
* system.h (LARGEST_EXPONENT_IS_NORMAL, ROUND_TOWARDS_ZERO):
Poison.
* config/arm/arm.h (LARGEST_EXPONENT_IS_NORMAL): Remove.
* config/cris/cris.h (__make_dp): Remove.

libgcc/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215013.
2014-09-08  Joseph Myers  <joseph@codesourcery.com>

* fp-bit.c (pack_d, unpack_d): Remove LARGEST_EXPONENT_IS_NORMAL
and ROUND_TOWARDS_ZERO conditionals.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218357 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214952.
2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/arm_neon.h (__GET_HIGH): New macro.
(vget_high_f32, vget_high_f64, vget_high_p8, vget_high_p16,
vget_high_s8, vget_high_s16, vget_high_s32, vget_high_s64,
vget_high_u8, vget_high_u16, vget_high_u32, vget_high_u64):
Remove temporary __asm__ and reimplement.

gcc/testsuite
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214950.
2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vget_high_1.c: New test.
* gcc.target/aarch64/vget_low_1.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218356 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214948, r214949.
2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64-builtins.c (aarch64_fold_builtin): Remove code
handling cmge, cmgt, cmeq, cmtst.

* config/aarch64/aarch64-simd-builtins.def (cmeq, cmge, cmgt, cmle,
cmlt, cmgeu, cmgtu, cmtst): Remove.

* config/aarch64/arm_neon.h (vceq_*, vceqq_*, vceqz_*, vceqzq_*,
vcge_*, vcgeq_*, vcgez_*, vcgezq_*, vcgt_*, vcgtq_*, vcgtz_*,
vcgtzq_*, vcle_*, vcleq_*, vclez_*, vclezq_*, vclt_*, vcltq_*,
vcltz_*, vcltzq_*, vtst_*, vtstq_*): Use gcc vector extensions.

2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64-builtins.c (aarch64_types_cmtst_qualifiers,
TYPES_TST): Define.
(aarch64_fold_builtin): Update pattern for cmtst.

* config/aarch64/aarch64-protos.h (aarch64_const_vec_all_same_int_p):
Declare.

* config/aarch64/aarch64-simd-builtins.def (cmtst): Update qualifiers.

* config/aarch64/aarch64-simd.md (aarch64_vcond_internal<mode><mode>):
Switch operands, separate out more cases, refactor.

(aarch64_cmtst<mode>): Rewrite pattern to match (plus ... -1).

* config/aarch64.c (aarch64_const_vec_all_same_int_p): Take single
argument; rename old version to...
(aarch64_const_vec_all_same_in_range_p): ...this.
(aarch64_print_operand, aarch64_simd_shift_imm_p): Follow renaming.

* config/aarch64/predicates.md (aarch64_simd_imm_minus_one): Define.

gcc/testsuite
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214948.
2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/simd/int_comparisons.x: New file.
* gcc.target/aarch64/simd/int_comparisons_1.c: New test.
* gcc.target/aarch64/simd/int_comparisons_2.c: Ditto.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218355 138bc75d-0d04-0410-961f-82ee72b054a4