Dave Airlie [Sun, 3 Sep 2017 11:17:47 +0000 (21:17 +1000)]
mesa/mtypes: repack gl_texture_object.
reduces size from 1144 to 1128.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 3 Sep 2017 11:12:17 +0000 (21:12 +1000)]
mesa/mtypes: repack gl_shader_program_data.
This reduces the size from 144 bytes to 128 bytes.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 3 Sep 2017 11:08:34 +0000 (21:08 +1000)]
mesa/mtypes: reorganise gl_shader
This reduces this from 200->182 bytes.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 3 Sep 2017 10:37:01 +0000 (20:37 +1000)]
mesa/mtypes: repack display list structs.
This reduces each of these by 8 bytes.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 3 Sep 2017 10:35:19 +0000 (20:35 +1000)]
mesa/mtypes: reduce size of gl_sync_object.
Drops from 40->32 bytes.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 3 Sep 2017 10:08:18 +0000 (20:08 +1000)]
mesa/mtypes: reorg vertex/fragment program state.
reduces both of these by 8 bytes.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 3 Sep 2017 09:53:07 +0000 (19:53 +1000)]
mesa/bindless: reorder gl_bindless_image gl_bindless_sampler.
This makes these use 16-bytes instead of 24-bytes.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Fri, 1 Sep 2017 12:07:43 +0000 (14:07 +0200)]
radv: fix a memleak when compiling the GS copy shader
Found by inspection.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Charmaine Lee [Fri, 1 Sep 2017 19:34:01 +0000 (12:34 -0700)]
svga: move index buffer bind flag assertion
The buffer bind flags can be promoted in svga_buffer_handle(), so
move the assertion after it. This has already been done for
vertex buffer in commit
6b4bf7e8be, but it misses the one for
index buffer.
Fixes assertion running WarThunder.
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Charmaine Lee [Tue, 1 Aug 2017 22:58:50 +0000 (15:58 -0700)]
svga: avoid emitting redundant SetShaderResources and SetVertexBuffers
Minor performance improvement in avoiding binding the same shader resource
or the same vertex buffer for the same slot.
Tested with MTT glretrace.
v2: Per Brian's suggestion, add a helper function to do vertex buffer
comparision.
v3: Change the helper function to vertex_buffers_equal().
Reviewed-by: Brian Paul <brianp@vmware.com>
Jason Ekstrand [Tue, 22 Aug 2017 05:11:49 +0000 (22:11 -0700)]
spirv: Add support for the HelperInvocation builtin
I have no idea how this got missed but it's been missing since forever.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Thomas Hellstrom [Mon, 4 Sep 2017 12:05:25 +0000 (14:05 +0200)]
loader/dri3: Use client local back to front blit in copySubBuffer if available
The copySubBuffer functionality always attempted a server side blit from
back to fake front if a fake front was present, and we weren't displaying
on a remote GPU.
Now that we always have local blit capability on modern drivers, first
attempt a local blit, and only if that fails, try the server blit.
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Axel Davy <axel.davy@normalesup.org>
Marek Olšák [Tue, 29 Aug 2017 01:58:22 +0000 (03:58 +0200)]
radeonsi/gfx9: implement primitive binning
This increases performance, but it was tuned for Raven, not Vega.
We don't know yet how Vega will perform, hopefully not worse.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 29 Aug 2017 18:55:11 +0000 (20:55 +0200)]
radeonsi: add more state flags into si_state_dsa
3 flags for primitive binning, 2 flags for out-of-order rasterization
(but that will be done some other time)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 28 Aug 2017 21:44:16 +0000 (23:44 +0200)]
radeonsi/gfx9: don't use BREAK_BATCH and FLUSH_DFSM if DFSM is disabled
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tapani Pälli [Mon, 4 Sep 2017 05:02:13 +0000 (08:02 +0300)]
vbo: fix build errors on android
incompatible pointer to integer conversion assigning to 'GLintptr' (aka 'int')
from 'const char *' [-Werror,-Wint-conversion]
offset = indices;
^ ~~~~~~~
Fixes:
2d93b462b4d ("vbo: fix offset in minmax cache key")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 4 Sep 2017 17:26:34 +0000 (18:26 +0100)]
docs: add news item and link release notes for 17.2.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 4 Sep 2017 17:24:29 +0000 (18:24 +0100)]
docs: add sha256 checksums for 17.2.0
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
b4473dd5191878249ccb53f40407206f1e57fa6f)
Emil Velikov [Mon, 4 Sep 2017 17:16:16 +0000 (18:16 +0100)]
docs: Update 17.2.0 release notes
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
f5925b2897308530c64e1abf44ebc1ee0e017ada)
Marek Olšák [Tue, 29 Aug 2017 01:41:18 +0000 (03:41 +0200)]
radeonsi: eliminate PS color outputs when colormask kills them
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 29 Aug 2017 11:14:34 +0000 (13:14 +0200)]
gallium/radeon: sort DBG shader flags according to pipe_shader_type
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Nicolai Hähnle [Fri, 25 Aug 2017 07:04:40 +0000 (09:04 +0200)]
radeonsi: ensure cache flushes happen before SET_PREDICATION packets
The data is read when the render_cond_atom is emitted, so we must
delay emitting the atom until after the flush.
Fixes:
0fe0320dc074 ("radeonsi: use optimal packet order when doing a pipeline sync")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 25 Aug 2017 14:19:56 +0000 (16:19 +0200)]
radeonsi: fix ARB_transform_feedback_overflow_query on <= VI
The result written by the shader workaround needs to be written back, or
the CP may read stale data.
Fixes:
78476cfe071a ("radeonsi: enable ARB_transform_feedback_overflow_query")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Fri, 25 Aug 2017 14:08:50 +0000 (16:08 +0200)]
radeonsi: fix compute shader state dumping
Fixes:
420c438589c8 ("radeonsi: log draw and compute state into log context")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 23 Aug 2017 16:14:32 +0000 (18:14 +0200)]
radeonsi: add an assertion that only two-dimensional constant references are used
v2: remove some redundant checks
Acked-by: Roland Scheidegger <sroland@vmware.com> (v1)
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> (v1)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Wed, 23 Aug 2017 16:13:57 +0000 (18:13 +0200)]
gallium/radeon: always use two-dimensional constant references
Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Wed, 23 Aug 2017 16:13:40 +0000 (18:13 +0200)]
gallium/tests: always use two-dimensional constant references
Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Wed, 23 Aug 2017 16:13:30 +0000 (18:13 +0200)]
pp: always use two-dimensional constant references
Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Wed, 23 Aug 2017 16:13:15 +0000 (18:13 +0200)]
gallium/hud: always use two-dimensional constant references
Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Wed, 23 Aug 2017 16:04:05 +0000 (18:04 +0200)]
nine: always generate two-dimensional constant file accesses
Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Wed, 23 Aug 2017 16:07:58 +0000 (18:07 +0200)]
st/glsl_to_tgsi: inline src_register into translate_src
src_register has no meaningful standalone use, it only makes sense when
called from translate_src.
v2: fix input array handling
Acked-by: Roland Scheidegger <sroland@vmware.com> (v1)
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Wed, 23 Aug 2017 15:09:09 +0000 (17:09 +0200)]
st/glsl_to_tgsi: ir_load_ubo always has a second index
Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Sat, 26 Aug 2017 22:42:11 +0000 (00:42 +0200)]
st/drawpixels: always use two-dimensional constant references
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Sat, 26 Aug 2017 22:42:53 +0000 (00:42 +0200)]
tgsi/build: always generate two-dimensional constant file accesses
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Wed, 23 Aug 2017 15:48:27 +0000 (17:48 +0200)]
tgsi/ureg: always emit constants (and their decls) as 2D
Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Wed, 23 Aug 2017 15:41:27 +0000 (17:41 +0200)]
gallium: all drivers should accept two-dimensional constant buffer indexing
Most older drivers seem to just ignore the Dimension setting, so virtually
no changes should be needed.
Acked-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Eric Engestrom [Sun, 3 Sep 2017 18:22:06 +0000 (19:22 +0100)]
anv: fix off by one in array check
`anv_formats[ARRAY_SIZE(anv_formats)]` is already one too far.
Spotted by Coverity.
CovID: 1417259
Fixes:
242211933a0682696170 "anv/formats: Nicely handle unknown VkFormat enums"
Cc: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Dave Airlie [Sun, 3 Sep 2017 08:57:49 +0000 (18:57 +1000)]
ac: reorg ac_shader_binary struct to take less space.
This reduces the size from 96 to 80 bytes but putting all the
32-bit sizes at the start.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Sun, 3 Sep 2017 08:37:38 +0000 (18:37 +1000)]
radv: drop emit2d_dst_type.
This is completely unused now.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuien.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Xavier Bouchoux [Thu, 31 Aug 2017 08:12:52 +0000 (10:12 +0200)]
radv/meta: missing initialisations in create_pass().
Otherwise radv_cmd_state_setup_attachments() will complain it has no clearvalues,
when called via radv_process_depth_image_inplace().
v2: use LOAD/STORE instead of DONT_CARE, to preserve stencil values.
Signed-off-by: Xavier Bouchoux <xavierb@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Bas Nieuwenhuizen [Sat, 2 Sep 2017 19:47:11 +0000 (21:47 +0200)]
radv: Enable command buffer chaining by default.
For approx 5-10% performance improvement in dota2.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sat, 2 Sep 2017 10:59:55 +0000 (12:59 +0200)]
radv: Put semaphore waits in preamble cs.
The separate flush cs gets in the way of batchchain.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sun, 3 Sep 2017 21:35:37 +0000 (23:35 +0200)]
radv: Actually set the cmd_buffer usage_flags.
Otherwise, the simultaneous uage bit doesn't get set from the begin
info, which we need for batchchaining.
Fixes:
f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
Reviewed-by: Dave Airlie <airlied@redhat.com>
Eric Engestrom [Thu, 31 Aug 2017 16:55:56 +0000 (16:55 +0000)]
util: improve compiler guard
Glibc 2.26 has dropped xlocale.h, but the functions needed (strtod_l()
and strdof_l()) can be found in stdlib.h.
Improve the detection method to allow newer builds to still make use of
the locale-setting.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102454
Cc: Laurent Carlier <lordheavym@gmail.com>
Cc: Emil Velikov <emil.l.velikov@gmail.com>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Laurent Carlier <lordheavym@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Leo Liu [Fri, 25 Aug 2017 17:17:41 +0000 (13:17 -0400)]
radeon/uvd: add Define Restart Interval to MJPEG bitstream reconstruction
It adds the capacity to decode MJPEG stream with DRI marker
Signed-off-by: Leo Liu <leo.liu@amd.com>
Leo Liu [Fri, 25 Aug 2017 17:17:40 +0000 (13:17 -0400)]
radeon/uvd: fix MJPEG quantization table index
Fixes:
130d1f456b8 ("radeon/uvd: reconstruct MJPEG bitstream")
Signed-off-by: Leo Liu <leo.liu@amd.com>
Roland Scheidegger [Thu, 31 Aug 2017 23:48:42 +0000 (01:48 +0200)]
st/mesa: fix view template initialization in try_pbo_readpixels
I think this is what the code was meant to do, albeit as far as I can tell
the redundant initialization some analyzers complain about should work as
well just fine (only the first layer will be used, if the view contains one
or more layers doesn't really matter).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102467
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Kenneth Graunke [Thu, 31 Aug 2017 22:45:57 +0000 (15:45 -0700)]
genxml: Make Border Color Pointer an address on Gen4-5, not an offset.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Thu, 31 Aug 2017 20:12:44 +0000 (13:12 -0700)]
i965: Inline emit_reloc in __genx_combine_address
One less layer of baklava.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Fri, 1 Sep 2017 06:54:20 +0000 (23:54 -0700)]
i965: Fix crash in fallback GTT mapping.
We can't perf_debug without a context.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Kenneth Graunke [Tue, 22 Aug 2017 22:12:55 +0000 (15:12 -0700)]
i965: Fix state flagging of Gen6 SOL programs.
It doesn't seem like the old code could possibly work.
1. brw_gs_state_dirty made us bail unless one of these flags were set:
_NEW_TEXTURE, BRW_NEW_GEOMETRY_PROGRAM, BRW_NEW_TRANSFORM_FEEDBACK
2. If there was no geometry program, we called brw_upload_ff_gs_prog()3
3. That checked brw_ff_gs_state_dirty and bailed unless these were set:
_NEW_LIGHT, BRW_NEW_PRIMITIVE, BRW_NEW_TRANSFORM_FEEDBACK,
BRW_NEW_VS_PROG_DATA.
4. brw_ff_gs_prog_key pv_first and attr fields were set based on data
depending on _NEW_LIGHT and BRW_NEW_VS_PROG_DATA.
This means that if we needed a FF GS program, and changed the VS
outputs or provoking vertex mode, we'd fail to notice that we needed
to emit a new program.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Kenneth Graunke [Tue, 22 Aug 2017 22:18:32 +0000 (15:18 -0700)]
i965: Drop useless gen6_brw_upload_ff_gs_prog() wrapper.
gen6...brw? Drop some baklava layers.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Rob Clark [Sat, 26 Aug 2017 15:55:05 +0000 (11:55 -0400)]
freedreno: skip batch-cache for compute shaders
It is kind of pointless for compute, and avoids issues with apps kicking
off more than 32 compute shaders at once.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Vinson Lee [Thu, 31 Aug 2017 22:38:57 +0000 (15:38 -0700)]
m4: Use older autoconf 2.63 compatible ax_check_compile_flag.
CentOS 6 and RHEL 6 have autoconf 2.63.
Fixes:
e4b2b69e828c ("configure: Add and use AX_CHECK_COMPILE_FLAG")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Kenneth Graunke [Wed, 30 Aug 2017 08:16:23 +0000 (01:16 -0700)]
i965: Move BATCH_SZ define into intel_batchbuffer.c.
It's only used in one file.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Wed, 30 Aug 2017 08:13:38 +0000 (01:13 -0700)]
i965: Drop batch_size argument from brw_bufmgr_init().
This is dead code and hasn't been used in a long time.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Chris Wilson [Wed, 30 Aug 2017 07:02:10 +0000 (00:02 -0700)]
i965: Rename brw_bo::offset64 to gtt_offset.
We can drop the meaningless "64" suffix - libdrm_intel originally had
an "offset" field that was an "unsigned long" which was the wrong size,
and we couldn't remove/alter that field without breaking ABI, so we had
to add a uint64_t "offset64" field.
"gtt_offset" is also more descriptive than "offset".
(Patch originally written by Ken, but Chris suggested a better name and
supplied the giant comment making up the bulk of the patch, so I changed
the authorship to him.)
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Wed, 30 Aug 2017 08:43:34 +0000 (01:43 -0700)]
i965: Drop the BRW_BATCH_STRUCT macro.
It's used in exactly one place these days, and not much simpler than
just calling intel_batchbuffer_data directly.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Wed, 30 Aug 2017 08:02:30 +0000 (01:02 -0700)]
i965: Don't double count the batch in aperture_space.
intel_batchbuffer_reset calls add_exec_bo on the batch right away,
which adds in the batch BO size.
Fixes:
29ba502a4e28 ("i965: Use I915_EXEC_BATCH_FIRST when available.")
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Cherniak, Bruce [Fri, 25 Aug 2017 19:59:13 +0000 (14:59 -0500)]
swr: Report format max_samples=1 to maintain support for "fake" msaa.
Accompanying patch "st/mesa: only try to create 1x msaa surfaces for
'fake' msaa" requires driver to report max_samples=1 to enable "fake"
msaa. Previously, 0 and 1 were treated equivalently in st_init_extensions()
and either could enable "fake" msaa.
This patch raises the swr default msaa_max_count from 0 to 1, so that
swr_is_format_supported will report max_samples=1.
Real msaa can still be enabled by exporting SWR_MSAA_MAX_COUNT with a
pow2 value between 2 and 16.
This patch is necessary to prevent an OpenSWR regression resulting from
the st/mesa patch.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102038
Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-By: George Kyriazis <george.kyriazis@intel.com>
Eric Engestrom [Fri, 1 Sep 2017 15:55:55 +0000 (16:55 +0100)]
aubinator: remove duplicate initialisation
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Samuel Pitoiset [Thu, 31 Aug 2017 09:44:00 +0000 (11:44 +0200)]
radv: report VM faults if detected
It's fairly simple for now, but this might be quite useful.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 31 Aug 2017 09:43:59 +0000 (11:43 +0200)]
radeonsi: move si_vm_fault_occured() to AMD common code
For radv, in order to report VM faults when detected.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 1 Sep 2017 07:44:45 +0000 (09:44 +0200)]
radv: add radv_check_gpu_hangs() helper function
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Wed, 30 Aug 2017 13:12:21 +0000 (15:12 +0200)]
radv: disassemble SPIR-V binaries with RADV_DEBUG=spirv
This introduces a new separate option because the output can
be quite verbose. If spirv-dis is not found in the path, this
debug option is useless.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Wed, 30 Aug 2017 13:12:20 +0000 (15:12 +0200)]
radv: move RADV_TRACE_FILE functions to radv_debug.c
At the moment, debugging radv is not really easy because the
driver doesn't report enough information when it hangs. This
new file will be the main location for all debug tools.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 28 Aug 2017 10:17:11 +0000 (12:17 +0200)]
radv: silent a compiler warning in radv_emit_framebuffer_state()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Wed, 30 Aug 2017 13:12:03 +0000 (15:12 +0200)]
radv: compute correct maximum wave count per SIMD
Ported from RadeonSI (original patch by Marek).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Brian Paul [Tue, 22 Aug 2017 02:53:25 +0000 (20:53 -0600)]
st/mesa: only try to create 1x msaa surfaces for "fake" msaa drivers
For software drivers where we want "fake" msaa support for GL 3.x, we
treat 1 sample as being msaa.
For drivers with real msaa support, start format probing at 2x msaa.
For drivers with fake msaa support, start format probing at 1x msaa.
This also tweaks the MaxSamples code in st_init_extensions() so that
we use MaxSamples=1 for fake msaa. This allows the format proble loops
to run at least one iteration.
This fixes a llvmpipe/VTK regression from commit
6839d3369905eb02151.
And for drivers with fake msaa support, calls such as
glTexImage2DMultisample(samples=1) will now succeed.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102038
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102125
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tobias Klausmann [Sun, 13 Aug 2017 01:02:39 +0000 (03:02 +0200)]
nvc0/ir: propagate immediates to CALL input MOVs
On using builtin functions we have to move the input to registers $0 and $1, if
one of the input value is an immediate, we fail to propagate the immediate:
...
mov u32 $r477 0x00000003 (0)
...
mov u32 $r0 %r473 (0)
mov u32 $r1 $r477 (0)
call abs BUILTIN:0 (0)
mov u32 %r495 $r1 (0)
...
With this patch the immediate is propagated, potentially causing the first MOV
to be superfluous, which we'd remove in that case:
...
mov u32 $r0 %r473 (0)
mov u32 $r1 0x00000003 (0)
call abs BUILTIN:0 (0)
mov u32 %r495 $r1 (0)
...
Shaderdb stats:
total instructions in shared programs : 4893460 -> 4893324 (-0.00%)
total gprs used in shared programs : 582972 -> 582881 (-0.02%)
total local used in shared programs : 17960 -> 17960 (0.00%)
local gpr inst bytes
helped 0 91 112 112
hurt 0 0 0 0
v2:
implement some changes proposed by imirkin, the manual deletion of the dead
mov is necessary after
ea22ac23e0 ("nvc0/ir: unlink values pre- and post-call
to division function") as the potentially dead mov is unlinked properly,
causing later passes to not notice the mov op at all and thus not cleaning it
up. That makes up a big chunk of the regression the above commit caused.
Keep the deletion of the op where it is, deleting it later unnecessarily blows
up size of the change.
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Karol Herbst [Sun, 27 Aug 2017 16:00:52 +0000 (18:00 +0200)]
nvc0: write 0 to pipeline_statistics.cs_invocations
cs_invocations are currently unsupported, but leaving the field uninitialized
is even worse.
fixes on nvc0:
* KHR-GL45.pipeline_statistics_query_tests_ARB.functional_default_qo_values
* KHR-GL45.pipeline_statistics_query_tests_ARB.functional_non_rendering_commands_do_not_affect_queries
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Ben Crocker [Wed, 23 Aug 2017 20:32:43 +0000 (16:32 -0400)]
llvmpipe: lp_build_gather_elem_vec BE fix for 3x16 load
Fix loading of a 3x16 vector as a single 48-bit load
on big-endian systems (PPC64, S390).
Roland Scheidegger's commit
e827d9175675aaa6cfc0b981e2a80685fb7b3a74
plus Ray Strode's patch reduce pre-Roland Piglit failures from ~4000 to ~2000. This patch fixes
three of the four regressions observed by Ray:
- draw-vertices
- draw-vertices-half-float
- draw-vertices-half-float_gles2
One regression remains:
- draw-vertices-2101010
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100613
Cc: "17.2" "17.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ben Crocker <bcrocker@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Ray Strode [Wed, 23 Aug 2017 20:32:42 +0000 (16:32 -0400)]
gallivm: correct channel shift logic on big endian
lp_build_fetch_rgba_soa fetches a texel from a texture.
Part of that process involves first gathering the element
together from memory into a packed format, and then breaking
out the individual color channels into separate, parallel
arrays.
The code fails to account for endianess when reading the packed
values.
This commit attempts to correct the problem by reversing the order
the packed values are read on big endian systems.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100613
Cc: "17.2" "17.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Ray Strode <rstrode@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Roland Scheidegger [Sat, 26 Aug 2017 15:08:07 +0000 (17:08 +0200)]
util: only use SCHED_IDLE in pthread_setschedparam() when it's defined
Fixes build error when it's not.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Jason Ekstrand [Thu, 27 Jul 2017 22:04:25 +0000 (15:04 -0700)]
anv/formats: Nicely handle unknown VkFormat enums
This fixes some crashes in the dEQP-VK.memory.requirements.core.* tests.
I'm not sure whether or not passing out-of-bound formats into the query
is supposed to be allowed but there's no harm in protecting ourselves
from it.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/101956
Cc: mesa-stable@lists.freedesktop.org
Charmaine Lee [Wed, 30 Aug 2017 21:26:41 +0000 (14:26 -0700)]
vbo: fix offset in minmax cache key
Instead of saving primitive offset in the minmax cache key,
save the actual buffer offset which is used in the cache lookup.
Fixes rendering artifact seen with GoogleEarth when run with
VMware driver.
v2: Per Brian's comment, initialize offset to avoid compiler warning.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
Tapani Pälli [Thu, 31 Aug 2017 05:52:27 +0000 (08:52 +0300)]
anv: fix build errors on android
error: incompatible pointer to integer conversion initializing 'VkFence'
(aka 'unsigned long long') with an expression of type 'void *' [-Werror,-Wint-conversion]
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Christian König [Tue, 29 Aug 2017 14:45:46 +0000 (16:45 +0200)]
winsys/amdgpu: set AMDGPU_GEM_CREATE_VM_ALWAYS_VALID if possible v2
When the kernel supports it set the local flag and
stop adding those BOs to the BO list.
Can probably be optimized much more.
v2: rename new flag to AMDGPU_GEM_CREATE_VM_ALWAYS_VALID
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Tue, 18 Jul 2017 20:08:44 +0000 (16:08 -0400)]
radeonsi: set a per-buffer flag that disables inter-process sharing (v4)
For lower overhead in the CS ioctl.
Winsys allocators are not used with interprocess-sharable resources.
v2: It shouldn't crash anymore, but the kernel will reject the new flag.
v3 (christian): Rename the flag, avoid sending those buffers in the BO list.
v4 (christian): Remove setting the kernel flag for now
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Kenneth Graunke [Mon, 28 Aug 2017 23:08:32 +0000 (16:08 -0700)]
i965: Use BLORP for buffer object stall avoidance blits instead of BLT.
Improves performance of GFXBench4 tests at 1024x768 on a Kabylake GT2:
- Manhattan 3.1 by 1.32134% +/- 0.322734% (n=8).
- Car Chase by 1.25607% +/- 0.291262% (n=5).
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 29 Aug 2017 05:04:01 +0000 (22:04 -0700)]
i965: Always flush caches after blitting to a GL buffer object.
When we blit data into a buffer object, we may need to invalidate any
caches that might contain stale data, so the new data becomes visible.
For example, if the buffer object is bound as a vertex buffer, we need
to invalidate the vertex fetch cache.
While this flushing was missing, it usually happened implicitly for
non-obvious reasons: we're usually on the render ring, and calling
intel_emit_linear_blit() would require switching to the BLT ring,
causing an implicit flush. This likely provoked the kernel to do
PIPE_CONTROLs on our behalf. Although, Gen4-5 wouldn't have this
behavior. At any rate, we should do it ourselves.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 29 Aug 2017 05:00:12 +0000 (22:00 -0700)]
i965: Add PIPE_CONTRTOL_DATA_CACHE flush to brw_emit_mi_flush().
Although we're phasing out brw_emit_mi_flush(), we still use it in some
places in order to "flush everything". In a number of those places, we
write data to a buffer that we may then bind as an image surface, SSBO,
or atomic buffer. Those usages require us to flush the data cache.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 28 Aug 2017 22:57:20 +0000 (15:57 -0700)]
i965: Add a brw_blorp_copy_buffers() command.
This exposes the new blorp_copy_buffer() functionality to i965.
It should be a drop-in replacement for intel_emit_linear_blit()
(other than the arguments being backwards, for consistency with BLORP).
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Tue, 29 Aug 2017 04:19:22 +0000 (21:19 -0700)]
blorp: Make blorp_buffer_copy work on Gen4-6.
Gen4-6 can only handle surfaces up to 8192. Only Gen7+ can do 16384.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 28 Aug 2017 22:57:20 +0000 (15:57 -0700)]
blorp: Turn anv_CmdCopyBuffer into a blorp_buffer_copy() helper.
I want to be able to copy between buffer objects using BLORP in the i965
driver. Anvil already had code to do this, in a reasonably efficient
manner - first using large bpp copies, then smaller bpp copies.
This patch moves that logic into BLORP as blorp_buffer_copy(), so we
can use it in both drivers.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Grazvydas Ignotas [Sun, 27 Aug 2017 21:29:36 +0000 (00:29 +0300)]
radv: don't assert on empty hash table
Currently if table_size is 0, it's falling through to:
unreachable("hash table should never be full");
But table_size can be 0 when RADV_DEBUG=nocache is set, or when the
table allocation fails (which is not considered an error).
Fixes:
f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Brian Paul [Mon, 21 Aug 2017 19:08:41 +0000 (13:08 -0600)]
svga: include sample count in surface_size() computation
Use MAX2() because sampleCount will be zero for non-MSAA surfaces.
No Piglit regressions.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:39:36 +0000 (09:39 +0100)]
i965: drop unused brw->needs_unlit_centroid_workaround
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:38:34 +0000 (09:38 +0100)]
i965: drop brw->has_surface_tile_offset in favor of devinfo's
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:36:33 +0000 (09:36 +0100)]
i965: drop unused brw->no_simd8
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:36:06 +0000 (09:36 +0100)]
i965: drop unused brw->has_pln
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:35:04 +0000 (09:35 +0100)]
i965: drop brw->must_use_separate_stencil in favor of devinfo's
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:33:13 +0000 (09:33 +0100)]
i965: drop unused brw->has_negative_rhw_bug
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:32:45 +0000 (09:32 +0100)]
i965: drop unused brw->has_compr4
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:29:11 +0000 (09:29 +0100)]
i965: drop brw->has_llc in favor of devinfo->has_llc
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:24:32 +0000 (09:24 +0100)]
i965: drop brw->is_broxton
We need to take some take here as brw->is_broxton has been used to
check whether the device is a low power gen9 (aka Atom gen9 platform).
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:22:32 +0000 (09:22 +0100)]
i965: drop brw->is_cherryview in favor of devinfo->is_cherryview
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:19:47 +0000 (09:19 +0100)]
i965: drop brw->is_haswell in favor of devinfo->is_haswell
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:12:49 +0000 (09:12 +0100)]
i965: drop brw->is_baytrail in favor of devinfo->is_baytrail
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Lionel Landwerlin [Wed, 30 Aug 2017 08:09:13 +0000 (09:09 +0100)]
i965: drop brw->is_g4x in favor of devinfo->is_g4x
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>