NAKAMURA Takumi [Thu, 6 Apr 2023 13:27:20 +0000 (22:27 +0900)]
[Bazel] Rework llvm-tblgen for X86ManualFoldTables.def
It is easier to introduce header-only library.
Tue Ly [Thu, 23 Mar 2023 16:06:09 +0000 (12:06 -0400)]
[libc][RISCV] Let RISCV64 targets test implementations with and without FMA.
Let RISCV64 targets math implementations with and without FMA
automatically.
Reviewed By: michaelrj
Differential Revision: https://reviews.llvm.org/D146730
liqinweng [Thu, 6 Apr 2023 13:08:34 +0000 (21:08 +0800)]
[MLIR][Arith] Fold trunci with ext if the bit width of the input type of ext is greater than the
This patch is mainly to deal with folding trunci with ext,as flows:
trunci(zexti(a)) -> trunci(a)
trunci(zexti(a)) -> trunci(a)
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D140604
Dmitri Gribenko [Thu, 6 Apr 2023 12:59:38 +0000 (14:59 +0200)]
David Spickett [Wed, 5 Apr 2023 09:00:54 +0000 (09:00 +0000)]
[compiler-rt] Check for missing CMAKE_C_COMPILER_TARGET when using COMPILER_RT_DEFAULT_TARGET_ONLY
COMPILER_RT_DEFAULT_TARGET_ONLY is the goto workaround for building
only one of a multilib setup while still being able to autodetect the native target.
For example only building 64 bit libraries on Intel instead of 32 and 64 bit.
Which may fail without 32 bit compatibility libs installed.
As reported in https://discourse.llvm.org/t/configuring-compiler-rt-to-use-default-target-only-does-not-work/62727
this build config hasn't worked in a while.
It relies on a variable usually set during cross compliation,
though my testing shows you can set it in other scenarios too.
https://cmake.org/cmake/help/latest/variable/CMAKE_LANG_COMPILER_TARGET.html
So the options you need to provide are:
-DCOMPILER_RT_DEFAULT_TARGET_ONLY=ON -DCMAKE_C_COMPILER_TARGET="aarch64-unknown-linux-gnu"
And we should error if CMAKE_C_COMPILER_TARGET isn't set.
Reviewed By: glaubitz
Differential Revision: https://reviews.llvm.org/D147598
Simon Pilgrim [Thu, 6 Apr 2023 12:35:45 +0000 (13:35 +0100)]
[DAG] combineSelect - select(i1,vXi1,vXi1) - only cast <X x i1> constants to iX pre-legalization or if its a legal type
Fixes #61524
Pavel Kosov [Thu, 6 Apr 2023 11:56:53 +0000 (14:56 +0300)]
[llvm-exegesis][AArch64] Add return statement at the end of the snippet correctly
Currently llvm-exegesis fails to do this which causes every snippet to crash
~~
Huawei RRI, OS Lab
Reviewed By: courbet
Differential Revision: https://reviews.llvm.org/D147699
Dmitri Gribenko [Thu, 6 Apr 2023 11:37:35 +0000 (13:37 +0200)]
[clang][ClangScanDeps][test] Remove the file before overwriting it
Remove the file copied from the source tree before overwriting it. If
the source code is stored with readonly (0444) permissions, then
the copied files are also readonly and attempting to overwrite them
fails.
Shengchen Kan [Thu, 6 Apr 2023 11:21:36 +0000 (19:21 +0800)]
[X86][mem-fold] Use the generated memory folding table
Reviewed By: yubing
Differential Revision: https://reviews.llvm.org/D147527
Max Kazantsev [Thu, 6 Apr 2023 11:26:30 +0000 (18:26 +0700)]
[Test] Add expensive-range-sharpening mode for test
Looks like it can benefit from this mode.
Shengchen Kan [Thu, 6 Apr 2023 11:16:46 +0000 (19:16 +0800)]
[X86][mem-fold] Refine the code in X86FoldTablesEmitter.cpp, NFCI
1. Simplify code by using conditional operator
2. Add comments for "kz" and "store" cases
3. Rename variables to match flags
Caroline Concatto [Thu, 6 Apr 2023 09:53:48 +0000 (09:53 +0000)]
[AArch64][SME] Fix LDR and STR asm parser
The LDR and STR instructions must have the same value for imm4(second operand)
and offset(fourth operand).
The disassembly guarantees that happens, but the Asm parser was not checking that.
This patch fixes that by checking if the second operand and fourth operand are
immediate and have the same value.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D147617
Mariya Podchishchaeva [Thu, 6 Apr 2023 08:34:07 +0000 (04:34 -0400)]
[clang] Reset track of immediate function context when entering new function
Due to not resetting that, clang still thinks that it is in immediate
function context even if it already entered non-consteval function.
This caused consteval functions reaching codegen in some cases.
Fixes https://github.com/llvm/llvm-project/issues/61142
Reviewed By: cor3ntin, aaron.ballman
Differential Revision: https://reviews.llvm.org/D147531
Simon Pilgrim [Thu, 6 Apr 2023 10:22:36 +0000 (11:22 +0100)]
[X86] LowerVectorAllEqual - don't attempt to match comparisons of float data
FCMP may use ISD::SETNE when nnan, we don't want to end up with cases where we mismatch signed zeros etc.
Thanks to @pengfei for the test case from D147688
Dmitry Makogon [Thu, 6 Apr 2023 09:48:56 +0000 (16:48 +0700)]
Reapply "[LSR] Preserve LCSSA when rewriting instruction with PHI user"
This reverts commit
efd34ba60f3839b0a68b2e32ff9011b6823bc16f.
Reapplies
8ff4832679e1. Missed a failing test. Needed to just
update test checks.
Paul Walker [Tue, 4 Apr 2023 12:51:25 +0000 (12:51 +0000)]
[SVE][InstCombine] Don't convert calls to fp binop intrinsics to instructions when strictfp is required.
There's no support to lower scalable vector constrained operations for SVE
and thus without this change we'll crash during code generation.
Differential Revision: https://reviews.llvm.org/D147600
Luke Lau [Wed, 5 Apr 2023 12:35:08 +0000 (13:35 +0100)]
[RISCV] Use non-strided load if VL=1 for optimized zero stride loads
When optimizing vmv.s.x/vmv.v.x's of scalar loads, if VL is known to be
1 then we don't need to perform a stride of x0, and can just do a
regular load.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D147609
Pavel Kosov [Thu, 6 Apr 2023 10:08:48 +0000 (13:08 +0300)]
[llvm-exegesis] Make possible to execute snippets without perf counters
Performance counters may be unavailable due to various reasons (such as
access restriction via sysctl properties or the CPU model being unknown
to libpfm). On the other hand, for debugging llvm-exegesis itself it is
still useful to be able to run generated code snippets to ensure that
the snippet does not crash at run time.
The --use-dummy-perf-counters command line option makes llvm-exegesis
behave just as usual except for using fake event counts instead of asking
the kernel for actual values.
~~
Huawei RRI, OS Lab
Reviewed By: courbet
Differential Revision: https://reviews.llvm.org/D146301
Timm Bäder [Thu, 6 Apr 2023 10:03:45 +0000 (12:03 +0200)]
[clang][Interp] Add missing static_assert messages
This broke build bots, e.g:
https://lab.llvm.org/buildbot/#/builders/139/builds/38697
Shengchen Kan [Thu, 6 Apr 2023 09:54:27 +0000 (17:54 +0800)]
[X86][mem-fold] Avoid nestsed `if`, redundant `else` and correct comments
Richard Sandiford [Wed, 5 Apr 2023 18:25:21 +0000 (19:25 +0100)]
[Sema] Fix reporting of invalid shader attribute on HLSL entry function
If the HLSL entry function had a shader attribute that conflicted
with the pipeline stage specified in the target triple, Clang
would emit:
error: (null) attribute parameters do not match the previous declaration
conflicting attribute is here
(where the second line doesn't reference an attribute).
This was because the code constructed a dummy attribute that had
only a source location, but no kind or syntax.
Noticed while doing some changes to the attribute handling.
Differential Revision: https://reviews.llvm.org/D147657
Simon Pilgrim [Thu, 6 Apr 2023 09:55:33 +0000 (10:55 +0100)]
[X86] MatchVectorAllZeroTest - fix bug when splitting vectors of large elements
DAG::SplitVector only works with vectors with even numbers of elements, when splitting vectors with large (illegal) element widths, we are likely to split down to <1 x iXXX>.
In such cases, pre-bitcast to a <X x i64> type to ensure splitting will always succeed.
Thanks to @alexfh for identifying this.
Serguei Katkov [Mon, 3 Apr 2023 15:53:11 +0000 (22:53 +0700)]
[GuardWidening] Re-factor freezeAndPush.
Re-write the code to avoid iteration over users of
constants and global values.
Reviewed By: mkazantsev
Differential Revision: https://reviews.llvm.org/D147450
Luke Lau [Fri, 31 Mar 2023 18:47:08 +0000 (19:47 +0100)]
[RISCV] Use tail agnostic policy more often when lowering insert_subvector
If we're inserting a fixed length subvector into a fixed length vector,
then we can use a tail agnostic policy as long as we're inserting up to
or past the end of the main vector.
I.e., because we're overwriting all of the main vector's tail elements,
and we don't care what the elements after that are.
As noted by Philip in https://reviews.llvm.org/D146711#4220341
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D147347
Luo, Yuanke [Mon, 3 Apr 2023 02:05:37 +0000 (10:05 +0800)]
[Coverity] Initialize pointer memeber.
Luke Lau [Wed, 5 Apr 2023 18:10:47 +0000 (19:10 +0100)]
[RISCV] Move some vector tests to rvv directory. NFC
I personally find it handy to be able to run the check-llvm-codegen-riscv-rvv target to test anything that involves vector codegen, so this patch moves some more vector-based test cases into that directory to increase its coverage.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D147644
Shengchen Kan [Thu, 6 Apr 2023 09:18:03 +0000 (17:18 +0800)]
[X86][mem-fold] Remove redundant variable IsAligned, NFCI
Shengchen Kan [Thu, 6 Apr 2023 09:11:30 +0000 (17:11 +0800)]
[X86][NFC] Fix for warning C4334: '<<': result of 32-bit shift implicitly converted to 64 bits
Dávid Bolvanský [Thu, 6 Apr 2023 09:06:36 +0000 (11:06 +0200)]
[Inliner] Added test with nonnull callsite attribute
Nikita Popov [Thu, 6 Apr 2023 08:53:46 +0000 (10:53 +0200)]
[FunctionAttrs] Add more nounwind tests (NFC)
Test variations where catch/filter catch all exceptions.
David Sherwood [Wed, 29 Mar 2023 12:22:09 +0000 (12:22 +0000)]
[LoopVectorize] Fix zext/sext cost calculations when types are shrunk
In getInstructionCost if we know a zext/sext is going to be shrunk
we should only be changing the destination type, and leave the
source type unchanged. For example, we may change a zext from
zext <16 x i8> %a to <16 x i32>
to
zext <16 x i8> %a to <16 x i16>
However, we were previously calculating the cost for doing
zext <16 x i16> %a to <16 x i16>
which is incorrect.
Differential Revision: https://reviews.llvm.org/D147152
Timm Bäder [Fri, 24 Mar 2023 07:33:59 +0000 (08:33 +0100)]
[clang][Interp] Fix zero-initializing of floating types
Differential Revision: https://reviews.llvm.org/D146788
Nikita Popov [Thu, 6 Apr 2023 08:41:10 +0000 (10:41 +0200)]
[FunctionAttrs] Add additional nounwind inference tests (NFC)
For PR61945.
Timm Bäder [Mon, 27 Mar 2023 13:03:01 +0000 (15:03 +0200)]
[clang][Interp][NFC] Context: Add getFloatSemantics()
We use this quite a bit, so add some convenience API for it.
Shengchen Kan [Thu, 6 Apr 2023 08:36:01 +0000 (16:36 +0800)]
[X86][mem-fold] Simplify the logic and correct the comments for TB_ALIGN, NFCI
Timm Bäder [Thu, 23 Mar 2023 14:37:09 +0000 (15:37 +0100)]
[clang][Interp][NFC] Call emit*Ptr directly
Instead of the version that uses a switch statement to figure this out.
luxufan [Thu, 6 Apr 2023 07:07:15 +0000 (15:07 +0800)]
[GVNHoist][NFC] Regenerate test case.
Martin Storsjö [Wed, 5 Apr 2023 21:05:12 +0000 (21:05 +0000)]
[compiler-rt] [test] Only pass -incremental:no to the linker for MSVC/clang-cl
The target_is_msvc variable in lit.cfg.py matches a similar pattern
used in the asan lit.cfg.py.
Differential Revision: https://reviews.llvm.org/D147664
Martin Storsjö [Fri, 31 Mar 2023 15:23:57 +0000 (15:23 +0000)]
[compiler-rt] [test] [fuzzer] Don't pass msvc/clang-cl specific flags to mingw tools
This fixes building the tests so that the tests can start
executing (even if there still are lots of failures).
Differential Revision: https://reviews.llvm.org/D147648
Martin Storsjö [Thu, 30 Mar 2023 09:35:08 +0000 (09:35 +0000)]
[compiler-rt] Create the umbrella check-compiler-rt test target in non-standalone builds too
I don't see why we can't have this target when built as a project alongside
llvm; especially in such build configs, it's useful to have one single target
for running all tests (in standalone builds, check-all does the same too),
Keep the creation of the check-all target only for standalone builds.
Differential Revision: https://reviews.llvm.org/D147646
Martin Storsjö [Wed, 29 Mar 2023 21:36:51 +0000 (00:36 +0300)]
[libunwind] [test] Add a mingw specific test config file
This matches how it is done for libcxx and libcxxabi.
Differential Revision: https://reviews.llvm.org/D147633
Martin Storsjö [Wed, 5 Apr 2023 07:18:38 +0000 (10:18 +0300)]
[libunwind] Fflush stderr after each log message
In most configs, stderr is line buffered by default, but in some
cases on Windows (running in git bash, or running in Wine) stderr
can end up fully buffered.
See
2ec75a0869ab01fa9caf310e8a31eb7716182d30 for a similar change
for the output from lit itself.
This has no effect on libunwind when the log messages aren't enabled
via the environment variables.
Differential Revision: https://reviews.llvm.org/D147632
Martin Storsjö [Wed, 5 Apr 2023 07:56:42 +0000 (10:56 +0300)]
[libunwind] Fix a typo in a debug log message. NFC.
This typo (unw_step instead of unw_get_proc_info) has been around since
the initial public commit of libunwind.
Differential Revision: https://reviews.llvm.org/D147631
Martin Storsjö [Fri, 27 Aug 2021 11:35:02 +0000 (11:35 +0000)]
[libcxxabi, libunwind] [test] Quote the python path properly for LIB*_EXECUTOR
This is the same as
c218c80c730a14a1cbcebd588b18220a879702c6,
but for libcxxabi and libunwind.
This fixes running tests on Windows with Python installed in
e.g. "C:\Program Files\Python38".
Differential Revision: https://reviews.llvm.org/D147629
Nikita Popov [Thu, 6 Apr 2023 07:48:39 +0000 (09:48 +0200)]
[InstCombine] Remove addrspacecast bitcast extraction fold (NFC)
This is not relevant for opaque pointers, and as such no longer
necessary.
Bjorn Pettersson [Tue, 28 Mar 2023 16:07:52 +0000 (18:07 +0200)]
[SimpleLoopUnswitch] Fix SCEV invalidation issue
This patch is making sure that we use getTopMostExitingLoop when
finding out which loops to forget, when dealing with
unswitchNontrivialInvariants and unswitchTrivialSwitch. It seems
to at least be needed for unswitchNontrivialInvariants as detected
by the included test case.
Note that unswitchTrivialBranch already used getTopMostExitingLoop.
This was done in commit
4a9cde5a791cd49b96993e6. The commit
message in that commit says "If the patch makes sense, I will also
update those places to a similar approach ...", referring to these
functions mentioned above. As far as I can tell that never happened,
but this is an attempt to finally fix that.
Fixes https://github.com/llvm/llvm-project/issues/61080
Differential Revision: https://reviews.llvm.org/D147058
Nikita Popov [Thu, 6 Apr 2023 07:26:15 +0000 (09:26 +0200)]
[InstCombine] Remove various checks for opaque pointers (NFC)
All pointers are opaque now, so these are no longer necessary.
Timm Bäder [Wed, 11 Jan 2023 14:59:29 +0000 (15:59 +0100)]
[clang][Interp] Record initialization via conditional operator
Differential Revision: https://reviews.llvm.org/D141497
Nikita Popov [Thu, 6 Apr 2023 07:30:42 +0000 (09:30 +0200)]
[LoopVectorize] Convert some tests to opaque pointers (NFC)
Guillaume Chatelet [Thu, 6 Apr 2023 07:33:41 +0000 (07:33 +0000)]
[libc] Remove dead code
Ben Shi [Mon, 9 Jan 2023 08:15:41 +0000 (16:15 +0800)]
[AVR] Fix incorrect expansion of pseudo instructions LPMWRdZ/ELPMWRdZ
The 'ELPM' instruction has three forms:
--------------------------
| form | feature |
| ----------- | -------- |
| ELPM | hasELPM |
| ELPM Rd, Z | hasELPMX |
| ELPM Rd, Z+ | hasELPMX |
--------------------------
The second form is always used in the expansion of pseudo instructions
LPMWRdZ/ELPMWRdZ. But for devices without ELPMX and with only ELPM,
only the first form can be used.
Reviewed By: aykevl, Miss_Grape
Differential Revision: https://reviews.llvm.org/D141264
Martin Braenne [Wed, 5 Apr 2023 12:32:13 +0000 (12:32 +0000)]
[clang][dataflow] Use `isRecordType()` where appropriate.
This is less verbose than checking for class, struct, and union individually,
and I believe it's also more efficient (not that that should be the overriding
concern).
Reviewed By: sammccall, xazax.hun
Differential Revision: https://reviews.llvm.org/D147603
Nikita Popov [Thu, 6 Apr 2023 07:14:49 +0000 (09:14 +0200)]
[InstCombine] Remove GEP of bitcast folds (NFC)
These only support typed pointers, and as such are no longer
relevant.
Chuanqi Xu [Thu, 6 Apr 2023 07:10:24 +0000 (15:10 +0800)]
[C++20] [Coroutines] Handle function-try-block in SemaCoroutine
In https://reviews.llvm.org/D146758, we handled the rare case that the
coroutine has a function-try-block. But it will be better to handle it
in the Sema part. This patch handles the preprocess.
Nikita Popov [Wed, 5 Apr 2023 14:40:50 +0000 (16:40 +0200)]
[InstCombine] Remove visitGEPOfBitcast() fold (NFC)
This does not apply to opaque pointers, and as such is no longer
necessary.
Martin Braenne [Wed, 5 Apr 2023 11:20:33 +0000 (11:20 +0000)]
[clang][dataflow] Eliminate code duplication in Environment::createValueUnlessSelfReferential().
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D147601
Noah Goldstein [Thu, 6 Apr 2023 06:11:30 +0000 (01:11 -0500)]
[X86] Add InstFixup for masked `unpck{l|h}pd` -> masked `shufpd`
This is a follow up D147507 which removed the prior transformation to
`shufps` which was incorrect as the mask was for 64-bit double
elements, not 32-bit float elements. Using `shufpd` for the
replacement, however, preserves the mask semantics and has the same
benefits as `shufps`.
Reviewed By: pengfei, RKSimon
Differential Revision: https://reviews.llvm.org/D147541
LLVM GN Syncbot [Thu, 6 Apr 2023 06:23:53 +0000 (06:23 +0000)]
[gn build] Port
8d7c865c2e22
Shoaib Meenai [Thu, 6 Apr 2023 06:22:28 +0000 (23:22 -0700)]
[runtimes] Fix typo from
e787ef86634553131f8e47bd8eaaede987cf20e2
The variable name was incorrect, which was breaking runtimes builds.
Kristof Beyls [Tue, 7 Mar 2023 09:56:20 +0000 (10:56 +0100)]
[docs] Also mention Discord on Contributing.rst page
Differential Revision: https://reviews.llvm.org/D145480
Piyou Chen [Mon, 6 Feb 2023 03:37:13 +0000 (19:37 -0800)]
[RISCV] Support __builtin_nontemporal_load/store by MachineMemOperand
Differential Revision: https://reviews.llvm.org/D143361
Shengchen Kan [Thu, 6 Apr 2023 05:49:15 +0000 (13:49 +0800)]
[X86][InstCombine] Avoid -Wparentheses warnings introduced in D145220, NFCI
Jessica Del [Thu, 16 Mar 2023 16:17:20 +0000 (17:17 +0100)]
[AMDGPU][GISel] Add inverse ballot intrinsic
The inverse ballot intrinsic takes in a boolean mask for all lanes and
returns the boolean for the current lane. See SPIR-V's
`subgroupInverseBallot()` in the [[ https://github.com/KhronosGroup/GLSL/blob/master/extensions/khr/GL_KHR_shader_subgroup.txt | GL_KHR_shader_subgroup extension ]].
This allows decision making via branch and select instructions with a manually
manipulated mask.
Implemented in GlobalISel and SelectionDAG, since currently both are supported.
The SelectionDAG required pseudo instructions to use the custom inserter.
The boolean mask needs to be uniform for all lanes.
Therefore we expect SGPR input. In case the source is in a
VGPR, we insert one or more `v_readfirstlane` instructions.
Reviewed By: nhaehnle
Differential Revision: https://reviews.llvm.org/D146287
Shengchen Kan [Thu, 6 Apr 2023 05:32:42 +0000 (13:32 +0800)]
[X86][mem-fold] Refine the code in X86FoldTablesEmitter.cpp, NFCI
1. Construct RecognizableInstrBase for Mem Inst only once in IsMatch
2. Correct the comments
3. Use std::make_tuple to simplify the compare
Valery Pykhtin [Tue, 14 Mar 2023 15:30:46 +0000 (16:30 +0100)]
[CodeGen] Speedup stack slot sharing during stack coloring (interval overlapping test).
AMDGPU code with enabled address sanitizer generates tons of stack objects (> 200000 in my testcase) and
takes forever to compile due to the time spent on stack slot sharing.
While LiveRange::overlaps method has logarithmic complexity on the number of segments in the involved
liveranges the problem is that when a new interval is assigned to a used color it's tested against
overlapping every other assigned interval for that color.
Instead I decided to join all assigned intervals for a color into a single interval and this allows to
have logarithmic complexity on the number of segments for the joined interval.
This patch reduced time spent on stack slot coloring pass from 628 to 3 seconds on my testcase.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D146057
Matthias Springer [Thu, 6 Apr 2023 05:17:54 +0000 (14:17 +0900)]
[mlir][bufferization] Add bufferization.eliminate_empty_tensors transform op
Differential Revision: https://reviews.llvm.org/D144401
Freddy Ye [Thu, 6 Apr 2023 02:15:11 +0000 (10:15 +0800)]
[X86] Add AMX_COMPLEX to Graniterapids
This patch also rename __AMXCOMPLEX__ to __AMX_COMPLEX__
Reviewed By: skan, xiangzhangllvm
Differential Revision: https://reviews.llvm.org/D147525
Matthias Springer [Thu, 6 Apr 2023 04:21:00 +0000 (13:21 +0900)]
[mlir] Use BaseMemRefType for ranked/unranked memrefs
This makes `RankedOrUnrankedMemRefOf` consistent with `TensorOf`.
Differential Revision: https://reviews.llvm.org/D147160
Matthias Springer [Thu, 6 Apr 2023 04:20:41 +0000 (13:20 +0900)]
[mlir] Use RankedTensorType when rank is required
`RankedTensorOf` and `TensorRankOf` (in Tablegen files) now generate code that uses `RankedTensorType` instead of `TensorType`. This gives us more accurate type information (e.g., when calling `op.getType()`).
Also use restrict tensor.expand_shape/tensor.collapse_shape/tensor.pad to ranked tensors. Only cast ops should deal with unranked tensors.
Also improves a few places in the code base (e.g., Toy tutorial) where a ranked tensor is assumed (e.g., because `getRank` is called) but a `TensorType` is currently used: cast to `RankedTensorType` directly, so that the assertion is triggered directly at the cast.
Differential Revision: https://reviews.llvm.org/D147149
Shengchen Kan [Thu, 6 Apr 2023 04:04:50 +0000 (12:04 +0800)]
[X86][mem-fold] Refine the code in X86FoldTablesEmitter.cpp, NFCI
1. Avoid vulnerable assumption: the enum of reg/memory format are continous
2. Remove redundant inline keyword
3. Replace getValueFromBitsInit with byteFromBitsInit b/c both Form and
Opcode can be represented in 1 byte
Matthias Springer [Thu, 6 Apr 2023 03:58:46 +0000 (12:58 +0900)]
[mlir][bufferize] Simplify one_shot_bufferize transform op
Restrict the op to functions and modules. Such ops are modified in-place. The transform now consumes the handle and produces a new handle. The `target_is_module` attribute is no longer needed because a result handle is produced in either case.
Differential Revision: https://reviews.llvm.org/D147446
Matthias Springer [Thu, 6 Apr 2023 02:51:03 +0000 (11:51 +0900)]
[mlir][linalg] Use TrackingListener for VectorizeOp
This is needed so that the transform dialect interpreter is notified about deleted payload ops.
Differential Revision: https://reviews.llvm.org/D147430
Philip Reames [Thu, 6 Apr 2023 01:12:47 +0000 (18:12 -0700)]
[LAA] Group implementation of stride speculation into one file [nfc]
These utilities are only used in one place, so move them there and make them static.
Chuanqi Xu [Thu, 6 Apr 2023 03:01:58 +0000 (11:01 +0800)]
Recommit [C++20] [Modules] Don't load declaration eagerly for named modules
Close https://github.com/llvm/llvm-project/issues/61064.
The root cause of the issue is that we will deserilize some declarations
eagerly when reading the BMI. However, many declarations in the BMI are
not necessary for the importer. So it wastes a lot of time.
The new commit handles the MSVC's extension #pragma comment and #pragma
detect_mismatch to follow MSVC's behavior. See pr61783 for details.
Alexey Lapshin [Thu, 6 Apr 2023 02:55:26 +0000 (04:55 +0200)]
Revert "[ADT][ConcurrentHashTable] Change thread_local to LLVM_THREAD_LOCAL inside unit test."
This reverts commit
9ef701318b4590e1fa8bb61906d5957d7b1f6a2f.
Craig Topper [Thu, 6 Apr 2023 02:28:05 +0000 (19:28 -0700)]
[RISCV] Add vector load/store intrinsics to getTgtMemIntrinsic.
This constructs a proper memory operand for these intrinsics.
Segment load/store will be added in a separate patch.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/D147119
Maryam Moghadas [Thu, 6 Apr 2023 01:56:19 +0000 (20:56 -0500)]
[PowerPC] Update pr61315.ll to address D146632 failure
This patch is to update pr61315.ll what was needed as part of
D146632 and caused build failures.
Reviewed By: stefanp
Differential Revision: https://reviews.llvm.org/D147675
Yeting Kuo [Tue, 28 Mar 2023 13:57:36 +0000 (21:57 +0800)]
[RISCV] Support vector type strict_[su]int_to_fp and strict_fp_to_[su]int.
Also the patch loose the fixed vector contraint in llvm/lib/IR/Verifier.cpp.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D147380
Matthias Springer [Thu, 6 Apr 2023 01:46:48 +0000 (10:46 +0900)]
[mlir][arith] Add ValueBoundsOpInterface impls
These ops are useful for unit testing. (They do not fold/canonicalize with affine.apply etc.)
Differential Revision: https://reviews.llvm.org/D145696
Craig Topper [Thu, 6 Apr 2023 01:52:28 +0000 (18:52 -0700)]
[SelectionDAG] Expand VP SDNodes by default.
Differential Revision: https://reviews.llvm.org/D147643
Matthias Springer [Thu, 6 Apr 2023 01:35:12 +0000 (10:35 +0900)]
[mlir][memref] Add ValueBoundsOpInterface impls
Differential Revision: https://reviews.llvm.org/D145695
Matthias Springer [Thu, 6 Apr 2023 01:15:11 +0000 (10:15 +0900)]
[mlir][linalg] ValueBoundsOpInterface: Add affine.apply op
Differential Revision: https://reviews.llvm.org/D145694
Maryam Moghadas [Wed, 22 Mar 2023 14:14:00 +0000 (09:14 -0500)]
[PowerPC] Fix the xxperm swap requirements
This patch is to fix the xxperm vector operand swap condition so that the
single-use operand is in V2 to prevent copying, it also fixes the subtarget
condition to exploit the xpperm.
Reviewed By: stefanp
Differential Revision: https://reviews.llvm.org/D146632
Matthias Springer [Thu, 6 Apr 2023 00:41:15 +0000 (02:41 +0200)]
[mlir][Interfaces] Add ValueBoundsOpInterface
Ops can implement this interface to specify lower/upper bounds for their result values and block arguments. Bounds can be specified for:
* Index-type values
* Dimension sizes of shapes values
The bounds are added to a constraint set. Users can query this constraint set to compute bounds wrt. to a user-specified set of values. Only EQ bounds are supported at the moment.
This revision also contains interface implementations for various tensor dialect ops, which illustrates how to implement this interface.
Differential Revision: https://reviews.llvm.org/D145681
Philip Reames [Thu, 6 Apr 2023 00:41:05 +0000 (17:41 -0700)]
[RISCV][CostModel] Add tests for first class aggregate loads and stores
This adds coverage for the code change in
27b6ddbf6.
Philip Reames [Thu, 6 Apr 2023 00:25:12 +0000 (17:25 -0700)]
[RISCV] Speculative fix for issue reported against D147470 post commit
Yaxun (Sam) Liu [Wed, 5 Apr 2023 23:38:37 +0000 (19:38 -0400)]
[Driver] Fix rpath for compiler-rt
The compiler-rt library path can be either {resource_dir}/lib/{triple}
or {resource_dir}/lib/{OS}/{arch} depending on whether
LLVM_ENABLE_PER_TARGET_RUNTIME_DIR_default is ON or OFF.
Currently, the rpath added by -rtlib-add-rpath only adds
the latter. This patch checks both and adds the one that exists.
Reviewed by: Fangrui Song
Differential Revision: https://reviews.llvm.org/D146686
Jim Ingham [Thu, 6 Apr 2023 00:10:42 +0000 (17:10 -0700)]
Fix the check in StopInfoBreakpoint for "are we currently running an expression"
We were checking "WasTheLastResumeForUserExpression" but that returns true even
if that expression was completed, provided we haven't run again. This uses a
better check.
This is actually fairly hard to trigger. It happens the first time you hit an
objc_exception_throw breakpoint and invoke that frame recognizer for that. But
I couldn't trigger it using a Python based frame recognizer. So I wrote a test
for the objc_exception_throw_breakpoint recognizer which should have been there
anyway... It fails (the target auto-continues) w/o this patch and succeeds with
it.
Differential Revision: https://reviews.llvm.org/D147587
Nico Weber [Thu, 6 Apr 2023 00:13:57 +0000 (20:13 -0400)]
Chia-hung Duan [Thu, 6 Apr 2023 00:06:34 +0000 (00:06 +0000)]
Revert "[scudo] Switch to use MemMap in tests"
This reverts commit
4151477021170d8937f8fc820187d5934eb93c7d.
Chia-hung Duan [Wed, 5 Apr 2023 22:38:32 +0000 (22:38 +0000)]
[scudo] Fix __require_constant_initialization__ on Android
Differential Revision: https://reviews.llvm.org/D147667
Vitaly Buka [Wed, 5 Apr 2023 23:16:49 +0000 (16:16 -0700)]
[lsan] Rename IgnoreObjectLocked into IgnoreObject
We don't lock allocator for this call.
Vitaly Buka [Wed, 5 Apr 2023 23:12:04 +0000 (16:12 -0700)]
[hwasan] Use GetBlockBegin instead of GetBlockBeginFastLocked
Asan and lsan use non-locked version as well.
IgnoreObjectLocked name is missleading.
Aart Bik [Tue, 4 Apr 2023 22:14:32 +0000 (15:14 -0700)]
[mlir][sparse][gpu] end-to-end example with sparse GPU pipeline
Reviewed By: Peiming
Differential Revision: https://reviews.llvm.org/D147576
Ilia Kuklin [Wed, 5 Apr 2023 22:49:53 +0000 (15:49 -0700)]
[MSP430] Add CFI instructions for MSP430.
Implement emission of DWARF CFI instructions for MSP430. This includes descriptions of stack frame layout and location of callee-saved registers that could be used for backtracing.
Differential Revision: https://reviews.llvm.org/D146966
Dávid Bolvanský [Wed, 5 Apr 2023 22:49:55 +0000 (00:49 +0200)]
[Tests] More InlineCost tests with attributes only on callsites
Bill Wendling [Tue, 4 Apr 2023 23:17:52 +0000 (16:17 -0700)]
[Clang][NFC] Refactor "Designators" to be more similar
This makes the two interfaces for designators more similar so that it's
easier to merge them together in a future refactoring.
Differential Revision: https://reviews.llvm.org/D147580
Richard Smith [Wed, 5 Apr 2023 21:28:57 +0000 (14:28 -0700)]
Lazily deserialize default member initializers.
This is important to break deserialization cycles, where a lambda in a
default member initializer can refer to the field as its context
declaration, and the initializer of the field can refer back to the
lambda.
This is a follow-up to
bc73ef0031b5, which applied the same fix to
variable declarations for the same reason.
Matt Arsenault [Fri, 3 Mar 2023 17:11:58 +0000 (13:11 -0400)]
RegAllocFast: Fix dropping subreg indexes on unassigned subreg defs
This was assuming all register operands were assigned to physical registers.
This should ignore the operands which weren't assigned in this run.
Fixes #61134
Aart Bik [Wed, 5 Apr 2023 19:57:23 +0000 (12:57 -0700)]
[mlir][sparse][gpu] sparse GPU code generator pipeline setup
Reviewed By: Peiming
Differential Revision: https://reviews.llvm.org/D147571