tests/gem_reset_stats: Use macros a bit more

Just demonstration really.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

gitignore: Ignore gem_reset_stats

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

tests: More bdw fallout

This time misplaced parens.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

tests: More bdw fallout

tests/pm_pc8: add --quick option

Not meant to be used on the QA cycles, but by developers who just want
to quickly check things while doing development. Reduces the total
time from 27 minutes to 6 minutes on my machine.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: add some more stress tests

I was suspecting some problems just happen if we have a bigger wait
than the current ones we have, so add a new WAIT_EXTRA flag just to
see if the problems really happen. Also, add support for the wait
flags on the gem stress tests, and use them.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: remove compare_registers subtest

It's not executed by default, and it's completely relying on Haswell
registers and on internal knowledge of how the Kernel is supposed to
work. Since we plan to test generic runtime PM on all supported
platforms, maintaining this test so it works on all those platforms
will be a pain. We already have some ideas on how to verify registers
that must stay at specific values from inside the Kernel, so let's
kill this test and wait until the proper Kernel code gets merged.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: rename some variables

Since we're not only testing PC8 anymore, we're resting "PM", rename
some variables from something_pc8 to something_suspend, just to make
it not-so-confusing.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: fix debugfs-forcewake-user for PC8-only cases

We don't wake up from forcewake when we only have PC8, but not runtime
PM, so make the test pass.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: check for PC8 status, not residency in most cases

If you really want to reach the PC8+ states and consequently get PC8+
residency, you need to properly configure all the devices on your
machine to allow PC8+, not just graphics. The current code for PC8
checks for PC8+ residency everywhere, so if you have a machine that's
not properly configured you'll fail every test. OTOH, even if your
machine can't reach the PC8+ states, it will still try to enable and
disable PC8, so we can try to test the feature even if we're never
really reaching the PC8+ states. Also, if your machine does allow PC8+
residencies, but some other driver/program decides to keep the machine
busy while you're running the test suite, you'll also get failures
which you shouldn't be getting.

Based on the arguments above, I'm changing most of the subtests to
only check for the PC8 status reported by sysfs (enabled/disabled),
not check real PC8+ residency. I also added two tests that should
check for PC8+ residency, so we will stil be able to diagnose badly
configured machines.

As a bonus, we won't sleep for full 5 seconds every time we expect PC8
to be disabled: we'll just read i915_pc8_status, which quickly gives
the result we're expecting. Considering how many modeset stress
subtests we have in the program, we'll save a *lot* of time with this
change.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: add support for runtime PM

We try to detect if we have runtime PM or if we just have PC8. In case
there's runtime PM, the functions that wait will wait for the runtime
PM status reported by the sysfs file instead of waiting for PC8
residencies to move.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/gem_cs_prefetch: Fix bdw damage

v2: Fix more.

Cc: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

lib: adjust oom_score

This way the igt test will always be killed first (hopefully),
preventing mayhem when one of the memory thrashing tests treatens to
take down the entire system.

To avoid any burden on test writers we adjust the oom score on
drm_open, any of the fork helpers and subtest init. That should cover
everything.

v2: Fix it up.

Cc: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

NEWS: Make testing requirements official

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

tests/pm_pc8: Fix invalid pointer-to-integer casting

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71592
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

gem_cs_prefetch: more gen8 integration fallout

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

gem_evict_*: Fix batch lengths, broken on gen8 integration

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests: add gem_reset_stats

v2: check the ioctl pad and flag parameters

Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

NEWS: Android.mk updates!

build: New Android makefiles

These form the basis of the new Android build system.

v2: As suggested by Daniel Vetter, modify compilation flags to
not error on return-type and not warn on sign-compare.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

lib/igt_display: workaround a name conflict in Android

PLANE_A/PLANE_B are used by libdrm's i915_drm.h in Android.

v2: Changes suggested by Daniel Vetter and Damien Lespiau:
- Pimp up comment with a FIXME.
- Reword commit message.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

lib/drmtest: Get the correct basename() under Android

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

build: Fix assorted compilation warnings

As these files are compiled for every test, the warnings cluttered
the Android build completely.

v2: As suggested by Daniel Vetter, drop some of the fixes and fix
the compilation flags instead.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

tests/gem_vmap_blits: Finish extracting gem_read

It seems something escaped this commit:

commit bd5cf9a07d17ce91dfaa3aa12d3f2c93815f0489
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Tue Jan 10 15:37:53 2012 +0100

    lib/drmtest: extract gem_read

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

tests/drm_get_client_auth: In Android, use gettid() instead of syscall(SYS_gettid)

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

rendercopy: Remove rendercopy.c

Move scratch_buf_write_to_png() to its only user, gem_render_copy.c.
This makes the cairo dependencies easier to handle from the Android
perspective, but if there is a good reason why this file exists I can
try to handle it differently.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

lib: Move kms stuff from drmtest.c over to igt_kms.c

This makes cairo dependencies easier to handle. Otherwise, we
would have to litter drmtest all over with "#ifndef ANDROID"

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
[danvet: Add missing _GNU_SOURCE to igt_kms.c and missing include to
intel_sprite_on.c]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

build: Move logic to tests/Makefile.am and away from Makefile.sources

Makefile.sources is just a listing with all the sources, and the logic
to use these sources goes into either Makefile.am (automake) or
Android.mk (make).

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

build: Fix missing "\" in tests/Makefile.sources

Noticed by Damien Lespiau.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

build: list all test/tool/lib source files in their own Makefile.sources

In this way, all source files are listed in Makefile.sources and included
from Makefile.am, thus enabling the reuse from Android makefiles.

Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

gitignore: Ignore the newly introduced pm_psr

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

gem_storedw_batches_loop: Fix for real this time

Last patch to fix the breakage when adding gen8 had bugs in the reloc
offset, and size field.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/drv_suspend: Replace "&> /dev/null" with "> /dev/null 2>&1"

Some shells do not understand "&>". For instance, my Ubuntu 12.04
machine has /bin/sh pointing to dash, which makes a mess out of
"&>" (to the point that the helper processes cannot be killed).

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

gem_linear_blits: Fix blit command length

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/pm_pc8: reorganize main function

Split the tests into categories. There are too many tests, it's
getting harder to locate the ones we need.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: add some GEM tests

These are more complete tests than the previous test_batch() one. We
test CPU/GTT mmaps, pread/pwrite and batch buffers.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: remove "batch" and "stress-test" subtests

They use a bad BLT command and don't check its result. The next patch
will add proper GEM tests that contain commands that work and code
that checks if the command is really working.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: add debugfs/sysfs tests

They don't really exercise any particular special code path for PC8,
but the runtime D3 code will touch these code paths, so we'll need the
tests.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: add modeset-lpsp-stress

It's the only one we were missing form the possible combinations.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: extract i2c_subtest_check_environment

Just to make it more organized and consistent with the other tests.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: return void on test_i2c

And do the assertion in the code line that actually verifies the
condition we need. Makes it easier to debug failed tests.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

tests/pm_pc8: move teardown_environment next to setup_environment

So I can add/remove/verify code more easily.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

gem_cpu_reloc: Fixed botched BLIT conversion

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

gem_evict_alignment: Skip on GEN8 for now

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

gem_evict_everything: Fix broken blit generalization

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

Revert "tests/gem_ctx_bad_exec: Check the errno, too"

This reverts commit 4a6a59f314f61e1e4156bb13a65efabee31a76fc.

gem_storedw_batches_loop: Update for gen8

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/gem_overflow_reloc: Rework subtest enumeration

Subtest names must be stable across all platforms for easier tracking.
Hence move the gen8+ check into the subtests, using igt_require. This
will auto-skip the tests on platforms where a given test doesn't apply.

Also move the assignment of the relocation_type var outside of the
fixture block. Fixtures aren't run when enumerating subtests (so that
subtests can be enumerated on any platform, even without an intel gpu).

So gcc has indeed been right with it's "potentially uninitialized" var
warning after all ...

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

tests/gem_reloc_overflow: Polish after Rafael's patch

- use void* for generic pointer.
- Fix const usage.
- Shut up gcc about uninitizialized var.
- Be paranoid about the moved tests and make double-sure that the
  batch would indeed work safe for the condition being tested.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

tests/gem_reloc_overflow: Add gen8+ specifc tests

Broadwell introduces 64-bit relocation addresses which add extra
corner cases. The test was refactored slightly with some tests that
were in the source offset tests were moved to the more generic reloc
test area. The source offset tests are now gen aware and called twice to
test both cpu & gtt relocation paths. In addition 2 new gen8+ test
were added to the test:

* Relocation straddling page a page
* Insufficient space for a relocation at the end of the buffer.

Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
Conflicts:
tests/gem_reloc_overflow.c
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

NEWS: Remove spurious -

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

NEWS: Restore the 1.4 release info

I suck...

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

NEWS: Broadwell will be in 1.6, not 1.5

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

NEWS: Broadwell

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

list-workarounds/bdw: Add Broadwell to the list of valid platorms

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

quick_dump/bdw: support Broadwell in device auto-detection

This patch exposes is_broadwell() to python, to be used by device
auto-detection.

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

quick_dump/bdw: dump audio debug registers for Haswell and Broadwell

A new file "audio_debug_haswell_plus.txt" is created to define audio
debug registers for Haswell and its successors like Broadwell.

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>

quick_dump/bdw: dump audio configuration registers for Haswell and Broadwell

A new file "audio_config_haswell_plus.txt" is created to define audio
configuration registers for Haswell and its successors like Broadwell.

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>

quick_dump/bdw: Just basic stuff for now

Just the interrupt registers for now.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

intel_audio_dump/bdw: dump audio M CTS readback register

This debug register provides test feedback of the audio M values (DP)
or CTS values (HDMI)

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>

intel_audio_dump/bdw: dump audio DP and DIP FIFO debug status

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>

intel_audio_dump/bdw: dump audio chicken bit register

This patch dumps this debug register and parse the data for Broadwell.

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>

intel_audio_dump/bdw: dump debug registers for audio immediate commands

This patch dumps debug registers to check audio immediate command, response
and status.

The audio driver will fall back into immediate command mode if normal
communication between controller and codec is dead.

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
[Ben: Small printf changes to remove compiler warning]
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

intel_audio_dump/bdw: add support for Broadwell

This patch renames Haswell audio dump function and reuses it for Broadwell.

Since Haswell, audio registers are moved from the south display engine to the
north display engine. And the audio register layout is same for Haswell and its
successors like Broadwell.

Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

rendercopy/bdw: Add AUB annotations for states

This will hopefully help debugging things.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>

rendercopy/bdw: Fix the original implementation

For posterity, I've squashed these commits against Damien's request.

rendercopy/gen8: Fix the include guards

rendercopy/gen8: Update the 3DSTATE_MULTISAMPLE opcode

The opcode has changed in BDW.

rendercopy/gen8: Add the VF_TOPOLOGY state

The primitive type has moved out of the 3DPRIMITIVE to its own state,
VF_TOPOLOGY.

rendercopy/gen8: Fixup 3STATE_PS

Update the state to the latest BSpec, in particular the thread count was
using a wrong shift and we were missing kernel2 offset.

rendercopy/gen8: Update 3DSTATE_BASE_ADDRESS

This state has seen its fields moved around a bit, follow the BSpec.

rendercopy/gen8: Allocate 64 VUEs

The simulator screams at us if we try to allocate less than that.

rendercopy/gen8: Surface states have to be 64 bytes a aligned

rendercopy/gen8: Vertical/horizontal align 2 does not exist any more

So set them to 4. This should not matter with rendercopy (which is not
using compressed textures), but it makes the simulator moan.

rendercopy/gen8: Make sure the vertex buffer is 8 bytes aligned

rendercopy/gen8: Adjust 3DSTATE_VERTEX_BUFFERS for gen8

The address of the buffer is now on 48 bits. Also the size was computed
as offset + size where the field is really the size of the buffer
itself, not the end address.

rendercopy/gen8: Update the SF/SBE states for gen8

gen8 has a few changes around those states and a new ones RASTER and
SBE_SWIZ.

rendercopy/gen8: Add the PS_EXTRA and PS_BLEND states

rendercopy/gen8: Fix building with DEBUG_RENDERCOPY defined

The forward declaration was missing the final ';'. Let's move the whole
function at the top instead.

rendercopy/gen8: Update the PS and CONSTANT_PS states

rendercopy/gen8: Fix the red channel selection

Make it output red.

rendercopy/gen8: Update the write -1 shader

With the latest assembler changes from Haihao.

rendercopy/gen8: Remove blit.g8a

There is no diff between this file and blig.g7a. Remove it.

rendercopy/gen8: Fix the surface relocation offset

The surface base address is now at dwords 8/9 so the relocation has to
mirror the change.

rendercopy/gen8: Add the VF_INSTANCING state

Should work without, but doesn't hurt to add it.

rendercopy/gen8: Set the Attribule enable field in PS_EXTRA

When the SF is set up to output some attributes, the pixel shader also
have to be told there's attributes to care about.

rendercopy/gen8: Set the force bits to read URB offset/length

If we want to override the URB offset/length in the SBE state itself, we
need to set the force bits on (new in gen8)

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

rendercopy/bdw: Add gen8_render.h to the file list

So it gets distributed with make dist.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>

rendercopy/bdw: Initial gen8 rendercopy

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>

assembler/bdw: Add the DATA_PORT_CACHE1 shared function for Gen8+

This is required to send some messages to data port in GPU shader.
For example: media_block_write message.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Add the support of align1 register-indirect addressing mode on Gen8

Otherwise it can't compile the following GPU shader that uses the
register-indirect addressing mode.
  >add.sat (16) r[a0.5,0]<1>:uw     r[a0.5,0]<16;16,1>:uw  0x0080:uw
  >add.sat (16) r[a0.5,32]<1>:uw    r[a0.5,32]<16;16,1>:uw 0x0080:uw

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: SEND instruction

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Small cleanup

This was originally part of:

commit 62298329350b965e4bbfc558e5a4b1b3646742ea
Author: Xiang, Haihao <haihao.xiang@intel.com>
Date:   Wed Aug 14 14:21:16 2013 -0700

    assembler: error for the wrong syntax of SEND instruction on GEN6+

I merged that patch separately, but this tiny hunk was leftover. In
order to not muck in changing too much history, I am leaving this as a
discrete patch, but with the changed commit message

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Check & Refinement Engine message

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Video Motion Estimation(VME) message

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Thread Spawn message

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Data port message

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Set thread switch for multiple branch instructions

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Set jip/uip offsets used by flow control instructions

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Disable mask control for advanced mode

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Set math function

Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Use gen8_set_exec_size() to set the execution size

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Preliminary gen8 send & msgtarget support

Still some work needed there, but enough for rendercopy.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Add the start of a gen8 disassembler

Directly taken from Mesa.

v2 (Ben): Updated copyright

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Make the validation functions take a brw_program_instruction

This allows to use the same functions to validate operands on gen8 for
now.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Support some basic gen8 intructions

We should now support alu2 intructions with direct register addressing.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

assembler/bdw: Add gen8_instruction from mesa

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/bdw: Port storedw_loop_vebox to gen8

I chose not to implement this in the same way as Zhao Yakui because I
was lazy.

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/bdw: Port storedw_loop_blt to gen8

The code is from the storedw_loop_render.

v2 (by Ben): Flush on the correct ring

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/bdw: Port storedw_loop_bsd to gen8

The code is from the storedw_loop_render.

v2 (by Ben): Flush on the correct Ring

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/bdw: Port storedw_loop_render to bdw

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/bdw: pwrite_pread

support gen8 style blits

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/bdw: gem_linear_blits

support gen8 style blits

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/bdw: gem_pin

support gen8 style blits

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/bdw: gem_exec_blt

support gen8 style blits

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/bdw: gem_evict_*

support gen8 style blits

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/bdw: gem_cpu_reloc

support gen8 style blits

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

tests/bdw: gem_exec_faulting_reloc

support gen8 style blits

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

bdw: Update obvious missing blit support

This provides a macro that allows us to update all the arbitrary blit
commands we have stuck throughout the code. It assumes we don't actually
use 64b relocs (which is currently true). This also allows us to easily find
all the areas we need to update later when we really use the upper dword.

This block was done mostly with a sed job, and represents the easier
in test blit implementations.

v2 by Oscar: s/OUT_BATCH/BEGIN_BATCH in BLIT_COPY_BATCH_START

CC: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>

bdw: Add gen8 specific instdone bits

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>

bdw: Add gen8 to intel_gen()

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>