aco: replace MADs in isel with FMA on GFX10.3

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>

aco: disable SMEM stores on GFX10.3

These are removed in GFX10.3

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>

aco: update aco_opcodes.py for GFX10.3

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>

aco: implement subgroup shader_clock on GFX10.3

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>

aco: update vgpr_alloc_granule for GFX10.3

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>

aco: fix max_waves_per_simd on Polaris, VegaM and GFX10.3

fossil-db (Polaris):
Totals from 20263 (14.75% of 137414) affected shaders:
SGPRs: 871407 -> 871679 (+0.03%); split: -0.00%, +0.03%
VGPRs: 513828 -> 550028 (+7.05%); split: -1.68%, +8.72%
CodeSize: 18869680 -> 18828148 (-0.22%); split: -0.23%, +0.01%
MaxWaves: 162012 -> 162030 (+0.01%); split: +0.01%, -0.00%
Instrs: 3629172 -> 3618817 (-0.29%); split: -0.30%, +0.02%
Cycles: 15682244 -> 15638244 (-0.28%); split: -0.30%, +0.02%
VMEM: 10675942 -> 10673344 (-0.02%); split: +0.18%, -0.21%
SMEM: 1209717 -> 1206088 (-0.30%); split: +0.03%, -0.33%
VClause: 81780 -> 81227 (-0.68%); split: -0.73%, +0.06%
SClause: 231724 -> 231561 (-0.07%); split: -0.07%, +0.00%
Copies: 187126 -> 180831 (-3.36%); split: -3.62%, +0.26%
Branches: 26841 -> 26837 (-0.01%); split: -0.03%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>

aco: update bug workarounds for GFX10_3

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>

aco: don't create v_mad_f32 on GFX10.3

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>

aco: fix waitcnt insertion on GFX10.3

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5546>

panfrost: Implement EXT_multisampled_render_to_texture

Significantly helps WebGL performance with Chromium's OpenGL ES backend.
Also update docs/features.txt

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6161>

panfrost: Add MSAA mode selection field

This field enables MSAA, either writing samples to separate surfaces, to
a single large-bpp surface, or implicitly resolved and to a single
surface.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6161>

docs/features: Add GL_EXT_multisampled_render_to_texture

Currently only a6xx, panfrost added later in series.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6161>

radv: print warnings for famous RADV_PERFTEST options that no longer exist

RADV_PERFTEST=aco no longer exists, ACO is the default compiler.
RADV_PERFTEST=llvm is deprecated, use RADV_DEBUG=llvm instead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5662>

radeon/vcn: Corrected vp9 ref associated data incase of target->codec is NULL

This patch fixes the case where less number of reference surfaces created and destoyed
on need basis. The problem comes when we are refereing old assoiciated data for newly
created target buffer with same address. Here old target buffer destroyed as that
surface is no more used as reference for next frames and when we create a new surface
for the next frame to process we will get the surfaceid and same target address
of destroyed surface.

When new surface/surface->buffer/target ,target->codec is null as we cleared when we
destroy this surface, but per ref_mapping logic, it was taking null associated data
i.e.0 as curr_ref_idx. Hence total reference mapping table goes wrong with wrong data.
Beacuse of this, we have seen corrupted vp9 decoded frames.

Signed-off-by: SureshGuttula <suresh.guttula@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5452>

spirv: Propagate explicit layout only in types that need it

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5511>

lima: Fix lima_screen_query_dmabuf_modifiers()

Incorrect implementation has been found during code surfing.
v3d implementation used for reference.

Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Icenowy Zheng <icenowy@aosc.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6076>

tu: Implement VK_EXT_conditional_rendering

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6009>

tu: Reset has_tess after renderpass

Don't force sysmem for render passes after the one that uses
tessellation.

Also, move this into tu_cmd_state as that's where it belongs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6009>

freedreno: Document draw predication packets

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6009>

tu: Fix DST_INCOHERENT_FLUSH copy/paste error

This was meant to handle incoherent accesses by always flushing them,
but it accidentally checked for the coherent variant instead. As a
result e.g. a vkCmdClearImage() followed by a renderpass using the image
didn't get any flushes, resulting in the same sort of corruption seen
with sysmem renderpass clears. This happened to be exposed via some
tests that used multiview.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6009>

turnip: implement VK_EXT_4444_formats

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6164>

util/format: translate A4R4G4B4_UNORM and A4B4G4R4_UNORM vulkan formats

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6164>

turnip: rework extended formats to allow more extended formats

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6164>

ci: Actually upload trace artifacts to MinIO for baremetal

Baremetal jobs filter the variables they get from .gitlab-ci.yml, and
TRACIE_UPLOAD_TO_MINIO and others weren't being let through.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Fixes: d4ca45eca2a5 ("ci: Upload traces' reference and actual images to MinIO")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6171>

turnip: add support for D32_SFLOAT_S8_UINT

Add support for D32_SFLOAT_S8_UINT, which requires special handling because
it is actually two images.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5537>

ci: Remove kernel module build that slipped in

Some changes unintendedly slipped into an unrelated commit before it was
merged.

This caused kernel modules to be built and installed in the ramdisk,
which caused some devices to fail to boot due to the ramdisk size limit
being surpassed.

These changes weren't in effect until a subsequent commit triggered a
rebuild of the ramdisks.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Fixes: a9560939e07a ("ci: Build-test Panfrost tools")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6167>

ci: Download traces from MinIO in baremetal runs

Now that we have MinIO, we can distribute traces better than by direct
downloads from git.

With a caching MinIO instance local to the DUT, total run times should
be noticeably impacted.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6136>

ci: Upload traces' reference and actual images to MinIO

Now that the devices have sane dates, we can upload to MinIO.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6136>

spirv: Do more complex unwrapping in get_nir_type

The OpenGL flavor of SPIR-V allows for samplers inside structs.  This
means that our simple array-of-array handling isn't sufficient and we
need something substantially more complex for generating NIR types.

Fixes: 14a12b771d0 "spirv: Rework our handling of images and samplers"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6065>

compiler/types: Add a struct_type_is_packed wrapper

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6065>

freedreno: Fix "Offset of packed bitfield changed" warnings:

Example:

../src/freedreno/ir2/instr-a2xx.h:384:1: note: offset of packed bit-field
‘const_index’ has changed in GCC 4.4
  384 | } instr_fetch_vtx_t;

It's apparently due to bitfields that would cross the width of their type.
Just expand the types of the affected fields so that the compiler quiets
down.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6165>

turnip: delete tu_clear_sysmem_attachments_2d

2D path is using the same hardware as the 3D path, with the advantage of
separate register state, but here it requires WFI and extra cache flushing
and invalidating, so it should be better to just use the 3D path. There are
also some cases where the 3D path would be much faster, since it can clear
multiple attachments at once.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5775>

turnip: fix sysmem CmdClearAttachments 3D fallback breaking GMEM path flush

It was clearing the flush bits, which are used by both GMEM/SYSMEM paths,
but emitting the flushes inside the cond_exec, where they would only run
for the sysmem path.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5775>

nir/deref: Don't try to compare derefs containing casts

One day, we may want copy_prop_vars or other passes to be able to see
through certain types of casts such as when someone casts a uint64_t to
a uvec2.  However, for now we should just avoid casts all together.

Fixes: d8e3edb784d3a "nir/deref: Support casts and ptr_as_array in..."
Tested-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6072>

nir: Remove the old nir_opt_shrink_load.

The old pass only handled intrinsic load_constant, while the new
nir_opt_shrink_vectors handles ALU ops, nir load_consts, along with all
the load intrinsics.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6050>

amd: Swap from nir_opt_shrink_load() to nir_opt_shrink_vectors().

This should do much more trimming than shrink_load, and is a win on i965's
vec4 and nir-to-tgsi.  For scalar backends like this that don't need ALU
shrinking, it still gets more load intrinsics covered.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6050>

i965: Enable vector shrinking in the vec4 backend.

This manages to make some extra vec operations that would turn into movs
go away.

brw shader-db:
total instructions in shared programs: 3895037 -> 3893221 (-0.05%)
total cycles in shared programs: 113832759 -> 113792154 (-0.04%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6050>

nir: Add a pass to cut the trailing ends of vectors.

Ideally we'd also handle unused middles of vectors and reswizzle ALU-only
uses of it so we could write fewer channels, but that's future work/

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6050>

turnip: workaround for a630 d24_unorm_s8_uint fails

A630 doesn't have the HW format we use to sample stencil, so it needs a
workaround. It also has a bug around the AS_R8G8B8A8 format, which doesn't
work when UBWC is disabled, so use 8_8_8_8_UNORM instead when UBWC is
disabled (using AS_R8G8B8A8 or 8_8_8_8_UNORM should only matter with UBWC)

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5438>

etnaviv: fix nir validation problem

Fixes the following validation problem:
  error: nir_intrinsic_align_offset(instr) < nir_intrinsic_align_mul(instr)

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: Lukas F. Hartmann <lukas@mntmn.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6127>

freedreno/decode: move dependencies up a level

This is mainly for the benefit of automated syncing of changes from mesa
back to envytools, where the same subdir meson.build's are used, but the
toplevel meson.build is different.  In the envytools case, we want these
depenendencies to be required.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6154>

freedreno/registers: install gzip'd register database

The decode tools aren't too useful to install without the xml.  But
since libxml2 can read compressed xml, we'll gzip them for installation.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6154>

freedreno/registers: split header build into subdirs

Instead of building the adreno/foo.xml headers from the toplevel, split
out a subdir().  This fits better with how meson likes things to be
structured.  But it does require fixing a bit about how gen_header.py
resolves imports, ie. it cannot assume the src file is at the root of
the $RNN_PATH.

This is needed for the next patch, to add support for installing the
register database for use with installed tools.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6154>

freedreno/registers: add .gitignore

Testing headergen2 will create .xml.h in the same location as the .xml.
But we don't want this to get accidentially committed.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6154>

freedreno/rnn: rework RNN_DEF_PATH construction

No need for rnn_path.h, just construct the whole thing in meson and pass
via c_args.  Also move where the path is constructed up one level.  This
will be needed for syncing back to envytools, where the path will be
different.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6154>

freedreno/rnn: also look for .xml.gz

libxml2 can load gzip compressed files, so lets look for these too.
This will be useful for installing the register database so that an
installed cffdump/crashdec can use them.  But it isn't too useful
to be able to edit the installed register database, so we can gzip
them to use less disk space.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6154>

radv: Implement VK_EXT_4444_formats

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6160>

anv: Implement VK_EXT_4444_formats

We only support the ARGB format, not the ABGR one.  Fortunately, the
ARGB is the one required by D3D11.

Reviewed-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6158>

vulkan: Update Vulkan XML and headers to 1.2.149

Reviewed-by Joshua Ashton <joshua@froggi.es>

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6158>

u_prim_restart: add inline function for getting restart index based on index size

handy to have this available for drivers to reuse

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6147>

iris: Zero the add-on clear color BO on import

When iris imports an I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS surface, it
allocates a buffer to hold the indirect clear color. When the import is
complete, iris_resource::aux::clear_color is set to zero but the
indirect buffer is filled with garbage values. This could break certain
texture view use-cases, so zero the allocated buffer to fix those.

Fixes: c19492bcdb9 ("iris: Handle importing aux-enabled surfaces on TGL")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6092>

ci: Build-test Panfrost tools

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3348
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6157>

zink: implement handling for VK_EXT_calibrated_timestamps

just the extension setup; we need this to handle device timestamp
queries outside of batches

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5913>

zink: store valid timestamp bits onto zink_screen

we need this for converting timestamp ticks to nonoseconds

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5913>

zink: handle VK_EXT_vertex_attribute_divisor setup

this just enables the extension

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5913>

zink: clamp PIPE_SHADER_CAP_MAX_SHADER_BUFFERS to PIPE_MAX_SHADER_BUFFERS

this value gets split between ssbos and abos, so clamping to 8 here causes
a number of tests to fail just because there's not enough buffers available

other gallium drivers return 32 here, so this seems pretty safe

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5913>

zink: implement VK_EXT_robustness2

this adds support for null descriptors, which is necessary for full
compliance with ARB_texture_buffer_object

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5913>

pan/mdg: Test for SSA before chasing addresses

It's possible an SSA value depends on a register; in this case, chasing
the source would result in a crash as the chase helper in NIR asserts
is_ssa. Instead we should check a priori that all the argments are in
fact SSA, bailing otherwise.

In the piglit shader exhibiting this bug (by looping over the index),
bailing on the ishl instruction is -necessary-. This is not merely us
being cowardly to avoid seeing through the registers; indeed, if we
wrote away the ishl instruction, the shift itself would have to be
stored in a load/store register (r26/r27) which would preclude reading
it in the loop, creating a register allocation failure later in the
compile. So this is the correct solution due to the restricted
semantics.

Closes #3286

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Icecream95 <ixn@keemail.me>
Fixes: f5401cb8866 ("pan/midgard: Add address analysis framework")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6144>

pan/mdg: Mask spills from texture write

This prevents RA failures the results of reading multiple textures that
require less than 4 channels, as seen in a number of GL 3 WebRender shaders.

Closes: #3342

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Icecream95 <ixn@keemail.me>
Tested-by: Icecream95 <ixn@keemail.me>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6144>

swr: Bump maximum 2D texture size to 16kx16k

This may be required by some applications, even though
not all texture formats will be below 2GB limit.

This change also increases the maximum size of render target,
that was inadvertently lowered some time ago.

Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6139>

mesa/st: Actually free the driver part of memory objects on destruction.

_mesa_delete_memory_object(ctx, obj) == free(obj) but doesn't free the
part of the gallium driver.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1206
Fixes: 49f4ecc6777 "mesa/st: start adding memory object support"
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6148>

gallivm/nir: Lower uniforms to UBOs in llvm draw if the driver didn't request this already

When the llvm draw engine is used for draw shaders in st_program the driver
may not enable the cap PIPE_CAP_PACKED_UNIFORMS, so uniforms are not
be lowered to UBOs. However, llvm doesn't support nir_load_uniform, so lower
the uniforms to UBO now. The multiplier is set to 16 to be the same like in
the TGSI code path.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5681>

android: freedreno: move a2xx disasm out of gallium

Fixes the following building errors:

clang: error: no such file or directory: 'external/mesa/src/gallium/drivers/freedreno/a2xx/disasm-a2xx.c'
clang: error: no input files

FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so
ld.lld: error: undefined symbol: disasm_a2xx
>>> referenced by ir2_assemble.c:546 (external/mesa/src/gallium/drivers/freedreno/a2xx/ir2_assemble.c:546)
>>>               ir2_assemble.o:(assemble) in archive out/target/product/x86_64/obj/STATIC_LIBRARIES/libmesa_pipe_freedreno_intermediates/libmesa_pipe_freedreno.a
clang-9: error: linker command failed with exit code 1 (use -v to see invocation)

Fixes: f39afda1a7a ("freedreno: move a2xx disasm out of gallium")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6151>

android: freedreno/common: add support for libfreedreno_common static

Porting of meson build rules to Android

Fixes: 9623debf48a ("freedreno: Centralize UUID generation into new files freedreno_uuid.c/h")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6151>

android: freedreno/ir3: fix include paths

Fixes the following building error:

external/mesa/src/freedreno/ir3/disasm-a3xx.c:33:10: fatal error: 'disasm.h' file not found
#include "disasm.h"
         ^~~~~~~~~~
1 error generated.

Fixes: f7bd3456d79 ("freedreno: deduplicate a3xx+ disasm")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6151>

android: freedreno/registers: fix generated headers rules

Fixes the following building errors:

FAILED: ninja: 'external/mesa/src/freedreno/registers/a2xx.xml',
needed by 'out/target/product/x86_64/gen/STATIC_LIBRARIES/libfreedreno_registers_intermediates/registers/a2xx.xml.h',
missing and no known rule to make it
...
FAILED: ninja: 'external/mesa/src/freedreno/registers/adreno-pm4-pack.xml.h',
needed by 'out/target/product/x86_64/gen/STATIC_LIBRARIES/libfreedreno_registers_intermediates/registers/adreno-pm4-pack.xml.h',
missing and no known rule to make it

Fixes: b721d336da9 ("freedreno: slurp in rnndb")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6151>

anv: toggle on VK_EXT_extended_dynamic_state

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>

anv: dynamic vertex input binding stride and size support

If pStrides or Psizes are NULL we should use the values defined by the
pipeline.

v2: fix commit message and fix the code to set explicitly if we are
    using dynamic stride/size

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>

anv: depth/stencil dynamic state support

v2: code cleanup, remove extra spaces (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>

anv: add support for dynamic primitive topology change

This is done using 3DSTATE_VF_TOPOLOGY packet that overrides topology
used in subsequent 3DPRIMITIVE commands. For gen7[5] we override the
pipeline topology when emitting draw commands.

v2: fix the way gen7[5] is handled (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>

anv: add support for dynamic viewport and scissor with count

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>

anv: add support for dynamic cull mode and winding order

v2: cleanup, white space issues (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>

anv: handle dynamic viewport count

Emit 3DSTATE_CLIP during cmd_buffer_flush_state so that we can change
the max viewport count dynamically.

v2: use one common clip state as size is the same for all gens (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>

anv: consider dynamic state when creating pipeline

Leave default state values as zero so that when we OR them later
it is only the dynamic state value that matters.

v2: code cleanup + skip topology emit in base batch
    when topology is dynamic (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>

anv: add new dynamic states

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>

anv: add VK_EXT_extended_dynamic_state but leave it disabled

This is needed to ensure the function prototypes are declared.

v2: tweak commit message (Jason)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5604>

meson: fix `-D xlib-lease=auto` detection

This is used by Vulkan, not EGL, and depends on having DRM/KMS, not GBM.

Reported-by: Oschowa <oschowa@web.de>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3346
Fixes: e00adef34a5ce485e2c9 ("egl: automatically compile the `drm` platform when available")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6150>

egl: consistently use dri2_egl_display() helper macro

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6133>

freedreno/afuc: Fix PM4 enum parsing

We were open-coding it, and getting variant parsing wrong for things
like "A4XX-" which don't explicitly include the version being
disassembled. Use the rnn function instead. This makes CP_INDIRECT show
up again. Also propagate const-ness to users.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6140>

freedreno/afuc: Add missing rnn_prepdb()

It's totally not obvious, but this runs extra error checking and is
necessary for correct variant handling, and variant handling will
silently not work if it's not enabled. Add it asm.c even though it's not
strictly necessary, to prevent anyone from missing this in the future.

Missing this really should be an error.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6140>

freedreno/cffdec: Stop open-coding enum parsing

Now that rnndec_decode_enum() has been fixed, it does the same thing as
this function.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6140>

freedreno/rnn: Make rnn_decode_enum() respect variants

We'll need this for afuc, and we're currently also open-coding the same
thing in rnnutils. It seems this function was added to decode pm4 packet
names, but it currently has no users, so make it useful for what it
was intended to do.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6140>

egl/haiku: drop overwritten preset of EGL version

`init_haiku()` is called by `eglInitialize()`, which then calls
`_eglComputeVersion()` (without even anything in between). The latter
sets the EGL version based on the extensions supported, and since Haiku
doesn't support any it will end up overwriting the same `1.4` value.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6131>

egl: const _eglDriver

Converted using `s/_EGLDriver/const _EGLDriver/g` and dropped a couple
of irrelevant changes in comments, in the `_EGL_DRIVER_TYPECAST()` macro
and the typedef itself.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6129>

egl: Allow software rendering for vgem/virtio_gpu in platform_device

Then user could explicitly choose the underlying device for software
rendering when both vgem/virtio_vga are there.

Signed-off-by: Lepton Wu <lepton@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5830>

intel/tools: Test notification subregisters

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/tools: Simplify notification register handling

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/tools: Don't hardcode notification register

Previously we parsed a src non-terminal but did nothing with it. Since
the WAIT instruction is kind of weird, in that you have to give it the
same notification subregister for both destination and source, and it
always has an exec size of 1, let's parse a destination instead of a
source. This way, we can parse a writemask rather than a swizzle in
align16 mode, and easily convert the writemask to a swizzle to create
the source register.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/tools: Manually set ARF register file/nr/subnr

brw_reg::subnr is in bytes, like the subnr field in the instruction
word, but we disassemble the subregister number in units of the type.
For example g0.3<1>F would have a subnr=12.

These non-terminals produce a brw_reg and feed into other non-terminals
that call brw_reg(), where they are passed the subnr that we set here.
brw_reg()'s subnr parameter is expected to be in terms of the register
type, and it is multiplied by the type size to calculate the subnr in
bytes.

In these non-terminals, we don't know the register type yet, so we
must store the subregister number as it was given to us in the .subnr
field and let the brw_reg() constructor handle the conversion to the
canonical byte-based subnr form when it knows the type.

Before this patch, subregister numbers applied to these registers would
be multiplied with the type size twice.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/tools: Pass integers, not enums, to stride()

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/compiler: Relax SENDS regioning assertions

The next commit fixes a mistake in the assembler and ends up running
afoul of this assertion.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/tools: Simplify dstregion

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/tools: Simplify immediate handling

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/tools: Make writemask an integer

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/tools: Make swizzle an integer

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/tools: Simplify register type handling

Produce a brw_reg_type rather than a whole brw_reg and rename a few
non-terminals.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/tools: Don't allow empty type specifier

It's preferable to require an explicit type.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/tools: Remove stray newline

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

intel/tools: Fix typos

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5956>

pan/bit: Remove BI_SHIFT stub

Fixes compile error with -Dtools=panfrost

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 946ff9b4396 ("bifrost: Add support for nir_op_ishl")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6142>