Tom Rini [Fri, 14 Aug 2020 12:38:01 +0000 (08:38 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Fix HiFive Unleashed the broken problem by call fix_fdt() before
reserve_fdt(). Please refer to
https://www.mail-archive.com/u-boot@lists.denx.de/msg379444.html for
master u-boot broken for HiFive Unleashed.
- Add unaligned exception cmd.
- Refine sifive/fu540 spl flow.
- Add additional crash information for efi.
- Update sipeed/maix doc.
- Two minor refine.
Pragnesh Patel [Thu, 13 Aug 2020 04:42:26 +0000 (10:12 +0530)]
common/board_f: make sure to call fix_fdt() before reserve_fdt()
There may be a chance that board specific fix_fdt() will change the
size of FDT blob so it's safe to call reserve_fdt() after fix_fdt()
otherwise global data (gd) will overwrite with FDT blob values.
Fixes: a8492e25ac71 ("riscv: Expand the DT size before copy reserved memory node")
Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Heinrich Schuchardt [Sat, 1 Aug 2020 15:15:39 +0000 (15:15 +0000)]
riscv: additional crash information
If an exception occurs, the relocated program counter and return address
are required for an analysis.
With this patch you get:
=> exception undefined
Unhandled exception: Illegal instruction
EPC:
0000000080595908 RA:
000000008059c0c6 TVAL:
000000008030c01e
EPC:
0000000080007908 RA:
000000008000e0c6 reloc adjusted
We can use the relocated addresses to find the involved functions in
u.boot.map:
.text.do_undefined
0x0000000080007908 0x8 cmd/built-in.o
.text.cmd_process
0x000000008000dfcc 0x11a common/built-in.o
0x000000008000dfcc cmd_process
If an exception occurs in an UEFI binary additionally the load addresses of
the UEFI binaries are needed. With this patch:
=> setenv efi_selftest exception
=> bootefi selftest
Unhandled exception: Illegal instruction
EPC:
000000008042e18a RA:
000000008042e18a TVAL:
000000008030c01e
EPC:
000000007fea018a RA:
000000007fea018a reloc adjusted
UEFI image [0x0000000000000000:0xffffffffffffffff] '/\selftest'
UEFI image [0x000000008042e000:0x000000008042e43f] pc=0x18a '/bug.efi'
The value pc=0x18a matches the position of the illegal instruction in
efi_selftest_miniapp_exception.efi (loaded as /bug.efi);
asm volatile (".word 0xffffffff\n");
00000180 93 85 C5 11 1C 64 22 85 82 97 FF FF FF FF 1C 64
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Tested-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Heinrich Schuchardt [Thu, 6 Aug 2020 10:34:59 +0000 (12:34 +0200)]
cmd: exception: unaligned data access on RISC-V
The command 'exception' can be used to test the handling of exceptions.
Currently the exception command only allows to create an illegal
instruction exception on RISC-V.
Provide a sub-command 'exception unaligned' to cause a misaligned load
address exception.
Adjust the online help for 'exception undefined'.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Heinrich Schuchardt [Wed, 29 Jul 2020 17:23:38 +0000 (19:23 +0200)]
doc: riscv: debug UART for MAIX
Provide the required settings for the debug UART.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Heinrich Schuchardt [Tue, 28 Jul 2020 18:05:30 +0000 (20:05 +0200)]
doc: riscv: Update documentation for Sipeed MAIX boards
The MAIXDUINO runs fine with the sipeed_maix_bitm_defconfig but a different
board id parameter should be passed to kflash.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Heinrich Schuchardt [Mon, 3 Aug 2020 21:09:49 +0000 (23:09 +0200)]
riscv: sifive: fu540: redundant initialization
We should not initialize a variable if the value is overwritten before
being read.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Heinrich Schuchardt [Mon, 3 Aug 2020 21:33:42 +0000 (23:33 +0200)]
riscv: remove redundant logical constraint.
After
if (ret) return ret;
we know that ret is zero. Don't check it again.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Bin Meng [Mon, 3 Aug 2020 06:09:06 +0000 (23:09 -0700)]
riscv: sifive/fu540: Move SPL related functions to spl.c
It's better to keep all SPL related functions in the same spl.c.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Bin Meng [Mon, 3 Aug 2020 06:09:05 +0000 (23:09 -0700)]
riscv: sifive/fu540: Drop NET_RANDOM_ETHADDR
This option was enabled during the earlier U-Boot porting time. Now
we already have the OTP driver in place and the unique MAC address
is read from the OTP, there is no need to turn on this option.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Bin Meng [Mon, 3 Aug 2020 06:09:04 +0000 (23:09 -0700)]
riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC level
All FU540 driver related options should be in the SoC level Kconfig.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Bin Meng [Mon, 3 Aug 2020 06:09:03 +0000 (23:09 -0700)]
riscv: sifive/fu540: spl: Rename soc_spl_init()
spl_soc_init() seems to be a better name, as all SPL functions
names start from the spl_ prefix.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Bin Meng [Mon, 3 Aug 2020 06:09:02 +0000 (23:09 -0700)]
riscv: sifive/fu540: spl: Drop our own version of board_init_f()
Use the generic board_init_f() provided by the RISC-V library codes.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Bin Meng [Mon, 3 Aug 2020 06:09:01 +0000 (23:09 -0700)]
riscv: Call spl_board_init_f() in the generic SPL board_init_f()
The generic SPL version of board_init_f() should give a call to
board specific codes to initialize board in the SPL phase.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tom Rini [Thu, 13 Aug 2020 12:25:25 +0000 (08:25 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Fix dtc warnings for some MVEBU boards
Tom Rini [Thu, 13 Aug 2020 12:11:27 +0000 (08:11 -0400)]
Merge tag 'u-boot-stm32-
20200813' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Use IS_ENABLED to prevent ifdef in board_key_check for STM32MP
- Add STM32 FMC2 EBI controller driver
- Fix dwc3-sti-glue which allows STiH410-B2260 to boot again
- Add fitImage its entry for 587-200 DHCOR SoM
- Add both PDK2 and DRC02 DT into DHCOM fitImage its
- Fix DHCOM KS8851 ethernet MAC address
- Remove stm32mp1 board.c file
- Use const for struct node_info in board stm32mp1.c file
Stefan Roese [Mon, 10 Aug 2020 08:16:56 +0000 (10:16 +0200)]
arm: mvebu: armada-3720-turris-mox.dts: Fix dtc warning
Fix this dtc warning:
Warning (avoid_default_addr_size)
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek BehĂșn <marek.behun@nic.cz>
Stefan Roese [Mon, 10 Aug 2020 08:16:55 +0000 (10:16 +0200)]
arm: mvebu: armada-388-gp.dts: Fix dtc warnings
Fix these dtc warnings:
Warning (reg_format)
Warning (avoid_default_addr_size)
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Stefan Roese [Mon, 10 Aug 2020 08:16:54 +0000 (10:16 +0200)]
arm: mvebu: armada-xp-maxbcm.dts: Fix dtc warning
Fix this dtc warning:
Warning (avoid_default_addr_size)
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 10 Aug 2020 08:16:53 +0000 (10:16 +0200)]
arm: mvebu: armada-xp-theadorable.dts: Fix dtc warning
Fix this dtc warning:
Warning (avoid_default_addr_size)
Signed-off-by: Stefan Roese <sr@denx.de>
Patrick Delaunay [Wed, 29 Jul 2020 11:24:52 +0000 (13:24 +0200)]
board: stm32mp1: use const for struct node_info
Use const for the variable nodes in ft_board_setup,
this patch follow fdt_fixup_mtdparts prototype and no more use stack.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 30 Jul 2020 11:57:34 +0000 (13:57 +0200)]
board: stm32mp1: remove board.c
Remove the file board/st/stm32mp1/board.c which is not more
compiled since commit
156732cc8939 ("board: stm32mp1: move the
function board_debug_uart_init in spl.c")
Fixes: 4fb46816c7e2 ("board: stm32mp1: move the function board_debug_uart_init in spl.c")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Marek Vasut [Thu, 30 Jul 2020 23:34:50 +0000 (01:34 +0200)]
ARM: dts: stm32: Update eth1addr from EEPROM if eth1 present
The STM32MP1 DHCOM has two ethernet interfaces, the on-SoM DWMAC and KS8851.
Set eth1addr for the KS8851 to a MAC address of the DWMAC incremented by 1.
The MAC of the DWMAC is set from on-SoM EEPROM already, but the MAC address
of KS8851 was left uninitialized, so fix this.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Marek Vasut [Thu, 30 Jul 2020 23:35:51 +0000 (01:35 +0200)]
ARM: stm32: Add fitImage its entry for 587-200 DHCOR SoM
The new 587-200 DHCOR SoM is compatible with the 587-100 prototype,
hence just replicate the entries, as there is no pattern matching.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Marek Vasut [Thu, 30 Jul 2020 23:35:33 +0000 (01:35 +0200)]
ARM: stm32: Add both PDK2 and DRC02 DT into DHCOM fitImage its
Include both PDK2 and DRC02 DTs in the DHCOM fitImage .its and implement
support in SPL to select the correct configuration entry for U-Boot by
using the machine compatible string from SPL DT.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Fri, 31 Jul 2020 07:53:44 +0000 (09:53 +0200)]
ARM: dts: stm32: add FMC2 EBI support for stm32mp157c
This patch adds FMC2 External Bus Interface support on stm32mp157c.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Fri, 31 Jul 2020 07:53:43 +0000 (09:53 +0200)]
configs: stm32mp: add CONFIG_STM32_FMC2_EBI
This patch enables the support of FMC2 EBI.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Fri, 31 Jul 2020 07:53:42 +0000 (09:53 +0200)]
board: stm32mp1: update fdt fixup partitions table
This patch adds "st,stm32mp1-fmc2-nfc" compatible string in the
fdt fixup partitions table.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Fri, 31 Jul 2020 07:53:41 +0000 (09:53 +0200)]
mtd: rawnand: stm32_fmc2: get resources from parent node
FMC2 EBI support has been added. Common resources (registers base
address and clock) can now be shared between the 2 drivers using
"st,stm32mp1-fmc2-nfc" compatible string. It means that the
common resources should now be found in the parent device when EBI
node is available.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Fri, 31 Jul 2020 07:53:40 +0000 (09:53 +0200)]
memory: stm32-fmc2-ebi: add STM32 FMC2 EBI controller driver
The driver adds the support for the STMicroelectronics FMC2 EBI controller
found on STM32MP SOCs.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Fri, 31 Jul 2020 07:53:39 +0000 (09:53 +0200)]
mtd: rawnand: stm32_fmc2: use clrsetbits_le32
This patch uses clrsetbits_le32 function instead of multiple instructions.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Fri, 31 Jul 2020 07:53:38 +0000 (09:53 +0200)]
mtd: rawnand: stm32_fmc2: use FIELD_PREP/FIELD_GET macros
This patch removes custom macros and uses FIELD_PREP and FIELD_GET macros.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Fri, 31 Jul 2020 07:53:37 +0000 (09:53 +0200)]
mtd: rawnand: stm32_fmc2: cosmetic change to use nfc instead of fmc2 where relevant
This patch renames functions and local variables.
This cleanup is done to get all functions starting by stm32_fmc2_nfc
in the FMC2 raw NAND driver when all functions will start by
stm32_fmc2_ebi in the FMC2 EBI driver.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Fri, 31 Jul 2020 07:53:36 +0000 (09:53 +0200)]
mtd: rawnand: stm32_fmc2: use FMC2_TIMEOUT_5S for timeouts
FMC2_TIMEOUT_5S will be used each time that we need to wait.
It was seen, during stress tests in an overloaded system,
that we could be close to 1 second, even if we never met this
value. To be safe, FMC2_TIMEOUT_MS is set to 5 seconds.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Fri, 31 Jul 2020 07:53:35 +0000 (09:53 +0200)]
mtd: rawnand: stm32_fmc2: remove useless inline comments
Remove inline comments that are useless since function label are
self explanatory.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Christophe Kerello [Fri, 31 Jul 2020 07:53:34 +0000 (09:53 +0200)]
mtd: rawnand: stm32_fmc2: fix a buffer overflow
The chip select defined in the device tree could only be 0 or 1.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Fri, 31 Jul 2020 14:31:52 +0000 (16:31 +0200)]
arm: stm32mp: stm32prog: use IS_ENABLED to prevent ifdef
Use IS_ENABLED to prevent ifdef in stm32prog command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Fri, 31 Jul 2020 14:31:51 +0000 (16:31 +0200)]
arm: stm32mp: bsec: use IS_ENABLED to prevent ifdef
Use IS_ENABLED to prevent ifdef in bsec driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Fri, 31 Jul 2020 14:31:50 +0000 (16:31 +0200)]
board: stm32mp1: use IS_ENABLED to prevent ifdef in ft_board_setup
Use IS_ENABLED to prevent ifdef in ft_board_setup.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Fri, 31 Jul 2020 14:31:49 +0000 (16:31 +0200)]
board: stm32mp1: use IS_ENABLED to prevent ifdef in env functions
Use IS_ENABLED to prevent ifdef in env functions:
- env_get_location
- env_ext4_get_intf
- mmc_get_env_dev
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Fri, 31 Jul 2020 14:31:48 +0000 (16:31 +0200)]
board: stm32mp1: use IS_ENABLED to prevent ifdef in board_late_init
Use IS_ENABLED to prevent ifdef in board_late_init.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Fri, 31 Jul 2020 14:31:47 +0000 (16:31 +0200)]
board: stm32mp1: use IS_ENABLED to prevent ifdef in dk2_i2c1_fix
Use IS_ENABLED to prevent ifdef in dk2_i2c1_fix.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Fri, 31 Jul 2020 14:31:46 +0000 (16:31 +0200)]
board: stm32mp1: use IS_ENABLED to prevent ifdef in set_dfu_alt_inf
Use CONFIG_IS_ENABLED to prevent ifdef in set_dfu_alt_inf.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Fri, 31 Jul 2020 14:31:45 +0000 (16:31 +0200)]
board: stm32mp1: use IS_ENABLED to prevent ifdef in sysconf_init
Use IS_ENABLED to prevent ifdef in sysconf_init.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Fri, 31 Jul 2020 14:31:44 +0000 (16:31 +0200)]
board: stm32mp1: use IS_ENABLED to prevent ifdef in board_check_usb_power
Use IS_ENABLED to prevent ifdef in board_check_usb_power.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Fri, 31 Jul 2020 14:31:43 +0000 (16:31 +0200)]
board: stm32mp1: use IS_ENABLED to prevent ifdef in g_dnl_board_usb_cable_connected
Use IS_ENABLED to prevent ifdef in g_dnl_board_usb_cable_connected
and in g_dnl_bind_fixup
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Fri, 31 Jul 2020 14:31:42 +0000 (16:31 +0200)]
board: stm32mp1: use IS_ENABLED to prevent ifdef in board_key_check
Use IS_ENABLED to prevent ifdef in board_key_check
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Mon, 29 Jun 2020 09:19:02 +0000 (11:19 +0200)]
usb: host: dwc3-sti-glue: Fix ofnode_valid() parameter
node varaible is used as iterator into ofnode_for_each_subnode()
loop, when exiting of it, node is no more a valid ofnode.
Use dwc3_node instead as parameter of ofnode_valid()
Fixes: ac28e59a574d ("usb: Migrate to support live DT for some driver")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Frank Wunderlich [Tue, 11 Aug 2020 15:19:54 +0000 (17:19 +0200)]
Makefile: fix annoying sunxi hack message
every compilation shows this error
Hack for sunxi which doesn't have a proper binman definition for
64-bit boards
not only for sunxi-boards/arm64
fix this by changing to real comments
Fixes: 9f55ee259d0c ("Makefile: sunxi: Don't use binman to build ATF image")
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Tom Rini [Wed, 12 Aug 2020 03:03:46 +0000 (23:03 -0400)]
Merge tag 'ti-v2020.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Added support for J7200 evm
- DM_ETH and DM_USB migrations for omap3
- USB DFU and mass storage support for AM65x evm
- RTI watchdog support for K3 devices
- Fix an issue with L3 cache on K3 devices
Vignesh Raghavendra [Thu, 6 Aug 2020 18:57:01 +0000 (00:27 +0530)]
arm: dts: k3-j7200-common-proc-board: Enable CPSW2G port
Enable CPSW2G port to support networking in U-Boot
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Thu, 6 Aug 2020 18:57:00 +0000 (00:27 +0530)]
ARM: dts: k3-j7200-mcu-wakeup: Add CPSW2G support
Add MCU NAVSS, UDMA and CPSW2G DT nodes.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Thu, 6 Aug 2020 18:56:59 +0000 (00:26 +0530)]
ARM: dts: k3-j7200: Add HyperBus and HyperFlash nodes
J7200 SoM has Cypress HyperFlash connected to HyperBus interface, add DT
entries for the same.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Thu, 6 Aug 2020 18:56:58 +0000 (00:26 +0530)]
ARM: dts: k3-j7200: Add wkup gpio node
Add wkup_gpio0 node required for detecting whether board mux is set
HyperFlash.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Thu, 6 Aug 2020 18:56:57 +0000 (00:26 +0530)]
board: ti: j721e: Add support for HyperFlash detection
On J7200 SoC OSPI0 and HypeFlash are muxed at HW level and only one of
them can be used at any time. J7200 EVM has both HyperFlash and OSPI
flash on board. There is a user switch (SW3.1) that can be toggled to
select OSPI flash vs HyperFlash.
Read the state of this switch via wkup_gpio0_6 line and fixup the DT
nodes to select OSPI0 vs HyperFlash
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Vignesh Raghavendra [Thu, 6 Aug 2020 18:56:56 +0000 (00:26 +0530)]
arm: dts: k3-j7200: Add USB related DT entries
Add USB related DT entries to enable USB device mode.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:31 +0000 (22:44 +0530)]
configs: j7200_evm_a72: Add Initial support
Add initial A72 defconfig support.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:30 +0000 (22:44 +0530)]
configs: j7200_evm_r5: Add initial support
Add initial R5 defconfig support
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Dave Gerlach [Wed, 5 Aug 2020 17:14:29 +0000 (22:44 +0530)]
arm: dts: k3-j7200: Add R5 specific dts support
Add the basic a72 basic dts for j7200. Following nodes were supported:
- UART
- MMC SD
- I2C
- TISCI communication
- LPDDR with 1600MTs configuration.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:28 +0000 (22:44 +0530)]
arm: dts: k3-j7200: Add dts support
Add the basic a72 dts for j7200. Following nodes were supported:
- UART
- MMC SD
- I2C
- TISCI communication
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Kishon Vijay Abraham I [Wed, 5 Aug 2020 17:14:27 +0000 (22:44 +0530)]
soc: soc_ti_k3: Add device identification for J7200 SoC
Add device identification for J7200 SoC
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:26 +0000 (22:44 +0530)]
ram: k3-j721e: Relax version checks for memory controller
k3-j721e ddr driver sanity checks for product id and version number.
Version number gets changed for every minor update in the IP. So discard
the version check and just sanity check for product id.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:25 +0000 (22:44 +0530)]
board: ti: j7200: Add board detection support for j7200
Add board detection support for j7200 common processor board.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:24 +0000 (22:44 +0530)]
board: ti: j7200: Introduce support for j7200 build targets
j7200-evm has minor differences with j721e-evm based on the IPs
available in the SoC. Introduce separate build targets for j7200-evm
to incorporate the differences.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:23 +0000 (22:44 +0530)]
arm: mach-k3: j7200: Detect if ROM has already loaded sysfw
Detect if sysfw is already loaded by ROM and pass this information to
sysfw loader. Based on this information sysfw loader either loads the
sysfw image from boot media or just receives the boot notification
message form sysfw.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:22 +0000 (22:44 +0530)]
arm: mach-k3: j7200: Add support for storing extended boot info from ROM
Starting J7200 SoC, ROM supports for loading sysfw directly from boot
image. ROM passes this information on number of images that are loaded
to bootloader at certain location. Add support for storing this
information before it gets corrupted.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:21 +0000 (22:44 +0530)]
arm: mach-k3: j7200: Add support for SOC detection
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
capable dual Cortex-R5F MCUs and a Centralized Device Management and
Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1
Add support for detection J7200 SoC
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:20 +0000 (22:44 +0530)]
arm: mach-k3: j721e: Fix unlocking control module registers
In main control mmr there is no partition 4 and partition 6 is available
only on J721e. Fix the same in ctrl_mmr_unlock function
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:19 +0000 (22:44 +0530)]
arm: mach-k3: j721e: Add detection for j721e
Add an api soc_is_j721e(), and use it to enable certain functionality
that is available only on j721e. This detection is needed when DT is not
available.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:18 +0000 (22:44 +0530)]
arm: mach-k3: sysfw-loader: Add support for rom loading sysfw image
Starting J7200 SoC, ROM supports for loading sysfw directly from boot
image. In such cases, SPL need not load sysfw from boot media, but need
to receive boot notification message from sysfw. So separate out
remoteproc calls for system controller from sysfw loader and just
receive the boot notification if sysfw is already loaded.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:17 +0000 (22:44 +0530)]
arm: mach-k3: Move mmr_unlock to a common location
mmr_unlock api is common for all k3 devices. Move it to a common
location.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Suman Anna <s-anna@ti.com>
Jean-Jacques Hiblot [Wed, 5 Aug 2020 17:14:16 +0000 (22:44 +0530)]
arm: mach-k3: Fix platform hang when SPL_MULTI_DTB_FIT is not enabled
If SPL_MULTI_DTB_FIT is not enabled, then CONFIG_SPL_OF_LIST is not defined
And in turn tispl.bin ends up not embedding any DTB.
Fixing it by using CONFIG_DEFAULT_DEVICE_TREE if SPL_OF_LIST is empty.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Suman Anna [Wed, 5 Aug 2020 17:14:15 +0000 (22:44 +0530)]
board: ti: j721e: Update fdt fixup logic for interconnect nodes
The DT nodes on J721E SoCs currently use a node name "interconnect" for
the various interconnects. This name is not following the DT schema, and
should simply be "bus". Update the fdt fixup logic to use both the current
and the expected corrected path names so that this logic won't be broken
with newer kernels.
Signed-off-by: Suman Anna <s-anna@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:14 +0000 (22:44 +0530)]
board: ti: j721e: Probe eeprom only when CONFIG_TI_I2C_BOARD_DETECT is defined
Guard all eeprom probe with TI_I2C_BOARD_DETECT to avoid reading eeprom
when eeprom is not available
Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Lokesh Vutla [Wed, 5 Aug 2020 17:14:13 +0000 (22:44 +0530)]
board: ti: board_detect: Add stub functions for EEPROM detection apis
Current usage of eeprom apis produce a build failure when
CONFIG_TI_I2C_BOARD_DETECT is not defined. Add stub function for these
apis to avoid build failures.
Reviewed-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:16 +0000 (11:35 +0530)]
configs: Add new config for supporting USB mass storage boot
Because of space constraints, create a new USB defconfig for R5 to
faciliate booting from USB mass storage devices
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:15 +0000 (11:35 +0530)]
configs: Add defconfig for USB DFU bootmode
Because of space constraints, create a new USB defconfig for R5 to
faciliate booting in USB peripheral (DFU) bootmode
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:14 +0000 (11:35 +0530)]
configs: am65x_evm_a53: Enable USB Mass storage and DFU boot modes
Enable configs to facilitate booting from USB Mass Storage devices
as well as USB peripheral boot
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:13 +0000 (11:35 +0530)]
configs: am65x_evm: Add support for DFU related configs
Add offset and environment related configs used for booting
from DFU.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:12 +0000 (11:35 +0530)]
arm: dts: k3-am654-base-board: Add support for USB0 in SPL
Add nodes for USB0 in SPL to enable USB host boot mode
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:11 +0000 (11:35 +0530)]
arm: dts: k3-am654-r5-base-board: Add USB0 nodes
Add USB0 nodes and set them to host mode to support USB host and
peripheral boot modes
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:10 +0000 (11:35 +0530)]
arm: mach-k3: am6_init: Add support for USB boot mode
Add support for identifying USB host and device boot modes
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:09 +0000 (11:35 +0530)]
arm: mach-k3: am6_init: Do USB fixups to facilitate host and device boot modes
U-boot only supports either USB host or device mode for a node at a
time in dts. To support both host and dfu bootmodes, set "peripheral"
as the default dr_mode but fixup property to "host" if host bootmode
is detected.
This needs to happen before the dwc3 generic layer binds the usb device
to a host or device driver. Therefore, add an fdtdec_setup_board()
implementation to fixup the dt based on the boot mode.
Also use the same fixup function to set the USB-PCIe Serdes mux to PCIe
in both the host and device cases. This is required for accessing the
interface at USB 2.0 speeds.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:08 +0000 (11:35 +0530)]
arm: mach-k3: am6_init: Gate mmc related configurations with the appropriate config
Gate mmc related system related configurations with DM_MMC to avoid build
errors when MMC is not enabled
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:07 +0000 (11:35 +0530)]
arm: mach-k3: sysfw-loader: Add support to load SYSFW from USB
Add support for loading system firmware from a USB mass storage device
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:06 +0000 (11:35 +0530)]
armv7R: K3: am654: Use full malloc in SPL both pre and post reloc
In order to be able to use things like file system drivers early on in
SPL (before relocation) in a memory-constrained environment when DDR is
not yet available we cannot use the simple malloc scheme which does not
implement the freeing of previously allocated memory blocks. To address
this issue go ahead and enable the use of the full malloc by manually
initializing the required functionality inside board_init_f by creating
a full malloc pool inside the pre-relocation malloc pool.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:05 +0000 (11:35 +0530)]
spl: usb: Only init usb once
usb_init() may be called multiple times for fetching multiple images
from SPL. Skip reinitializing USB if its already been done
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Faiz Abbas [Mon, 3 Aug 2020 06:05:04 +0000 (11:35 +0530)]
spl: usb: Create an API spl_usb_load()
Create a new API spl_usb_load() that takes the filename as a parameter
instead of taking the default U-boot PAYLOAD_NAME
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Suman Anna [Wed, 29 Jul 2020 18:41:12 +0000 (13:41 -0500)]
board: ti: am65x: Update fdt fixup logic for interconnect nodes
The DT nodes on AM65x SoCs currently use a node name "interconnect" for
the various interconnects. This name is not following the DT schema, and
should simply be "bus". Update the fdt fixup logic to use both the
current and the expected corrected path names so that this logic won't
be broken with newer kernels.
The logic also corrects the crypto node name as the DT node
unit-addresses are all expected to be lower case.
Signed-off-by: Suman Anna <s-anna@ti.com>
Faiz Abbas [Wed, 29 Jul 2020 01:33:41 +0000 (07:03 +0530)]
mmc: am654_sdhci: Use MMC_MODES_END value instead of hardcoded value
The hardcoded array size leads to array overflows with changes in
speed modes enum in mmc core. Use MMC_MODES_END for otap_del_sel
array declaration to fix this.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Suman Anna [Fri, 24 Jul 2020 22:51:40 +0000 (17:51 -0500)]
arm: dts: k3-j721e: Fix interconnect node names
The various CBASS interconnect nodes on K3 J721E SoCs are defined
using the node name "interconnect". This is not a valid node name
as per the dt-schema. Fix these node names to use the standard name
used for SoC interconnects, "bus".
Signed-off-by: Suman Anna <s-anna@ti.com>
Suman Anna [Fri, 24 Jul 2020 22:51:39 +0000 (17:51 -0500)]
arm: dts: k3-am65: Fix interconnect node names
The various CBASS interconnect nodes on K3 AM65x SoCs are defined
using the node name "interconnect". This is not a valid node name
as per the dt-schema. Fix these node names to use the standard name
used for SoC interconnects, "bus".
Signed-off-by: Suman Anna <s-anna@ti.com>
Derald D. Woods [Sun, 19 Jul 2020 00:23:04 +0000 (19:23 -0500)]
ARM: omap3: evm: Complete DM_ETH and DM_USB migrations
This commit completes the migrations for DM_ETH and DM_USB. The board
is now consistent with omap3_beagle and other remaining OMAP3 boards.
Cc: Tom Rini <trini@konsulko.com>
Cc: Adam Ford <aford173@gmail.com>
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Tom Rini [Tue, 11 Aug 2020 12:56:52 +0000 (08:56 -0400)]
Merge tag 'efi-2020-10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-10-rc3
Bugs in the UEFI sub-system are fixed:
* use the optional data of the BootXXXX variables as load options
* simplify function public_key_verify_signature()
* amend a copyright notice
Andrew F. Davis [Wed, 15 Jul 2020 21:02:36 +0000 (17:02 -0400)]
arm: mach-k3: Clean non-coherent lines out of L3 cache
When switching on or off the ARM caches some care must be taken to ensure
existing cache line allocations are not left in an inconsistent state.
An example of this is when cache lines are considered non-shared by
and L3 controller even though the lines are shared. To prevent these
and other issues all cache lines should be cleared before enabling
or disabling a coherent master's cache. ARM cores and many L3 controllers
provide a way to efficiently clean out all cache lines to allow for
this, unfortunately there is no such easy way to do this on current K3
MSMC based systems.
We could explicitly clean out every valid external address tracked by
MSMC (all of DRAM), or we could attempt to identify only the set of
addresses accessed by a given boot stage and flush only those
specifically. This patch attempts the latter. We start with cleaning the
SPL load address. More addresses can be added here later as they are
identified.
Note that we perform a flush operation for both the flush and invalidate
operations, this is not a typo. We do this to avoid the situation that
some ARM cores will promote an invalidate to a clean+invalidate, but only
emit the invalidation operation externally, leading to a loss of data.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Tested-by: Faiz Abbas <faiz_abbas@ti.com>
Jan Kiszka [Tue, 23 Jun 2020 11:15:10 +0000 (13:15 +0200)]
arm: dts: k3: Add RTI watchdogs
Add DT entries for main domain watchdog0 and 1 instances on the J721e
well as RTI1-based watchdog on the AM65x. RTI0 does not work for this
purpose on the AM65x, so leave it out.
On AM65x, we mark the power-domain as shared because RTI firmware such
as https://github.com/siemens/k3-rti-wdt may request it as well in order
to prevent accidental shutdown of the watchdog.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Jan Kiszka [Tue, 23 Jun 2020 11:15:08 +0000 (13:15 +0200)]
watchdog: Add support for K3 RTI watchdog
This is based on the Linux kernel driver for the RTI watchdog.
To actually reset the system on an AM65x, it requires firmware running
on the R5 that accepts the NMI and issues the actual system reset via
TISCI. Kind of an iTCO, except that this watchdog hardware has support
for no-way-out, and only for that.
On the J721E, reset works without extra firmware help when routing the
RTI interrupt via the ESM.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Tom Rini [Mon, 10 Aug 2020 20:10:09 +0000 (16:10 -0400)]
Prepare v2020.10-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 10 Aug 2020 19:31:07 +0000 (15:31 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Joao Marcos Costa [Mon, 10 Aug 2020 12:37:27 +0000 (14:37 +0200)]
test/py: fix SquashFS tests
Use "cons.config.build_dir" instead of writing to the source directory
(read-only). This will fix the test failures in Azure.
Signed-off-by: Joao Marcos Costa <joaomarcos.costa@bootlin.com>