d3d12: Report PIPE_VIDEO_CAP_REQUIRES_FLUSH_ON_END_FRAME

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18715>

d3d12: Add initialization values for d3d12_video_encoder

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18715>

d3d12: Video process - Remove unnecessary batches flush

Make resident and sync in flush() method instead of before to avoid extra batch flushes

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18715>

d3d12: Update HEVC Encode GOP on I frames too

Update GOP also on I HEVC frames in d3d12_video_encoder_update_hevc_gop_configuration

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18715>

frontends/va: Implement vaSyncBuffer

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18715>

aco: Unswizzle v_pk_fma_f16 literals to produce more v_pk_fmac_f16.

No Foz-DB difference, but it reduces code size in some angle shaders.

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18676>

iris: check i915 features after hw gen

when running recent Mesa on i855 (gen 2) without amber drivers:
  error: Kernel is too old for Iris. Consider upgrading to kernel v4.16.

  libGL error: glx: failed to create dri3 screen
  libGL error: failed to load driver: iris
  error: Kernel is too old for Iris. Consider upgrading to kernel v4.16.

  libGL error: glx: failed to create dri2 screen
  libGL error: failed to load driver: iris

move the i915 feature check to after the hardware generation check
which results in:
  MESA: warning: Driver does not support the 0x3582 PCI ID.
  libGL error: glx: failed to create dri3 screen
  libGL error: failed to load driver: iris
  MESA: warning: Driver does not support the 0x3582 PCI ID.
  libGL error: glx: failed to create dri2 screen
  libGL error: failed to load driver: iris

Cc: mesa-stable
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18563>

gallivm: fix nir AOS swizzling issues

The nir code for AOS (aka linear) mode had a number of issues.

In some cases, the RGB->BGR swizzling wasn't happening, leading to
incorrect colors.  In other cases, bad swizzling caused the first
pixel's color to be written to four adjacent pixels.

Writemasks must also be swizzled.  For example, if an instruction's
writemask indicates the X component but the AOS component order is
BGRA we need to change the writemask to Z.

Another issue was with constant buffer values not getting consistently
convert to BGRA order.  Fixing this involves removing the
lp_nir_aos_conv_const() function and immediately converting immediate
values from 4 x f32 in [0,1] to 16 x u8 when we translate nir's
load_const so that we know the value is in the right linear/AOS layout
right away.

Finally, the llvmpipe_nir_fn_is_linear_compat() function was not
checking that nir_instr_type_load_const values are in [0,1] for AOS
execution.  The info.unclamped_immediates field is not needed for
the NIR path (but still used for the old TGSI path).

This fixes quite a few tests in our VMware suite.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18213>

gallivm: asst. clean-ups in lp_bld_sample_soa.c

Wrap lines to 78 chars.  Move var decls to where they're first used.
Etc.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18213>

llvmpipe: asst. formatting, clean-ups in lp_state_fs.c

Wrap lines to 78 chars.  Move var decls to where they're first used.
Etc.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18213>

gallivm: change texture/sampler_index params to unsigned

To match other functions taking those params.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18213>

gallivm: move lp_build_nir_aos_context declaration, etc

Move the lp_build_nir_aos_context struct declaration and
lp_nir_aos_context() cast wrapper from lp_bld_nir.h to
lp_bld_nir_aos.c and use the cast wrapper in more places.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18213>

util: allow GALLIUM_LOG_FILE=stdout

To log gallium info to stdout instead of a file.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18213>

llvmpipe: always pass non-zero writemask to assign_reg()

Removes an uneeded conditional expression.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18213>

llvmpipe: further bump LP_MAX_TGSI_SHADER_IMAGES to 64

I previously bumped this to 32, but we need at least 64 to pass
a few other VMware tests (e.g. dx11-slots-uav-write-vs-gs-all-64).

Also update/generalize a comment.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18213>

lavapipe: s/u_foreach_bit/u_foreach_bit64/ in handle_pipeline_access()

Since the lvp_access_info fields are uint64_t.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18213>

turnip: advertise VkExternalFenceProperties correctly

Remove tu_GetPhysicalDeviceExternalFenceProperties and let the common
entrypoint does the work.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18711>

egl/glx: add fallback for zink loading

if the driver attemping to load is not zink and not software, then
attempt a zink fallback on failure

this conservatively handles the case of "only zink is built", though it
is going to be noticeably slower at startup than loading zink directly

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16168>

ci/zink+turnip: Add a manual full run of the dEQP CTS.

We don't have enough spare boards to run this by default, but it's
catching interesting bugs and we want to be able to look at its status for
evaluating zink usage.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18717>

radv: make sure to initialize wd_switch_on_eop before checking its value

This is technically not a bug because it might just trigger
SWITCH_ON_EOI when streamout is used and I think it was fine.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7303
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18700>

turnip: Use the simplified stencil write flags for the LRZ-allowed check.

Traces of GLES games that ANGLE has taken frequently have no-op stencil
writes, which ANGLE and Zink both pass straight through.  Given that we
support dynamic stencil state updates via tu_CmdSetStencil*(), draw time
really is the time for deciding this state unfortunately.

Reuse the fancier stencil write enables check from "can we do early z?" in
"can we do LRZ?".  This gets one set of draws in among_us to have LRZ, but
I don't see a detectable performance difference.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18691>

turnip: Fix the "written stencil is unmodified" check.

We want to know if anything writes stencil, not if all of them do.

Fixes: b2a60c157e4d ("turnip: add LRZ early-z support")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18691>

aco/optimizer_postRA: Clarify terminology.

Change the terminology around the post-RA optimizer, primarily this
changes the use of "clobbered" to "overwritten" to avoid confusion,
and it removes some redundant states.

Proposed for backporting to stable, to make sure it is easy to
backport further fixes (if any) on top of this.

Fossil DB stats unaffected on Navi 21.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>

aco/optimizer_postRA: Fix logical control flow handling.

Change reset_block() so it only considers the logical
predecessors for VGPRs. Relevant for some optimizations
across loops.

This commit fixes an assertion failure which was triggered
by Zink in a piglit test.

Fossil DB stats unaffected on Navi 21.

Fixes: 2e56e2342094e8ec90afa5265b1c43503f662939
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>

aco/optimizer_postRA: Don't assume all operand registers were written by same instr.

This assumption is no longer true since the post-RA optimizer
can work across blocks. It is now possible that some control
flow paths overwrite some but not all registers of an operand.

This commit may prevent invalid optimizations and/or assertion
failures (on debug builds).

Fossil DB stats unaffected on Navi 21.

Fixes: 0e4747d3fb7ec15f8c1d6b971b1352249e7d95c6
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>

aco/optimizer_postRA: Mark a register overwritten when predecessors disagree.

Affects blocks whose some (but not all) predecessors overwrite a register.
This commit fixes glitches in some games which regressed because of the
improved SCC no-compare optimization.

Fossil DB stats on Navi 21:

Totals from 2816 (2.09% of 134906) affected shaders:
CodeSize: 24224276 -> 24241580 (+0.07%)
Instrs: 4570595 -> 4574921 (+0.09%)
Latency: 53680256 -> 53693655 (+0.02%); split: -0.00%, +0.02%
InvThroughput: 9829289 -> 9830573 (+0.01%)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7257
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7305
Fixes: 2e56e2342094e8ec90afa5265b1c43503f662939
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>

aco/tests: Add post-RA SCC no-compare tests cases with control flow.

- scc_nocmp_across_cf: passes
- scc_nocmp_across_cf_partially_overwritten: fails (fixed later)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>

aco/tests: Add post-RA DPP test cases with control flow.

These are intended to make sure that the post-RA optimizer works
correctly across control flow. The new tests emit a divergent
if-else branch (with full logical+linear CFG).

- dpp_across_cf:
  Simple case of DPP optimizable across control flow. Should pass.
- dpp_across_cf_overwritten:
  Similar case but the DPP source register is overwritten in CF.
  This shows a bug so the test fails now (will be fixed).

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>

aco/tests: Add post-RA optimizer testcase for partially overwritten VCC.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18488>

pvr: Add EMIT_MASK in pvr_emit_ppp_state().

This commit adds an extra check on the emitted ppp state by
adding an EMIT_MASK.
The mask is just a copy of the header at the beginning of the emit.
Each time a word is emitted the appropriate bit in the mask is
cleared and at the end we make sure that the mask is 0. If not,
we forgot the either clear a bit somewhere or emit some words.
This is intended to make it easier to find such errors.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>

pvr: Add assert for texturestate being 0 in when emitting ppp state.

We assume that the texturestate size is 0 so we don't emit a state
update for pds_state_ptr2 since the hw wouldn't use it based on
the 0 size. This commit adds an assert to make sure of that.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>

pvr: Add pvr_csb_unpack().

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Co-Authored-By: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>

pvr: Complete pvr_emit_ppp_state().

This commit appends dbsc commands to be executed in secondary
command buffers on vkCmdExecuteCommands().

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>

pvr: Make control stream word writing stricter.

Use pvr_csb_write_value() and pvr_csb_write_struct() to have some
extra checks when writing pre-packed command/state words in
pvr_emit_ppp_state().

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>

pvr: Add csb helpers macros to write into raw buffer.

This commit adds two helper macros to write control stream words
into raw buffers with some extra checks.
The new macros are renamed versions of the previous CS_WRITE() and
CS_PACK_WRITE() macros.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>

pvr: Remove struct pvr_emit_state and emit header directly.

Previously `struct pvr_emit_state` was used to keep track of which
state update required emitting and the header was setup based on that.
This commit removes it so that we're instead setting up the header as
we go and we can emit it directly instead of decoding it based on the
emit_state (which is almost identical but with a few missing fields).

This commit also changes pvr_emit_ppp_state() so that each control
stream word is packed/emitted on its own instead of everything
being nested within the header pack. Making the code a bit easier
to follow.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18631>

pvr: Implement vkResetEvent API.

Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18708>

pvr: Implement vkSetEvent API.

Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18708>

ac/nir/ngg: Don't initialize same-invocation mesh shader outputs.

This is actually not necessary and generates a lot of superfluous
instructions at every phi (setting the value to zero).

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18566>

ac/nir/ngg: Don't use LDS for same-invocation indices and cull outputs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18566>

radv: Remove dead shader temps after linking.

Prevent nir_lower_scratch accidentally turning these dead variables
into scratch. This can especially happen to arrayed outputs of
eg. tess control or mesh shaders, which become large shader temps.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18566>

radv: Change max preferred task workgroup invocations to 64.

This was accidentally left at the maximum possible value.
However I now tested this with the cadscene demo app and there is
hardly any benefit from going above 64. Set it to 64 for now.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18566>

aco/optimizer: disallow can_eliminate_and_exec() with s_not

Totals from 295 (0.22% of 134913) affected shaders: (GFX10.3)
CodeSize: 1016564 -> 1016896 (+0.03%); split: -0.05%, +0.09%
Instrs: 187659 -> 187724 (+0.03%); split: -0.08%, +0.11%
Latency: 2839516 -> 2839541 (+0.00%); split: -0.01%, +0.01%
Copies: 12301 -> 12305 (+0.03%); split: -0.01%, +0.04%
PreSGPRs: 10266 -> 10268 (+0.02%)

Closes: #7024
Cc: mesa-stable
Tested-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18722>

radeonsi: enable glthread by default

Let's enable it and see what happens. This should mostly be a win.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

glthread: execute glSignalSemaphoreEXT synchronously

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

radeonsi: don't flush asynchronously for fence_server_signal

See the comment.

Fixes: 21b3a234 - mesa: fix SignalSemaphoreEXT behavior

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

radeonsi/ci: add glx@glx-swap-event_async to CI failures for glthread

The test can't pass because glXSwapBuffers now executes GL functions,
which the test doesn't expect. It's a test defect IMO.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

driconf: disable glthread for DeusEx:MD and F1 2015 due to a perf drop

glthread decreases performance for DeusEx:MD by 7.8% and F1 2015 by 5.7%.
I think that other Feral games are affected similarly.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

radeonsi: simplify radeonsi_zerovram implementation

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

egl/wayland: fix glthread crashes

glthread unmarshalling thread cannot run concurrently with code that alloc
the back bo or the code that perform the swaps.
Ensure this by running dri2_flush_drawable_for_swapbuffers early.

Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

frontend/dri: sync glthread when calling from the app side

The comments explain the reasons.

This is a prerequisite for glthread to be used by native drivers, swrast,
and zink.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

frontend/dri: make the backgroundCallable extension optional

It's only needed by X11/DRI2. This allows glthread to be used by android,
drm, wayland, and device (EGL backend).

This is the only solution to allow the egl/drm backend to work with glthread
without ugly hacks between libgbm and libEGL.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

glthread: work around GL_INVALID_OPERATION with OpenGL ES 1.x draws

GLES1 only has (Multi)Draw{Array,Elements}, but glthread converts them
to the more complicated versions and then calls them through the dispatch,
which generated GL_INVALID_OPERATION.

Luckily, we can export them with the Internal prefix, so they are unlikely
to be used by apps by accident.

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

glthread: fix glGetIntegerv(GL_CLIENT_ACTIVE_TEXTURE)

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

glthread: always sync for glShaderSource because invalid params can crash

If an invalid parameter is received along with an invalid pointer and we
ignore the invalid parameter and dereference the pointer, we crash.
Since we can't fully validate all parameters (such as whether "shader"
is a valid object ID), remove the custom code.

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

glthread: generate errors for glGet functions between glBegin/End

Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

glthread: fix draws not compiled into a display list should generate an error

Before it just crashed if indices were invalid.

Cc: stable
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

mesa: fix glDrawRangeElementsBaseVertex should be compiled into display list

It's defined in terms of glDrawRangeElements, which is compiled into display
lists.

Cc: stable
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18223>

anv: add support for EXT_mutable_descriptor_type

v2: Update docs/features.txt (Tapani)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18688>

anv: clear descriptorsets if AllocateDescriptorSets fails

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7285
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18719>

anv: trace xfb queries

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467>

intel/utrace: make blorp tracepoints more readable

With the operation name and some formats.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467>

blorp: defined operations for debug purposes

We add a mapping for blorp_op -> intel_snapshot

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467>

anv: add missing tracepoint

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3501a3f9ed92 ("anv: Convert to 100% dynamic rendering")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467>

aco: Use v_fmaak/v_fmamk if two operands are the same literal.

Foz-DB Navi21:
Totals from 5744 (4.26% of 134913) affected shaders:
VGPRs: 237128 -> 237056 (-0.03%); split: -0.04%, +0.01%
CodeSize: 16654484 -> 16620668 (-0.20%); split: -0.23%, +0.03%
MaxWaves: 152838 -> 152846 (+0.01%)
Instrs: 3063214 -> 3058572 (-0.15%); split: -0.17%, +0.02%
Latency: 23935195 -> 23934827 (-0.00%); split: -0.03%, +0.03%
InvThroughput: 5478562 -> 5478160 (-0.01%); split: -0.01%, +0.01%
VClause: 60432 -> 60435 (+0.00%); split: -0.02%, +0.03%
SClause: 121032 -> 120896 (-0.11%); split: -0.20%, +0.09%
Copies: 147865 -> 143144 (-3.19%); split: -3.59%, +0.40%
PreSGPRs: 195722 -> 195661 (-0.03%); split: -0.06%, +0.03%
PreVGPRs: 182849 -> 182787 (-0.03%)

Foz-DB Vega10:
Totals from 5290 (3.92% of 135041) affected shaders:
SGPRs: 357952 -> 359616 (+0.46%); split: -0.11%, +0.57%
VGPRs: 204048 -> 203928 (-0.06%); split: -0.08%, +0.02%
CodeSize: 14043176 -> 14003100 (-0.29%); split: -0.29%, +0.00%
MaxWaves: 39401 -> 39398 (-0.01%); split: +0.01%, -0.02%
Instrs: 2636739 -> 2631246 (-0.21%); split: -0.21%, +0.00%
Latency: 25264088 -> 25256482 (-0.03%); split: -0.05%, +0.02%
InvThroughput: 12039643 -> 12039346 (-0.00%); split: -0.00%, +0.00%
VClause: 55603 -> 55584 (-0.03%); split: -0.04%, +0.00%
SClause: 101577 -> 101342 (-0.23%); split: -0.30%, +0.07%
Copies: 213344 -> 207929 (-2.54%); split: -2.58%, +0.05%
Branches: 34053 -> 34054 (+0.00%)
PreSGPRs: 172405 -> 172260 (-0.08%)

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18645>

tu: Expose Vulkan 1.3

We have all required functionality implemented, and DXVK now requires
Vulkan 1.3.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18709>

tu: Initial implementation of VK_EXT_graphics_pipeline_library

Now that the state for each pipeline is split into pieces, we can mostly
implement it by stitching together the pieces. One TODO is that we could
do more to split up the pre-rast and FS commands into separate draw
states so that we have to emit less commands when fast linking,
currently we compile the variants but delay emitting the commands until
link time, but note that even the Gallium driver doesn't currently do
this. Given the strict SSO model (e.g. with separate VPC registers for
each stage) it may even be possible to do most of the linking ahead of
time with only a few fixups for corner cases.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Abstract driver-specific const state

Right now, we pass around the push constant state in a lot of places,
but we'll want to add other driver-managed constants. Add a struct which
we can add to, and separate out the total driver-reserved constants from
the size of push constants.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Use vk_pipeline_shader_stage_to_nir

This will be necessary for graphics pipeline libraries where pipeline
stages can have the SPIR-V inline.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Split up prim order computation

With pipeline libraries, computing this might have to be delayed because
it depends on multiple pieces of state and there's no way to disentangle
them. Therefore we have to store the requisite state in the pipeline and
combine it later.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Move no_earlyz computation to blend/msaa state

This removes the last dependency of FS outputs on blend/MSAA state.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Emit *_OUTPUT_CNTL1 as part of blend state

This further decouples the fragment shader from the blend state.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu, ir3: Determine dual-src blend from shader for FS outputs

The other state in this register comes from the FS, so determine whether
dual-source blending is enabled from the FS too, in order to avoid
entangling FS state and output state that with graphics pipeline library
can be in different pipelines.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Don't use output state to compute render components

If there are disabled attachments that are nevertheless written to, they
should already be disabled in the blend state, via the same mechanism as
color_write_enable, so there should be no reason to mix the FS state and
blend state like this. This helps unentangle state that in graphics
pipeline library can be provided in different pipelines.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu, ir3: Move multi_pos_output to ir3_shader_variant

This means it has to be rederived rather than passed from the place
where we actually do the optimization, but it eliminates the clutter of
having to pass it around in turnip, which will only get worse with
graphics pipeline libraries.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Don't use layer_zero/view_zero in shader key

Instead force gl_Layer and gl_Viewport to 0 by setting registers.
Using the shader key would be against the spirit of GPL if it lead to
linking needing a recompile.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Nuke tu_pipeline_cache

This is just a leftover from the never-finished pipeline cache copied
from another driver, we use vk_pipeline_cache now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

ir3: Don't use msaa key for a6xx+

In the compiler, this was only used to replace some inputs in the
non-MSAA case which apparently no longer need to be replaced anymore,
probably because we clarified some registers related to them and started
setting them better. In the pipeline libraries case we may not have
access to the sample locations state when compiling the FS (although we
do know whether sample shading is enabled), so this removes a
problematic state dependency in turnip.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Split out primtype calculation for tess

With pipeline libraries, we may not know the HW primtype if the user
passes a primtype of PATCHES because the tess shaders and input assembly
state may be in different pipelines. We need to split out the patch
control points and only determine the final primtype once everything has
been merged. In preparation for this, and for dynamic patch control
points, calculate the final primtype dynamically. We already had a
draw-time workaround for dynamic primtype we can now remove, so this
actually reduces the amount of draw-time work we have to do anyway.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Make MSAA emission always dynamic

This wasn't taking into account the dynamic primitive topology, and it
was suboptimal with dynamic rendering, because we don't know when
compiling the pipeline whether variable multisample rate is being used.
It's going to be even more difficult to support the current approach
with graphics pipeline library because the MSAA state is derived from
mulisample state, rasterization state, input assembly state, and
tessellation state, which may be in different pipelines. Just set it
dynamically based on the pipeline and re-emit it when the pipeline's
MSAA or rectangular/bresenham state differs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Always set RB_BLIT_GMEM_MSAA_CNTL when clearing GMEM

We weren't setting it in the CmdClearAttachments case. With this, we can
stop setting it in tu6_emit_msaa(), which only happened to work and
would break things in the next commit when we move it to a draw state.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Rename RB_MSAA_CNTL to RB_BLIT_GMEM_MSAA_CNTL

Based on experiments and what the blob does, this actually controls the
number of samples in GMEM for CP_EVENT_WRITE::BLIT. Rename it
accordingly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Group pipeline state based on VkPipeline*StateCreateInfo

This will help us to merge state when combining pipelines.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Remove unused need_indirect_descriptor_sets

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Fix case where vertex input is set but not vertex buffers

Some CTS tests, in particular,
dEQP-VK.pipeline.pipeline_library.graphics_library.misc.independent_pipeline_layout_sets.*,
do the following:

1. Create a pipeline with a vertex input struct that defines a single
   attribute pointing to vertex buffer #0, but a vertex shader that
   doesn't use any attributes.
2. Bind the pipeline, but don't call vkCmdBindVertexBuffers(), then
   draw.

Other drivers handle this just fine because the vertex input registers
are never used. However we have an optimization in turnip where we
pre-calculate the size of the vertex buffer draw state when the vertex
input draw state is bound, which results in a vertex buffer draw state
with non-zero size but zero iova, resulting in hangs. While it's
questionable whether this is allowed, it's easy enough to just disable
the draw state in that case.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

tu: Also set SP_FS_MRT_REG for unused attachments

This fixes some flakes with
dEQP-VK.pipeline.monolithic.multisample.alpha_to_coverage_unused_attachment.samples_2.alpha_opaque
on a650 with some other patches on top. I believe this is also the
source of the flakes on a630.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>

radv: emit the rasterization samples through an user SGPR if needed

When the main FS needs sample positions and the number of samples
isn't known at compile time with GPL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>

radv: add barycentric_at_sample lowering when the number of samples is dynamic

Use two different paths (static vs dynamic) to avoid running more NIR
pass to remove dead CF code when static is used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>

nir,radv: pass the number of samples to load_sample_positions_amd

This will be used to lower it when it's dynamic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>

radv: lower nir_load_rasterization_samples_amd in ABI

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>

nir: add nir_load_rasterization_samples_amd

This will be used to load the number of rasterization samples when a
fragment shader is compiled inside a library without the MSAA state.
RADV needs to know the number of samples for loading sample positions
with interpolateAtSample().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>

radv: declare shader arguments for the number of samples for FS

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>

radv: add radv_pipeline_key::dynamic_rasterization_samples

With GPL, it's possible to build the main FS without the multisample
state, but the number of rasterization samples is required for
lowering interpolateAtSample(). In this rare situation, the number of
samples will be passed through a new user SGPR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>

radv: constify radv_lookup_user_sgpr()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18677>

radv: acquire pstate on-demand when capturing with RGP

AMDGPU pstate is per-device, not per Vulkan logical devices. The same
AMDGPU device is shared accross logical devices because the driver
creates only one winsys per fd. The kernel only allows one context
at a time per AMDGPU device, otherwise it returns -EBUSY.

Fixes this by acquiring pstate on-demand to avoid this multiple
logical device problem.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17712>

radv: rename radv_thread_trace_set_pstate() to radv_device_set_pstate()

Setting pstate is used for RGP captures and performance counters, so
this name is more generic. Also make it non static.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17712>

intel/compiler: add support for 8/16 bits task payload loads

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18501>

intel/compiler: refactor brw_nir_lower_mem_access_bit_sizes

Change dup_mem_intrinsic return type.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18501>

intel/compiler/task: use shared memory for small task payload loads & stores

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18501>

nir/lower_task_shader: lower small stores & loads to shared when requested

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18501>