Matt Arsenault [Mon, 9 Sep 2019 15:44:16 +0000 (15:44 +0000)]
AMDGPU/GlobalISel: Fix reg bank for uniform LDS loads
The pointer is always a VGPR. Also fix hardcoding the pointer size to
64.
llvm-svn: 371411
Diogo N. Sampaio [Mon, 9 Sep 2019 15:39:45 +0000 (15:39 +0000)]
[NFC] Add aacps bitfields access test
llvm-svn: 371410
Matt Arsenault [Mon, 9 Sep 2019 15:39:32 +0000 (15:39 +0000)]
AMDGPU/GlobalISel: Use known bits for selection
llvm-svn: 371409
Ilya Biryukov [Mon, 9 Sep 2019 15:32:51 +0000 (15:32 +0000)]
[clangd] Use pre-populated mappings for standard symbols
Summary:
This takes ~5% of time when running clangd unit tests.
To achieve this, move mapping of system includes out of CanonicalIncludes
and into a separate class
Reviewers: sammccall, hokein
Reviewed By: sammccall
Subscribers: MaskRay, jkorous, arphaman, kadircet, jfb, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67172
llvm-svn: 371408
Matt Arsenault [Mon, 9 Sep 2019 15:20:49 +0000 (15:20 +0000)]
AMDGPU/GlobalISel: Legalize wavefrontsize intrinsic
llvm-svn: 371407
Matt Arsenault [Mon, 9 Sep 2019 15:20:44 +0000 (15:20 +0000)]
AMDGPU/GlobalISel: Try generated matcher before add/sub code
This will allow optimization patterns which fold adds away to work.
llvm-svn: 371406
Simon Tatham [Mon, 9 Sep 2019 15:17:26 +0000 (15:17 +0000)]
[ARM] Remove some spurious MVE reduction instructions.
The family of 'dual-accumulating' vector multiply-add instructions
(VMLADAV, VMLALDAV and VRMLALDAVH) can all operate on both signed and
unsigned integer types, and they all have an 'exchange' variant (with
an X in the name) that modifies which pairs of vector lanes in the two
inputs are multiplied together. But there's a clause in the spec that
says that the X variants //don't// operate on unsigned integer types,
only signed. You can have X, or unsigned, or neither, but not both.
We didn't notice that clause when we implemented the MC support for
these instructions, so LLVM believes that things like VMLADAVX.U8 do
exist, contradicting the spec. Here I fix that by conditioning them
out in Tablegen.
In order to do that, I've reversed the nesting order of the Tablegen
multiclasses for those instructions. Previously, the innermost
multiclass generated the X and not-X variants, and the one outside
that generated the A and not-A variants. Now X is done by the outer
multiclass, which allows me to bypass that one when I only want the
two not-X variants.
Changing the multiclass nesting order also changes the names of the
instruction ids unless I make a special effort not to. I decided that
while I was changing them anyway I'd make them look nicer; so now the
instructions have names like MVE_VMLADAVs32 or MVE_VMLADAVaxs32,
instead of cumbersome _noacc_noexch suffixes.
The corresponding multiply-subtract instructions are unaffected. Those
don't accept unsigned types at all, either in the spec or in LLVM.
Reviewers: ostannard, dmgreen
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67214
llvm-svn: 371405
Matt Arsenault [Mon, 9 Sep 2019 15:06:06 +0000 (15:06 +0000)]
AMDGPU/GlobalISel: Remove dead patterns
llvm-svn: 371404
Sven van Haastregt [Mon, 9 Sep 2019 14:39:20 +0000 (14:39 +0000)]
Merge note_ovl_builtin_candidate diagnostics; NFC
There is no difference between the unary and binary case, so
merge them.
llvm-svn: 371403
Ilya Biryukov [Mon, 9 Sep 2019 14:33:10 +0000 (14:33 +0000)]
[clangd] Add a new highlighting kind for typedefs
Summary:
We still attempt to highlight them as underlying types, but fallback to
the generic 'typedef' highlighting kind if the underlying type is too
complicated.
Reviewers: hokein
Reviewed By: hokein
Subscribers: nridge, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67290
llvm-svn: 371402
Roman Lebedev [Mon, 9 Sep 2019 14:27:39 +0000 (14:27 +0000)]
[NFC][InstCombine] Fixup test i added in rL371352.
llvm-svn: 371401
Ed Maste [Mon, 9 Sep 2019 13:50:20 +0000 (13:50 +0000)]
compiler-rt: use fp_t instead of long double, for consistency
Most builtins accepting or returning long double use the fp_t typedef.
Change the remaining few cases to do so.
Differential Revision: https://reviews.llvm.org/D35034
llvm-svn: 371400
James Molloy [Mon, 9 Sep 2019 13:17:55 +0000 (13:17 +0000)]
[DFAPacketizer] Reapply: Track resources for packetized instructions
Reapply with fix to reduce resources required by the compiler - use
unsigned[2] instead of std::pair. This causes clang and gcc to compile
the generated file multiple times faster, and hopefully will reduce
the resource requirements on Visual Studio also. This fix is a little
ugly but it's clearly the same issue the previous author of
DFAPacketizer faced (the previous tables use unsigned[2] rather uglily
too).
This patch allows the DFAPacketizer to be queried after a packet is formed to work out which
resources were allocated to the packetized instructions.
This is particularly important for targets that do their own bundle packing - it's not
sufficient to know simply that instructions can share a packet; which slots are used is
also required for encoding.
This extends the emitter to emit a side-table containing resource usage diffs for each
state transition. The packetizer maintains a set of all possible resource states in its
current state. After packetization is complete, all remaining resource states are
possible packetization strategies.
The sidetable is only ~500K for Hexagon, but the extra tracking is disabled by default
(most uses of the packetizer like MachinePipeliner don't care and don't need the extra
maintained state).
Differential Revision: https://reviews.llvm.org/D66936
llvm-svn: 371399
Fangrui Song [Mon, 9 Sep 2019 13:08:51 +0000 (13:08 +0000)]
[ELF] nmagic or omagic: don't allocate PT_PHDR or PF_R PT_LOAD for the !hasPhdrsCommands case
```
part.phdrs = script->hasPhdrsCommands() ? script->createPhdrs() : createPhdrs(part);
```
createPhdrs() allocates a PT_PHDR and a PF_R PT_LOAD, which will be
deleted later in LinkerScript::allocateHeaders, but leave a gap between
the program headers and the first section. Don't allocate the segments
to avoid the gap. PT_INTERP is likely not needed as well.
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D67324
llvm-svn: 371398
Clement Courbet [Mon, 9 Sep 2019 13:08:16 +0000 (13:08 +0000)]
[Inliner][NFC] Make test less brittle.
Summary:
This tests inlining size thresholds, but relies on the output of running
the full O2 pipeline, making it brittle against changes in unrelated
passes.
Only run the inlining pass and set thresholds on the test RUN line
instead.
Found while investigating D60318.
Reviewers: RKSimon, qcolombet
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67349
llvm-svn: 371397
Yitzhak Mandelbaum [Mon, 9 Sep 2019 12:59:14 +0000 (12:59 +0000)]
[clang-tidy] Fix bug in bugprone-use-after-move check
Summary:
The bugprone-use-after-move check exhibits false positives for certain uses of
the C++17 if/switch init statements. These false positives are caused by a bug
in the ExprSequence calculations.
This revision adds tests for the false positives and fixes the corresponding
sequence calculation.
Reviewers: gribozavr
Subscribers: xazax.hun, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67292
llvm-svn: 371396
Sam Parker [Mon, 9 Sep 2019 12:54:47 +0000 (12:54 +0000)]
[ARM][MVE] VCTP instruction selection
Add codegen support for vctp{8,16,32}.
Differential Revision: https://reviews.llvm.org/D67344
llvm-svn: 371395
Fangrui Song [Mon, 9 Sep 2019 12:42:10 +0000 (12:42 +0000)]
[clang-doc] sys::fs::F_None -> OF_None. NFC
F_None, F_Text and F_Append are kept for compatibility.
llvm-svn: 371394
Simon Pilgrim [Mon, 9 Sep 2019 12:33:22 +0000 (12:33 +0000)]
Revert rL371198 from llvm/trunk: [DFAPacketizer] Track resources for packetized instructions
This patch allows the DFAPacketizer to be queried after a packet is formed to work out which
resources were allocated to the packetized instructions.
This is particularly important for targets that do their own bundle packing - it's not
sufficient to know simply that instructions can share a packet; which slots are used is
also required for encoding.
This extends the emitter to emit a side-table containing resource usage diffs for each
state transition. The packetizer maintains a set of all possible resource states in its
current state. After packetization is complete, all remaining resource states are
possible packetization strategies.
The sidetable is only ~500K for Hexagon, but the extra tracking is disabled by default
(most uses of the packetizer like MachinePipeliner don't care and don't need the extra
maintained state).
Differential Revision: https://reviews.llvm.org/D66936
........
Reverted as this is causing "compiler out of heap space" errors on MSVC 2017/19 NDEBUG builds
llvm-svn: 371393
Kadir Cetinkaya [Mon, 9 Sep 2019 12:28:44 +0000 (12:28 +0000)]
[clangd] Support multifile edits as output of Tweaks
Summary:
First patch for propogating multifile changes from tweak outputs to LSP
WorkspaceEdits.
Uses SM to convert tooling::Replacements to TextEdits.
Errors out if there are any inconsistencies between the draft version and the
version generated the edits.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D66637
llvm-svn: 371392
Sam McCall [Mon, 9 Sep 2019 11:34:01 +0000 (11:34 +0000)]
[clangd] Update clangd-vscode docs to be more user-focused.
Summary: Relegate "updating the extension" docs to a separate file.
Reviewers: hokein, kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67092
llvm-svn: 371390
Fangrui Song [Mon, 9 Sep 2019 11:22:27 +0000 (11:22 +0000)]
[ELF][AArch64] Apply some NFC cleanups to AArch64ErrataFix.cpp
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D67310
llvm-svn: 371389
Cullen Rhodes [Mon, 9 Sep 2019 11:21:14 +0000 (11:21 +0000)]
[AArch64][SVE] Implement abs and neg intrinsics
Summary:
This patch implements two arithmetic intrinsics:
* int_aarch64_sve_abs
* int_aarch64_sve_neg
testing the support for scalable vector types in intrinsics added in D65930.
Reviewed By: greened
Differential Revision: https://reviews.llvm.org/D65931
llvm-svn: 371388
David Green [Mon, 9 Sep 2019 10:46:25 +0000 (10:46 +0000)]
[ARM] Prevent generating NEON stack accesses under MVE.
We should not be generating Neon stack loads/stores even for these large
registers.
No test here because my understanding is we will only generate these QQPR regs
for intrinsics and VLDn's. The tests will follow once those are available.
Differential revision: https://reviews.llvm.org/D67169
llvm-svn: 371386
Tim Northover [Mon, 9 Sep 2019 10:36:58 +0000 (10:36 +0000)]
GlobalISel: fix unused warnings in release builds.
llvm-svn: 371385
Tim Northover [Mon, 9 Sep 2019 10:04:23 +0000 (10:04 +0000)]
GlobalISel: add combiner to form indexed loads.
Loosely based on DAGCombiner version, but this part is slightly simpler in
GlobalIsel because all address calculation is performed by G_GEP. That makes
the inc/dec distinction moot so there's just pre/post to think about.
No targets can handle it yet so testing is via a special flag that overrides
target hooks.
llvm-svn: 371384
George Rimar [Mon, 9 Sep 2019 09:55:56 +0000 (09:55 +0000)]
[yaml2obj] - Fix BB after r371380
Just a fix for an input file name.
llvm-svn: 371383
George Rimar [Mon, 9 Sep 2019 09:43:03 +0000 (09:43 +0000)]
[lib/ObjectYAML] - Improve and cleanup error reporting in ELFState<ELFT> class.
The aim of this patch is to refactor how we handle and report error.
I suggest to use the same approach we use in LLD: delayed error reporting.
For that I introduced 'HasError' flag which triggers when we report an error.
Now we do not exit instantly on any error. The benefits are:
1) There are no more 'exit(1)' calls in the library code.
2) Code was simplified significantly in a few places.
3) It is now possible to print multiple errors instead of only one.
Also, I changed the messages to be lower case and removed a full stop.
Differential revision: https://reviews.llvm.org/D67182
llvm-svn: 371380
Ilya Biryukov [Mon, 9 Sep 2019 09:37:17 +0000 (09:37 +0000)]
[clangd] Highlight typedefs to template parameters as template parameters
Summary:
Template parameters were handled outside `addType`, this led to lack of highlightings for typedefs
to template types.
This was never desirable, we want to highlight our typedefs as their underlying type.
Note that typedefs to more complicated types, like pointers and references are still not highlighted.
Original patch by Johan Vikström.
Reviewers: hokein, jvikstrom
Reviewed By: hokein
Subscribers: nridge, javed.absar, kristof.beyls, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D66516
llvm-svn: 371379
Ilya Biryukov [Mon, 9 Sep 2019 08:57:17 +0000 (08:57 +0000)]
[clangd] Replace HighlightingKind::NumKinds with LastKind. NFC
Summary:
The latter simplifies the client code by avoiding the need to handle it
as a separate case statement.
Reviewers: hokein
Reviewed By: hokein
Subscribers: nridge, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67277
llvm-svn: 371375
Oliver Stannard [Mon, 9 Sep 2019 08:50:28 +0000 (08:50 +0000)]
[ARM][MVE] Decoding of uqrshl and sqrshl accepts unpredictable encodings
Specify the Unpredictable bits, and return softfails when appropriate.
Patch by Mark Murray!
Differential revision: https://reviews.llvm.org/D66939
llvm-svn: 371374
Ilya Biryukov [Mon, 9 Sep 2019 08:47:05 +0000 (08:47 +0000)]
[clangd] Improve output of semantic highlighting tests in case of failures
Summary:
Instead of matching lists of highlightings, we annotate input code with
resulting highlightings and diff it against the expected annotated input.
In case of failures, this produces much nicer output in form of text-based
diffs.
Reviewers: hokein
Reviewed By: hokein
Subscribers: nridge, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D67274
llvm-svn: 371373
Sam Parker [Mon, 9 Sep 2019 08:39:14 +0000 (08:39 +0000)]
[ARM][ParallelDSP] Fix for sext input
The incoming accumulator value can be discovered through a sext, in
which case there will be a mismatch between the input and the result.
So sign extend the accumulator input if we're performing a 64-bit mac.
Differential Revision: https://reviews.llvm.org/D67220
llvm-svn: 371370
Jonas Paulsson [Mon, 9 Sep 2019 07:58:57 +0000 (07:58 +0000)]
[SystemZ] NFC: use clearRegisterDeads() in SystemZElimCompare.cpp
This is simpler than using findRegisterDefOperandIdx() + setIsDead().
Review: Ulrich Weigand.
llvm-svn: 371369
Craig Topper [Mon, 9 Sep 2019 07:46:11 +0000 (07:46 +0000)]
[X86] Add broadcast load unfolding support for vpcmpeq/vpcmpgt/vpcmp/vpcmpu.
llvm-svn: 371368
Craig Topper [Mon, 9 Sep 2019 07:46:07 +0000 (07:46 +0000)]
[X86] Add broadcast load unfolding tests for vpcmpeq/vpcmpgt/vpcmp/vpcmpu.
llvm-svn: 371367
Craig Topper [Mon, 9 Sep 2019 06:32:24 +0000 (06:32 +0000)]
[X86] Add broadcast load unfold support for smin/umin/smax/umax.
llvm-svn: 371366
Craig Topper [Mon, 9 Sep 2019 06:32:20 +0000 (06:32 +0000)]
[X86] Add broadcast load unfolding tests for smin/umin/smax/smin.
llvm-svn: 371365
Matt Arsenault [Mon, 9 Sep 2019 05:49:52 +0000 (05:49 +0000)]
AMDGPU: Remove pointless wrapper nodes for init.exec intrinsics
llvm-svn: 371364
Craig Topper [Mon, 9 Sep 2019 04:25:01 +0000 (04:25 +0000)]
[X86] Add broadcast load unfolding support for VMAXPS/PD and VMINPS/PD.
llvm-svn: 371363
Craig Topper [Mon, 9 Sep 2019 04:24:57 +0000 (04:24 +0000)]
[X86] Add broadcast load unfolding tests for vmaxps/pd and vminps/pd
llvm-svn: 371362
Fangrui Song [Mon, 9 Sep 2019 03:35:14 +0000 (03:35 +0000)]
[ELF][test] Improve and reorganize another set of tests
Add file-level comments
Replace trivial Input/*.s with echo ... | llvm-mc
Delete insignificant addresses to make them more tolerant to layout changes
Simplify test output
Merge merge-section-types.s into compatible-section-types.s and add a missed case
Merge gnu-ifunc-gotpcrel.s (added in D19517) into gnu-ifunc-dso.s (added in D35119) and add missed cases
Delete typed-undef.s - covered by executable-undefined-ignoreall.s
Delete emit-relocs-shared.s - covered by emit-relocs-merge.s
Replace copy-rel-pie.s and copy-rel-pie2.s with canonical-plt-pcrel.s, canonical-plt-symbolic.s and copy-rel.s:
add -no-pie cases.
add a case that a canonical PLT can be created for STT_GNU_IFUNC. The logic in Symbols.h was untested:
// ctor of SharedSymbol
if (this->type == llvm::ELF::STT_GNU_IFUNC)
this->type = llvm::ELF::STT_FUNC;
llvm-svn: 371361
Craig Topper [Mon, 9 Sep 2019 02:44:46 +0000 (02:44 +0000)]
[X86] Add fp128 test cases for ceil/floor/trunc/nearbyint/rint/round libcalls.
llvm-svn: 371360
Kai Luo [Mon, 9 Sep 2019 02:32:42 +0000 (02:32 +0000)]
[MachineCopyPropagation] Remove redundant copies after TailDup via machine-cp
Summary:
After tailduplication, we have redundant copies. We can remove these
copies in machine-cp if it's safe to, i.e.
```
$reg0 = OP ...
... <<< No read or clobber of $reg0 and $reg1
$reg1 = COPY $reg0 <<< $reg0 is killed
...
<RET>
```
will be transformed to
```
$reg1 = OP ...
...
<RET>
```
Differential Revision: https://reviews.llvm.org/D65267
llvm-svn: 371359
Craig Topper [Mon, 9 Sep 2019 01:35:04 +0000 (01:35 +0000)]
[X86] Add test cases for fptoui/fptosi/sitofp/uitofp between fp128 and i128.
llvm-svn: 371358
Craig Topper [Mon, 9 Sep 2019 01:35:00 +0000 (01:35 +0000)]
[X86] Use xorps to create fp128 +0.0 constants.
This matches what we do for f32/f64. gcc also does this for fp128.
llvm-svn: 371357
Craig Topper [Mon, 9 Sep 2019 01:34:55 +0000 (01:34 +0000)]
[X86] Add avx and avx512f RUN lines to fp128-cast.ll
llvm-svn: 371356
Douglas Yung [Mon, 9 Sep 2019 01:21:33 +0000 (01:21 +0000)]
Relax opcode checks in test to check for only a number instead of a specific number.
llvm-svn: 371355
Kamil Rytarowski [Sun, 8 Sep 2019 23:53:36 +0000 (23:53 +0000)]
Enable LSan for NetBSD/i386 in test/asan/lit.cfg.py
llvm-svn: 371354
Simon Pilgrim [Sun, 8 Sep 2019 21:38:33 +0000 (21:38 +0000)]
[X86][SSE] SimplifyDemandedVectorEltsForTargetNode - add faux shuffle support.
This patch decodes target and faux shuffles with getTargetShuffleInputs - a reduced version of resolveTargetShuffleInputs that doesn't resolve SM_SentinelZero cases, so we can correctly remove zero vectors if they aren't demanded.
llvm-svn: 371353
Roman Lebedev [Sun, 8 Sep 2019 21:30:34 +0000 (21:30 +0000)]
[InstCombine][NFC] Some tests for usub overflow+nonzero check improvement (PR43251)
https://rise4fun.com/Alive/kHq
https://bugs.llvm.org/show_bug.cgi?id=43251
llvm-svn: 371352
Craig Topper [Sun, 8 Sep 2019 20:56:09 +0000 (20:56 +0000)]
[X86] Add a hack to combineVSelectWithAllOnesOrZeros to turn selects with two zero/undef vector inputs into an all zeroes vector.
If the two zero vectors have undefs in different places they
won't get combined by simplifySelect.
This fixes a regression from an earlier commit.
llvm-svn: 371351
Craig Topper [Sun, 8 Sep 2019 20:56:05 +0000 (20:56 +0000)]
[X86] Remove call to getZeroVector from materializeVectorConstant. Add isel patterns for zero vectors with all types.
The change to avx512-vec-cmp.ll is a regression, but should be
easy to fix. It occurs because the getZeroVector call was
canonicalizing both sides to the same node, then SimplifySelect
was able to simplify it. But since only called getZeroVector
on some VTs this isn't a robust way to combine this.
The change to vector-shuffle-combining-ssse3.ll is more
instructions, but removes a constant pool load so its unclear
if its a regression or not.
llvm-svn: 371350
Roman Lebedev [Sun, 8 Sep 2019 20:14:15 +0000 (20:14 +0000)]
[InstSimplify] simplifyUnsignedRangeCheck(): if we know that X != 0, handle more cases (PR43246)
Summary:
This is motivated by D67122 sanitizer check enhancement.
That patch seemingly worsens `-fsanitize=pointer-overflow`
overhead from 25% to 50%, which strongly implies missing folds.
In this particular case, given
```
char* test(char& base, unsigned long offset) {
return &base + offset;
}
```
it will end up producing something like
https://godbolt.org/z/LK5-iH
which after optimizations reduces down to roughly
```
define i1 @t0(i8* nonnull %base, i64 %offset) {
%base_int = ptrtoint i8* %base to i64
%adjusted = add i64 %base_int, %offset
%non_null_after_adjustment = icmp ne i64 %adjusted, 0
%no_overflow_during_adjustment = icmp uge i64 %adjusted, %base_int
%res = and i1 %non_null_after_adjustment, %no_overflow_during_adjustment
ret i1 %res
}
```
Without D67122 there was no `%non_null_after_adjustment`,
and in this particular case we can get rid of the overhead:
Here we add some offset to a non-null pointer,
and check that the result does not overflow and is not a null pointer.
But since the base pointer is already non-null, and we check for overflow,
that overflow check will already catch the null pointer,
so the separate null check is redundant and can be dropped.
Alive proofs:
https://rise4fun.com/Alive/WRzq
There are more patterns of "unsigned-add-with-overflow", they are not handled here,
but this is the main pattern, that we currently consider canonical,
so it makes sense to handle it.
https://bugs.llvm.org/show_bug.cgi?id=43246
Reviewers: spatel, nikic, vsk
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits, reames
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67332
llvm-svn: 371349
Sanjay Patel [Sun, 8 Sep 2019 19:48:47 +0000 (19:48 +0000)]
[InstCombine] add tests for icmp with srem operand; NFC
llvm-svn: 371348
Roman Lebedev [Sun, 8 Sep 2019 19:36:13 +0000 (19:36 +0000)]
[X86] X86DAGToDAGISel::combineIncDecVector(): call getSplatBuildVector() manually
As reported in post-commit review of r370327,
there is some case where the code crashes.
As discussed with Craig Topper, the problem is that getConstant()
internally calls getSplatBuildVector(), so we don't insert
the constant itself.
If we do that manually we're good.
llvm-svn: 371346
Craig Topper [Sun, 8 Sep 2019 19:24:42 +0000 (19:24 +0000)]
[X86] Use DAG.getConstant instead of getZeroVector in combinePMULDQ.
getZeroVector canonicalizes the type to vXi32, but that's a
legalization action. We should use the most correct type if
possible.
llvm-svn: 371345
Craig Topper [Sun, 8 Sep 2019 19:24:39 +0000 (19:24 +0000)]
[DAGCombiner][X86][ARM] Teach visitMULO to fold multiplies with 0 to 0 and no carry.
I modified the ARM test to use two inputs instead of 0 so the
test hopefully still tests what was intended.
llvm-svn: 371344
Craig Topper [Sun, 8 Sep 2019 19:24:29 +0000 (19:24 +0000)]
[X86] Teach materializeVectorConstant to not call getZeroVector/getOnesVector on the types we already have isel patterns for.
llvm-svn: 371343
Gabor Borsik [Sun, 8 Sep 2019 19:23:43 +0000 (19:23 +0000)]
Move prop-sink branch to monorepo.
llvm-svn: 371342
Sanjay Patel [Sun, 8 Sep 2019 19:03:01 +0000 (19:03 +0000)]
[InstCombine] fold extract+insert into identity shuffle
This is similar to the existing fold for splats added with:
rL365379
If we can adjust the shuffle mask to include another element
in an identity mask (if it changes vector length, that's an
extract/insert subvector operation in the backend), then that
can eliminate extractelement/insertelement pairs in IR.
All targets are expected to lower shuffles with identity masks
efficiently.
llvm-svn: 371340
Roman Lebedev [Sun, 8 Sep 2019 17:50:40 +0000 (17:50 +0000)]
[NFC][InstSimplify] Some tests for dropping null check after uadd.with.overflow of non-null (PR43246)
https://rise4fun.com/Alive/WRzq
Name: C <= Y && Y != 0 --> C <= Y iff C != 0
Pre: C != 0
%y_is_nonnull = icmp ne i64 %y, 0
%no_overflow = icmp ule i64 C, %y
%r = and i1 %y_is_nonnull, %no_overflow
=>
%r = %no_overflow
Name: C <= Y || Y != 0 --> Y != 0 iff C != 0
Pre: C != 0
%y_is_nonnull = icmp ne i64 %y, 0
%no_overflow = icmp ule i64 C, %y
%r = or i1 %y_is_nonnull, %no_overflow
=>
%r = %y_is_nonnull
Name: C > Y || Y == 0 --> C > Y iff C != 0
Pre: C != 0
%y_is_null = icmp eq i64 %y, 0
%overflow = icmp ugt i64 C, %y
%r = or i1 %y_is_null, %overflow
=>
%r = %overflow
Name: C > Y && Y == 0 --> Y == 0 iff C != 0
Pre: C != 0
%y_is_null = icmp eq i64 %y, 0
%overflow = icmp ugt i64 C, %y
%r = and i1 %y_is_null, %overflow
=>
%r = %y_is_null
https://bugs.llvm.org/show_bug.cgi?id=43246
llvm-svn: 371339
Kamil Rytarowski [Sun, 8 Sep 2019 17:07:28 +0000 (17:07 +0000)]
Enable LSan tests for NetBSD/i386
llvm-svn: 371338
Kamil Rytarowski [Sun, 8 Sep 2019 16:15:18 +0000 (16:15 +0000)]
Stop marking 5 ASan tests as failing on NetBSD/i386
Unexpected Passing Tests (4):
AddressSanitizer-i386-netbsd :: TestCases/Posix/coverage-reset.cpp
AddressSanitizer-i386-netbsd :: TestCases/Posix/coverage.cpp
AddressSanitizer-i386-netbsd :: TestCases/Posix/interception-in-shared-lib-test.cpp
AddressSanitizer-i386-netbsd :: TestCases/suppressions-library.cpp
llvm-svn: 371337
Jonas Hahnfeld [Sun, 8 Sep 2019 16:08:54 +0000 (16:08 +0000)]
[ASan] Only run dlopen-mixed-c-cxx.c with static runtime
This is what the original bug (http://llvm.org/PR39641) and the fix
in https://reviews.llvm.org/D63877 have been about.
With the dynamic runtime the test only passes when the asan library
is linked against libstdc++: In contrast to libc++abi, it does not
implement __cxa_rethrow_primary_exception so the regex matches the
line saying that asan cannot intercept this function. Indeed, there
is no message that the runtime failed to intercept __cxa_throw.
Differential Revision: https://reviews.llvm.org/D67298
llvm-svn: 371336
Kamil Rytarowski [Sun, 8 Sep 2019 15:54:48 +0000 (15:54 +0000)]
Enable leak-detection for NetBSD/amd64 in test/asan
llvm-svn: 371335
Kamil Rytarowski [Sun, 8 Sep 2019 15:00:13 +0000 (15:00 +0000)]
Do not intercept malloc_usable_size on NetBSD
llvm-svn: 371334
David Stenberg [Sun, 8 Sep 2019 14:22:06 +0000 (14:22 +0000)]
[DebugInfo][X86] Describe call site values for zero-valued imms
Summary:
Add zero-materializing XORs to X86's describeLoadedValue() hook in order
to produce call site values.
I have had to change the defs logic in collectCallSiteParameters() a bit
to be able to describe the XORs. The XORs implicitly define $eflags,
which would cause them to never be considered, due to a guard condition
that I->getNumDefs() is one. I have changed that condition so that we
now only consider instructions where a forwarded register overlaps with
the instruction's single explicit define. We still need to collect the implicit
defines of other forwarded registers to remove them from the work list.
I'm not sure how to move towards supporting instructions with multiple
explicit defines, cases where forwarded register are implicitly defined,
and/or cases where an instruction produces values for multiple forwarded
registers. Perhaps the describeLoadedValue() hook should take a register
argument, and we then leave it up to the hook to describe the loaded
value in that register? I have not yet encountered a situation where
that would be necessary though.
Reviewers: aprantl, vsk, djtodoro, NikolaPrica
Reviewed By: vsk
Subscribers: ychen, hiraditya, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D67225
llvm-svn: 371333
David Stenberg [Sun, 8 Sep 2019 14:05:10 +0000 (14:05 +0000)]
[NFC] Make the describeLoadedValue() hook return machine operand objects
Summary:
This changes the ParamLoadedValue pair which the describeLoadedValue()
hook returns so that MachineOperand objects are returned instead of
pointers.
When describing call site values we may need to describe operands which
are not part of the instruction. One such example is zero-materializing
XORs on x86, which I have implemented support for in a child revision.
Instead of having to return a pointer to an operand stored somewhere
outside the instruction, start returning objects directly instead, as
that simplifies the code.
The MachineOperand class only holds POD members, and on x86-64 it is 32
bytes large. That combined with copy elision means that the overhead of
returning a machine operand object from the hook does not become very
large.
I benchmarked this on a 8-thread i7-8650U machine with 32 GB RAM. The
benchmark consisted of building a clang 8.0 binary configured with:
-DCMAKE_BUILD_TYPE=RelWithDebInfo \
-DLLVM_TARGETS_TO_BUILD=X86 \
-DLLVM_USE_SANITIZER=Address \
-DCMAKE_CXX_FLAGS="-Xclang -femit-debug-entry-values -stdlib=libc++"
The average wall clock time increased by 4 seconds, from 62:05 to
62:09, which is an 0.1% increase.
Reviewers: aprantl, vsk, djtodoro, NikolaPrica
Reviewed By: vsk
Subscribers: hiraditya, ychen, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D67261
llvm-svn: 371332
David Green [Sun, 8 Sep 2019 13:13:15 +0000 (13:13 +0000)]
[ARM] Remove declaration of unimplemented function. NFC.
llvm-svn: 371331
Simon Pilgrim [Sun, 8 Sep 2019 12:44:22 +0000 (12:44 +0000)]
[X86][SSE] Fix out of range shift introduced in D67070/rL371328
Use APInt to create the comparison mask instead.
llvm-svn: 371330
Simon Pilgrim [Sun, 8 Sep 2019 11:56:07 +0000 (11:56 +0000)]
[X86] Add test case for PR32546
llvm-svn: 371329
Simon Pilgrim [Sun, 8 Sep 2019 11:46:21 +0000 (11:46 +0000)]
[X86][SSE] Add support for <64 x i1> bool reduction
This generalizes the existing <32 x i1> pre-AVX2 split code to support reductions from <64 x i1> as well, we can probably generalize to any larger pow2 case in the future if the (unlikely) need ever arises.
We still need to tweak combineBitcastvxi1 to improve AVX512F codegen as its assumes vXi1 types should be handled on the mask registers even when they aren't legal.
Differential Revision: https://reviews.llvm.org/D67070
llvm-svn: 371328
Xing GUO [Sun, 8 Sep 2019 11:42:51 +0000 (11:42 +0000)]
[StackMap] Current stackmap version should be 3. NFC.
llvm-svn: 371327
Leonard Chan [Sun, 8 Sep 2019 07:30:17 +0000 (07:30 +0000)]
[NewPM][Sancov] Create the Sancov Pass after building the pipelines
We're running into linker errors from missing sancov sections:
```
ld.lld: error: relocation refers to a discarded section: __sancov_guards
>>> defined in user-arm64-ubsan-sancov-full.shlib/obj/third_party/ulib/scudo/scudo.wrappers_c.cc.o
>>> referenced by common.h:26 (../../zircon/third_party/ulib/scudo/common.h:26)
... many other references
```
I believe this is due to a pass in the default pipeline that somehow discards
these sections. The ModuleSanitizerCoveragePass was initially added at the
start of the pipeline. This now adds it to the end of the pipeline for
optimized and unoptimized builds.
Differential Revision: https://reviews.llvm.org/D67323
llvm-svn: 371326
Craig Topper [Sun, 8 Sep 2019 00:43:52 +0000 (00:43 +0000)]
[X86] Make getZeroVector return floating point vectors in their native type on SSE2 and later.
isel used to require zero vectors to be canonicalized to a single
type to minimize the number of patterns needed to match. This is
no longer required.
I plan to do this to integers too, but floating point was simpler
to start with. Integer has a complication where v32i16/v64i8 aren't
legal when the other 512-bit integer types are.
llvm-svn: 371325
Dimitry Andric [Sat, 7 Sep 2019 22:18:20 +0000 (22:18 +0000)]
Remove ::gets for FreeBSD 13 and later
Summary:
In https://svnweb.freebsd.org/changeset/base/351659 @emaste removed gets() from
FreeBSD 13's libc, and our copies of libc++ and libstdc++. In that change, the
declarations were simply deleted, but I would like to propose this conditional
test instead.
Reviewers: EricWF, mclow.lists, emaste
Reviewed By: mclow.lists
Subscribers: krytarowski, christof, ldionne, emaste, libcxx-commits
Differential Revision: https://reviews.llvm.org/D67316
llvm-svn: 371324
Craig Topper [Sat, 7 Sep 2019 21:54:40 +0000 (21:54 +0000)]
[X86] Add support for unfold broadcast loads from FMA instructions.
llvm-svn: 371323
Craig Topper [Sat, 7 Sep 2019 21:54:36 +0000 (21:54 +0000)]
[X86] Add broadcast load unfolding tests for FMA instructions.
llvm-svn: 371322
Sebastian Pop [Sat, 7 Sep 2019 20:24:51 +0000 (20:24 +0000)]
[aarch64] Add combine patterns for fp16 fmla
This patch enables generation of fused multiply add/sub for instructions operating on fp16.
Tested on aarch64-linux.
Differential Revision: https://reviews.llvm.org/D67297
llvm-svn: 371321
Aaron Ballman [Sat, 7 Sep 2019 20:14:09 +0000 (20:14 +0000)]
Fixes an assertion while instantiating a template with an incomplete typo-corrected type.
Fixes PR35682. When a template in instantiated with an incomplete typo corrected type an assertion can trigger if the -ferror-limit is used to reduce the number of errors.
Patch by Mark de Wever.
llvm-svn: 371320
Craig Topper [Sat, 7 Sep 2019 19:54:22 +0000 (19:54 +0000)]
[X86] Add prefer-128-bit subtarget feature.
Summary:
Similar to the previous prefer-256-bit flag. We might want to
enable this by default some CPUs. This just starts the initial
work to implement and prove that it effects TTI's vector width.
Reviewers: RKSimon, echristo, spatel, atdt
Reviewed By: RKSimon
Subscribers: lebedev.ri, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67311
llvm-svn: 371319
George Rimar [Sat, 7 Sep 2019 19:45:27 +0000 (19:45 +0000)]
[llvm-nm] - Fix a bug and unbreak ASan BB.
BB: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/13820/steps/check-llvm%20asan/logs/stdio
rL371074 revealed a bug in llvm-nm.
This patch fixes it.
llvm-svn: 371318
Simon Pilgrim [Sat, 7 Sep 2019 18:09:09 +0000 (18:09 +0000)]
Fix typo. NFCI
llvm-svn: 371317
Simon Atanasyan [Sat, 7 Sep 2019 16:31:37 +0000 (16:31 +0000)]
[mips] Follow-up to r371313 - fix failed test case. NFC
llvm-svn: 371316
Simon Pilgrim [Sat, 7 Sep 2019 16:13:57 +0000 (16:13 +0000)]
[X86] Avoid uses of getZextValue(). NFCI.
Use getAPIntValue() directly - this is mainly a best practice style issue to help prevent fuzz tests blowing up when a i12345 (or whatever) is generated.
Use getConstantOperandVal/getConstantOperandAPInt wrappers where possible.
llvm-svn: 371315
Simon Pilgrim [Sat, 7 Sep 2019 16:13:48 +0000 (16:13 +0000)]
[X86][AVX] Add 'f5' v4f64 shuffle test mentioned in D66004
llvm-svn: 371314
Simon Atanasyan [Sat, 7 Sep 2019 15:44:40 +0000 (15:44 +0000)]
[mips] Make another set of test cases more tolerant to exact symbol addresses. NFC
llvm-svn: 371313
Fangrui Song [Sat, 7 Sep 2019 14:58:47 +0000 (14:58 +0000)]
[ELF][MC] Set types of aliases of IFunc to STT_GNU_IFUNC
```
.type foo,@gnu_indirect_function
.set foo,foo_resolver
.set foo2,foo
.set foo3,foo2
```
The types of foo2 and foo3 should be STT_GNU_IFUNC, but we currently
resolve them to the type of foo_resolver. This patch fixes it.
Differential Revision: https://reviews.llvm.org/D67206
Patch by Senran Zhang
llvm-svn: 371312
Roman Lebedev [Sat, 7 Sep 2019 13:53:14 +0000 (13:53 +0000)]
[SimplifyCFG][NFC] Autogenerate PhiEliminate3.ll
llvm-svn: 371311
Roman Lebedev [Sat, 7 Sep 2019 13:35:54 +0000 (13:35 +0000)]
[SimplifyCFG][NFC] Autogenerate two tests
llvm-svn: 371310
Bjorn Pettersson [Sat, 7 Sep 2019 12:16:23 +0000 (12:16 +0000)]
[CodeGen] Handle SMULFIXSAT with scale zero in TargetLowering::expandFixedPointMul
Summary:
Normally TargetLowering::expandFixedPointMul would handle
SMULFIXSAT with scale zero by using an SMULO to compute the
product and determine if saturation is needed (if overflow
happened). But if SMULO isn't custom/legal it falls through
and uses the same technique, using MULHS/SMUL_LOHI, as used
for non-zero scales.
Problem was that when checking for overflow (handling saturation)
when not using MULO we did not expect to find a zero scale. So
we ended up in an assertion when doing
APInt::getLowBitsSet(VTSize, Scale - 1)
This patch fixes the problem by adding a new special case for
how saturation is computed when scale is zero.
Reviewers: RKSimon, bevinh, leonardchan, spatel
Reviewed By: RKSimon
Subscribers: wuzish, nemanjai, hiraditya, MaskRay, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67071
llvm-svn: 371309
Bjorn Pettersson [Sat, 7 Sep 2019 12:16:14 +0000 (12:16 +0000)]
[Intrinsic] Add the llvm.umul.fix.sat intrinsic
Summary:
Add an intrinsic that takes 2 unsigned integers with
the scale of them provided as the third argument and
performs fixed point multiplication on them. The
result is saturated and clamped between the largest and
smallest representable values of the first 2 operands.
This is a part of implementing fixed point arithmetic
in clang where some of the more complex operations
will be implemented as intrinsics.
Patch by: leonardchan, bjope
Reviewers: RKSimon, craig.topper, bevinh, leonardchan, lebedev.ri, spatel
Reviewed By: leonardchan
Subscribers: ychen, wuzish, nemanjai, MaskRay, jsji, jdoerfert, Ka-Ka, hiraditya, rjmccall, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D57836
llvm-svn: 371308
Nikita Popov [Sat, 7 Sep 2019 12:13:44 +0000 (12:13 +0000)]
[X86] Fix pshuflw formation from repeated shuffle mask (PR43230)
Fix for https://bugs.llvm.org/show_bug.cgi?id=43230.
When creating PSHUFLW from a repeated shuffle mask, we have to apply
the checks to the repeated mask, not the original one. For the test
case from PR43230 the inspected part of the original mask is all undef.
Differential Revision: https://reviews.llvm.org/D67314
llvm-svn: 371307
Nikita Popov [Sat, 7 Sep 2019 12:03:59 +0000 (12:03 +0000)]
[LVI] Look through extractvalue of insertvalue
This addresses the issue mentioned on D19867. When we simplify
with.overflow instructions in CVP, we leave behind extractvalue
of insertvalue sequences that LVI no longer understands. This
means that we can not simplify any instructions based on the
with.overflow anymore (until some over pass like InstCombine
cleans them up).
This patch extends LVI extractvalue handling by calling
SimplifyExtractValueInst (which doesn't do anything more than
constant folding + looking through insertvalue) and using the block
value of the simplification.
A possible alternative would be to do something similar to
SimplifyIndVars, where we instead directly try to replace
extractvalue users of the with.overflow. This would need some
additional structural changes to CVP, as it's currently not legal
to remove anything but the current instruction -- we'd have to
introduce a worklist with instructions scheduled for deletion or similar.
Differential Revision: https://reviews.llvm.org/D67035
llvm-svn: 371306
Nikita Popov [Sat, 7 Sep 2019 12:03:48 +0000 (12:03 +0000)]
[X86] Add test for PR43230; NFC
llvm-svn: 371305
Bjorn Pettersson [Sat, 7 Sep 2019 11:40:10 +0000 (11:40 +0000)]
[DwarfExpression] Disallow some rewrites to avoid undefined behavior
Summary:
The value operand in DW_OP_plus_uconst/DW_OP_constu value can be
large (it uses uint64_t as representation internally in LLVM).
This means that in the uint64_t to int conversions, previously done
by DwarfExpression::addMachineRegExpression, could lose information.
Also, the negation done in "-Offset" was undefined behavior in case
Offset was exactly INT_MIN.
To avoid the above problems, we now avoid transformation like
[Reg, DW_OP_plus_uconst, Offset] --> [DW_OP_breg, Offset]
and
[Reg, DW_OP_constu, Offset, DW_OP_plus] --> [DW_OP_breg, Offset]
when Offset > INT_MAX.
And we avoid to transform
[Reg, DW_OP_constu, Offset, DW_OP_minus] --> [DW_OP_breg,-Offset]
when Offset > INT_MAX+1.
The patch also adjusts DwarfCompileUnit::constructVariableDIEImpl
to make sure that "DW_OP_constu, Offset, DW_OP_minus" is used
instead of "DW_OP_plus_uconst, Offset" when creating DIExpressions
with negative frame index offsets.
Notice that this might just be the tip of the iceberg. There
are lots of fishy handling related to these constants. I think both
DIExpression::appendOffset and DIExpression::extractIfOffset may
trigger undefined behavior for certain values.
Reviewers: sdesmalen, rnk, JDevlieghere
Reviewed By: JDevlieghere
Subscribers: jholewinski, aprantl, hiraditya, ychen, uabelho, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D67263
llvm-svn: 371304
Bjorn Pettersson [Sat, 7 Sep 2019 11:39:57 +0000 (11:39 +0000)]
[DebugInfo] Pre-commit of test case for DW_OP_breg/DW_OP_fbreg folds
This currently triggers undefined behavior if executed with an
ubsan build. It is just a precommit of the test case to show that
we got a problem.
Fix is proposed in https://reviews.llvm.org/D67263 and plan is to
commit the fix directly after this patch.
llvm-svn: 371303
Simon Pilgrim [Sat, 7 Sep 2019 11:04:04 +0000 (11:04 +0000)]
Fix MSVC "32-bit shift implicitly converted to 64 bits" warnings. NFCI.
llvm-svn: 371302
Roman Lebedev [Sat, 7 Sep 2019 10:55:04 +0000 (10:55 +0000)]
[SimplifyCFG][NFC] Make merge-cond-stores-cost.ll X86-specific, and rewrite it
We clearly perform store-merging, even though div is really costly.
llvm-svn: 371300