2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r216253.
2014-10-15  Renlin Li <renlin.li@arm.com>

* config/aarch64/aarch64.h (ARM_DEFAULT_PCS, arm_pcs_variant): Delete.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218374 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215865.
2014-10-03  Jing Yu  <jingyu@google.com>

* configure.ac: Add aarch64 to list of targets that support gold.
* configure: Regenerate.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218373 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215711.
2014-09-30  Terry Guo  <terry.guo@arm.com>

* config/arm/arm-cores.def (cortex-m7): New core name.
* config/arm/arm-fpus.def (fpv5-sp-d16): New fpu name.
(fpv5-d16): Ditto.
* config/arm/arm-tables.opt: Regenerated.
* config/arm/arm-tune.md: Regenerated.
* config/arm/arm.h (TARGET_VFP5): New macro.
* config/arm/bpabi.h (BE8_LINK_SPEC): Include cortex-m7.
* config/arm/vfp.md (<vrint_pattern><SDF:mode>2,
smax<mode>3, smin<mode>3): Enabled for FPU FPv5.
* doc/invoke.texi: Document new cpu and fpu names.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218371 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215707, r215842.
2014-10-03  David Sherwood  <david.sherwood@arm.com>

* ira-int.h (ira_allocno): Mark hard_regno as signed.

2014-09-30  David Sherwood  <david.sherwood@arm.com>

* ira-int.h (ira_allocno): Add "wmode" field.
* ira-build.c (create_insn_allocnos): Add new "parent" function
parameter.
* ira-conflicts.c (ira_build_conflicts): Add conflicts for registers
that cannot be accessed in wmode.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218370 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215540.
2014-09-24  Zhenqiang Chen  <zhenqiang.chen@arm.com>

PR rtl-optimization/63210
* ira-color.c (assign_hard_reg): Ignore conflict cost if the
HARD_REGNO is not available for CONFLICT_A.

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215540.
2014-09-24  Zhenqiang Chen  <zhenqiang.chen@arm.com>

* gcc.target/arm/pr63210.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218368 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215475.
2014-09-22  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.dg/vect/vect-reduc-or_1.c: New test.
* gcc.dg/vect/vect-reduc-or_2.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218367 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215473.
2014-09-22  Alan Lawrence  <alan.lawrence@arm.com>

* lib/target-supports.exp (check_effective_target_whole_vector_shift):
New.

* gcc.dg/vect/vect-reduc-mul_1.c: New test.
* gcc.dg/vect/vect-reduc-mul_2.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218366 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215177.
2014-09-11  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vset_lane_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218365 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215129.
2014-09-10  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vstN_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218364 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215126.
2014-09-10  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vldN_lane_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218363 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215078.
2014-09-09  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vldN_dup_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218362 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215077.
2014-09-09  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vld1-vst1_1.c: Rewrite to test all variants.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218361 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215072.
2014-09-09  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vldN_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218360 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215047.
2014-09-09  Tony Wang  <tony.wang@arm.com>

* gcc.target/arm/xordi3-opt.c: Disable this
test case for thumb1 target.
* gcc.target/arm/iordi3-opt.c: Ditto.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218359 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215046.
2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/61749
* config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
Use qualifier_immediate for last operand.  Rename to...
(aarch64_types_ternop_lane_qualifiers): ... This.
(TYPES_QUADOP): Rename to...
(TYPES_TERNOP_LANE): ... This.
(aarch64_simd_expand_args): Return const0_rtx when encountering user
error.  Change return of 0 to return of NULL_RTX.
(aarch64_crc32_expand_builtin): Likewise.
(aarch64_expand_builtin): Return NULL_RTX instead of 0.
ICE when expanding unknown builtin.
* config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
TERNOP_LANE qualifiers.
(sqdmlsl_lane): Likewise.
(sqdmlal_laneq): Likewise.
(sqdmlsl_laneq): Likewise.
(sqdmlal2_lane): Likewise.
(sqdmlsl2_lane): Likewise.
(sqdmlal2_laneq): Likewise.
(sqdmlsl2_laneq): Likewise.

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215046.
2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/61749
* gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218358 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r215013.
2014-09-08  Joseph Myers  <joseph@codesourcery.com>

* defaults.h (LARGEST_EXPONENT_IS_NORMAL, ROUND_TOWARDS_ZERO):
Remove.
* doc/tm.texi.in (ROUND_TOWARDS_ZERO, LARGEST_EXPONENT_IS_NORMAL):
Remove.
* doc/tm.texi: Regenerate.
* system.h (LARGEST_EXPONENT_IS_NORMAL, ROUND_TOWARDS_ZERO):
Poison.
* config/arm/arm.h (LARGEST_EXPONENT_IS_NORMAL): Remove.
* config/cris/cris.h (__make_dp): Remove.

libgcc/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215013.
2014-09-08  Joseph Myers  <joseph@codesourcery.com>

* fp-bit.c (pack_d, unpack_d): Remove LARGEST_EXPONENT_IS_NORMAL
and ROUND_TOWARDS_ZERO conditionals.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218357 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r214952.
2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/arm_neon.h (__GET_HIGH): New macro.
(vget_high_f32, vget_high_f64, vget_high_p8, vget_high_p16,
vget_high_s8, vget_high_s16, vget_high_s32, vget_high_s64,
vget_high_u8, vget_high_u16, vget_high_u32, vget_high_u64):
Remove temporary __asm__ and reimplement.

gcc/testsuite
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214950.
2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vget_high_1.c: New test.
* gcc.target/aarch64/vget_low_1.c: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218356 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r214948, r214949.
2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64-builtins.c (aarch64_fold_builtin): Remove code
handling cmge, cmgt, cmeq, cmtst.

* config/aarch64/aarch64-simd-builtins.def (cmeq, cmge, cmgt, cmle,
cmlt, cmgeu, cmgtu, cmtst): Remove.

* config/aarch64/arm_neon.h (vceq_*, vceqq_*, vceqz_*, vceqzq_*,
vcge_*, vcgeq_*, vcgez_*, vcgezq_*, vcgt_*, vcgtq_*, vcgtz_*,
vcgtzq_*, vcle_*, vcleq_*, vclez_*, vclezq_*, vclt_*, vcltq_*,
vcltz_*, vcltzq_*, vtst_*, vtstq_*): Use gcc vector extensions.

2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64-builtins.c (aarch64_types_cmtst_qualifiers,
TYPES_TST): Define.
(aarch64_fold_builtin): Update pattern for cmtst.

* config/aarch64/aarch64-protos.h (aarch64_const_vec_all_same_int_p):
Declare.

* config/aarch64/aarch64-simd-builtins.def (cmtst): Update qualifiers.

* config/aarch64/aarch64-simd.md (aarch64_vcond_internal<mode><mode>):
Switch operands, separate out more cases, refactor.

(aarch64_cmtst<mode>): Rewrite pattern to match (plus ... -1).

* config/aarch64.c (aarch64_const_vec_all_same_int_p): Take single
argument; rename old version to...
(aarch64_const_vec_all_same_in_range_p): ...this.
(aarch64_print_operand, aarch64_simd_shift_imm_p): Follow renaming.

* config/aarch64/predicates.md (aarch64_simd_imm_minus_one): Define.

gcc/testsuite
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214948.
2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/simd/int_comparisons.x: New file.
* gcc.target/aarch64/simd/int_comparisons_1.c: New test.
* gcc.target/aarch64/simd/int_comparisons_2.c: Ditto.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218355 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r214008.
2014-08-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Move
one_match > zero_match case to just before simple_sequence.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218354 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ 2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r213382.
2014-07-31  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/arm_neon.h (vpadd_<suf><8,16,32,64>): Move to
correct alphabetical position.
(vpaddd_f64): Rewrite using builtins.
(vpaddd_s64): Move to correct alphabetical position.
(vpaddd_u64): New.

gcc/testsuite/
2014-12-04  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213382.
2014-07-31  James Greenhalgh  <james.greenhalgh@arm.com>

* gcc.target/aarch64/scalar_intrinsics.c (test_vpaddd_f64): New.
(test_vpaddd_s64): Likewise.
(test_vpaddd_s64): Likewise.
* gcc.target/aarch64/simd/vpaddd_f64: New.
* gcc.target/aarch64/simd/vpaddd_s64: New.
* gcc.target/aarch64/simd/vpaddd_u64: New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218352 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r210735, r215206, r215207, r215208.
2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>

* gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
for A57.
(cortexa53_regmove_cost): New cost table for A53.  Increase GP2FP/FP2GP
cost to spilling from integer to FP registers.

2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>

* config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
move handling.
(generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
are now handled correctly.

2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>

* config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
handling of CALLER_SAVE_REGS and POINTER_REGS.

2014-05-22  Kugan Vivekanandarajah  <kuganv@linaro.org>

* config/aarch64/aarch64.c (aarch64_regno_regclass) : Change CORE_REGS
to GENERAL_REGS.
(aarch64_secondary_reload) : LikeWise.
(aarch64_class_max_nregs) : Remove CORE_REGS.
* config/aarch64/aarch64.h (enum reg_class) : Remove CORE_REGS.
(REG_CLASS_NAMES) : Likewise.
(REG_CLASS_CONTENTS) : LikeWise.
(INDEX_REG_CLASS) : Change CORE_REGS to GENERAL_REGS.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218351 138bc75d-0d04-0410-961f-82ee72b054a4

2014-12-04 Yvan Roux <yvan.roux@linaro.org>

Backport from trunk r216444.
2014-10-19  Maxim Kuvyrkov  <maxim.kuvyrkov@linaro.org>

* testsuite/lib/libstdc++.exp (v3-copy-file): New proc split from ...
(v3-copy-files): ... this.  Update.
(check_v3_target_fileio): Fix race on cin_unget-1.txt file.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@218350 138bc75d-0d04-0410-961f-82ee72b054a4

Bump version number, post release.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@217567 138bc75d-0d04-0410-961f-82ee72b054a4

Make Linaro GCC 4.9-2014.11.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@217563 138bc75d-0d04-0410-961f-82ee72b054a4

2014-11-14  Yvan Roux  <yvan.roux@linaro.org>

Add Linaro release macros (Linaro only patch.)

* Makefile.in (LINAROVER, LINAROVER_C, LINAROVER_S): Define.
(CFLAGS-cppbuiltin.o): Add LINAROVER macro definition.
(cppbuiltin.o): Depend on $(LINAROVER).
* cppbuiltin.c (parse_linarover): New.
(define_GNUC__): Define __LINARO_RELEASE__ and __LINARO_SPIN__ macros.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@217544 138bc75d-0d04-0410-961f-82ee72b054a4

2014-11-13  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r216229, r216230.
2014-10-14  Andrew Pinski  <apinski@cavium.com>

* explow.c (convert_memory_address_addr_space): Rename to ...
(convert_memory_address_addr_space_1): This.  Add in_const argument.
Inside a CONST RTL, permute the conversion and addition of constant
for zero and sign extended pointers.
(convert_memory_address_addr_space): New function.

2014-10-14  Andrew Pinski  <apinski@cavium.com>

Revert:
2011-08-19  H.J. Lu  <hongjiu.lu@intel.com>

        PR middle-end/49721
        * explow.c (convert_memory_address_addr_space): Also permute the
        conversion and addition of constant for zero-extend.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@217497 138bc75d-0d04-0410-961f-82ee72b054a4

Merge branches/gcc-4_9-branch rev 216979

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@217045 138bc75d-0d04-0410-961f-82ee72b054a4

Bump version number, post release.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216636 138bc75d-0d04-0410-961f-82ee72b054a4

Make Linaro GCC 4.9-2014.10-1.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216634 138bc75d-0d04-0410-961f-82ee72b054a4

Fix broken merge branches/gcc-4_9-branch rev 216130

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216616 138bc75d-0d04-0410-961f-82ee72b054a4

Bump version number, post release.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216390 138bc75d-0d04-0410-961f-82ee72b054a4

Make Linaro GCC 4.9-2014.10.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216388 138bc75d-0d04-0410-961f-82ee72b054a4

Merge branches/gcc-4_9-branch rev 216130

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216256 138bc75d-0d04-0410-961f-82ee72b054a4

Revert commit 216002 which introduced a regression.

2014-10-10  Yvan Roux  <yvan.roux@linaro.org>

Revert:
2014-10-08  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215206, r215207, r215208.
2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>

* gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
for A57.
(cortexa53_regmove_cost): New cost table for A53.  Increase GP2FP/FP2GP
cost to spilling from integer to FP registers.

2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>

* config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
move handling.
(generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
are now handled correctly.

2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>

* config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
handling of CALLER_SAVE_REGS and POINTER_REGS.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216062 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-10-08  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214825, r214826.
2014-09-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/62275
* config/arm/neon.md
(neon_vcvt<NEON_VCVT:nvrint_variant><su_optab><VCVTF:mode>
<v_cmp_result>): New pattern.
* config/arm/iterators.md (NEON_VCVT): New int iterator.
* config/arm/arm_neon_builtins.def (vcvtav2sf, vcvtav4sf, vcvtauv2sf,
vcvtauv4sf, vcvtpv2sf, vcvtpv4sf, vcvtpuv2sf, vcvtpuv4sf, vcvtmv2sf,
vcvtmv4sf, vcvtmuv2sf, vcvtmuv4sf): New builtin definitions.
* config/arm/arm.c (arm_builtin_vectorized_function): Handle
BUILT_IN_LROUNDF, BUILT_IN_LFLOORF, BUILT_IN_LCEILF.

2014-09-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/62275
* config/arm/iterators.md (FIXUORS): New code iterator.
(VCVT): New int iterator.
(su_optab): New code attribute.
(su): Likewise.
* config/arm/vfp.md (l<vrint_pattern><su_optab><mode>si2): New pattern.

gcc/testsuite/
2014-10-08  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214825, r214826, r215085.
2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* gcc.target/arm/vect-lceilf_1.c: Make input and output arrays global
and 16-byte aligned.
* gcc.target/arm/vect-lfloorf_1.c: Likewise.
* gcc.target/arm/vect-lroundf_1.c: Likewise.
* gcc.target/arm/vect-rounding-btruncf.c: Likewise.
* gcc.target/arm/vect-rounding-ceilf.c: Likewise.
* gcc.target/arm/vect-rounding-floorf.c: Likewise.
* gcc.target/arm/vect-rounding-roundf.c: Likewise.

2014-09-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/62275
* gcc.target/arm/vect-lceilf_1.c: New test.
* gcc.target/arm/vect-lfloorf_1.c: Likewise.
* gcc.target/arm/vect-lroundf_1.c: Likewise.

2014-09-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/62275
* gcc.target/arm/lceil-vcvt_1.c: New test.
* gcc.target/arm/lfloor-vcvt_1.c: Likewise.
* gcc.target/arm/lround-vcvt_1.c: Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216007 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-08  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215471.
2014-09-22  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/geniterators.sh: New.
* config/aarch64/iterators.md (VDQF_DF): New.
* config/aarch64/t-aarch64: Generate aarch64-builtin-iterators.h.
* config/aarch64/aarch64-builtins.c (BUILTIN_*) Remove.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216004 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-08  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215206, r215207, r215208.
2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>

* gcc/config/aarch64/aarch64.c (cortexa57_regmove_cost): New cost table
for A57.
(cortexa53_regmove_cost): New cost table for A53.  Increase GP2FP/FP2GP
cost to spilling from integer to FP registers.

2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>

* config/aarch64/aarch64.c (aarch64_register_move_cost): Fix Q register
move handling.
(generic_regmove_cost): Undo raised FP2FP move cost as Q register moves
are now handled correctly.

2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>

* config/aarch64/aarch64.c (aarch64_register_move_cost): Add cost
handling of CALLER_SAVE_REGS and POINTER_REGS.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@216002 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-07  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214824.
2014-09-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/predicates.md (aarch64_comparison_operation):
New special predicate.
* config/aarch64/aarch64.md (*csinc2<mode>_insn): Use
aarch64_comparison_operation instead of matching an operator.
Update operand numbers.
(csinc3<mode>_insn): Likewise.
(*csinv3<mode>_insn): Likewise.
(*csneg3<mode>_insn): Likewise.
(ffs<mode>2): Update gen_csinc3<mode>_insn callsite.
* config/aarch64/aarch64.c (aarch64_get_condition_code):
Return -1 instead of aborting on invalid condition codes.
(aarch64_print_operand): Update aarch64_get_condition_code callsites
to assert that the returned condition code is valid.
* config/aarch64/aarch64-protos.h (aarch64_get_condition_code): Export.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215977 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-07  Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>

Backport from trunk r209643, r211881.
2014-06-22  Richard Henderson  <rth@redhat.com>

PR target/61565
* compare-elim.c (struct comparison): Add eh_note.
(find_comparison_dom_walker::before_dom_children): Don't eliminate
a redundant comparison in a different EH region.  Purge EH edges if
necessary.

2014-04-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

* config/aarch64/aarch64.c (TARGET_FLAGS_REGNUM): Define.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215975 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-06  Charles Baylis  <charles.baylis@linaro.org>

Backport from trunk r214945.
2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Replace
varargs with pointer parameter.
(aarch64_simd_expand_builtin): pass pointer into previous.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215949 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-06  Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>

Backport from trunk r214944.
2014-09-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/cortex-a53.md (cortex_a53_alu_shift): Add alu_ext,
alus_ext.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215948 138bc75d-0d04-0410-961f-82ee72b054a4

Fix ChangeLog entries.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215947 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-10-06  venkataramanan kumar  <venkataramanan.kumar@linaro.org>

Backport from trunk r214943.
2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): New pattern.
* config/aarch64/aarch64-simd-builtins.def (rbit): New builtin.
* config/aarch64/arm_neon.h (vrbit_s8, vrbit_u8, vrbitq_s8, vrbitq_u8):
Replace temporary asm with call to builtin.
(vrbit_p8, vrbitq_p8): New functions.

gcc/testsuite/
2014-10-06  venkataramanan kumar  <venkataramanan.kumar@linaro.org>

Backport from trunk r214943.
2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/simd/vrbit_1.c: New test.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215946 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-06  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r214886.
2014-09-03  Richard Henderson  <rth@redhat.com>

* config/aarch64/aarch64.c (aarch64_popwb_single_reg): Remove.
(aarch64_popwb_pair_reg): Remove.
(aarch64_set_frame_expr): Remove.
(aarch64_restore_callee_saves): Add CFI_OPS argument; fill it with
the restore ops performed by the insns generated.
(aarch64_expand_epilogue): Attach CFI_OPS to the stack deallocation
insn.  Perform the calls_eh_return addition later; do not attempt to
preserve the CFA in that case.  Don't use aarch64_set_frame_expr.
(aarch64_expand_prologue): Use REG_CFA_ADJUST_CFA directly, or no
special markup at all.  Load cfun->machine->frame.hard_fp_offset
into a local variable.
(aarch64_frame_pointer_required): Don't check calls_alloca.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215944 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215385.
2014-09-19  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64.md (stack_protect_test_<mode>): Mark
scratch register as written.

gcc/testsuite/
2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215385.
2014-09-19  James Greenhalgh  <james.greenhalgh@arm.com>

* gcc.dg/ssp-3.c: New.
* gcc.dg/ssp-4.c: Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215941 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215346.
2014-09-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/neon.md (*movmisalign<mode>_neon_load): Change type
to neon_load1_1reg<q>.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215940 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215321.
2014-09-17  Andrew Stubbs  <ams@codesourcery.com>

* config/arm/arm.c (arm_option_override): Reject -mfpu=neon
when architecture is older than ARMv7.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215938 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215260.
2014-09-14  David Sherwood  <david.sherwood@arm.com>

* gcc.target/aarch64/vdup_lane_2.c (force_simd): Emit simd mov.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215937 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215205.
2014-09-12  Wilco Dijkstra  <wilco.dijkstra@arm.com>

* gcc/ree.c (combine_reaching_defs): Ensure inserted copy don't change
the number of hard registers.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215935 138bc75d-0d04-0410-961f-82ee72b054a4

/gcc/
2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215136.
2014-09-10  Xinliang David Li  <davidxl@google.com>

PR target/63209
* config/arm/arm.md (movcond_addsi): Handle case where source
and target operands are the same.

/gcc/testsuite/
2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215136.
2014-09-10  Xinliang David Li  <davidxl@google.com>

PR target/63209
* gcc.c-torture/execute/pr63209.c: New test.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215932 138bc75d-0d04-0410-961f-82ee72b054a4

/libstdc++-v3/
2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215101.
2014-09-10  Tony Wang  <tony.wang@arm.com>

PR target/56846
* libsupc++/eh_personality.cc (PERSONALITY_FUNCTION):
Return with CONTINUE_UNWINDING when the state pattern
contains: _US_VIRTUAL_UNWIND_FRAME | _US_FORCE_UNWIND

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215929 138bc75d-0d04-0410-961f-82ee72b054a4

/gcc/
2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215086.
2014-09-09  Marcus Shawcroft  <marcus.shawcroft@arm.com>
Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Add crtfastmath.o.
         * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATH_ENDFILE_SPEC):
Define.
        (ENDFILE_SPEC): Define and use GNU_USER_TARGET_MATH_ENDFILE_SPEC.

/libgcc/
2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215086.
2014-09-09  Marcus Shawcroft  <marcus.shawcroft@arm.com>
Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

* config.host (aarch64*): Include crtfastmath.o and
t-crtfm.
* config/aarch64/crtfastmath.c: New file.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215928 138bc75d-0d04-0410-961f-82ee72b054a4

/gcc/
2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215067.
2014-09-09  Jiong Wang  <jiong.wang@arm.com>

* config/arm/arm.c (NEON_COPYSIGNF): New enum.
(arm_init_neon_builtins): Support NEON_COPYSIGNF.
(arm_builtin_vectorized_function): Likewise.
* config/arm/arm_neon_builtins.def: New macro for copysignf.
* config/arm/neon.md (neon_copysignf<mode>): New pattern for vector
copysignf.

/gcc/testsuite/
2014-10-06  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215067.
2014-09-09  Jiong Wang  <jiong.wang@arm.com>

* gcc.target/arm/vect-copysignf.c: New testcase.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215923 138bc75d-0d04-0410-961f-82ee72b054a4

/gcc/
2014-10-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215050, r215051, r215052, r215053, r215054,
r215055, r215056.
2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.md (vfp_pop_multiple_with_writeback): Use vldm
mnemonic instead of fldmfdd.
* config/arm/arm.c (vfp_output_fstmd): Rename to...
(vfp_output_vstmd): ... This.  Convert output to UAL syntax.
Output vpush when address register is SP.
* config/arm/arm-protos.h (vfp_output_fstmd): Rename to...
(vfp_output_vstmd): ... This.
* config/arm/vfp.md (push_multi_vfp): Update call to
vfp_output_vstmd.

2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/vfp.md (*movcc_vfp): Use UAL syntax.

2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/vfp.md (*sqrtsf2_vfp): Use UAL assembly syntax.
(*sqrtdf2_vfp): Likewise.
(*cmpsf_vfp): Likewise.
(*cmpsf_trap_vfp): Likewise.
(*cmpdf_vfp): Likewise.
(*cmpdf_trap_vfp): Likewise.

2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/vfp.md (*extendsfdf2_vfp): Use UAL assembly syntax.
(*truncdfsf2_vfp): Likewise.
(*truncsisf2_vfp): Likewise.
(*truncsidf2_vfp): Likewise.
(fixuns_truncsfsi2): Likewise.
(fixuns_truncdfsi2): Likewise.
(*floatsisf2_vfp): Likewise.
(*floatsidf2_vfp): Likewise.
(floatunssisf2): Likewise.
(floatunssidf2): Likewise.

2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/vfp.md (*mulsf3_vfp): Use UAL assembly syntax.
(*muldf3_vfp): Likewise.
(*mulsf3negsf_vfp): Likewise.
(*muldf3negdf_vfp): Likewise.
(*mulsf3addsf_vfp): Likewise.
(*muldf3adddf_vfp): Likewise.
(*mulsf3subsf_vfp): Likewise.
(*muldf3subdf_vfp): Likewise.
(*mulsf3negsfaddsf_vfp): Likewise.
(*fmuldf3negdfadddf_vfp): Likewise.
(*mulsf3negsfsubsf_vfp): Likewise.
(*muldf3negdfsubdf_vfp): Likewise.

2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/vfp.md (*abssf2_vfp): Use UAL assembly syntax.
(*absdf2_vfp): Likewise.
(*negsf2_vfp): Likewise.
(*negdf2_vfp): Likewise.
(*addsf3_vfp): Likewise.
(*adddf3_vfp): Likewise.
(*subsf3_vfp): Likewise.
(*subdf3_vfp): Likewise.
(*divsf3_vfp): Likewise.
(*divdf3_vfp): Likewise.

2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.c (output_move_vfp): Use UAL syntax for load/store
multiple.
(arm_print_operand): Don't convert real values to decimal
representation in default case.
(fp_immediate_constant): Delete.
* config/arm/arm-protos.h (fp_immediate_constant): Likewise.
* config/arm/vfp.md (*arm_movsi_vfp): Convert to VFP moves to UAL
syntax.
(*thumb2_movsi_vfp): Likewise.
(*movdi_vfp): Likewise.
(*movdi_vfp_cortexa8): Likewise.
(*movhf_vfp_neon): Likewise.
(*movhf_vfp): Likewise.
(*movsf_vfp): Likewise.
(*thumb2_movsf_vfp): Likewise.
(*movdf_vfp): Likewise.
(*thumb2_movdf_vfp): Likewise.
(*movsfcc_vfp): Likewise.
(*thumb2_movsfcc_vfp): Likewise.
(*movdfcc_vfp): Likewise.
(*thumb2_movdfcc_vfp): Likewise.

/gcc/testsuite/
2014-10-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r215050, r215051, r215052, r215053, r215054.
2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* gcc.target/arm/vfp-1.c: Updated expected assembly.

2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* gcc.target/arm/vfp-1.c: Updated expected assembly.

2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* gcc.target/arm/vfp-1.c: Updated expected assembly.

2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* gcc.target/arm/vfp-1.c: Updated expected assembly.

2014-09-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* gcc.target/arm/pr51835.c: Update expected assembly.
* gcc.target/arm/vfp-1.c: Likewise.
* gcc.target/arm/vfp-ldmdbd.c: Likewise.
* gcc.target/arm/vfp-ldmdbs.c: Likewise.
* gcc.target/arm/vfp-ldmiad.c: Likewise.
* gcc.target/arm/vfp-ldmias.c: Likewise.
* gcc.target/arm/vfp-stmdbd.c: Likewise.
* gcc.target/arm/vfp-stmdbs.c: Likewise.
* gcc.target/arm/vfp-stmiad.c: Likewise.
* gcc.target/arm/vfp-stmias.c: Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215858 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214959.
2014-09-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/cortex-a53.md (cortex_a53_fpalu): Add f_rints, f_rintd,
f_minmaxs, f_minmaxd types.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215857 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214947.
2014-09-05  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64-builtins.c (enum aarch64_type_qualifiers):
Remove qualifier_const_pointer, update comment.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215854 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214940.
2014-09-05  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64.md (sibcall_value_insn): Give operand 1
DImode.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215853 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213090.
2014-07-26  Andrew Pinski  <apinski@cavium.com>

* config/aarch64/aarch64.md (*extr_insv_lower_reg<mode>): Remove +
from the read only register.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215847 138bc75d-0d04-0410-961f-82ee72b054a4

2014-10-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213035.
2014-07-24  Richard Henderson  <rth@redhat.com>

* config/aarch64/sjlj.S (_ITM_beginTransaction): Use post-inc
addressing mode in epilogue.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215845 138bc75d-0d04-0410-961f-82ee72b054a4

Bump version number, post release.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215166 138bc75d-0d04-0410-961f-82ee72b054a4

Make Linaro GCC 4.9-2014.09.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215164 138bc75d-0d04-0410-961f-82ee72b054a4

2014-09-09  Venkataramanan Kumar  <venkataramanan.kumar@linaro.org>

Backport from trunk r215004.
2014-09-07 Venkataramanan Kumar <venkataramanan.kumar@linaro.org>

PR target/63190
* config/aarch64/aarch64.md (stack_protect_test_<mode>) Add register
constraint for operand0 and remove write only modifier from operand3.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215069 138bc75d-0d04-0410-961f-82ee72b054a4

2014-09-09  Michael Collison  <michael.collison@linaro.org>

Backport from trunk r212178
2014-06-30  Joseph Myers  <joseph@codesourcery.com>

* var-tracking.c (add_stores): Return instead of asserting if old
and new values for conditional store are the same.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215065 138bc75d-0d04-0410-961f-82ee72b054a4

Merge branches/gcc-4_9-branch rev 214896

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@215060 138bc75d-0d04-0410-961f-82ee72b054a4

2014-09-03  Yvan Roux  <yvan.roux@linaro.org>

Revert:
2014-09-03  Yvan Roux  <yvan.roux@linaro.org>

        Backport from trunk r213712.
        2014-08-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

        * config/aarch64/aarch64.md (absdi2): Set simd attribute.
        (aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT.
        (aarch64_movdi_<mode>high): Likewise.
        (aarch64_mov<mode>high_di): Likewise.
        (aarch64_movdi_<mode>low): Likewise.
        (aarch64_mov<mode>low_di): Likewise.
        (aarch64_movtilow_tilow): Likewise.
        Add comment explaining usage of fp,simd attributes and of
        TARGET_FLOAT and TARGET_SIMD.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214880 138bc75d-0d04-0410-961f-82ee72b054a4

2014-09-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213712.
2014-08-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.md (absdi2): Set simd attribute.
(aarch64_reload_mov<mode>): Predicate on TARGET_FLOAT.
(aarch64_movdi_<mode>high): Likewise.
(aarch64_mov<mode>high_di): Likewise.
(aarch64_movdi_<mode>low): Likewise.
(aarch64_mov<mode>low_di): Likewise.
(aarch64_movtilow_tilow): Likewise.
Add comment explaining usage of fp,simd attributes and of
TARGET_FLOAT and TARGET_SIMD.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214875 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-09-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214526.
2014-08-26  Joseph Myers  <joseph@codesourcery.com>

PR target/60606
PR target/61330
* varasm.c (make_decl_rtl): Clear DECL_ASSEMBLER_NAME and
DECL_HARD_REGISTER and return for invalid register specifications.
* cfgexpand.c (expand_one_var): If expand_one_hard_reg_var clears
DECL_HARD_REGISTER, call expand_one_error_var.
* config/arm/arm.c (arm_hard_regno_mode_ok): Do not allow
CC_REGNUM with non-MODE_CC modes.
(arm_regno_class): Return NO_REGS for PC_REGNUM.

gcc/testsuite/
2014-09-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214526.
2014-08-26  Joseph Myers  <joseph@codesourcery.com>

PR target/60606
PR target/61330
* gcc.dg/torture/pr60606-1.c, gcc.target/arm/pr60606-2.c,
gcc.target/arm/pr60606-3.c, gcc.target/arm/pr60606-4.c: New tests.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214847 138bc75d-0d04-0410-961f-82ee72b054a4

2014-09-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r214503.
2014-08-26  Evandro Menezes <e.menezes@samsung.com>

* config/arm/aarch64/aarch64.c (generic_addrcost_table): Delete
qi cost; add di cost.
(cortexa57_addrcost_table): Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214845 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-09-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213659.
2014-08-06  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64.c (aarch64_evpc_dup): Enable for bigendian.
(aarch64_expand_vec_perm_const): Check for dup before zip.

gcc/testsuite/
2014-09-03  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213659.
2014-08-06  Alan Lawrence  <alan.lawrence@arm.com>

* gcc.target/aarch64/vdup_n_2.c: New test.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214844 138bc75d-0d04-0410-961f-82ee72b054a4

2014-09-02  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213651.
2014-08-06  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.c (aarch64_classify_address): Use REG_P and
CONST_INT_P instead of GET_CODE and compare.
(aarch64_select_cc_mode): Likewise.
(aarch64_print_operand): Likewise.
(aarch64_rtx_costs): Likewise.
(aarch64_simd_valid_immediate): Likewise.
(aarch64_simd_check_vect_par_cnst_half): Likewise.
(aarch64_simd_emit_pair_result_insn): Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214809 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-29  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r212978.
2014-07-24  Andreas Schwab  <schwab@suse.de>

* lib/target-supports.exp (check_effective_target_arm_nothumb):
Also check for __arm__.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214739 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-29  Christophe Lyon  <christophe.lyon@linaro.org>

Fix backport from trunk 211440:
* config.gcc (aarch64*-*-*): Restore need_64bit_hwint=yes.

This is necessary to build aarch64* compilers on i686 host.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214722 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/testsuite/
2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213701.
2014-08-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* gcc.dg/pr61756.c: Remove arm-specific dg-options.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214517 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213627.
2014-08-05  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64-builtins.c
(aarch64_simd_builtin_type_mode): Delete.
(v8qi_UP): Remap to V8QImode.
(v4hi_UP): Remap to V4HImode.
(v2si_UP): Remap to V2SImode.
(v2sf_UP): Remap to V2SFmode.
(v1df_UP): Remap to V1DFmode.
(di_UP): Remap to DImode.
(df_UP): Remap to DFmode.
(v16qi_UP):V16QImode.
(v8hi_UP): Remap to V8HImode.
(v4si_UP): Remap to V4SImode.
(v4sf_UP): Remap to V4SFmode.
(v2di_UP): Remap to V2DImode.
(v2df_UP): Remap to V2DFmode.
(ti_UP): Remap to TImode.
(ei_UP): Remap to EImode.
(oi_UP): Remap to OImode.
(ci_UP): Map to CImode.
(xi_UP): Remap to XImode.
(si_UP): Remap to SImode.
(sf_UP): Remap to SFmode.
(hi_UP): Remap to HImode.
(qi_UP): Remap to QImode.
(aarch64_simd_builtin_datum): Make mode a machine_mode.
(VAR1): Build builtin name.
(aarch64_init_simd_builtins): Remove dead code.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214516 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213713.
2014-08-07  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.md (*cmov<mode>): Set type attribute to fcsel.
* config/arm/types.md (f_sels, f_seld): Delete.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214515 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213711.
2014-08-07  Ian Bolton  <ian.bolton@arm.com>
    Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.c (aarch64_expand_mov_immediate):
Use MOVN when one of the half-words is 0xffff.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214514 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213632.
2014-08-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/cortex-a15.md (cortex_a15_alu_shift): Add crc type
to reservation.
* config/arm/cortex-a53.md (cortex_a53_alu_shift): Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214513 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213630.
2014-08-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.md (clzsi2): Set predicable_short_it attr to no.
(rbitsi2): Likewise.
(*arm_rev): Set predicable and predicable_short_it attributes.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214512 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213557.
2014-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
    James Greenhalgh  <james.greenhalgh@arm.com>

* doc/md.texi (clrsb): Document.
(clz): Change reference to x into operand 1.
(ctz): Likewise.
(popcount): Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214511 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213551, r213556.
2014-08-04  Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
    Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* sched-deps.c (try_group_insn): Generalise macro fusion hook usage
to any two insns.  Update comment.  Rename to sched_macro_fuse_insns.
(sched_analyze_insn): Update use of try_group_insn to
sched_macro_fuse_insns.
* config/i386/i386.c (ix86_macro_fusion_pair_p): Reject 2nd
arguments that are not conditional jumps.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214509 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213490.
2014-08-01  Alan Lawrence  <alan.lawrence@arm.com>

* config/aarch64/aarch64-simd-builtins.def (dup_lane, get_lane): Delete.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214507 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213488.
2014-08-01  Jiong Wang <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_classify_address): Accept all offset
for frame access when strict_p is false.

gcc/testsuite/
2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213488, r213489.
2014-08-01  Jiong Wang  <jiong.wang@arm.com>

* gcc.target/aarch64/legitimize_stack_var_before_reload_1.c: New
testcase.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214506 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213485, r213486, r213487.
2014-08-01  Renlin Li <renlin.li@arm.com>
    Jiong Wang <jiong.wang@arm.com>

* config/aarch64/aarch64.c (offset_7bit_signed_scaled_p): Rename to
aarch64_offset_7bit_signed_scaled_p, remove static and use it.
* config/aarch64/aarch64-protos.h (aarch64_offset_7bit_signed_scaled_p):
Declaration.
* config/aarch64/predicates.md (aarch64_mem_pair_offset): Define new
predicate.
* config/aarch64/aarch64.md (loadwb_pair, storewb_pair): Use
aarch64_mem_pair_offset.

2014-08-01  Jiong Wang <jiong.wang@arm.com>

* config/aarch64/aarch64.md (loadwb_pair<GPI:mode>_<P:mode>): Fix
offset.
(loadwb_pair<GPI:mode>_<P:mode>): Likewise.
* config/aarch64/aarch64.c (aarch64_gen_loadwb_pair): Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214505 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213379.
2014-07-31  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64-builtins.c
(aarch64_gimple_fold_builtin): Don't fold reduction operations for
BYTES_BIG_ENDIAN.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214504 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-26  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213378.
2014-07-31  James Greenhalgh  <james.greenhalgh@arm.com>

* config/aarch64/aarch64.c (aarch64_simd_vect_par_cnst_half): Vary
the generated mask based on BYTES_BIG_ENDIAN.
(aarch64_simd_check_vect_par_cnst_half): New.
* config/aarch64/aarch64-protos.h
(aarch64_simd_check_vect_par_cnst_half): New.
* config/aarch64/predicates.md (vect_par_cnst_hi_half): Refactor
the check out to aarch64_simd_check_vect_par_cnst_half.
(vect_par_cnst_lo_half): Likewise.
* config/aarch64/aarch64-simd.md
(aarch64_simd_move_hi_quad_<mode>): Always use vec_par_cnst_lo_half.
(move_hi_quad_<mode>): Always generate a low mask.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214502 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-08-22  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r212927, r213304.
2014-07-30  Jiong Wang  <jiong.wang@arm.com>

* config/arm/arm.c (arm_get_frame_offsets): Adjust condition for
Thumb2.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/arm/arm.c (arm_get_frame_offsets): If both r3 and other
callee-saved registers are available for padding purpose
and r3 is not mandatory, then prefer use those callee-saved
instead of r3.

gcc/testsuite/
2014-08-22  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r212927.
2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* gcc.dg/ira-shrinkwrap-prep-1.c (target): Add arm_nothumb.
* gcc.dg/ira-shrinkwrap-prep-2.c (target): Likewise.
* gcc.dg/pr10474.c (target): Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214314 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-22  Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r211717, r213692.
2014-08-07  Kugan Vivekanandarajah  <kuganv@linaro.org>

* config/arm/arm.c (bdesc_2arg): Fix typo.
(arm_atomic_assign_expand_fenv): Remove The default implementation.

2014-06-17  Kugan Vivekanandarajah  <kuganv@linaro.org>

* config/arm/arm.c (arm_atomic_assign_expand_fenv): call
default_atomic_assign_expand_fenv for !TARGET_HARD_FLOAT.
(arm_init_builtins) : Initialize builtins __builtins_arm_set_fpscr and
__builtins_arm_get_fpscr only when TARGET_HARD_FLOAT.
* config/arm/vfp.md (set_fpscr): Make pattern conditional on
TARGET_HARD_FLOAT.
(get_fpscr) : Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214313 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-22 Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r212989, r213628.
2014-08-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* convert.c (convert_to_integer): Guard transformation to lrint by
-fno-math-errno.

2014-07-24  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR middle-end/61876
* convert.c (convert_to_integer): Do not convert BUILT_IN_ROUND and cast
when flag_errno_math is on.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214312 138bc75d-0d04-0410-961f-82ee72b054a4

Bump version number, post release.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214036 138bc75d-0d04-0410-961f-82ee72b054a4

Make Linaro GCC 4.9-2014.08.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@214032 138bc75d-0d04-0410-961f-82ee72b054a4

Merge branches/gcc-4_9-branch rev 213803

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@213943 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-11 Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r212912, r212913.
2014-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.c (aarch64_rtx_costs): Handle CLRSB, CLZ.
(case UNSPEC): Handle UNSPEC_RBIT.

2014-07-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.md: Delete UNSPEC_CLS.
(clrsb<mode>2): Use clrsb RTL code instead of UNSPEC_CLS.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@213817 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-08-11 Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213555.
2014-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/61713
* gcc/optabs.c (expand_atomic_test_and_set): Do not try to emit
move to subtarget in serial version if result is ignored.

gcc/testsuite
2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
Backport from trunk r213555.
2014-08-04  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/61713
* gcc.dg/pr61756.c: New test.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@213801 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-08-11 Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r213376.
2014-07-31  Charles Baylis  <charles.baylis@linaro.org>

PR target/61948
* config/arm/neon.md (ashldi3_neon): Don't emit arm_ashldi3_1bit unless
constraints are satisfied.
(<shift>di3_neon): Likewise.

gcc/testsuite
2014-08-11 Yvan Roux  <yvan.roux@linaro.org>
Backport from trunk r213376.
2014-07-31  Charles Baylis  <charles.baylis@linaro.org>

PR target/61948
* gcc.target/arm/pr61948.c: New test case.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@213800 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/
2014-08-11 Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r211270, r211271, r211273, r211275, r212943,
r212945, r212946, r212947, r212949, r212950, r212951, r212952, r212954,
r212955, r212956, r212957, r212958, r212976, r212996, r212997, r212999,
r213000.
2014-07-24  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_popwb_single_reg): New function.
(aarch64_expand_epilogue): Optimize epilogue when !frame_pointer_needed.

2014-07-24  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_pushwb_single_reg): New function.
(aarch64_expand_prologue): Optimize prologue when !frame_pointer_needed.

2014-07-24  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_restore_callee_saves)
(aarch64_save_callee_saves): New parameter "skip_wb".
(aarch64_expand_prologue, aarch64_expand_epilogue): Update call site.

2014-07-24  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.h (frame): New fields "wb_candidate1" and
"wb_candidate2".
* config/aarch64/aarch64.c (aarch64_layout_frame): Initialize above.

2014-07-24  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_expand_epilogue): Don't
subtract outgoing area size when restoring stack_pointer_rtx.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_popwb_pair_reg)
(aarch64_gen_loadwb_pair): New helper function.
(aarch64_expand_epilogue): Simplify code using new helper functions.
* config/aarch64/aarch64.md (loadwb_pair<GPF:mode>_<P:mode>): Define.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_pushwb_pair_reg)
(aarch64_gen_storewb_pair): New helper function.
(aarch64_expand_prologue): Simplify code using new helper functions.
* config/aarch64/aarch64.md (storewb_pair<GPF:mode>_<P:mode>): Define.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.md: (aarch64_save_or_restore_callee_saves):
Rename to aarch64_save_callee_saves, remove restore code.
(aarch64_restore_callee_saves): New function.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Deleted.
(aarch64_save_callee_saves): New function to handle reg save
for both core and vectore regs.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_gen_load_pair)
(aarch64_gen_store_pair): New helper function.
(aarch64_save_or_restore_callee_save_registers)
(aarch64_save_or_restore_fprs): Use new helper functions.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_next_callee_save): New function.
(aarch64_save_or_restore_callee_save_registers)
(aarch64_save_or_restore_fprs): Use aarch64_next_callee_save.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c
(aarch64_save_or_restore_callee_save_registers)
(aarch64_save_or_restore_fprs): Hoist calculation of register rtx.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c
(aarch64_save_or_restore_callee_save_registers)
(aarch64_save_or_restore_fprs): Remove 'increment'.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c
(aarch64_save_or_restore_callee_save_registers)
(aarch64_save_or_restore_fprs): Use register offset in
cfun->machine->frame.reg_offset.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c
(aarch64_save_or_restore_callee_save_registers)
(aarch64_save_or_restore_fprs): Remove base_rtx.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c
(aarch64_save_or_restore_callee_save_registers): Rename 'offset'
to 'start_offset'.  Remove local variable 'start_offset'.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_save_or_restore_fprs): Change
type to HOST_WIDE_INT.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_expand_prologue)
(aarch64_save_or_restore_fprs)
(aarch64_save_or_restore_callee_save_registers): GNU-Stylize code.

2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>

* config/aarch64/aarch64.h (aarch64_frame): Add hard_fp_offset and
frame_size.
* config/aarch64/aarch64.c (aarch64_layout_frame): Initialize
aarch64_frame hard_fp_offset and frame_size.
(aarch64_expand_prologue): Use aarch64_frame hard_fp_offset and
frame_size; remove original_frame_size.
(aarch64_expand_epilogue, aarch64_final_eh_return_addr): Likewise.
(aarch64_initial_elimination_offset): Remove frame_size and
offset.  Use aarch64_frame frame_size.

2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
    Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (aarch64_layout_frame): Correct
initialization of R30 offset.  Update offset.  Iterate core
regisers upto X30.  Remove X29, X30 specific code.

2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>
    Jiong Wang  <jiong.wang@arm.com>

* config/aarch64/aarch64.c (SLOT_NOT_REQUIRED, SLOT_REQUIRED): Define.
(aarch64_layout_frame): Use SLOT_NOT_REQUIRED and SLOT_REQUIRED.
(aarch64_register_saved_on_entry): Adjust test.

2014-06-05  Marcus Shawcroft  <marcus.shawcroft@arm.com>

* config/aarch64/aarch64.h (machine_function): Move
saved_varargs_size from here...
(aarch64_frameGTY): ... to here.

* config/aarch64/aarch64.c (aarch64_expand_prologue)
(aarch64_expand_epilogue, aarch64_final_eh_return_addr)
(aarch64_initial_elimination_offset)
(aarch64_setup_incoming_varargs): Adjust location of
saved_varargs_size.

gcc/testsuite/
2014-08-11 Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r212959, r212976, r212999, r213000.
2014-07-24  Jiong Wang  <jiong.wang@arm.com>

* gcc.target/aarch64/test_frame_1.c: Match optimized instruction
sequences.
* gcc.target/aarch64/test_frame_2.c: Likewise.
* gcc.target/aarch64/test_frame_4.c: Likewise.
* gcc.target/aarch64/test_frame_6.c: Likewise.
* gcc.target/aarch64/test_frame_7.c: Likewise.
* gcc.target/aarch64/test_frame_8.c: Likewise.
* gcc.target/aarch64/test_frame_10.c: Likewise.

2014-07-24  Jiong Wang  <jiong.wang@arm.com>

* gcc.target/aarch64/test_frame_1.c: Match optimized instruction
sequences.
* gcc.target/aarch64/test_frame_10.c: Likewise.
* gcc.target/aarch64/test_frame_2.c: Likewise.
* gcc.target/aarch64/test_frame_4.c: Likewise.
* gcc.target/aarch64/test_frame_6.c: Likewise.
* gcc.target/aarch64/test_frame_7.c: Likewise.
* gcc.target/aarch64/test_frame_8.c: Likewise.
* gcc.target/aarch64/test_fp_attribute_1.c: Likewise.

2014-07-24  Jiong Wang  <jiong.wang@arm.com>

* gcc.target/aarch64/test_frame_12.c: Match optimized instruction
sequences.

2014-07-23  Jiong Wang  <jiong.wang@arm.com>

* gcc.target/aarch64/test_frame_common.h: New file.
* gcc.target/aarch64/test_frame_1.c: Likewise.
* gcc.target/aarch64/test_frame_2.c: Likewise.
* gcc.target/aarch64/test_frame_3.c: Likewise.
* gcc.target/aarch64/test_frame_4.c: Likewise.
* gcc.target/aarch64/test_frame_5.c: Likewise.
* gcc.target/aarch64/test_frame_6.c: Likewise.
* gcc.target/aarch64/test_frame_7.c: Likewise.
* gcc.target/aarch64/test_frame_8.c: Likewise.
* gcc.target/aarch64/test_frame_9.c: Likewise.
* gcc.target/aarch64/test_frame_10.c: Likewise.
* gcc.target/aarch64/test_frame_11.c: Likewise.
* gcc.target/aarch64/test_frame_12.c: Likewise.
* gcc.target/aarch64/test_frame_13.c: Likewise.
* gcc.target/aarch64/test_frame_14.c: Likewise.
* gcc.target/aarch64/test_frame_15.c: Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@213799 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-11 Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r212753.
2014-07-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/aarch64.c (aarch64_frint_unspec_p): New function.
(aarch64_rtx_costs): Handle FIX, UNSIGNED_FIX, UNSPEC.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@213798 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-11 Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r212752.
2014-07-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/aarch64/arm_neon.h (vmlal_high_lane_s16): Fix type.
(vmlal_high_lane_s32): Likewise.
(vmlal_high_lane_u16): Likewise.
(vmlal_high_lane_u32): Likewise.
(vmlsl_high_lane_s16): Likewise.
(vmlsl_high_lane_s32): Likewise.
(vmlsl_high_lane_u16): Likewise.
(vmlsl_high_lane_u32): Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@213797 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-11 Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r212512.
2014-07-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/cortex-a15.md (cortex_a15_alu): Handle clz, rbit.
* config/arm/cortex-a5.md (cortex_a5_alu): Likewise.
* config/arm/cortex-a53.md (cortex_a53_alu): Likewise.
* config/arm/cortex-a7.md (cortex_a7_alu_reg): Likewise.
* config/arm/cortex-a9.md (cortex_a9_dp): Likewise.
* config/arm/cortex-m4.md (cortex_m4_alu): Likewise.
* config/arm/cortex-r4.md (cortex_r4_alu): Likewise.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@213796 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-11 Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r212358.
2014-07-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

* config/arm/arm.c (cortexa5_extra_costs): New table.
(arm_cortex_a5_tune): Use cortexa5_extra_costs.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@213795 138bc75d-0d04-0410-961f-82ee72b054a4

2014-08-11 Yvan Roux  <yvan.roux@linaro.org>

Backport from trunk r212296.
2014-07-04  Tom de Vries  <tom@codesourcery.com>

* config/aarch64/aarch64-simd.md
(define_insn "vec_unpack_trunc_<mode>"): Fix constraint.

git-svn-id: svn://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@213794 138bc75d-0d04-0410-961f-82ee72b054a4