Heinrich Schuchardt [Thu, 11 Feb 2021 11:03:22 +0000 (12:03 +0100)]
buildman: 'Thread' object has no attribute 'isAlive'
The isAlive() method was deprecated in Python 3.8 and has been removed in
Python 3.9. See https://bugs.python.org/issue37804. Use is_alive() instead.
Since Python 2.6 is_alive() has been a synonym for isAlive(). So there
should be no problems for users using elder Python 3 versions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Tue, 9 Feb 2021 19:20:34 +0000 (20:20 +0100)]
efi_loader: fix get_last_capsule()
fix get_last_capsule() leads to writes beyond the stack allocated buffer.
This was indicated when enabling the stack protector.
utf16_utf8_strcpy() only stops copying when reaching '\0'. The current
invocation always writes beyond the end of value[].
The output length of utf16_utf8_strcpy() may be longer than the number of
UTF-16 tokens. E.g has "CapsuleКиев" has 11 UTF-16 tokens but 15 UTF-8
tokens. Hence, using utf16_utf8_strcpy() without checking the input may
lead to further writes beyond value[].
The current invocation of strict_strtoul() reads beyond the end of value[].
A non-hexadecimal value after "Capsule" (e.g. "CapsuleZZZZ") must result in
an error. We cat catch this by checking the return value of strict_strtoul().
A value that is too short after "Capsule" (e.g. "Capsule0") must result in
an error. We must check the string length of value[].
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 9 Feb 2021 16:45:33 +0000 (17:45 +0100)]
efi_loader: '.' and '..' are directories
'.' and '..' are directories. So when looking for capsule files it is
sufficient to check that the attribute EFI_FILE_DIRECTORY is not set. We
don't have to check for these special names.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Asherah Connor [Tue, 9 Feb 2021 06:19:48 +0000 (06:19 +0000)]
efi_loader: don't load beyond VirtualSize
PE section table entries' SizeOfRawData must be a multiple of
FileAlignment, and thus may be rounded up and larger than their
VirtualSize.
We should not load beyond the VirtualSize, which is "the total size of
the section when loaded into memory" -- we may clobber real data at the
target in some other section, since we load sections in reverse order
and sections are usually laid out sequentially.
Signed-off-by: Asherah Connor <ashe@kivikakk.ee>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Fri, 12 Feb 2021 14:09:10 +0000 (09:09 -0500)]
Merge tag 'u-boot-atmel-fixes-2021.04-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel fixes for 2021.04 cycle:
This small PR includes just two fixes but very important: one revert in
the clk subsystem which fixes the boot on many old boards
(sama5d2_xplained, sama5d4_xplained), which currently crash at boot; and
one small fix related to debug serial on sama7g5ek board.
Eugen Hristev [Tue, 2 Feb 2021 08:47:58 +0000 (10:47 +0200)]
clk: at91: compat: partially revert "dm: Remove uses of device_bind_offset()"
Revert changes in at91 compat.c that cause u-boot to fail booting on
sama5d4_xplained and sama5d2_xplained
Log below:
<debug_uart>
No serial driver found
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Could not initialize timer (err -19)
Fixes:
a2703ce10c ("dm: Remove uses of device_bind_offset()")
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eugen Hristev [Thu, 28 Jan 2021 08:14:11 +0000 (10:14 +0200)]
ARM: dts: at91: sama7g5ek: enable pull-up for serial debug line
If the serial tx/rx are floating, it can happen that bogus characters
are detected on the line at boot time. This leads to U-boot accidentally
thinking someone pressed a key to stop autoboot, thus stopping booting process.
This can happen if the serial cable is not connected. There are hardware
pull-ups on the board connected to serial cable VBUS.
To solve this when the cable is not plugged, enable internal pull-ups as well
for the tx/rx lines.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tom Rini [Thu, 11 Feb 2021 01:40:08 +0000 (20:40 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- MediaTek updates
- xhci fixes
- dwc2 stm32 compatible update
Patrick Delaunay [Tue, 9 Feb 2021 10:14:46 +0000 (11:14 +0100)]
usb: dwc2: change compatible st,stm32mp1-hsotg to st,stm32mp15-hsotg
The Linux kernel v5.7-rc1 introduced the compatible "st,stm32mp15-hsotg".
See Linux kernel commit
d49850110434 ("dt-bindings: usb: dwc2: add
support for STM32MP15 SoCs USB OTG HS and FS")
This patch updates the supported compatible in DWC2 driver,
removes the add-on done in U-Boot dtsi and keeps the compatible
defined in SOC dtsi arch/arm/dts/stm32mp151.dtsi:
usbotg_hs: usb-otg@
49000000 {
compatible = "st,stm32mp15-hsotg", "snps,dwc2";
reg = <0x49000000 0x10000>;
...
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Stefan Roese [Fri, 15 Jan 2021 07:52:56 +0000 (08:52 +0100)]
usb: xhci: Fix compare to use physical addresses in xhci_bulk_tx()
Testing with v2021.01 on MIPS Octeon has shown, that the latest patch
for the "short packet event trb handling" did introduce a bug on
platforms with virtual address != physical address. This patch fixes
this issue by using the correct address types in the compare (both
physical in this case).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Ran Wang <ran.wang_1@nxp.com>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Pali Rohár [Mon, 18 Jan 2021 11:30:04 +0000 (12:30 +0100)]
usb: xhci-pci: Check for errors from dm_pci_map_bar()
Function dm_pci_map_bar() may fail and returns NULL. Check this to prevent
dereferencing a NULL pointer.
In xhci-pci this may happen when board does not enable CONFIG_PCI_PNP and
PCI_BASE_ADDRESS_0 contains unconfigured zero address.
Signed-off-by: Pali Rohár <pali@kernel.org>
Chunfeng Yun [Wed, 23 Dec 2020 01:52:21 +0000 (09:52 +0800)]
dt-bindings: usb: mtk-xhci: add optional properies to disable ports
Add optional properies to disable usb2 or usb3 ports, they are used
when provided ports are not used on some special platforms.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Chunfeng Yun [Wed, 23 Dec 2020 01:52:20 +0000 (09:52 +0800)]
usb: xhci-mtk: support option to disable ports
Add support to disable specific ports, it's useful for some
scenarios:
1. usb3 PHY is shared whith PCIe or SATA, the corresponding
usb3 port can be disabled;
2. some usb2 or usb3 ports are not used on special platforms,
they should be disabled to save power.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Tom Rini [Wed, 10 Feb 2021 12:56:57 +0000 (07:56 -0500)]
Merge tag 'u-boot-amlogic-
20210210' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- Add configuration helpers for MIPI D-PHY
- generic-phy: add configure op
- Add Amlogic AXG MIPI D-PHY driver & MIPI PCIe Analog PHY driver
- odroid: add runtime detection of the N2/N2+/C4/HC4 variants
Marek Szyprowski [Thu, 4 Feb 2021 09:11:45 +0000 (10:11 +0100)]
board: amlogic: odroid: add runtime detection of the N2/N2+/C4/HC4 variants
Use the ADC channel 1 to check the hardware revision of the board and
detect the N2 vs. N2+ and the C4 vs. HC4 variants. Each of them use
different dtb file, so adjust fdtfile environment variable to the
detected variant.
The ADC min/max values for each variant are taken from the vendor code,
adjusted to the 12-bit ADC driver operation mode (vendor code use 10-bit
mode).
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Tue, 29 Dec 2020 13:59:01 +0000 (14:59 +0100)]
phy: Add Amlogic AXG MIPI PCIe Analog PHY driver
The Amlogic AXG MIPI + PCIe Analog PHY provides function for both PCIe and
MIPI DSI at the same time, and provides the Analog part of MIPI DSI transmission
and Analog part of the PCIe lines.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Tue, 29 Dec 2020 13:59:00 +0000 (14:59 +0100)]
phy: Add Amlogic AXG MIPI D-PHY driver
The Amlogic AXG SoCs embeds a MIPI D-PHY used to communicate with DSI
panels.
This D-PHY depends on a separate analog PHY.
Signed-off-by:Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Tue, 29 Dec 2020 13:58:59 +0000 (14:58 +0100)]
generic-phy: add configure op
Add the PHY configure op callback to the generic PHY uclass to permit
configuring the PHY.
It's useful for MIPI DSI PHYs to setup the link timings.
Signed-off-by:Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Tue, 29 Dec 2020 13:58:58 +0000 (14:58 +0100)]
phy: dphy: Add configuration helpers
The MIPI D-PHY spec defines default values and boundaries for most of the
parameters it defines. Introduce helpers to help drivers get meaningful
values based on their current parameters, and validate the boundaries of
these parameters if needed.
These helpers and header are taken from Linux commit
9123e3a74ec7 ("Linux 5.9-rc1").
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tom Rini [Tue, 9 Feb 2021 22:06:44 +0000 (17:06 -0500)]
Merge tag 'u-boot-stm32-
20210209' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Enable the fastboot oem commands in stm32mp15 defconfig
- Fixes pinctrol for stmfx and stm32
- Add support of I2C6_K in stm32mp15 clock driver
- Alignment with Linux kernel device tree v5.11-rc2 for ST boards
Patrick Delaunay [Mon, 11 Jan 2021 11:33:36 +0000 (12:33 +0100)]
arm: dts: stm32mp15: alignment with v5.11-rc2
Device tree alignment with Linux kernel v5.11-rc2
- fix DCMI DMA features on stm32mp15 family
- Add alternate pinmux for FMC EBI bus
- Harmonize EHCI/OHCI DT nodes name on stm32mp15
- update sdmmc IP version for STM32MP15
- Add LP timer irqs on stm32mp151
- Add LP timer wakeup-source on stm32mp151
- enable HASH by default on stm32mp15
- enable CRC1 by default on stm32mp15
- enable CRYP by default on stm32mp15
- set bus-type in DCMI endpoint for stm32mp157c-ev1 board
- reorder spi4 within stm32mp15-pinctrl
- add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
- fix mdma1 clients channel priority level on stm32mp151
- fix dmamux reg property on stm32mp151
- adjust USB OTG gadget fifo sizes in stm32mp151
- update stm32mp151 for remote proc synchronization support
- support child mfd cells for the stm32mp1 TAMP syscon
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fabrice GIRARDOT [Fri, 15 Jan 2021 12:55:01 +0000 (13:55 +0100)]
ARM: dts: stm32: Fix cosmetic typo: use 'kHz' as kilohertz abbreviation
The kilohertz unit abbreviation should read 'kHz'.
Note to STM32 team: modified files were generated, it may be worth
to fix STM32CubeMX tool.
Signed-off-by: Fabrice GIRARDOT <fabrice.girardot@flowbird.group>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Fri, 22 Jan 2021 14:34:25 +0000 (15:34 +0100)]
clk: stm32mp1: add support of I2C6_K
Add support of missing I2C6_K with bit 3 of RCC_MC_APB5ENSETR =
I2C6EN: I2C6 peripheral clocks enable.
This patch allows customer to use I2C6 in SPL or in U-Boot
as other I2C instance, already support in clk driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 21 Jan 2021 16:39:08 +0000 (17:39 +0100)]
pinctrl: stm32: bind only the enabled GPIO subnode
Bind only the enabled GPIO subnode, to avoid to probe the node
"gpio-controller" present in SOC dtsi (disabled by default) but
not enabled in the included pincontrol dtsi file.
For example, in stm32mp15xxac-pinctrl.dtsi 2 gpio bank are absent:
gpioj: gpio@
5000b000
gpiok: gpio@
5000c000
Then these GPIO are absent in output of command "dm tree" and
"gpio status -a"
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrick Delaunay [Thu, 21 Jan 2021 16:39:07 +0000 (17:39 +0100)]
pinctrl: stm32: correct management pin display of OTYPE
OTYPE can be used for output or for alternate function to select
PP = push-pull or OP = open-drain mode, according reference manual
(Table 81. Port bit configuration table).
This patch removes this indication for input pins and adds it
for AF and output pins for pinmux command output.
Fixes:
b305dbc08b08 ("pinctrl: stm32: display bias information for all pins")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrice Chotard [Wed, 20 Jan 2021 12:43:40 +0000 (13:43 +0100)]
pinctrl: stmfx: Use PINNAME_SIZE for pin's name size
Instead of redefining a pin's name size, use PINNAME_SIZE defined
in include/dm/pinctrl.h
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 20 Jan 2021 12:43:39 +0000 (13:43 +0100)]
pinctrl: stmfx: Fix pin configuration issue
pin-controller pin's name must be equal to pin's name used in device
tree with "pins" DT property.
Issue detected on stm32mp157c-ev1 board with goodix touchscreen.
In DT, the goodix's pin is declared in DT with the node:
goodix_pins: goodix {
pins = "gpio14";
bias-pull-down;
};
Whereas in stmfx pin-controller driver, pin's name are equal to
"stmfx_gpioxx" where xx is the pin number.
This lead to not configure stmfx's pins at probe because pins is
identified by its name (see pinctrl_pin_name_to_selector() in
pinctrl-generic.c) and stmfx pin "gpio14" can't be found.
To fix this issue, come back to the original stmfx pin's name.
Revert "pinctrl: stmfx: update pin name"
This reverts commit
38d30cdcd65c73eeefac5efa328ad444a53b77dd.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Wed, 9 Sep 2020 13:24:35 +0000 (15:24 +0200)]
configs: stm32mp1: enable the fastboot oem command bootbus
Enable the fastboot oem command bootbus, used to configure the eMMC
boot behavior, with same format than 'mmc bootbus'
and with parameter: boot_bus_width reset_boot_bus_width boot_mode
On stm32mp1 boards the expected command is
$> fastboot oem partconf:0 0 0
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Wed, 9 Sep 2020 13:24:34 +0000 (15:24 +0200)]
configs: stm32mp1: enable the fastboot oem command partconf
Enable the fastboot oem command partconf, used to select the correct
eMMC boot partition, with same format than 'mmc partconf'
with parameter: boot_ack boot_partition
On stm32mp1 family:
- boot_ack = 1 (Boot Acknowledge is needed by ROM code)
- boot_partition = 1 or 2 (Boot partition 1 / 2 enabled for boot)
So on EV1 board the expected commands to select boot partition 1 or 2
$> fastboot oem partconf:1 1
$> fastboot oem partconf:1 2
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Jean-Philippe ROMAIN [Wed, 9 Sep 2020 13:24:33 +0000 (15:24 +0200)]
configs: stm32mp1: enable the fastboot oem command format
Enable the fastboot oem command format and set the variable
"partitions" with default eMMC partitions list.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Jean-Philippe ROMAIN <jean-philippe.romain@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Jean-Philippe ROMAIN [Wed, 9 Sep 2020 13:24:32 +0000 (15:24 +0200)]
configs: stm32mp1: enable fastboot support of eMMC boot partition
Activate fastboot support on boot partition for eMMC, mmc1 device
on STMicroelectronics board (EV1).
Signed-off-by: Jean-Philippe ROMAIN <jean-philippe.romain@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Tom Rini [Mon, 8 Feb 2021 15:55:51 +0000 (10:55 -0500)]
Merge git://git.denx.de/u-boot-marvell
- Espressobin: Set default env values at runtime (Pali)
- Espressobin: Set the maximum slave SPI speed to 40MHz (Pali)
- theadorable: PCIe test code enhancement and early deemphasis
enabling (Stefan)
- pci_mvebu: Disable config access to PCI host bridge ports (Stefan)
- mv_sdhci: parse device-tree entry (Baruch)
Tom Rini [Mon, 8 Feb 2021 15:55:28 +0000 (10:55 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq
Layerscape: Enable gpio
Bug fixes & updates related to dspi, qspi, pciep, SVR mask,
stream-id, env variables, mdio for LAyerscape Platforms
Add SATA, network variant 1, 2 support on sl28
powerpc: T1042: drop CONFIG_VIDEO, Add kmcent2 board supporrt, keymile
Bug fixes and updates for keymile, Kontron
Tom Rini [Mon, 8 Feb 2021 15:54:37 +0000 (10:54 -0500)]
Merge git://git.denx.de/u-boot-sh
- Beacon EmbeddedWorks RZG2H/N Dev Kit support
Tom Rini [Mon, 8 Feb 2021 15:54:01 +0000 (10:54 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
Biwen Li [Fri, 5 Feb 2021 11:02:19 +0000 (19:02 +0800)]
configs: lx2160aqds: enable CMD_GPIO
Enable CMD_GPIO for board lx2160aqds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:18 +0000 (19:02 +0800)]
configs: lx2160ardb: enable CMD_GPIO
Enable CMD_GPIO for board lx2160ardb
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:17 +0000 (19:02 +0800)]
configs: ls1088ardb: enable DM_GPIO and CMD_GPIO
Enable DM_GPIO and CMD_GPIO for board ls1088ardb
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:16 +0000 (19:02 +0800)]
configs: ls1088aqds: enable DM_GPIO and CMD_GPIO
Enable DM_GPIO and CMD_GPIO for board ls1088aqds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:15 +0000 (19:02 +0800)]
configs: ls2088aqds: enable CMD_GPIO
Enable CMD_GPIO for board ls2088aqds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:14 +0000 (19:02 +0800)]
configs: ls2088ardb: enable DM_GPIO and CMD_GPIO
Enable DM_GPIO and CMD_GPIO for board ls2088ardb
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:13 +0000 (19:02 +0800)]
configs: ls1046aqds: enable CMD_GPIO
Enable CMD_GPIO for board ls1046aqds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:12 +0000 (19:02 +0800)]
configs: ls1046ardb: enable CMD_GPIO
Enable CMD_GPIO for board ls1046ardb
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:11 +0000 (19:02 +0800)]
configs: ls1043ardb: enable CMD_GPIO
Enable CMD_GPIO for board ls1043ardb
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:10 +0000 (19:02 +0800)]
configs: ls1043aqds: enable CMD_GPIO
Enable CMD_GPIO for board ls1043aqds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:09 +0000 (19:02 +0800)]
configs: ls1028ardb: enable CMD_GPIO
Enable CMD_GPIO for board ls1028ardb
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:08 +0000 (19:02 +0800)]
configs: ls1028aqds: enable CMD_GPIO
Enable CMD_GPIO for board ls1028aqds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:07 +0000 (19:02 +0800)]
configs: ls1021atwr: enable CMD_GPIO
Enable CMD_GPIO for ls1021atwr
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:06 +0000 (19:02 +0800)]
configs: ls1021aqds: enable CMD_GPIO
Enable CMD_GPIO for board ls1021aqds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:05 +0000 (19:02 +0800)]
configs: ls1012ardb: enable CMD_GPIO
Enable CMD_GPIO for ls1012ardb
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:04 +0000 (19:02 +0800)]
configs: ls1012afrwy: enable CMD_GPIO
Enable CMD_GPIO for ls1012afrwy
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:03 +0000 (19:02 +0800)]
configs: ls1021aqds: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for board ls1021aqds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:02 +0000 (19:02 +0800)]
configs: ls1021atwr: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for board ls1021atwr
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:01 +0000 (19:02 +0800)]
configs: ls1046a: enable MPC8XXX_GPIO
Enable MPC8XXX_GPIO for SoC LS1046A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:02:00 +0000 (19:02 +0800)]
configs: lx2160a: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for SoC LX2160A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:59 +0000 (19:01 +0800)]
configs: ls208xa: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for LS208xA
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:58 +0000 (19:01 +0800)]
configs: ls1088a: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for LS1088A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:57 +0000 (19:01 +0800)]
configs: ls1028a: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for SoC LS1028A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:56 +0000 (19:01 +0800)]
configs: ls1043a: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for SoC LS1043A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:55 +0000 (19:01 +0800)]
configs: ls1012a: enable CONFIG_MPC8XXX_GPIO
Enable CONFIG_MPC8XXX_GPIO for SoC LS1012A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:54 +0000 (19:01 +0800)]
arm64: dts: ls208xa: add gpio node
Add gpio node for SoC LS208xA
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:53 +0000 (19:01 +0800)]
arm64: dts: ls1088a: add gpio node
Add gpio node for SoC LS1088A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:52 +0000 (19:01 +0800)]
arm64: dts: ls1046a: add gpio node
Add gpio node for SoC LS1046A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:51 +0000 (19:01 +0800)]
arm64: dts: ls1043a: add gpio node
Add gpio node for SoC LS1043A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:50 +0000 (19:01 +0800)]
arm64: dts: ls1028a: add gpio node
Add gpio node for SoC LS1028A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:49 +0000 (19:01 +0800)]
arm64: dts: ls1012a: add gpio node
Add gpio node for SoC LS1012A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:48 +0000 (19:01 +0800)]
arm: dts: ls1021a: add gpio node
Add gpio node for SoC LS1021A
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Fri, 5 Feb 2021 11:01:47 +0000 (19:01 +0800)]
gpio: mpc8xxx_gpio: Fix for litte endian
Update gpio driver to use same logic for big-endian and little-endian
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Hou Zhiqiang [Fri, 5 Feb 2021 08:34:02 +0000 (16:34 +0800)]
configs: T1042: Drop the CONFIG_VIDEO
Drop the CONFIG_VIDEO to fix the following build warning.
===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.
UPD include/generated/dt.h
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
UPD include/generated/timestamp_autogenerated.h
====================================================
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Priyanka Jain [Fri, 5 Feb 2021 08:31:11 +0000 (14:01 +0530)]
mpc8xxx: fsl_pamu: Update data type in config_pamu
Update data type of '1' to '1ull' in below assignment
size = 1ull << sizebit;
to fix incorrect assignment issue.
e.g: when sizebit was 31, 0x80000000 got sign extended to
0xffffffff_80000000
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reported-by: Dean Saridakis <dean.saridakis@baesystems.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Hou Zhiqiang [Fri, 5 Feb 2021 07:45:12 +0000 (15:45 +0800)]
armv7: ls102xa: Enable I-Cache to speed up the boot time
Enable the I-Cache to speed up the boot time, especailly for the NOR
boot, currently it takes about 15 seconds from power up to the U-Boot
prompt, and with the I-Cache enabled it only takes around 2.5 seconds.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Aleksandar Gerasimovski [Fri, 5 Feb 2021 06:02:01 +0000 (06:02 +0000)]
board/km: move km i2c deblock declarations to a km/common.h
Cleanup, move the declarations to keymile/common.h instead declaring them
per-board config.h
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Hou Zhiqiang [Fri, 29 Jan 2021 05:22:02 +0000 (13:22 +0800)]
pci: kconfig: layerscape: Change LX2162A PCIe node compatible string
LX2162A is not like LX2160A which has different PCIe controller
in rev1 and rev2 silicon. It supports only one configuration of
PCIe controller, which is same as LS2088A. So update PCIe
compatible string same as LS2088A.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Tested-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Hou Zhiqiang [Fri, 29 Jan 2021 04:47:05 +0000 (12:47 +0800)]
pci: layerscape: Remove the shadow SVR definitions
This patch moves the SVR definitions to a new svr.h for
Layerscape armv7 and armv8 platforms respectively, so that
the PCIe driver can reuse them.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Mathew McBride [Mon, 25 Jan 2021 03:55:22 +0000 (03:55 +0000)]
spi: fsl_qspi: apply the same settings for LS1088 as LS208x
The LS1088 requires the same QUADSPI_QURIK_BASE_INTERNAL
workaround as the LS208x and also has a 64 byte TX buffer.
With the previous settings SPI-NAND reads over AHB were
corrupted.
Fixes:
91afd36f3802 ("spi: Transform the FSL QuadSPI driver to use the SPI MEM API")
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Mathew McBride [Mon, 25 Jan 2021 03:55:21 +0000 (03:55 +0000)]
spi: fsl_qspi: Ensure width is respected in spi-mem operations
Adapted from kernel commit
b0177aca7aea
From: Michael Walle <michael@walle.cc>
Make use of a core helper to ensure the desired width is respected
when calling spi-mem operators.
Otherwise only the SPI controller will be matched with the flash chip,
which might lead to wrong widths. Also consider the width specified by
the user in the device tree.
Fixes:
91afd36f38 ("spi: Add a driver for the Freescale/NXP QuadSPI controller")
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20200114154613.8195-1-michael@walle.cc
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au> [adapt for U-Boot]
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Mathew McBride [Mon, 25 Jan 2021 03:55:20 +0000 (03:55 +0000)]
mem: spi-mem: add declaration for spi_mem_default_supports_op
spi_mem_default_supports_op is used internally by controller
drivers to verify operation semantics are correct.
It is used internally inside spi-mem but has not (in U-Boot)
been declared in spi-mem.h for external use.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Niel Fourie [Thu, 21 Jan 2021 12:19:20 +0000 (13:19 +0100)]
PowerPC: keymile: Add support for kmcent2 board
Add basic support for the Hitachi Power Grids kmcent2 board, based
on the NXP QorIQ T1040 SoC.
Signed-off-by: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
[Fixed blank line at EOF errors]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Niel Fourie [Thu, 21 Jan 2021 12:19:19 +0000 (13:19 +0100)]
keymile: common: update to set_env_hex(), fix "pram" radix
Replace instances of sprintf()/set_env() for setting hexadecimal
values with set_env_hex().
In set_km_env() the "pram" variable was set to an hexadecimal
value, while initr_mem() expects an unsigned decimal, so use
set_env_ulong() instead.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Niel Fourie [Thu, 21 Jan 2021 12:19:18 +0000 (13:19 +0100)]
PowerPC: dts: Pulled in kmcent2 dts files from Linux 5.10
Pulled in the kmcent2.dts and all its dependents from Linux 5.10,
commit
2c85ebc57b3e upstream. Replaced the license text with
SPDX License Identifiers.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Aleksandar Gerasimovski [Tue, 19 Jan 2021 10:41:00 +0000 (10:41 +0000)]
board/km/common: fix pnvramaddr and varaddr
Take into account SDRAM_BASE address when calculating pnvramaddr and
varaddr offsets.
Up to now Keymile designs had SDRAM_BASE equal to zero and the offsets
where calculated correctly, this fix is for the upcoming designs that
have SDRAM_BASE different then zero.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Aleksandar Gerasimovski [Wed, 13 Jan 2021 16:20:51 +0000 (16:20 +0000)]
keymile: common: qrio: print QRIO id and revision number
Add show_qrio function to print chip id and revision information.
There are already multiple QRIO chip versions available and the upcoming
designs may want to show used version.
Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Aleksandar Gerasimovski [Wed, 13 Jan 2021 16:20:35 +0000 (16:20 +0000)]
board: keymile: common: fix qrio compilation for arm
This patch is fixing qrio driver compilation for ARM architecture:
- It includes asm/io.h for in_/out_ access
- It use correct names for set/clear_bits as defined in linux/bitops.h
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Wed, 13 Jan 2021 11:01:23 +0000 (12:01 +0100)]
armv8: lx2: SVR_SOC_VER: Mask CAN_FD and security bit
Multiple LX2(LX2160A/LX2162A SoC) personality variants
exists based on CAN-FD and security bit in SVR.
Currenly SVR_SOC_VER mask only security bit.
Update SVR_SOC_VER to mask CAN_FD and security bit
for LX2 products.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Nipun Gupta [Tue, 12 Jan 2021 13:12:46 +0000 (18:42 +0530)]
armv8: ls1028a: fix stream id allocation
When A-050382 errata is enabled, ECAM and EDMA have
conflicting stream id 40. This patch fixes the same.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Thu, 7 Jan 2021 23:08:59 +0000 (00:08 +0100)]
board: sl28: add SATA support
Enable SATA support. Although not supported by the usual SATA pins on
the SMARC baseboard connector, SATA mode is supported on a PCIe lane.
This way one can use a mSATA card in a Mini PCI slot.
We need to invert the received data because in this mode the polarity of
the SerDes lane is swapped. Provide a fixup in board_early_init_f() for
the SPL. board_early_init_f() is then not common between SPL and u-boot
proper anymore, thus common.c is removed, as it just contained said
function.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Thu, 7 Jan 2021 23:08:58 +0000 (00:08 +0100)]
board: sl28: add network variant 2 support
Although this variant has two external network ports, they are not (yet)
supported by the bootloader because they are connected via an internal
network switch. Otherwise its the same as the other variants.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Thu, 7 Jan 2021 23:08:57 +0000 (00:08 +0100)]
board: sl28: add network variant 1 support
This variant has one network port connected via RGMII and doesn't have
any TSN capabilities out-of-the-box. Instead it has all four SerDes
lanes available for customer use.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Thu, 7 Jan 2021 23:08:56 +0000 (00:08 +0100)]
board: sl28: move ethernet aliases to variant specific dtsi
The variants differ in their network configuration. Move the first two
network aliases to the proper variant device tree includes. This is in
prepartion for variant 1 and 2 support which has a different network
port mapping. The network aliases for the two internal ports will stay
in the common dtsi because they are present on all board variants.
This might leave a hole if there is no ethernet1 alias. This is
intended.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Ye Li [Mon, 28 Dec 2020 12:15:10 +0000 (20:15 +0800)]
net: eqos: Reduce the MDIO wait time
Current MDIO wait time is too long, which introduce long delay when
PHY negotiation register checking. Reduce it to 10us
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fugang Duan <Fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Zhao Qiang [Fri, 11 Dec 2020 09:31:39 +0000 (17:31 +0800)]
armv8: dts: fsl-lx2162a: add dspi node into qds dts
Add dspi node into lx2162aqds device tree
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Fri, 11 Dec 2020 08:56:51 +0000 (14:26 +0530)]
armv8: lx2162aqds: disable non existing pcie controllers
disable non existing pcie controllers on lx2162aqds
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Thu, 10 Dec 2020 03:02:47 +0000 (11:02 +0800)]
configs: ls1088aqds: add COMMON_ENV to fix distroboot
Add COMMON_ENV(kernelheader_addr_r, fdtheader_addr_r,
kernel_addr_r, fdt_addr_r, load_addr)
to fix a bug that failed to boot to ubuntu
Failed log as follows,
## Executing script at
80000000
load - load binary file from a filesystemUsage:
load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]]
- Load binary file filename from partition part on device
type interface instance dev to address addr in memory.
bytes gives the size to load in bytes.
If bytes is 0 or omitted, the file is read until the end.
pos gives the file byte position to start reading from.
If pos is 0 or omitted, the file is read from the start.
...
Bad Linux ARM64 Image magic!
SCRIPT FAILED: continuing...
Signed-off-by: Biwen Li <biwen.li@nxp.com>
[Updated description]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Ioana Ciornei [Wed, 9 Dec 2020 11:31:58 +0000 (13:31 +0200)]
net: memac_phy: add a timeout to MDIO operations
We have encountered circumstances when a board design does not include
pull-up resistors on the external MDIO buses which are not used. This
leads to the MDIO data line not being pulled-up, thus the MDIO controller
will always see the line as busy.
Without a timeout in the MDIO bus driver, the execution is stuck in an
infinite loop when any access is initiated on that external bus.
Add a timeout in the driver so that we are protected in this
circumstance. This is similar to what is being done in the Linux
xgmac_mdio driver.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Wed, 9 Dec 2020 09:53:26 +0000 (10:53 +0100)]
board: kontron: disable flash unlock all
Although the status register is protected by the hardware write
protection, there is a hardware jumper to disable that hardware write
protection. Thus if a user would set this jumper any u-boot start would
disable the write protection altogether.
Circumvent that by not disabling the write protection in the first
place.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Michael Walle [Wed, 9 Dec 2020 09:53:25 +0000 (10:53 +0100)]
mtd: spi-nor: add unlock all config option
Provide an explicit configuration option to disable default "unlock all"
of any flash chip which supports locking. It doesn't make sense to
automatically unprotect the entire flash on each u-boot startup if the
block protection bits are actually used.
Traditionally, the unlock was there to be able to write to flash devices
which powered-up with the block protection bits set. Over time this
feature creeped into all flash devices which support locking.
For a more detailed description and discussion see:
https://lore.kernel.org/linux-mtd/
20201203162959.29589-8-michael@walle.cc/
Keep things simple in u-boot and just provide a configration option to
disable this behavior which can be set per board.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Baruch Siach [Tue, 2 Feb 2021 06:43:04 +0000 (08:43 +0200)]
mmc: mv_sdhci: parse device-tree entry
Call mmc_of_parse() so that generic DT properties like 'non-removable'
are taken into account.
This fixes boot on Clearfog with eMMC on SOM that requires the
non-removable property.
Reported-by: Thorsten Spille <thorsten_spille@netcor.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Konstantin Porotchkin [Wed, 27 Jan 2021 16:12:00 +0000 (17:12 +0100)]
arm: mvebu: Espressobin: Set the maximum slave SPI speed to 40MHz
While the SPI controller speed is defined by DTS, the maximum
slave speed (connected devices) is limited by the pre-defined
configuration value CONFIG_SF_DEFAULT_SPEED to 1MHz
This patch increases this maximum SPI slave device speed to 40MHz
Change-Id: I0d1239bd8a2061c66725c2c227c1e1f49c92c29e
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/59516
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
[pali: Set CONFIG_SF_DEFAULT_SPEED via defconfig]
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Pali Rohár [Wed, 27 Jan 2021 10:56:02 +0000 (11:56 +0100)]
cmd: mvebu/bubt: Fix default options in help
Default options depends on compile time defines.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 25 Jan 2021 14:27:20 +0000 (15:27 +0100)]
arm: mvebu: theadorable: Set deephasis bit in PCIe configs very early
Testing has shown, that the quality of the PCIe signals and also the
stability of correct link establishment on the 2 PCIe ports is better,
when the deemphasis bit is set in the PCIe config register.
This needs to be done very early, even before the SERDES setup code is
run. This way, the first link will already be established with this
setup.
Signed-off-by: Stefan Roese <sr@denx.de>