Aaron Williams [Fri, 11 Dec 2020 16:06:06 +0000 (17:06 +0100)]
mips: octeon: Add octeon_qlm.c
Import octeon_qlm.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:06:05 +0000 (17:06 +0100)]
mips: octeon: Add octeon_fdt.c
Import octeon_fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:06:04 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-qlm.c
Import cvmx-qlm.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:06:03 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-pcie.c
Import cvmx-pcie.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:06:02 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-helper.c
Import cvmx-helper.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:06:01 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-helper-util.c
Import cvmx-helper-util.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:06:00 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-helper-jtag.c
Import cvmx-helper-jtag.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:59 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-helper-fdt.c
Import cvmx-helper-fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:58 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-helper-cfg.c
Import cvmx-helper-cfg.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 11 Dec 2020 16:05:57 +0000 (17:05 +0100)]
mips: octeon: Move cvmx-lmcx-defs.h from mach/cvmx to mach
To match all other cvmx-* header, this patch moves the already existing
cvmx-lmcx-defs.h header one directory up.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 11 Dec 2020 16:05:56 +0000 (17:05 +0100)]
mips: octeon: Misc changes required because of the newly added headers
With the newly added headers and their restructuring (which macro is
defined where), some changes in the already existing Octeon files are
necessary. This patch makes the necessary changes.
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 23 Apr 2021 17:56:32 +0000 (19:56 +0200)]
mips: octeon: Add misc remaining header files
Import misc remaining header files from 2013 U-Boot. These will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Aaron Williams [Fri, 11 Dec 2020 16:05:54 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sso-defs.h header file
Import cvmx-sso-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:53 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sriox-defs.h header file
Import cvmx-sriox-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:52 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sriomaintx-defs.h header file
Import cvmx-sriomaintx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:51 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-smix-defs.h header file
Import cvmx-smix-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:50 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sli-defs.h header file
Import cvmx-sli-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:49 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sata-defs.h header file
Import cvmx-sata-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:48 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-rst-defs.h header file
Import cvmx-rst-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:47 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pow-defs.h header file
Import cvmx-pow-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:46 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pko-defs.h header file
Import cvmx-pko-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:45 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pki-defs.h header file
Import cvmx-pki-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:44 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pip-defs.h header file
Import cvmx-pip-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:43 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pepx-defs.h header file
Import cvmx-pepx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:42 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pemx-defs.h header file
Import cvmx-pemx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:41 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pcsx-defs.h header file
Import cvmx-pcsx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:40 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pciercx-defs.h header file
Import cvmx-pciercx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:39 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pcieepx-defs.h header file
Import cvmx-pcieepx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:38 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-npi-defs.h header file
Import cvmx-npi-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:37 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-mio-defs.h header file
Import cvmx-mio-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:36 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-l2c-defs.h header file
Import cvmx-l2c-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:35 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-ipd-defs.h header file
Import cvmx-ipd-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:34 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-gserx-defs.h header file
Import cvmx-gserx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:33 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-gmxx-defs.h header file
Import cvmx-gmxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:32 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-fpa-defs.h header file
Import cvmx-fpa-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:31 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-dtx-defs.h header file
Import cvmx-dtx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:30 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-dpi-defs.h header file
Import cvmx-dpi-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:29 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-dbg-defs.h header file
Import cvmx-dbg-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:28 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-ciu-defs.h header file
Import cvmx-ciu-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:27 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-bgxx-defs.h header file
Import cvmx-bgxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:26 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-asxx-defs.h header file
Import cvmx-asxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:25 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-agl-defs.h header file
Import cvmx-agl-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Aaron Williams [Fri, 11 Dec 2020 16:05:24 +0000 (17:05 +0100)]
mips: octeon: Add misc cvmx-helper header files
Import misc cvmx-helper header files from 2013 U-Boot. They will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Fri, 11 Dec 2020 16:05:23 +0000 (17:05 +0100)]
mips: global_data.h: Add Octeon specific data to arch_global_data struct
This will be used by the upcoming Serdes and driver code ported from
the original 2013 U-Boot code to mainline.
Signed-off-by: Stefan Roese <sr@denx.de>
Tom Rini [Wed, 21 Apr 2021 14:22:01 +0000 (10:22 -0400)]
test/py: Bump py to 1.10.0 for CVE-2020-29651
Bump our py version to 1.10.0 to address CVE-2020-29651.
Reported-by: GitHub dependabot
Reported-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 24 Apr 2021 17:30:57 +0000 (13:30 -0400)]
Merge tag 'video-2021-07-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-video
- search for additional detailed timings in the EDID extension block
- rework sunxi DE2 driver and accompanying DW-HDMI platform driver
to drop redundant device specific code, and later use the DT as a
source of information
Tom Rini [Sat, 24 Apr 2021 13:27:49 +0000 (09:27 -0400)]
Merge tag 'efi-2021-07-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2021-07-rc1-3
Documentation fixes
UEFI bug fixes:
* error handling for capsule updates
Jernej Skrabec [Thu, 22 Apr 2021 00:14:34 +0000 (01:14 +0100)]
video: sunxi: de2: switch to public uclass functions
Currently DE2 driver uses functions which are defined in internal
headers. They are not meant to be used outside of uclass framework.
Switch DE2 driver to public ones. This has additional benefit that
device_probe doesn't need to be called manually.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Thu, 22 Apr 2021 00:14:33 +0000 (01:14 +0100)]
video: sunxi: dw-hdmi: read source_id later
There is no real need to read source_id at probe time. It also doesn't
make sense to store it in driver private data since it's already stored
in class platform data. While this looks like cleanup (and it is), it's
also important for DE2 driver rework because this info will be filled
later (after probe is already executed).
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Thu, 22 Apr 2021 00:14:32 +0000 (01:14 +0100)]
video: sunxi: Remove TV probe from DE2
TV driver was never fully implemented. Remove search for it from DE2
driver.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Thu, 22 Apr 2021 00:14:31 +0000 (01:14 +0100)]
video: sunxi: Remove check for ddc-i2c-bus property
No Allwinner board with DW-HDMI controller use separate I2C bus for
EDID read. Remove that check.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Thu, 22 Apr 2021 00:14:30 +0000 (01:14 +0100)]
video: sunxi: Use DW-HDMI hpd function
It turns out that there are two ways how hot plug detection can be done.
One is standard way for DW HDMI controller - checking bit 2 in 0x3004
register. Another way is applicable only to Allwinner custom PHY - by
checking bit 19 in register 0x10038. Both methods are equally good as
far as we know.
Use standard method in order to reduce amount of custom code.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Thu, 22 Apr 2021 00:14:29 +0000 (01:14 +0100)]
common: edid: Search for valid timing in extension block
One of my monitors have only 4k@60 timing in base EDID block which is
out of range for devices with HDMI 1.4. It turns out that it has
additional detailed timings in CTA-861 Extension Block and two of them
are appropriate for HDMI 1.4.
Add additional search for valid detailed timing in extension block.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Thu, 22 Apr 2021 00:14:28 +0000 (01:14 +0100)]
common: edid: extract code for detailed timing search
Code which searches for valid detailed timing entry will be used in more
places. Extract it.
No functional change is made. However, descriptors are casted to
edid_detailed_timing instead of edid_monitor_descriptor. Descriptor can
be of either type, but since we're interested only in DTD, it is more
fitting to cast to edid_detailed_timing.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Thu, 22 Apr 2021 00:14:27 +0000 (01:14 +0100)]
common: edid: check for digital display earlier
When searching for detailed timing in EDID, check for digital display
earlier. There is no point parsing other parameters if this flag is not
present.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Jernej Skrabec [Thu, 22 Apr 2021 00:14:26 +0000 (01:14 +0100)]
video: sunxi: Add mode_valid callback to sunxi_dw_hdmi
Currently driver accepts all resolution which won't work on 4k screens.
Add validation callback which limits acceptable resolutions to 297 MHz.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Ilias Apalodimas [Fri, 23 Apr 2021 13:24:13 +0000 (16:24 +0300)]
test/py: Fix efidebug related tests
commit
cbea241e935e("efidebug: add multiple device path instances on Boot####")
slightly tweaked the efidebug syntax adding -b, -i and -s for the boot
image, initrd and optional data.
The pytests using this command were adapted as well. However I completely
missed the last "" argument, which at the time indicated the optional data
and needed conversion as well. This patch is adding the missing -s flag
and the tests are back to normal.
Fixes:
cbea241e935e("efidebug: add multiple device path instances on Boot####")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviwed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
AKASHI Takahiro [Tue, 20 Apr 2021 01:03:16 +0000 (10:03 +0900)]
efi_loader: capsule: return a correct error code at find_boot_device()
In case of failure at efi_get_variable_int("BootOrder"), we should
skip examining boot option variables and return an appropriate error
code which is the one the function returned.
Fixes: CID 331153 Code maintainability issues (UNUSED_VALUE)
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Jose Marinho [Mon, 19 Apr 2021 13:54:33 +0000 (14:54 +0100)]
efi: Fix ESRT refresh after Capsule update
Indicated by Coverity Scan CID 331147
The ESRT was being refreshed in situations where the UpdateCapsule
procedure failed. In that scenario:
1) the ESRT refresh was superfluous.
2) a failed ESRT refresh return code overwrites the UpdateCapsule error
return code.
This commit ensures that the ESRT is only refreshed when the
UpdateCapsule performs successfully.
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Sughosh Ganu <sughosh.ganu@linaro.org>
CC: AKASHI Takahiro <takahiro.akashi@linaro.org>
CC: Tom Rini <trini@konsulko.com>
CC: Andre Przywara <andre.przywara@arm.com>
CC: nd@arm.com
Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Ilias Apalodimas [Thu, 22 Apr 2021 11:32:14 +0000 (14:32 +0300)]
efi_loader: simplify tcg2_create_digest()
Bumping the digest list count, for all supported algorithms, can be
calculated outside of the individual switch statements. So let's do that
for every loop iteration instead and simplify the code a bit.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 21 Apr 2021 10:39:15 +0000 (12:39 +0200)]
efi_loader: missing include in efi_string.c
To avoid diverging function definitions we need to include efi_loader.h.
Fixes:
fe179d7fb5c1 ("efi_loader: Add size checks to efi_create_indexed_name()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Marek Vasut [Sun, 11 Apr 2021 16:30:36 +0000 (18:30 +0200)]
doc: imx: psb: Fix missing setexpr arguments
Due to copy-paste error, two of the setexpr arguments were missing.
Add the missing arguments.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Mon, 19 Apr 2021 19:54:45 +0000 (21:54 +0200)]
doc: fatinfo man-page
Provide a man-page for the fatinfo command.
The .rst file was lost in patch
15d9694600fe ("doc: fatinfo man-page").
Fixes:
15d9694600fe ("doc: fatinfo man-page")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Fri, 23 Apr 2021 16:21:37 +0000 (12:21 -0400)]
Merge branch '2021-04-22-assorted-updates'
- Move LMB to Kconfig, improve functionality
- Add partlabel support to more fs cmds
Tom Rini [Fri, 23 Apr 2021 11:31:36 +0000 (07:31 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-usb
Tom Rini [Fri, 23 Apr 2021 11:31:21 +0000 (07:31 -0400)]
Merge tag 'mips-pull-2021-04-22' of https://source.denx.de/u-boot/custodians/u-boot-mips
- net: fix traffic problems in MSCC Jaguar 2 network driver
- MIPS: mt7628: fix DDR memory init
- MIPS: octeon: add MMC and USB support
Ye Li [Tue, 9 Mar 2021 03:26:57 +0000 (19:26 -0800)]
usb: ehci-hcd: Add IAA handshake for removing async QH
According to EHCI spec, software needs to do handshake with HC for
safely removing QH from async list. This handshake is implemented by
setting IAAD (Interrupt on Async Advance Doorbell) bit in USB_USBCMD
register and poll the IAA (Interrupt on Async Advance bit) in the
USB_USBSTS to ensure the HC has released all on-chip state that may
potentially reference one of the data structures just removed.
Current codes only check active status of the last QTD, but this can't
ensure the QH is released from HC. We can meet unrecoverable
"EHCI timed out on TD" errors when running UEFI SCT tests on USB disk.
The USB_ASYNCLISTADDR register is changed to a invalid address when the
issue happens. It is fixed after adding the IAA handshake.
Steps to reproduce the issue:
1. Build the UEFI SCT from https://github.com/tianocore/edk2-test
2. Build the EDK2 UEFI Shell from https://github.com/tianocore/edk2
3. Copy SCT files and Shell.efi to USB disk FAT partition
4. Load the Shell.efi from USB FAT, and run bootefi to execute it
5. After booting into Shell, enter the SCT directory and run "sct -a"
to execute all tests.
6. Tests run about 1 hour and stop with many EHCI timeout errors like
EHCI timed out on TD - token=0x801f8c80
Signed-off-by: Ye Li <ye.li@nxp.com>
Patrick Delaunay [Wed, 10 Mar 2021 09:16:32 +0000 (10:16 +0100)]
configs: stm32mp15: increase the number of reserved memory region in lmb
For the latest kernel device tree the max number of reserved regions
in lmb library is reached: 8 with 5 reserved regions in device tree.
When a new region is added, the lmb allocation for the device tree
relocation failed and boot with ramdisk failed.
This patch avoids this issue by increasing the max number of
supported reserved memory in lmb library to 16.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Wed, 10 Mar 2021 09:16:31 +0000 (10:16 +0100)]
lmb: Add 2 config to define the max number of regions
Add 2 configs CONFIG_LMB_MEMORY_REGIONS and CONFIG_LMB_RESERVED_REGIONS
to change independently the max number of the regions in lmb
library.
When CONFIG_LMB_USE_MAX_REGIONS=y, move the lmb property arrays to
struct lmb and manage the array size with the element 'max' of struct
lmb_region; their are still allocated in stack.
When CONFIG_LMB_USE_MAX_REGIONS=n, keep the current location in
struct lmb_region to allow compiler optimization.
Increase CONFIG_LMB_RESERVED_REGIONS is useful to avoid lmb errors in
bootm when the number of reserved regions (not adjacent) is reached:
+ 1 region for relocated U-Boot
+ 1 region for initrd
+ 1 region for relocated linux device tree
+ reserved memory regions present in Linux device tree.
The current limit of 8 regions is reached with only 5 reserved regions
in DT.
see Linux kernel commit
bf23c51f1f49 ("memblock: Move memblock arrays
to static storage in memblock.c and make their size a variable")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Wed, 10 Mar 2021 09:16:30 +0000 (10:16 +0100)]
test: lmb: add test for overflow protection in lmb_add_region
Add test for max number of memory regions and in reserved regions.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Wed, 10 Mar 2021 09:16:29 +0000 (10:16 +0100)]
lmb: correct size of the regions array
As in lmb_region, cnt < max and in the lmb library
use region[i] only with i in 0...cnt, this region array size
can be reduced by 1 element without overflow.
This patch allows to reduce the struct lmb size.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Wed, 10 Mar 2021 09:16:28 +0000 (10:16 +0100)]
lmb: move MAX_LMB_REGIONS value in Kconfig
Move MAX_LMB_REGIONS value in Kconfig, the max number of the regions
in lmb library.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Wed, 10 Mar 2021 09:16:27 +0000 (10:16 +0100)]
lmb: add a max parameter in the struct lmb_region
Add a max parameter in lmb_region struct to handle test
in lmb_add_region without using the MAX_LMB_REGIONS
define.
This patch allows to modify these size independently for
memory of reserved regions in the next patches.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Wed, 10 Mar 2021 09:16:26 +0000 (10:16 +0100)]
lmb: remove lmb_region.size
Remove the unused field size of struct lmb_region as it is initialized to 0
and never used after in lmb library.
See Linux kernel commit
4734b594c6ca ("memblock: Remove memblock_type.size
and add memblock.memory_size instead")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrick Delaunay [Wed, 10 Mar 2021 09:16:25 +0000 (10:16 +0100)]
lmb: move CONFIG_LMB in Kconfig
Migrate CONFIG_LMB in Kconfig.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Sean Anderson [Thu, 15 Apr 2021 02:02:21 +0000 (22:02 -0400)]
checkpatch: Ignore ENOSYS warnings
There are no system calls in U-Boot, but ENOSYS is still allowed (and
preferred since
42a2668743 ("dm: core: Document the common error codes")).
Silence this warning.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 12 Apr 2021 22:53:07 +0000 (18:53 -0400)]
test: Add test for partitions
This is technically a library function, but we use MMCs for testing, so
it is easier to do it with DM. At the moment, the only block devices in
sandbox are MMCs (AFAIK) so we just test with those.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Mon, 12 Apr 2021 22:53:06 +0000 (18:53 -0400)]
part: Fix bogus return from part_get_info_by_dev_and_name
blk_get_device_by_str returns the device number on success. So we must
check if the return was negative to determine an error.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Mon, 12 Apr 2021 22:53:05 +0000 (18:53 -0400)]
cmd: fs: Use part_get_info_by_dev_and_name_or_num to parse partitions
This allows using dev#partlabel syntax.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Sean Anderson [Tue, 20 Apr 2021 15:03:12 +0000 (11:03 -0400)]
test: Alphabetize dm Makefile
Recently, tests have been added primarily to the end of the dm Makefile.
This results in merge conflicts when two people add new tests at the
same time. To reduce these conflicts, alphabetize the makefile.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tom Rini [Thu, 22 Apr 2021 15:29:32 +0000 (11:29 -0400)]
Merge branch '2021-04-22-udoo_neo-update'
- Update the udoo_neo platform for DM support
Stefan Roese [Fri, 19 Feb 2021 13:02:17 +0000 (14:02 +0100)]
mips: octeon: octeon_ebb7304_defconfig: Enable USB storage support
This patch enables USB storage support with the necessary partition
support on the MIPS Octeon EBB7304.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Stefan Roese [Fri, 12 Mar 2021 08:48:28 +0000 (09:48 +0100)]
mips: octeon: octeon_ebb7304_defconfig: Enable MMC support
Enable MMC support including the regulator support on Octeon EBB7304.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Fri, 12 Mar 2021 08:48:27 +0000 (09:48 +0100)]
mips: octeon: mrvl,octeon_ebb7304.dts: Add MMC DT node
Add the MMC DT node to the Octeon EBB7304 DT file including the
regulator node for the MMC power supply.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Fri, 12 Mar 2021 08:48:26 +0000 (09:48 +0100)]
mips: octeon: mrvl,cn73xx.dtsi: Add MMC DT node
Add the MMC DT node to the Octeon CN73xx dtsi file.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Fri, 12 Mar 2021 08:48:25 +0000 (09:48 +0100)]
mmc: octeontx_hsmmc: Add support for MIPS Octeon
Until now, the Octeontx MMC driver did only support the ARM Octeon
TX/Tx2 platforms. This patch adds support for the MIPS Octeon platform
to this driver. Here a short summary of the changes:
- Enable driver compilation for MIPS Octeon, including the MMC related
header file
- Reorder header inclusion
- Switch to using the clk framework to get the input clock
- Remove some functions for MIPS Octeon, as some registers don't
exist here
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Weijie Gao [Fri, 5 Mar 2021 03:13:27 +0000 (11:13 +0800)]
mips: mt7628: fix the displayed DDR type of mt7628
The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type
from bootstrap register must be ignored, and always be assumed as DDR1.
This patch fixes the displayed DDR type of mt7628.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Weijie Gao [Tue, 23 Feb 2021 07:12:44 +0000 (15:12 +0800)]
mips: mt7628: fix ddr_type for MT7688KN
The MT7688KN is a multi-chip package with 8MiB DDR1 KGD. So the DDR type
from bootstrap register must be ignored, and always be assumed as DDR1.
This patch fixes an issue that mt7628_ddr_pad_ldo_config() may be passed
with a wrong ddr_type in MT7688KN.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Horatiu Vultur [Wed, 10 Mar 2021 08:31:39 +0000 (09:31 +0100)]
net: jr2: Fix Serdes6G configuration
Sometimes no traffic was getting out on the ports, the root cause was
a wrong configuration of the Serdes6G, which is used on jr2 pcb111.
This patch fixes this issue by applying the correct configuration.
Fixes:
5e1d417bec92ac ("net: Add MSCC Jaguar2 network driver.")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Horatiu Vultur [Wed, 10 Mar 2021 08:31:38 +0000 (09:31 +0100)]
net: jr2: Reset switch
Make sure to reset the switch core at probe time.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Peter Robinson [Thu, 1 Apr 2021 20:08:13 +0000 (21:08 +0100)]
ARM: imx: udoo_neo: Convert to ethernet DM
Convert the UDOO Neo to ethernet DM support.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Thu, 1 Apr 2021 20:08:12 +0000 (21:08 +0100)]
ARM: imx: udoo_neo: convert to DM_MMC
Convert UDOO Neo to use DM MMC.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Thu, 1 Apr 2021 20:08:11 +0000 (21:08 +0100)]
ARM: imx: udoo_neo: Enable OF_CONTROL and DM gpio/pin control
Enable OF_CONTROL and DM for gpio and pin control support
on the i.MX6SX based Udoo Neo.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Thu, 1 Apr 2021 20:08:10 +0000 (21:08 +0100)]
ARM: board: udoo_neo: Import UDOO Neo dts files
Import the i.MX6SX based UDOO Neo dts files from Linux 5.12-rc1
and sync the i.MX6SX pinfunc.h
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tom Rini [Tue, 20 Apr 2021 11:32:04 +0000 (07:32 -0400)]
Merge branch '2021-04-20-assorted-improvements'
- ARM64 GIC fix, CONFIG_IRQ now moved to Kconfig
- IDE, lz4 fixes
- octeontx cleanups / enhancements
- highbank DM migration
- psci updates
- Enable use of -fstack-protector
Joel Peshkin [Sun, 11 Apr 2021 09:21:58 +0000 (11:21 +0200)]
Add support for stack-protector
Add support for stack protector for UBOOT, SPL, and TPL
as well as new pytest for stackprotector
Signed-off-by: Joel Peshkin <joel.peshkin@broadcom.com>
Adjust UEFI build flags.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 11 Apr 2021 09:21:57 +0000 (11:21 +0200)]
x86: correct usage of CFLAGS_NON_EFI
The current usage of the variable CFLAGS_NON_EFI on the x86 architecture
deviates from other architectures.
Variable CFLAGS_NON_EFI is the list of compiler flags to be removed when
building UEFI applications. It is not a list of flags to be added anywhere.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 11 Apr 2021 09:21:56 +0000 (11:21 +0200)]
test: fix test/dm/regmap.c
regmap_read() only fills the first two bytes of val. The last two bytes are
random data from the stack. This means the test will fail randomly.
For low endian systems we could simply initialize val to 0 and get correct
results. But tests should not depend on endianness. So let's use a pointer
conversion instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Denys Drozdov [Wed, 7 Apr 2021 12:28:24 +0000 (15:28 +0300)]
toradex: configblock: fix module revision in config block
U-boot might display wrong module revision information
for modules with an assembly version 'K'. "cfgblock create"
does not takes into account all revision digits from PID8.
This fix takes into account all digits of PID8
to store module revision.
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Wed, 31 Mar 2021 23:01:56 +0000 (02:01 +0300)]
doc: usage: add usage details for reset cmd
Add usage details for reset command.
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>