review.tizen.org Git - platform/upstream/mesa.git/log

Revert "radv: pre-init surface info"

This reverts commit e15a4e6e1a773f83e621ad95689d264d04963a73.

The change wasn't thread safe.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9955
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10021
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25830>

radv: initialize video decoder for GFX11.5

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25304>

radv: set ENABLE_PING_PONG_BIN_ORDER for GFX11.5

Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25304>

radeonsi: add radeonsi to GL_RENDERER string

adding driver name to GL_RENDERER string will help to quickly
identify the driver being used.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25148>

radeonsi: In gfx6_init_gfx_preamble_state() use gfx_level only from sctx

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25148>

radeonsi: correct old comment in si_emit_framebuffer_state()

si_init_cs_preamble_state() function does not exist anymore and
PA_SC_WINDOW_SCISSOR_TL is set to 0,0. Update the comments with
this information.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25148>

docs: remove document for unused variable dfsm from AMD_DEBUG

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25148>

radeonsi: add more documentation for dpbb debug env variable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25148>

zink: check for sampler view existence during zink_rebind_all_images()

views with mutable formats do not get created immediately, which means
access of them must be checked first

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25829>

zink: only increment image_rebind_counter on image export if binds exist

rebinding all images on all contexts is only relevant for images which
have bindings, otherwise it's just pointless churn

fixes #10016

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25829>

amd/radeonsi: add missing stuff for gfx11.5

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25836>

amd/common: add missing stuff for gfx11.5

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25836>

glsl: Retire dround lowering.

We have competent lowering in NIR already available.

Drivers exposing CAP_DOUBLES but not SHADER_CAP_DROUND:
- d3d12 (NIR lowers ~0 if the underlying impl doesn't do floats)
- svga (Now sets the NIR lowering options)
- softpipe (Doesn't do GL4 so you can't use doubles anyway)
- llvmpipe (Lowers dround_even in NIR and passees the rest through
            successfully)
- zink (NIR lowers ~0 if the underlying impl doesn't do floats,
        otherwise passes things through successfully, except needed
        dround_even lowering to avoid lavapipe regression with
        native doubles)
- r600 (sets NIR rounding lowering flags, and lowers all fsign)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25777>

nir: Add nir_lower_dsign as 64-bit fsign lowering.

Right now some drivers are doing dsign lowering in GLSL and haven't had to
have a NIR path due to there not being a corresponding vulkan driver. We
want this in NIR now so that we can retire that batch of GLSL lowering
code.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25777>

llvmpipe: Set nir_lower_dround_even.

Avoids a regression when disabling GLSL-level lowering of the dround class
of ops, while passing through doubles to llvm for the other rounding ops.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25777>

glsl: Remove int64 div/mod lowering.

Most drivers that can expose GL4 were claiming the cap anyway (llvmpipe,
softpipe, zink, iris, nvc0, radeonsi, r600, freedreno, d3d12), and just
doing lowering in NIR if nessary.

crocus was only claiming the cap for gen8, but the backend compiler
enables NIR lowering regardless.

svga is the only other GL4 driver that didn't set it, and we can just set
the NIR lowering flag.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25777>

anv: Switch Xe KMD vm bind to sync

It was never actually async as it was doing a DRM_IOCTL_SYNCOBJ_WAIT
right after DRM_IOCTL_XE_VM_BIND but it was required to allow the
partial binds required by sparse.
But it is now fixed and we can switch back to sync vm bind.

In future we will switch back to async vm bind to improve performance
but this time it will be properly implemented.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25300>

intel: Sync xe_drm.h

Sync xe_drm.h with commit xxxxx ("drm/xe/uapi: Fix naming of XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY").

One not so straght forward change is that sync VM binds now don't
require a syncobj anymore, the uAPI will return as soon the VM bind
operations are done.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25300>

spirv: Let spirv2nir find out the shader to use

Previous behavior was to default to "main"/fs, this wasn't nice
when the SPIR-V module had a single shader that didn't match that spec.

New behavior is to look at the available shaders:

- if there's only one, use just use it
- if multiple, narrow down using --stage and --entry as criteria
- if still multiple after narrowing down, print the list and fail

Note you can use just one --stage or --entry if that already narrows
down to a single match. Note that in SPIR-V it is valid to have a
shader module with two shaders sharing the same entry-point name but
different stages. Because of that in rare cases both --stage and
--entry will be needed.

This patch should remove the need of using --stage and --entry for most
of the uses of spirv2nir.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25461>

spirv: List entry-points in spirv2nir when unsure what to use

When there's ambiguity about what shader to use, list the shaders.
Conveniently print in the command line argument for, so can be copied
pasted.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25461>

spirv: Change spirv2nir to use the shorter shader name abbreviations

This are the abbreviations we use elsewhere in Mesa. For convenience we
make them case insensitive. Old names still work for compatibility.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25461>

spirv: Expose stage enum conversion in vtn_private.h

Refactor it to not fail, just return MESA_SHADER_NONE. Caller
takes care of handling error. Exposed so can be used by spirv2nir
program.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25461>

radv: fix signed integer overflow

Fixes UBSan error:
src/amd/vulkan/radv_shader_info.c:78:41: runtime error: left shift of 15 by 28 places cannot be represented in type 'int'

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25432>

ac/nir: fix out-of-bounds access in ac_nir_export_position

These accesses (and similar) in ac_nir_exprot_position were out-of-bounds:
if (!outputs[VARYING_SLOT_PSIZ][0])
outputs_written &= ~VARYING_BIT_PSIZ;

I don't think this caused any real issue, but this silences ASan:
==40091==ERROR: AddressSanitizer: stack-use-after-return on address 0x7f8ffa6b1cb8 at pc 0x7f900da99068 bp 0x7f8ffb8871d0 sp 0x7f8ffb8871c8

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25432>

radv: skip zero-sized memcpy

Fixes UBSan:
src/amd/vulkan/radv_pipeline.c:1181:4: runtime error: null pointer passed as argument 2, which is declared to never be null
src/amd/vulkan/radv_shader.c:2243:4: runtime error: null pointer passed as argument 2, which is declared to never be null

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25432>

intel/isl: Add scores for GEN12_RC_CCS and MTL_RC_CCS

Now that these CCS-enabled modifiers have non-zero scores, anv is
enabled to use them.

We found this to improve the performance of Borderlands 3 by 18.73%.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6701
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Tested-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Delete implicit CCS code

Stop allocating CCS at the end of some BOs. Anv no longer uses that
memory range.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Meet CCS alignment reqs with dedicated allocs

At image bind time, we require BOs to meet aux-map alignment
requirements in order to enable CCS on images. This is a heuristic
controlled by anv_bo_allows_aux_map().

To improve the chances of getting a properly aligned BO, we make use of
the dedicated allocation extension. Firstly, we report to applications a
preference for dedicated memory if an image would like to use the aux
map. Secondly, we align the VMA for dedicated allocations to meet
aux-map requirements.

To make enabling modifiers much easier on integrated gfx12, report
dedicated allocations as a requirement for modifiers which specify CCS.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Loosen anv_bo_allows_aux_map

Instead of requiring that a BO has the has_implicit_ccs flag set, simply
require that the BO is aligned according to aux-map requirements.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Place images into the aux-map when safe to do so

At image bind time, if an image's addresses can be placed into the
aux-map without causing conflicts with a pre-existing mapping, do so.
The code aux management code in the binding function operates on a
per-plane basis. So, use the per-plane CCS memory range from the image
rather than the CCS memory region for the entire BO.

Another way to avoid aux-map conflicts is to rely solely on having a
dedicated allocation for an image. Unfortunately, not all workloads
change their behavior when drivers report a preference for dedicated
allocations. In particular, 3DMark Wild Life Extreme does not make more
dedicated allocations and such a solution was measured to perform ~16%
worse than this solution. With this solution, I did not measure a loss
of CCS on that benchmark.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6304
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Refactor CCS disabling at image bind time

Split out the discrete and integrated implicit CCS cases. We'll do more
work in the integrated case in a future commit.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Wrap aux surface image binding queries

Add and use anv_image_get_aux_memory_range.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Allocate space for aux-map CCS in image bindings

This makes images a bit larger by reserving space to store the
compression control surface when the device uses an aux-map.

This space is not used currently because anv still maps main surface
addresses to space at the end of the anv_bo.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Move scope of CCS binding determination

Move the determination of the image binding for CCS to a larger scope,
so that it can be reused for other aux usages in
add_aux_surface_if_supported().

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

intel: Return a bool from intel_aux_map_add_mapping

Make intel_aux_map_add_mapping return false if a mapping is attempted
that would conflict with an existing one. If this function doesn't
return false, it will either fail to return or return true.

The Vulkan driver will make use of this feature to opportunistically
enable CCS if a BO's VMA range has not been already mapped.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

radv/rmv: Recognize LPDDR memory

Fixes: 8d0e6c02 ("radv: Add RMV tracing utilities")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25845>

radv/rra: Recognize LPDDR memory

Also move away from using unnamed constants for memory types.

Fixes: aef7ea868fe ("ac/gpu_info: handle LPDDR4 and 5 in ac_memory_ops_per_clock")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25845>

docs/ci: Add some links in the CI docs to how to track job flakes

and also figuring out how many boards are available for sharding
management.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25806>

docs/ci: Drop old instructions for farm disabling

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25806>

util: Remove MESA_TRACE_BEGIN/END

There are no user of these macros anymore, simplify the cpu_trace header.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25308>

util/perf: Remove the tracing categories

The slow category remains unused in Mesa currently, readd it once we have
a use for it.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25308>

util: Avoid the use of MESA_TRACE_BEGIN/END

Switch the last occurrences of it to the MESA_TRACE_SCOPE macro which is
easier to use.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25308>

venus: Change the only occurrence of VN_TRACE_BEGIN/END to VN_TRACE_SCOPE

This is the only part of venus using this macro, let's replace it with the scope
one.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25308>

aux/tc: Use MESA_TRACE_SCOPE instead of _BEGIN/_END

The MESA_TRACE_SCOPE macro is an exact replacement for this.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25308>

tu: Use MESA_TRACE_SCOPE instead of _BEGIN/_END

The MESA_TRACE_SCOPE macro is an exact replacement for this.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25308>

freedreno/drm/virtio: Use MESA_TRACE_SCOPE instead of _BEGIN/_END

The MESA_TRACE_SCOPE macro is an exact replacement for this.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25308>

zink: fix zink_destroy_screen for early screen creation fails

Fixes crashes on at least my system with multiple GPUs.

Fixes: 0c2045553fe ("zink: use screen destructor for creation fails")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25844>

etnaviv: Skip 'empty' cmd streams

Make use of etna_cmd_stream_mark_end_of_context_init(..) to mark the
end of context init states. If the cmd stream is untouched until
etna_cmd_stream_flush(..) gets called the drm layer will downgrade this
specific cmd stream to a noop.

This safes us from calling into the kernel with an 'empty' cmd stream.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25849>

etnaviv: drm: Be able to mark end of context init

Add etna_cmd_stream_mark_end_of_context_init(..) which stores the current
offset of the cmd stream as offset_end_of_context_init. This information
will be used to downgrade a cmd stream flush to a noop.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25849>

pvr: Only setup the bgobj to load if we have a load_op

We only need to setup the background object if we have a load_op,
to perform the loads/clears.

This fixes segfaults for cases where we don't have a load_op.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25703>

ci/b2c: change artifacts path to match baremetal and LAVA

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25815>

ci/ci_run_n_monitor: keep monitoring if a job is still running

When running multiple targets, the script was returning if any of the
targets failed.
But sometimes some of the targets are still running and we want to
monitor it until it finishes, even if some of the targets failed.

So check if any targeted jobs are in pending or running before deciding
to finish.

Signed-off-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25826>

ci/freedreno: disable Adreno 660 Vulkan pre-merge

No need to move it to manual/nightly - we already run full runs there.

Revert when Adreno 660 gets stable again!

Reported-by: Helen Koike <helen.koike@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25839>

radeonsi: fixes compilaton error when perfetto is disabled

Signed-off-by: Saroj Kumar <saroj.kumar@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25827>

ci/freedreno: fix copy paste causing a618_gl being run only in manual pipeline

Fixes: 9d442b459a43 ("ci/freedreno: handle disabling farm properly for each FD/Collabora farm")
Closes: #9992

Acked-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25816>

svga: Unify gmr and mob surface pool managers

The svga driver contains several buffer managers with gmr* and mob* prefixes,
but they are of similar functionality. The underlying vmwgfx kernel driver
allocates memory of one type - mobs if supported by the virtual hardware,
and gmrs otherwise - and returns an opaque pointer to userspace, so several
managers are reduntant.

This patch reduces the number of buffer managers by unifying similar managers
and performing refactors where necessary.

Signed-off-by: Maaz Mombasawala <mombasawalam@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Zack Rusin <zackr@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25832>

svga: Make surfaces shareable at creation.

There is no need to have a separate shareable pool of surfaces, we can make
all surfaces shareable.
This change makes all surfaces shareable when creating them.

Signed-off-by: Maaz Mombasawala <mombasawalam@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Martin Krastev <krastevm@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25832>

ci/venus: mark more flaky tests after recent cts uprev

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25799>

ci/marge_queue: add missing python-dateutils to requirements.txt

marge_queue.py requires python-dateutils to run, so add it.

Signed-off-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25828>

mesa: add GL_APPLE_sync support

This extension is a backport of GL_ARB_sync to GLES 1.1 and 2.0
and reuses token IDs and entry point prototypes from that extension,
so adding support is pretty trivial.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25789>

zink: properly alias shared memory

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25763>

zink: wrap shared memory blocks in a struct

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25763>

frontends/va: Fix locking in vlVaBeginPicture

The assert in vlVaSetSurfaceContext would very rarely fail because
the mutex was already unlocked when calling this function from
vlVaBeginPicture.

Keep the lock until returning from vlVaBeginPicture, as that's what
other functions are already doing.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25823>

pvr: Implement VK_EXT_host_query_reset

Signed-off-by: Vlad Schiller <vlad-radu.schiller@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25783>

pvr: Implement VK_EXT_texel_buffer_alignment

This commit will implement the VK_EXT_texel_buffer_alignment
extension and add the texture_baseaddress_byte_aligned feature.

Signed-off-by: Vlad Schiller <vlad-radu.schiller@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25781>

pvr: Enable VK_KHR_bind_memory2 extension

The two functions 'vkBindBufferMemory2' and 'vkBindImageMemory2' are aleady
implemented, and it seems that the flag does not need to be enabled for the
tests to pass.

Signed-off-by: Vlad Schiller <vlad-radu.schiller@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25779>

pvr: Implement VK_KHR_external_semaphore

In order for the tests to pass, this commit also enables
the VK_KHR_external_semaphore_fd extension.

Signed-off-by: Vlad Schiller <vlad-radu.schiller@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25784>

pvr: Implement VK_KHR_external_fence

In order for the tests to pass, this commit also enables
the VK_KHR_external_fence_fd extension.

Signed-off-by: Vlad Schiller <vlad-radu.schiller@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25784>

anv: document the draw indirect optimization ring mode

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>

anv: merge gfx9/11 indirect draw generation shaders

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>

anv: add ring buffer mode to generated draw optimization

When the number of draw calls is very large, instead of allocating
large amounts of batch buffer space for the draws, use a ring buffer
and process the draw calls by batches.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8645
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>

anv: index indirect data buffer with absolute offset

This will help for a follow up change where we will respawn the shader
multiple times in a loop and the base offset will be edited by the
shader itself.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>

anv: factor out host/gpu internal shaders interfaces

This will prevent host/gpu structure definitions to go out of sync.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>

util/glsl2spirv: add ability to pass defines

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>

anv: move generation batch fields to a sub-struct

Just tyding things a bit since we're about to add more.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>

anv: avoid MI commands to copy draw indirect count

We can just make the address of the count available to the generation
shader.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>

anv: identify internal shader in NIR

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>

anv: extract out draw call generation

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>

anv: fix generated draws gl_DrawID with more than 8192 indirect draws

This applies only to Gfx9.

We're writting out of bounds to a wrong location.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1d9cf8f381 ("anv: add gfx9 generated draw support")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>

anv: move generation shader return instruction to last draw lane

If we dispatch exactly a multiple of 8192 items, there is additional
lane left to generate the jump instruction.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25361>

Revert "etnaviv: use correct blit box sizes when copying resource"

Revert commit b4c24d5978a5, as it causes a regression in
dEQP-GLES2.functional.texture.specification.basic_copytexsubimage2d.2d_rgb
and some other testcases. Needs further investigation.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10007
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25825>

dri: Drop a duplicate mesa vs pipe format table.

mesa_format is a typedef of enum pipe_format, and the nice mesa format
names are a subset of the available pipe formats. No need to keep a
duplicate table here.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25650>

ci: drop skip for glx-swap-copy.

This will always be a skip now that we dropped GLX_OML_swap_method.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25650>

glx: Delete support for GLX_OML_swap_method.

This was an ill-advised extension.  While we advertised SWAP_COPY support,
we might implement it with a back-copy from the front buffer.  And we
never advertised EXCHANGE because we couldn't guarantee it.  So, if you
actually used this extension to try to reduce app redraws of the back
buffer, you might actually increase the bandwidth you used.  Whoops.

Instead, GLX_EXT_buffer_age and the similar EGL extension give you
feedback on what's left in your back buffer, letting you do minimum
redraws.

This reduces our GLX visual+fbconfig count from 1410 to 940 on an llvmpipe
X server.  Reducing visual counts will improve test runtime for
visual-iterating tests like piglit's glx-visuals-*.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25650>

ci_run_n_monitor: Poll mesa/mesa and user/mesa for pipelines at the same time.

Now you don't fail if you're trying to test a mesa/mesa MR pipeline and
gitlab takes more than 10s to create it. And you don't have to wait 10
seconds to get things started (aka see if your regex was right) if you're
testing a user/mesa fork pipeline.

Fixes: 941d92408ee5 ("bin/ci_run_n_monitor: automatically pick MR pipelines when they exist")
Closes: #9894
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25810>

radeonsi/vcn: set jpeg reg version for gfx 1150

select appropriate jpeg register version for gfx1150

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Leo Liu <Leo.Liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25278>

amd/common: update DCC for gfx11.5

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25278>

amd, radeonsi: Add code to enable gfx11.5

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25278>

ac/nir: extract must_wait_attr_ring helper

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25278>

amd/common: add registers for gfx11.5

Built from amd-staging-drm-next c5a7d38c2c7fc + Alex D
"drm/amdgpu: update to the latest GC 11.5 header" patch.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25278>

amd/common: update addrlib for gfx11.5

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25278>

d3d12: Allocate d3d12_video_buffer with higher alignment for compatibility

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25819>

d3d12: Add support for PIPE_VIDEO_CAP_ENC_MAX_TILE_ROWS/COLS

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25819>

frontend/va: Add support for VAConfigAttribEncMaxTileRows/Cols

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25819>

d3d12: AV1 Encode - Fix VAConfigAttribEncMaxRefFrames reporting

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25819>

d3d12: AV1 encode - add fallback for app passing unsupported pic_params.InterpolationFilter

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25819>

d3d12: AV1 encode - Add lower resolution fallback check for uniform tile support

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25819>

d3d12: Do not destroy codec when destroying video buffer

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25819>

d3d12: Video Decode - Wait for GPU completion before destroying decoder in-flight objects

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25819>