platform/kernel/linux-starfive.git
23 months agoMerge drm/drm-next into drm-intel-next
Rodrigo Vivi [Thu, 4 Aug 2022 14:19:24 +0000 (10:19 -0400)]
Merge drm/drm-next into drm-intel-next

Sync up. In special to get the drm-intel-gt-next stuff.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
23 months agoMerge tag 'amd-drm-next-5.20-2022-07-29' of https://gitlab.freedesktop.org/agd5f...
Dave Airlie [Wed, 3 Aug 2022 04:00:18 +0000 (14:00 +1000)]
Merge tag 'amd-drm-next-5.20-2022-07-29' of https://gitlab.freedesktop.org/agd5f/linux into drm-next

amd-drm-next-5.20-2022-07-29:

amdgpu:
- Misc spelling and grammar fixes
- DC whitespace cleanups
- ACP smatch fix
- GFX 11.0 updates
- PSP 13.0 updates
- VCN 4.0 updates
- DC FP fix for PPC64
- Misc bug fixes

amdkfd:
- SVM fixes

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220729202742.6636-1-alexander.deucher@amd.com
23 months agodrm/i915/dg2: Add support for DC5 state
Anusha Srivatsa [Thu, 28 Jul 2022 18:36:41 +0000 (11:36 -0700)]
drm/i915/dg2: Add support for DC5 state

With the latest DMC in place, enabling DC5 on DG2.

Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220728183641.55692-1-anusha.srivatsa@intel.com
23 months agodrm/amd/display: Fix a compilation failure on PowerPC caused by FPU code
Rodrigo Siqueira [Thu, 28 Jul 2022 20:33:47 +0000 (16:33 -0400)]
drm/amd/display: Fix a compilation failure on PowerPC caused by FPU code

We got a report from Stephen/Michael that the PowerPC build was failing
with the following error:

ld: drivers/gpu/drm/amd/display/dc/dml/display_mode_lib.o uses hard float, drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.o uses soft float
ld: failed to merge target specific data of file drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.o

This error happened because of the function optc3_set_vrr_m_const. This
function expects a double as a parameter in a code that is not allowed
to have FPU operations. After further investigation, it became clear
that optc3_set_vrr_m_const was never invoked, so we can safely drop this
function and fix the ld issue.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Melissa Wen <mwen@igalia.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Reported-by: Michael Ellerman <mpe@ellerman.id.au>
Tested-by: Michael Ellerman <mpe@ellerman.id.au>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: enable support for psp 13.0.4 block
Xiaojian Du [Wed, 27 Jul 2022 07:52:33 +0000 (15:52 +0800)]
drm/amdgpu: enable support for psp 13.0.4 block

This patch will enable support for psp 13.0.4 blcok.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: add files for PSP 13.0.4
Xiaojian Du [Thu, 28 Jul 2022 05:25:26 +0000 (13:25 +0800)]
drm/amdgpu: add files for PSP 13.0.4

This patch will add files for PSP 13.0.4.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: add header files for MP 13.0.4
Xiaojian Du [Thu, 28 Jul 2022 05:23:38 +0000 (13:23 +0800)]
drm/amdgpu: add header files for MP 13.0.4

This patch will add header files for MP 13.0.4.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: correct RLC_RLCS_BOOTLOAD_STATUS offset and index
Yifan Zhang [Wed, 27 Jul 2022 06:53:47 +0000 (14:53 +0800)]
drm/amdgpu: correct RLC_RLCS_BOOTLOAD_STATUS offset and index

This patch corrects RLC_RLCS_BOOTLOAD_STATUS offset and index for
GC 11.0.1.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: send msg to IMU for the front-door loading
Xiaojian Du [Wed, 27 Jul 2022 06:40:21 +0000 (14:40 +0800)]
drm/amdgpu: send msg to IMU for the front-door loading

This patch will make SMU send msg to IMU for the front-door loading, it is
required by some ASICs.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdkfd: use time_is_before_jiffies(a + b) to replace "jiffies - a > b"
Yu Zhe [Thu, 28 Jul 2022 03:30:26 +0000 (11:30 +0800)]
drm/amdkfd: use time_is_before_jiffies(a + b) to replace "jiffies - a > b"

time_is_before_jiffies deals with timer wrapping correctly.

Signed-off-by: Yu Zhe <yuzhe@nfschina.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: fix hive reference leak when reflecting psp topology info
Jonathan Kim [Thu, 28 Jul 2022 16:36:09 +0000 (12:36 -0400)]
drm/amdgpu: fix hive reference leak when reflecting psp topology info

Hives that require psp topology info to be reflected will leak hive
reference so fix it.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Shaoyun Liu <shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/pm: enable GFX ULV feature support for SMU13.0.0
Evan Quan [Fri, 15 Jul 2022 03:03:01 +0000 (11:03 +0800)]
drm/amd/pm: enable GFX ULV feature support for SMU13.0.0

The feature is ready with latest firmwares.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/pm: update driver if header for SMU 13.0.0
Evan Quan [Mon, 25 Jul 2022 03:45:43 +0000 (11:45 +0800)]
drm/amd/pm: update driver if header for SMU 13.0.0

And get the version bumped to 0x2C to match the latest PMFW.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: move mes self test after drm sched re-started
Jack Xiao [Wed, 20 Jul 2022 07:57:22 +0000 (15:57 +0800)]
drm/amdgpu: move mes self test after drm sched re-started

mes self test rely on vm mapping, move it after
drm sched re-started so that vm mapping can work
during gpu reset.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-and-tested-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: drop non-necessary call trace dump
Evan Quan [Wed, 20 Jul 2022 08:51:58 +0000 (16:51 +0800)]
drm/amdgpu: drop non-necessary call trace dump

This extra call trace dump comes out in every gpu reset.
And it gives people a wrong impression that something
went wrong. Although actually there was not.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: enable VCN cg and JPEG cg/pg
Sonny Jiang [Thu, 21 Jul 2022 17:27:12 +0000 (13:27 -0400)]
drm/amdgpu: enable VCN cg and JPEG cg/pg

Not enable VCN pg because encode issue

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: vcn_4_0_2 video codec query
Sonny Jiang [Thu, 21 Jul 2022 17:27:11 +0000 (13:27 -0400)]
drm/amdgpu: vcn_4_0_2 video codec query

Enable support for vcn_4_0_2 video codec

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: add VCN_4_0_2 firmware support
Sonny Jiang [Thu, 21 Jul 2022 17:27:10 +0000 (13:27 -0400)]
drm/amdgpu: add VCN_4_0_2 firmware support

Add VCN_4_0_2 firmware support

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: add VCN function in NBIO v7.7
Sonny Jiang [Thu, 21 Jul 2022 17:27:09 +0000 (13:27 -0400)]
drm/amdgpu: add VCN function in NBIO v7.7

Add function to support VCN_4_0_2 doorbell

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: fix a vcn4 boot poll bug in emulation mode
Sonny Jiang [Thu, 21 Jul 2022 17:27:08 +0000 (13:27 -0400)]
drm/amdgpu: fix a vcn4 boot poll bug in emulation mode

The return value should be set in vcn4 boot poll.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/amdgpu: add memory training support for PSP_V13
Chengming Gui [Thu, 28 Jul 2022 01:15:43 +0000 (09:15 +0800)]
drm/amd/amdgpu: add memory training support for PSP_V13

Add PSP_V13 memory training support funcs.

v2: replace DRM_{DEBUG/ERROR} with dev_{dbg/err}. (Hawking)
v3: fix checkpatch error (Alex)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdkfd: remove an unnecessary amdgpu_bo_ref
Lang Yu [Mon, 25 Jul 2022 07:06:55 +0000 (15:06 +0800)]
drm/amdkfd: remove an unnecessary amdgpu_bo_ref

No need to reference the BO here, dmabuf framework will handle that.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/pm: Add get_gfx_off_status interface for yellow carp
Shikai Guo [Wed, 20 Jul 2022 11:38:24 +0000 (19:38 +0800)]
drm/amd/pm: Add get_gfx_off_status interface for yellow carp

add get_gfx_off_status interface to yellow_carp_ppt_funcs structure.

Signed-off-by: Shikai Guo <shikai.guo@amd.com>
Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Prike Liang <prike.liang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Remove unused struct freesync_context
Maíra Canal [Wed, 27 Jul 2022 17:50:33 +0000 (14:50 -0300)]
drm/amd/display: Remove unused struct freesync_context

All references to struct freesync_context were removed, so remove the
struct freesync_context itself and its entry on struct dc_stream_state.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Maíra Canal <mairacanal@riseup.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/amdgpu: add additional page fault settings for gfx11
Chengming Gui [Mon, 20 Jun 2022 07:52:29 +0000 (15:52 +0800)]
drm/amd/amdgpu: add additional page fault settings for gfx11

Add three additional page fault settings.

V2: move reg offset definition to header file. (Alex)
V3: add all shift/mask definitions of used reg. (Hawking)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: remove unneeded semicolon
Yang Li [Tue, 26 Jul 2022 22:28:09 +0000 (06:28 +0800)]
drm/amd/display: remove unneeded semicolon

Eliminate the following coccicheck warning:
./drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c:2344:67-68: Unneeded semicolon

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: fix i2s_pdata out of bound array access
Vijendar Mukunda [Wed, 27 Jul 2022 10:45:43 +0000 (16:15 +0530)]
drm/amdgpu: fix i2s_pdata out of bound array access

Fixed following Smatch static checker warning:

    drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:393 acp_hw_init()
    error: buffer overflow 'i2s_pdata' 3 <= 3
    drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c:396 acp_hw_init()
    error: buffer overflow 'i2s_pdata' 3 <= 3

Fixes: 4c33e5179ff1 ("drm/amdgpu: create I2S platform devices for Jadeite platform")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdkfd: fix kgd_mem memory leak when importing dmabuf
Lang Yu [Tue, 26 Jul 2022 05:32:39 +0000 (13:32 +0800)]
drm/amdkfd: fix kgd_mem memory leak when importing dmabuf

The kgd_mem memory allocated in amdgpu_amdkfd_gpuvm_import_dmabuf()
is not freed properly.

Explicitly free it in amdgpu_amdkfd_gpuvm_free_memory_of_gpu()
under condition "mem->bo->kfd_bo != mem".

Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: add debugfs for kfd system and ttm mem used
Alex Sierra [Mon, 13 Jun 2022 18:31:41 +0000 (13:31 -0500)]
drm/amdgpu: add debugfs for kfd system and ttm mem used

This keeps track of kfd system mem used and kfd ttm mem used.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdkfd: track unified memory reservation with xnack off
Alex Sierra [Tue, 17 May 2022 22:43:06 +0000 (17:43 -0500)]
drm/amdkfd: track unified memory reservation with xnack off

[WHY]
Unified memory with xnack off should be tracked, as userptr mappings
and legacy allocations do. To avoid oversuscribe system memory when
xnack off.
[How]
Exposing functions reserve_mem_limit and unreserve_mem_limit to SVM
API and call them on every prange creation and free.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: fix signedness bug in execute_synaptics_rc_command()
Dan Carpenter [Tue, 26 Jul 2022 15:15:31 +0000 (18:15 +0300)]
drm/amd/display: fix signedness bug in execute_synaptics_rc_command()

The "ret" variable needs to be signed for the error handling to work.

Fixes: 2ca97adccdc9 ("drm/amd/display: Add Synaptics Fifo Reset Workaround")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:55 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1372 dp_dsc_clock_en_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1478 dp_dsc_clock_en_write() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1563 dp_dsc_slice_width_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1667 dp_dsc_slice_width_write() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1752 dp_dsc_slice_height_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1856 dp_dsc_slice_height_write() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1937 dp_dsc_bits_per_pixel_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2038 dp_dsc_bits_per_pixel_write() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2117 dp_dsc_pic_width_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2178 dp_dsc_pic_height_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2254 dp_dsc_chunk_size_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2330 dp_dsc_slice_bpg_offset_read() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:54 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

Clean up some inconsistent indenting, replace sizeof(x) / sizeof((x)[0]))
with ARRAY_SIZE(x).

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:185 optc3_fpu_set_vrr_m_const() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:355 dcn30_fpu_set_mcif_arb_params() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:384 dcn30_fpu_calculate_wm_and_dlg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:390 dcn30_fpu_calculate_wm_and_dlg() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:53 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn303/dcn303_fpu.c:205 dcn303_fpu_update_bw_bounding_box() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn303/dcn303_fpu.c:355 dcn303_fpu_init_soc_bounding_box() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:52 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:713 dml32_CalculateSwathWidth() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:51 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:51 dml32_rq_dlg_get_rq_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:68 dml32_rq_dlg_get_rq_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:220 dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:224 dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:235 dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:240 dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:50 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:1728 dcn20_program_front_end_for_ctx() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:49 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.c:450 dpp20_get_blndgam_current() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.c:543 dpp20_get_shaper_current() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:48 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.c:305 mpc20_get_ogam_current() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:47 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dwb.c:104 dwb2_enable() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:46 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_optc.c:186 optc3_set_dsc_config() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:45 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:116 mpc3_get_ogam_current() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:445 mpc3_get_shaper_current() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:44 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:724 dpp3_get_blndgam_current() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:823 dpp3_get_shaper_current() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:43 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp_cm.c:67 dpp30_get_gamcor_current() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:42 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c:726 dcn31_clk_mgr_construct() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:41 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c:655 dcn315_clk_mgr_construct() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:40 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c:683 dcn316_clk_mgr_construct() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:39 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c:107 dcn201_update_clocks() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:38 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c:716 dcn314_clk_mgr_construct() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:37 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_mpc.c:306 mpc32_get_shaper_current() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Clean up some inconsistent indenting
Jiapeng Chong [Tue, 26 Jul 2022 07:25:36 +0000 (15:25 +0800)]
drm/amd/display: Clean up some inconsistent indenting

No functional modification involved.

smatch warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_hwseq.c:910 dcn32_init_hw() warn: inconsistent indenting.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdkfd: Split giant svm range
Philip Yang [Mon, 25 Jul 2022 11:10:10 +0000 (07:10 -0400)]
drm/amdkfd: Split giant svm range

Giant svm range split to smaller ranges, align the range start address
to max svm range pages to improve MMU TLB usage.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdkfd: Set svm range max pages
Philip Yang [Mon, 25 Jul 2022 11:06:38 +0000 (07:06 -0400)]
drm/amdkfd: Set svm range max pages

This will be used to split giant svm range into smaller ranges, to
support VRAM overcommitment by giant range and improve GPU retry fault
recover on giant range.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: Allow TTM to evict svm bo from same process
Philip Yang [Fri, 22 Jul 2022 19:07:00 +0000 (15:07 -0400)]
drm/amdgpu: Allow TTM to evict svm bo from same process

To support SVM range VRAM overcommitment, TTM should be able to evict
svm bo of same process to system memory, to get space to alloc new svm
bo.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: Fix the incomplete product number
Roy Sun [Wed, 20 Jul 2022 08:19:50 +0000 (16:19 +0800)]
drm/amdgpu: Fix the incomplete product number

The comments say that the product number is a 16-digit HEX string so the
buffer needs to be at least 17 characters to hold the NUL terminator. Expand
the buffer size to 20 to avoid the alignment issues.

The comment:Product number should only be 16 characters. Any
more,and something could be wrong. Cap it at 16 to be safe

Signed-off-by: Roy Sun <Roy.Sun@amd.com>
Reviewed-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu: use adev_to_drm for consistency
Guchun Chen [Mon, 25 Jul 2022 06:15:09 +0000 (14:15 +0800)]
drm/amdgpu: use adev_to_drm for consistency

Keep code consistency when accessing drm_device from amdgpu driver.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amdgpu/dc/dce: fix repeated words in comments
wangjianli [Sun, 24 Jul 2022 07:41:50 +0000 (15:41 +0800)]
drm/amdgpu/dc/dce: fix repeated words in comments

Delete the redundant word 'in'.

Signed-off-by: wangjianli <wangjianli@cdjrlc.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/i915/d13: Add Wa_16015201720 disabling clock gating for PIPEDMC-A/B
Imre Deak [Wed, 27 Jul 2022 16:45:23 +0000 (19:45 +0300)]
drm/i915/d13: Add Wa_16015201720 disabling clock gating for PIPEDMC-A/B

Add a workaround making sure that PIPEDMC-A/B is enabled when the
firmware needs these on D13 platforms to save/restore the registers
backed by the PW_1 and PW_A power wells.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220727164523.1621361-2-imre.deak@intel.com
23 months agodrm/i915/d12+: Disable DMC handlers during loading/disabling the firmware
Imre Deak [Thu, 28 Jul 2022 08:14:40 +0000 (11:14 +0300)]
drm/i915/d12+: Disable DMC handlers during loading/disabling the firmware

Disable the DMC event handlers before loading the firmware and after
uninitializing the display, to make sure the firmware is inactive. This
matches the Bspec "Sequences for Display C5 and C6" page for GEN12+.

Add a TODO comment for doing the same on pre-GEN12 platforms.

v2:
- Add a macro for the number of event handlers.
- Disable the event handlers only on GEN12+.
- s/dev_priv/i915/ in docbook comment.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com> #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20220728081440.1676857-1-imre.deak@intel.com
23 months agodrm/i915/dmc: Update DG2 DMC firmware to v2.07
Madhumitha Tolakanahalli Pradeep [Wed, 27 Jul 2022 18:29:19 +0000 (11:29 -0700)]
drm/i915/dmc: Update DG2 DMC firmware to v2.07

The release notes mention that DMC v2.07 has a workaround
for MMIO hang issue when DC States are enabled.

Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220727182919.334136-2-madhumitha.tolakanahalli.pradeep@intel.com
23 months agodrm/i915: Pass drm_i915_private struct instead of gt for gen11_gu_misc_irq_handler...
Anusha Srivatsa [Thu, 21 Jul 2022 22:51:00 +0000 (15:51 -0700)]
drm/i915: Pass drm_i915_private struct instead of gt for gen11_gu_misc_irq_handler/ack()

gen11_gu_misc_irq_handler() and gen11_gu_misc_ack() do nothing tile
specific.

v2: gen11_gu_misc_irq_ack() tile agnostic like gen11_gu_misc_irq_handler()
(Tvrtko)

Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220721225100.693589-1-anusha.srivatsa@intel.com
23 months agodrm/i915/display: Cleanup intel_phy_is_combo()
Anusha Srivatsa [Mon, 25 Jul 2022 22:50:28 +0000 (15:50 -0700)]
drm/i915/display: Cleanup intel_phy_is_combo()

Cleanup the intel_phy_is_combo
to accommodate for cases where combo phy is not available.

v2: retain comment that explains DG2 returning false from
intel_phy_is_combo() (Arun)

Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220725225028.98612-1-anusha.srivatsa@intel.com
23 months agodrm/i915/hdmi: Prune modes that require HDMI2.1 FRL
Ankit Nautiyal [Thu, 21 Jul 2022 08:46:45 +0000 (14:16 +0530)]
drm/i915/hdmi: Prune modes that require HDMI2.1 FRL

HDMI2.1 requires some higher resolution video modes to be enumerated
only if HDMI2.1 Fixed Rate Link (FRL) is supported.
Current platforms do not support FRL transmission so prune modes that
require HDMI2.1 FRL.

v2: Fixed the condition to check for dotclock > 600.
Return MODE_CLOCK_HIGH as mode status.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> (v1)
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220721084645.3411219-1-ankit.k.nautiyal@intel.com
23 months agoMerge tag 'topic/nouveau-misc-2022-07-27' of git://anongit.freedesktop.org/drm/drm...
Dave Airlie [Wed, 27 Jul 2022 00:11:59 +0000 (10:11 +1000)]
Merge tag 'topic/nouveau-misc-2022-07-27' of git://anongit.freedesktop.org/drm/drm into drm-next

drm/nouveau-misc: display patches.

These are just some precursor and cleanup display patches from Ben,
tested by Lyude.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Dave Airlie <airlied@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAPM=9ty0R37q0mohBr_CegpYLXK2=fAH54QfAsMhHfPygTsdQA@mail.gmail.com
23 months agoMerge tag 'amd-drm-next-5.20-2022-07-26' of https://gitlab.freedesktop.org/agd5f...
Dave Airlie [Tue, 26 Jul 2022 23:33:44 +0000 (09:33 +1000)]
Merge tag 'amd-drm-next-5.20-2022-07-26' of https://gitlab.freedesktop.org/agd5f/linux into drm-next

amdgpu:
- VCN4 fixes
- RAS support for UMC 8.10
- ACP support for jadeite platforms
- NBIO HDP flush fixes
- Misc spelling and grammar fixes
- Runtime PM fixes
- Non-DC HPD fix
- Clean up amdgpu DM code
- DSC fixes
- Expose some additional GFXOFF data via debugfs
- More FP clean up for new DCN blocks
- PPC DC FP fixes
- DCN 3.1.4 fixes
- DC DML stack usage fixes
- GMC fixes
- SPM fixes for RDNA2

amdkfd:
- MMU notifier fix
- Mutex fix

UAPI:
- Add a comment about VCN4 unified queues
- IP version information for UMDs
  Proposed mesa change: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411/diffs?commit_id=c8a63590dfd0d64e6e6a634dcfed993f135dd075

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Alex Deucher <alexander.deucher@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220726181536.5759-1-alexander.deucher@amd.com
23 months agodrm/nouveau/disp: move DAC load detection method
Ben Skeggs [Wed, 1 Jun 2022 10:46:31 +0000 (20:46 +1000)]
drm/nouveau/disp: move DAC load detection method

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: add output class
Ben Skeggs [Wed, 1 Jun 2022 10:46:31 +0000 (20:46 +1000)]
drm/nouveau/disp: add output class

Will be used to more cleanly implement existing method interfaces that
take some confusing (IEDTkey, inherited from VBIOS, which RM no longer
uses on Ampere) match values to determine which display path to operate
on.

Methods will be protected from racing with supervisor, and from being
called where they shouldn't be (ie. without an OR assigned).

v2:
- use ?: (lyude)
v3:
- fix return code if noacquire() method fails

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: add supervisor mutex
Ben Skeggs [Wed, 1 Jun 2022 10:46:31 +0000 (20:46 +1000)]
drm/nouveau/disp: add supervisor mutex

Will be used to protect NVIF_CLASS_OUTP method calls from racing with
in-progress supervisor handling.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: add conn method to query HPD pin status
Ben Skeggs [Wed, 1 Jun 2022 10:46:30 +0000 (20:46 +1000)]
drm/nouveau/disp: add conn method to query HPD pin status

And use it to bail early in DP detection and avoid futile AUX transactions.

This could be used on other connector types too in theory, but it's not
something we've ever done before and I'd rather not risk breaking working
systems without looking into it more closely.

It's safe for DP though.  We already do this by checking an AUX register
that contains HPD status and aborting the transaction.  However, this is
much deeper in the stack - after taking various mutexes, poking HW for no
good reason, and making a mess in debug logs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: add connector class
Ben Skeggs [Wed, 1 Jun 2022 10:46:30 +0000 (20:46 +1000)]
drm/nouveau/disp: add connector class

Will be used to provide more solid driver interfaces in general, but
the immediate motivation is work towards fixing issues with handling
hotplug/DP IRQ events.

Its use is currently limited to where we support non-polled hotplug
already (ie. any GPU since NV40ish era, where our DCB handling works
well enough), until that gets cleaned up someday.

v2:
- use ?: (lyude)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: add common channel class handling
Ben Skeggs [Wed, 1 Jun 2022 10:46:29 +0000 (20:46 +1000)]
drm/nouveau/disp: add common channel class handling

Replaces a bunch of unnecessarily duplicated boilerplate in per-chipset
code with a simpler, common, implementation.

Channel "awaken" notify code is completely gone for now.  KMS has never
made use of it so far, and event notify handling is about to be changed
in general anyway.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: split sor hda funcs out to their own struct
Ben Skeggs [Wed, 1 Jun 2022 10:46:29 +0000 (20:46 +1000)]
drm/nouveau/disp: split sor hda funcs out to their own struct

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: split sor dp funcs out to their own struct
Ben Skeggs [Wed, 1 Jun 2022 10:46:29 +0000 (20:46 +1000)]
drm/nouveau/disp: split sor dp funcs out to their own struct

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: replace hda func pointer check with flag
Ben Skeggs [Wed, 1 Jun 2022 10:46:28 +0000 (20:46 +1000)]
drm/nouveau/disp: replace hda func pointer check with flag

Simpler, and less error-prone than a separate set of function pointers.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: merge nv50_disp_new_() and nvkm_disp_new()
Ben Skeggs [Wed, 1 Jun 2022 10:46:28 +0000 (20:46 +1000)]
drm/nouveau/disp: merge nv50_disp_new_() and nvkm_disp_new()

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: group supervisor-related struct members
Ben Skeggs [Wed, 1 Jun 2022 10:46:28 +0000 (20:46 +1000)]
drm/nouveau/disp: group supervisor-related struct members

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: merge head/outp/ior code into chipset files
Ben Skeggs [Wed, 1 Jun 2022 10:46:27 +0000 (20:46 +1000)]
drm/nouveau/disp: merge head/outp/ior code into chipset files

No changes to code at all here, just shuffling it around and removing
a bunch of (now unnecessary) forward-declarations from headers.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: add common class handling between <nv50 and >=nv50
Ben Skeggs [Wed, 1 Jun 2022 10:46:27 +0000 (20:46 +1000)]
drm/nouveau/disp: add common class handling between <nv50 and >=nv50

About to expose head/output path/connector objects everywhere, so we will
need support for child classes prior to nv50 now.

Somewhat cleaner than the code >=nv50 used previously.

v2:
- use ?: (lyude)

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: collapse nv50_disp into nvkm_disp
Ben Skeggs [Wed, 1 Jun 2022 10:46:26 +0000 (20:46 +1000)]
drm/nouveau/disp: collapse nv50_disp into nvkm_disp

Dump of one struct's members into another, with a couple of list
renames because of collisions.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: collapse nv50_disp_func into nvkm_disp_func
Ben Skeggs [Wed, 1 Jun 2022 10:46:26 +0000 (20:46 +1000)]
drm/nouveau/disp: collapse nv50_disp_func into nvkm_disp_func

Aside from a chicken-and-egg problem with a duplicate 'root' member,
this is a straight dump of function pointers from one struct into
another.

The left-over wrapping mess in >=nv50 structs will be fixed later.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: clean up nvkm_outp constructors
Ben Skeggs [Wed, 1 Jun 2022 10:46:25 +0000 (20:46 +1000)]
drm/nouveau/disp: clean up nvkm_outp constructors

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/nouveau/disp: collapse nvkm_dp into nvkm_outp
Ben Skeggs [Wed, 1 Jun 2022 10:46:25 +0000 (20:46 +1000)]
drm/nouveau/disp: collapse nvkm_dp into nvkm_outp

There should be no changes to code here other than modifying the
dereferences.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
23 months agodrm/amd/display: Reduce stack size in the mode support function
Rodrigo Siqueira [Fri, 22 Jul 2022 17:56:17 +0000 (13:56 -0400)]
drm/amd/display: Reduce stack size in the mode support function

When we use the allmodconfig option we see the following error:

drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c: In function 'dml32_ModeSupportAndSystemConfigurationFull':
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:3799:1: error: the frame size of 2464 bytes is larger than 2048 bytes [-Werror=frame-larger-than=]
  3799 | } // ModeSupportAndSystemConfigurationFull

This commit fixes this issue by moving part of the mode support
operation from ModeSupportAndSystemConfigurationFull to a dedicated
function.

Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Tested-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: 3.2.196
Anthony Koo [Sun, 17 Jul 2022 15:41:44 +0000 (11:41 -0400)]
drm/amd/display: 3.2.196

This version brings along following fixes:

- Copy crc_skip_count when duplicating CRTC state
- Add debug option for idle optimizations on cursor updates
- Disable MPC split for DCN32/321
- Add missing ODM 2:1 policy logic
- Update DCN32 and DCN321 SR latencies
- Add reinstate dram in the FPO logic
- Add dc_ctx to link_enc_create() parameters
- Cache cursor when cursor exceeds 64x64
- Add support for manual DMUB FAMS trigger
- Fix dpstreamclk programming
- Add missing AUDIO_DTO_SEL reg field
- Add OTG/ODM functions
- Use correct clock source constructor for DCN314
- Use correct DTO_SRC_SEL for 128b/132b encoding
- Add pixel rate div calcs and programming
- Remove FPU flags from DCN30 Makefile
- Create patch bounding box function for isolate FPU
- Move mclk calculation function to DML
- Remove FPU operations from dcn201 resources
- Fallback to SW cursor if SubVP + cursor too big
- Drop unnecessary FPU flags on dcn302 files
- Reboot while unplug hdcp enabled dp from mst hub
- Reset pipe count when iterating for DET override
- Calculate MALL cache lines based on Mblks required
- Fix two MPO videos in single display ODM combine mode
- Guard against zero memory channels
- Updates SubVP + SubVP DRR cases updates
- Fix OPTC function pointers for DCN314
- Add enable/disable FIFO callbacks to stream setup
- Avoid MPC infinite loop

Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Copy crc_skip_count when duplicating CRTC state
Leo Li [Thu, 4 Nov 2021 23:41:55 +0000 (19:41 -0400)]
drm/amd/display: Copy crc_skip_count when duplicating CRTC state

[Why]

crc_skip_count is used to track how many frames to skip to allow the OTG
CRC engine to "warm up" before it outputs correct CRC values.
Experimentally, this seems to be 2 frames.

When duplicating CRTC states, this value was not copied to the
duplicated state. Therefore, when this state is committed, we will
needlessly wait 2 frames before outputing CRC values. Even if the CRC
engine is already warmed up.

[How]

Copy the crc_skip_count as part of dm_crtc_duplicate_state.

Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Add debug option for idle optimizations on cursor updates
Alvin Lee [Fri, 3 Jun 2022 20:39:48 +0000 (16:39 -0400)]
drm/amd/display: Add debug option for idle optimizations on cursor updates

For optimizations and debug purposes we added an option to exit idle
operations on cursor updates.

Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Disable MPC split for DCN32/321
Alvin Lee [Thu, 2 Jun 2022 20:01:33 +0000 (16:01 -0400)]
drm/amd/display: Disable MPC split for DCN32/321

Due to CRB, no need to rely on MPC splitting to maximize use of DET
anymore.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Add missing ODM 2:1 policy logic
Samson Tam [Fri, 27 May 2022 01:12:23 +0000 (21:12 -0400)]
drm/amd/display: Add missing ODM 2:1 policy logic

Phantom pipes must use the same configuration used in main pipes. This
commit add this check.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Samson Tam <Samson.Tam@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Update DCN32 and DCN321 SR latencies
Alvin Lee [Thu, 19 May 2022 18:03:09 +0000 (14:03 -0400)]
drm/amd/display: Update DCN32 and DCN321 SR latencies

Update worst case SR latencies according to values measured by hardware
team.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Add reinstate dram in the FPO logic
Rodrigo Siqueira [Tue, 19 Apr 2022 15:22:17 +0000 (11:22 -0400)]
drm/amd/display: Add reinstate dram in the FPO logic

In order to handle FPO correctly, we need to reinstate the dram values.
This function adds the required code to handle the vblank stretch and
the dram calculation.

Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Add dc_ctx to link_enc_create() parameters
Aurabindo Pillai [Fri, 1 Apr 2022 19:29:21 +0000 (15:29 -0400)]
drm/amd/display: Add dc_ctx to link_enc_create() parameters

[Why&How]
Preparation to enable run time initialization of register offsets to add
dc_context to the link_enc_create callback. This is needed to get the
dc_ctx handle where register offset initialization routine is called.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Cache cursor when cursor exceeds 64x64
Chris Park [Tue, 28 Jun 2022 16:36:04 +0000 (12:36 -0400)]
drm/amd/display: Cache cursor when cursor exceeds 64x64

[Why]
When Static screen from MALL, the cursor needs to be
cached if cursor exceeds 64x64 size.

[How]
Program the bit that cache cursor in MALL when size
of the cursor exceeds 64x64.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chris Park <chris.park@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Add support for manual DMUB FAMS trigger
Anthony Koo [Sun, 17 Jul 2022 03:14:01 +0000 (23:14 -0400)]
drm/amd/display: Add support for manual DMUB FAMS trigger

- Add is_drr parameter to indicate DRR is enabled on
the panel to determine whether SubVP MCLK switch
logic should be enabled

- Add DRR manual trigger in FW (instead of driver)
because manual trigger programming triggers DRR
update pending and can block SubVP MCLK switches
from taking place

Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Fix dpstreamclk programming
Michael Strauss [Fri, 10 Jun 2022 20:28:03 +0000 (16:28 -0400)]
drm/amd/display: Fix dpstreamclk programming

[WHY]
Currently programming incorrect hpo inst as well as selecting incorrect source

[HOW]
Use hpo inst instead of otg inst to select dpstreamclk inst

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Add missing AUDIO_DTO_SEL reg field
Michael Strauss [Thu, 9 Jun 2022 15:02:15 +0000 (11:02 -0400)]
drm/amd/display: Add missing AUDIO_DTO_SEL reg field

[WHY]
Needed to program audio dto

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Add OTG/ODM functions
Michael Strauss [Thu, 9 Jun 2022 14:52:52 +0000 (10:52 -0400)]
drm/amd/display: Add OTG/ODM functions

[WHY]
Required for correct OTG_H_TIMING_CNTL programming

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Use correct clock source constructor for DCN314
Michael Strauss [Thu, 9 Jun 2022 14:48:43 +0000 (10:48 -0400)]
drm/amd/display: Use correct clock source constructor for DCN314

[WHY]
Previously was pointing to DCN3 clock constructor rather than DCN31's

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Use correct DTO_SRC_SEL for 128b/132b encoding
Michael Strauss [Thu, 9 Jun 2022 14:45:34 +0000 (10:45 -0400)]
drm/amd/display: Use correct DTO_SRC_SEL for 128b/132b encoding

[WHY]
DP DTO isn't used for 128b/132b encoding

[HOW]
Check current link rate to determine whether using 8b/10b or 128/132b encoding

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Add pixel rate div calcs and programming
Michael Strauss [Tue, 31 May 2022 20:55:32 +0000 (16:55 -0400)]
drm/amd/display: Add pixel rate div calcs and programming

[WHY/HOW]
Need to calculate and set some pixel rate divisors on correct otg_inst

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
23 months agodrm/amd/display: Remove FPU flags from DCN30 Makefile
Rodrigo Siqueira [Thu, 14 Jul 2022 20:32:54 +0000 (16:32 -0400)]
drm/amd/display: Remove FPU flags from DCN30 Makefile

At this stage, we must have all the FPU code for DCN30 isolated in the
DML folder. Drop FPU flags from Makefile.

Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>