Hans de Goede [Tue, 4 Apr 2023 11:19:55 +0000 (13:19 +0200)]
platform/x86: apple-gmux: Fix iomem_base __iomem annotation
Fix the __iomem annotation of the iomem_base pointers in the apple-gmux
code. The __iomem should go before the *.
This fixes a bunch of sparse warnings like this one:
drivers/platform/x86/apple-gmux.c:224:48: sparse:
expected void const [noderef] __iomem *
got unsigned char [usertype] *
Fixes:
0c18184de990 ("platform/x86: apple-gmux: support MMIO gmux on T2 Macs")
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/oe-kbuild-all/202304040401.IMxt7Ubi-lkp@intel.com/
Suggested-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Orlando Chamberlain <orlandoch.dev@gmail.com>
Link: https://lore.kernel.org/r/20230404111955.43266-1-hdegoede@redhat.com
Hans de Goede [Sat, 1 Apr 2023 15:07:37 +0000 (17:07 +0200)]
platform/x86: x86-android-tablets: Add Lenovo Yoga Book X90F/L data
The Lenovo Yoga Book X90F/L is a x86 ACPI tablet which ships with Android
x86 as factory OS. Its DSDT contains a bunch of I2C devices which are not
actually there, causing various resource conflicts. Enumeration of these
is skipped through the acpi_quirk_skip_i2c_client_enumeration().
Add support for manually instantiating the I2C + other devices which are
actually present on this tablet by adding the necessary device info to
the x86-android-tablets module.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230401150737.597417-3-hdegoede@redhat.com
Hans de Goede [Sat, 1 Apr 2023 15:07:36 +0000 (17:07 +0200)]
platform/x86: x86-android-tablets: Share lp855x_platform_data between different models
Various Lenovo models use a TI LP8557 LED backlight controller and
the necessary platform_data is the same for the different models.
Currently there are 2 identical copies and the upcoming support for
the Lenovo Yoga Book X90F/L would add a 3th identical copy.
Move to sharing the lp855x_platform_data between different models
to avoid this duplication.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230401150737.597417-2-hdegoede@redhat.com
Hans de Goede [Sat, 1 Apr 2023 15:07:35 +0000 (17:07 +0200)]
platform/x86: x86-android-tablets: Use LP8557 in direct mode on both the Yoga 830 and the 1050
Both the Lenovo Yoga Tablet 2 830 and 1050 models use an TI LP8557 LED
backlight controller. On the 1050 the LP8557's PWM input is connected to
the PMIC's PWM output and everything works fine with the defaults
programmed into the LP8557 by the BIOS.
But on the 830 the LP8557's PWM input is connected to a PWM output coming
from the LCD panel's controller. The Android code has a hack in the i915
driver to write the non-standard DSI reg 0x9f with the desired backlight
level to set the duty-cycle of the LCD's PWM output.
To avoid having to have a similar hack in the mainline kernel the LP8557
entry in lenovo_yoga_tab2_830_1050_i2c_clients instead just programs the
LP8557 to directly set the level, ignoring the PWM input.
So far we have only been instantiating the LP8557 i2c_client for direct
backlight control on the 830 model. But we want hide/disable the
intel_backlight interface on the 830 model to avoid having 2 backlight
interfaces for the same LCD panel.
And the 830 and 1050 share the same DMI strings. So this will hide the
intel_backlight interface on the 1050 model too.
To avoid this causing problems make the backlight handling consistent
between the 2 models and always directly use the LP8557.
This also simplifies the code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230401150737.597417-1-hdegoede@redhat.com
Thomas Weißschuh [Wed, 29 Mar 2023 04:50:25 +0000 (04:50 +0000)]
platform/x86: think-lmi: Remove unnecessary casts for attributes
These casts are unnecessary and could break if structure layouts are
randomized or implementation details change.
Use the proper syntax that works without casts.
Also remove some unnecessary braces that checkpatch complains about.
Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
Link: https://lore.kernel.org/r/20230329-think-lmi-attrs-v1-1-5794f2367cc2@weissschuh.net
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Gergo Koteles [Wed, 29 Mar 2023 01:45:59 +0000 (18:45 -0700)]
platform/x86: Add driver for Yoga Tablet Mode switch
This WMI driver for the tablet mode control switch for Lenovo Yoga
notebooks was originally written by Gergo Koteles. The mode is mapped to
a SW_TABLET_MODE switch capable input device.
Andrew followed the suggestions that were posted in reply to Gergo's RFC
patch, and on the v1 & v2 versions of this patch to follow-up and get it
merged.
Changes from Gergo's RFC:
- Refactored obtaining a reference to the EC ACPI device needed for the
quirk implementation as suggested by Hans de Goede
- Applied small fixes and switched to always registering handles with
the driver for automatic cleanup as suggested by Barnabás Pőcze.
- Merged the lenovo_ymc_trigger_ec function with the
ideapad_trigger_ymc_next_read function since it was no longer
external.
- Added the word "Tablet" to the driver description to hopefully make
it more clear.
- Fixed the LENOVO_YMC_QUERY_METHOD ID and the name string for the EC
APCI device trigged for the quirk
- Triggered the input event on probe so that the initial tablet mode
state when the driver is loaded is reported to userspace as suggested
by Armin Wolf.
- Restricted the permissions of the ec_trigger parameter as suggested
by Armin Wolf. Also updated the description.
We have tested this on the Yoga 7 14AIL7 for the non-quirk path and on
the Yoga 7 14ARB7 which has the firmware bug that requires triggering
the embedded controller to send the mode change events. This workaround
is also used by the Windows drivers.
According to reports at https://github.com/lukas-w/yoga-usage-mode,
which uses the same WMI devices, the following models should also work:
Yoga C940, Ideapad flex 14API, Yoga 9 14IAP7, Yoga 7 14ARB7, etc.
Signed-off-by: Gergo Koteles <soyer@irl.hu>
Co-developed-by: Andrew Kallmeyer <kallmeyeras@gmail.com>
Signed-off-by: Andrew Kallmeyer <kallmeyeras@gmail.com>
Link: https://lore.kernel.org/r/20221004214332.35934-1-soyer@irl.hu/
Link: https://lore.kernel.org/r/20230310041726.217447-1-kallmeyeras@gmail.com/
Link: https://lore.kernel.org/r/20230323025200.5462-1-kallmeyeras@gmail.com/
Tested-by: André Apitzsch <git@apitzsch.eu>
Link: https://lore.kernel.org/r/20230329014559.44494-3-kallmeyeras@gmail.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Andrew Kallmeyer [Wed, 29 Mar 2023 01:45:58 +0000 (18:45 -0700)]
platform/x86: Move ideapad ACPI helpers to a new header
These functions will be used by a driver written by Gergo Koteles to
detect the tablet mode switch in Lenovo Yoga laptops. These changes were
discussed in review of that patch.
This is the minimal set of functions needed in that driver, there are
several more small functions left in the ACPI Helpers section in
ideapad-laptop.c. The only change is the functions are now marked inline
as requested in the review comments.
Signed-off-by: Andrew Kallmeyer <kallmeyeras@gmail.com>
Link: https://lore.kernel.org/r/20221004214332.35934-1-soyer@irl.hu/
Tested-by: André Apitzsch <git@apitzsch.eu>
Link: https://lore.kernel.org/r/20230329014559.44494-2-kallmeyeras@gmail.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Dan Carpenter [Sat, 25 Mar 2023 11:08:02 +0000 (14:08 +0300)]
platform/x86: ISST: unlock on error path in tpmi_sst_init()
Call mutex_unlock(&isst_tpmi_dev_lock) before returning on this
error path.
Fixes:
d805456c712f ("platform/x86: ISST: Enumerate TPMI SST and create framework")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Link: https://lore.kernel.org/r/dcdebbb7-7de6-4d04-8e7a-43d5ca043484@kili.mountain
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Jithu Joseph [Wed, 22 Mar 2023 00:33:59 +0000 (17:33 -0700)]
Documentation/ABI: Update IFS ABI doc
Array BIST test doesn't need an IFS test image to operate unlike
the SCAN test. Consequently current_batch and image_version
files are not applicable for Array BIST IFS device instance,
clarify this in the ABI doc.
Also given that multiple tests are supported, take the opportunity
to generalize descriptions wherever applicable.
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-10-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Jithu Joseph [Wed, 22 Mar 2023 00:33:58 +0000 (17:33 -0700)]
platform/x86/intel/ifs: Update IFS doc
Array BIST is the second test supported by IFS. Modify IFS doc
entry to be more general.
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-9-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Jithu Joseph [Wed, 22 Mar 2023 00:33:57 +0000 (17:33 -0700)]
platform/x86/intel/ifs: Implement Array BIST test
Array BIST test (for a particular core) is triggered by writing
to MSR_ARRAY_BIST from one sibling of the core.
This will initiate a test for all supported arrays on that
CPU. Array BIST test may be aborted before completing all the
arrays in the event of an interrupt or other reasons.
In this case, kernel will restart the test from that point
onwards. Array test will also be aborted when the test fails,
in which case the test is stopped immediately without further
retry.
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-8-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Jithu Joseph [Wed, 22 Mar 2023 00:33:56 +0000 (17:33 -0700)]
platform/x86/intel/ifs: Sysfs interface for Array BIST
The interface to trigger Array BIST test and obtain its result
is similar to the existing scan test. The only notable
difference is that, Array BIST doesn't require any test content
to be loaded. So binary load related options are not needed for
this test.
Add sysfs interface for array BIST test, the testing support will
be added by subsequent patch.
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-7-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Jithu Joseph [Wed, 22 Mar 2023 00:33:55 +0000 (17:33 -0700)]
platform/x86/intel/ifs: Introduce Array Scan test to IFS
Array BIST is a new type of core test introduced under the Intel Infield
Scan (IFS) suite of tests.
Emerald Rapids (EMR) is the first CPU to support Array BIST.
Array BIST performs tests on some portions of the core logic such as
caches and register files. These are different portions of the silicon
compared to the parts tested by the first test type
i.e Scan at Field (SAF).
Make changes in the device driver init flow to register this new test
type with the device driver framework. Each test will have its own
sysfs directory (intel_ifs_0 , intel_ifs_1) under misc hierarchy to
accommodate for the differences in test type and how they are initiated.
Upcoming patches will add actual support.
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-6-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Jithu Joseph [Wed, 22 Mar 2023 00:33:54 +0000 (17:33 -0700)]
x86/include/asm/msr-index.h: Add IFS Array test bits
Define MSR bitfields for enumerating support for Array BIST test.
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20230322003359.213046-5-jithu.joseph@intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Jithu Joseph [Wed, 22 Mar 2023 00:33:53 +0000 (17:33 -0700)]
platform/x86/intel/ifs: IFS cleanup
Cleanup incorporating misc review comments
- Remove the subdirectory intel_ifs/0 for devicenode [1]
- Make plat_ifs_groups non static and use it directly without using a
function [2]
Link: https://lore.kernel.org/lkml/Y+4kQOtrHt5pdsSO@kroah.com/
Link: https://lore.kernel.org/lkml/Y9nyxNesVHCUXAcH@kroah.com/
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20230322003359.213046-4-jithu.joseph@intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Jithu Joseph [Wed, 22 Mar 2023 00:33:52 +0000 (17:33 -0700)]
platform/x86/intel/ifs: Reorganize driver data
The struct holding device driver data contained both read only(ro)
and read write(rw) fields.
Separating ro fields from rw fields was recommended as
a preferable design pattern during review[1].
Group ro fields into a separate const struct. Associate it to
the miscdevice being registered by keeping its pointer in the
same container struct as the miscdevice.
Link: https://lore.kernel.org/lkml/Y+9H9otxLYPqMkUh@kroah.com/
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-3-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Jithu Joseph [Wed, 22 Mar 2023 00:33:51 +0000 (17:33 -0700)]
platform/x86/intel/ifs: Separate ifs_pkg_auth from ifs_data
In preparation to supporting additional tests, remove ifs_pkg_auth
from per-test scope, as it is only applicable for one test type.
This will simplify ifs_init() flow when multiple tests are added.
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/20230322003359.213046-2-jithu.joseph@intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Nikita Kravets [Mon, 20 Mar 2023 22:55:09 +0000 (01:55 +0300)]
platform/x86: Add new msi-ec driver
Add a new driver to allow various MSI laptops' functionalities to be
controlled from userspace. This includes such features as power
profiles (aka shift modes), fan speed, charge thresholds, LEDs, etc.
This driver contains EC memory configurations for different firmware
versions and exports battery charge thresholds to userspace (note,
that start and end thresholds control the same EC parameter
and are always 10% apart).
Link: https://github.com/BeardOverflow/msi-ec/
Link: https://github.com/BeardOverflow/msi-ec/pull/13
Cc: Aakash Singh <mail@singhaakash.dev>
Cc: Jose Angel Pastrana <japp0005@red.ujaen.es>
Signed-off-by: Nikita Kravets <teackot@gmail.com>
Link: https://lore.kernel.org/r/20230320225509.3559-1-teackot@gmail.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Mon, 27 Mar 2023 13:03:06 +0000 (15:03 +0200)]
Merge remote-tracking branch 'intel-speed-select/intel-sst' into review-hans
Summary of changes:
Till the commit:
"tools/power/x86/intel-speed-select: Get punit core mapping
information"
All patches just lays foundation for adding new hardware interface
in addition to existing MSR/MMIO interface.
All patches prefixed with "Abstract" just adds individual hardware
callback for functions called from the core processing.
The mailbox processing is abstracted to a new file with callbacks.
In addition some changes to reduce duplicated code for display
of TRL level.
Patch "Introduce Punit ID concept and add related API" add further
abstraction in addition to existing package and die scope.
-----------
tools/power/x86/intel-speed-select: Get punit core mapping information
-Adds a new way to get package/die/punit information for each CPU.
-----------
Introduce TPMI interface support
- Implement all abstracted callbacks above to use TPMI IOCTL interface.
-----------
tools/power/x86/intel-speed-select: Display punit info
- With TPMI the granularity is per punit, which can be multiple in a
package/die.
----------
tools/power/x86/intel-speed-select: Remove cpu mask display for non-cpu
power domain
tools/power/x86/intel-speed-select: Display fact info for non-cpu power
domain
-There are some power domains with no CPUs, the above patches adds CPU
as invalid for these domains
----------
tools/power/x86/intel-speed-select: Use cgroup v2 isolation
- Adds new option to use Cgroup CPU isolation instead of offline of CPUs
----------
tools/power/x86/intel-speed-select: Change TRL display for Emerald Rapids
- Emerald Rapid has multiple TRL levels and moves away from TRL level
based on instruction type
Zhang Rui [Mon, 17 Oct 2022 11:34:14 +0000 (19:34 +0800)]
tools/power/x86/intel-speed-select: Update version
Update tool and supported API version. This is the first version which
supports newer Xeon platforms with TPMI support.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: subject and changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Srinivas Pandruvada [Thu, 23 Feb 2023 14:36:46 +0000 (06:36 -0800)]
tools/power/x86/intel-speed-select: Change TRL display for Emerald Rapids
Emerald Rapids doesn't specify TRL (Turbo Ratio Limits) based instruction
types. Instead it specifies 5 TRL levels, which can be anyone of the
instruction types.
Increase TRL levels to 5 for Emerald Rapids. Also change display to show
by level number. Show only non zero level values.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Srinivas Pandruvada [Thu, 23 Feb 2023 06:53:02 +0000 (22:53 -0800)]
tools/power/x86/intel-speed-select: Identify Emerald Rapids
There are some differences compared to Sapphire Rapids. So, add a separate
API.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Srinivas Pandruvada [Thu, 23 Feb 2023 13:59:24 +0000 (05:59 -0800)]
tools/power/x86/intel-speed-select: Display AMX base frequency
AMX frequency is present in non TPMI platforms also. When platform
supports, the value is non zero. So, display AMX base frequency when
non zero, irrespective of platform API version.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Srinivas Pandruvada [Wed, 22 Feb 2023 11:42:19 +0000 (03:42 -0800)]
tools/power/x86/intel-speed-select: Use cgroup v2 isolation
On supported systems, it is possiible to isolate CPUs instead of
CPU online/offline. This is optional and can be specified using
-g option when running as daemon or in combination with -o option
for SST-PP level change.
CPU isolation doesn't isolate IRQs. So IRQs needs to be moved away
from isoolated CPUs. This can be done via IRQ sysfs or irqbalance daemon.
The IRQ balance daemon is also capable to parse thermal HFI messages to
move IRQs away from CPUS, which are supposed be isolated. But this
requires version released after July 2022.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Srinivas Pandruvada [Wed, 22 Feb 2023 11:26:29 +0000 (03:26 -0800)]
tools/power/x86/intel-speed-select: Add missing free cpuset
During perf level change cpuset is allocated but not freed.
Add free_cpu_set() in success and failure path.
Although this is not an issue, as the program will exit after
processing of online/offline, but for completeness add the
free_cpu_set().
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Sat, 7 Jan 2023 13:45:42 +0000 (21:45 +0800)]
tools/power/x86/intel-speed-select: Fix clos-max display with TPMI I/F
Comparing clos_config->clos_max with 255 is broken with TPMI I/F because
of different isst_get_disp_freq_multiplier() used.
Checking for clos_config->clos_max * isst_get_disp_freq_multiplier()
instead.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Tue, 13 Sep 2022 12:23:19 +0000 (20:23 +0800)]
tools/power/x86/intel-speed-select: Add cpu id check
Some operations applies to cpu-power-domain only. Add check for cpu id
for these functions.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Thu, 2 Feb 2023 07:55:25 +0000 (15:55 +0800)]
tools/power/x86/intel-speed-select: Avoid setting duplicate tdp level
If the new TDP level requetsted is same as the current TDP level, don't
call into driver to change level.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Thu, 18 Aug 2022 13:26:23 +0000 (21:26 +0800)]
tools/power/x86/intel-speed-select: Remove cpu mask display for non-cpu power domain
Non CPU power domains will not have any CPUs. So don't display any CPU
count or enable mask.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: subject and changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Thu, 18 Aug 2022 13:21:46 +0000 (21:21 +0800)]
tools/power/x86/intel-speed-select: Hide invalid TRL level
TRL levels with Zero ratio values is meaningless.
Prevent these TRL levels from being displayed.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Thu, 18 Aug 2022 13:18:03 +0000 (21:18 +0800)]
tools/power/x86/intel-speed-select: Display fact info for non-cpu power domain
Allow displaying SST-TF info for non-cpu power domain.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Wed, 17 Aug 2022 17:51:15 +0000 (01:51 +0800)]
tools/power/x86/intel-speed-select: Show level 0 name for new api_version
level 0 name is not shown in some case for backward compatibility reason.
No need to keep this quirk for new api_version.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Wed, 17 Aug 2022 17:45:33 +0000 (01:45 +0800)]
tools/power/x86/intel-speed-select: Prevent cpu clos config for non-cpu power domain
Non-cpu power domain does not support cpu clos config.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Wed, 17 Aug 2022 17:34:55 +0000 (01:34 +0800)]
tools/power/x86/intel-speed-select: Allow display non-cpu power domain info
Some power domain may not have CPUs associated, allow displaying
information for these non-cpu power domains.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 19:29:23 +0000 (03:29 +0800)]
tools/power/x86/intel-speed-select: Display amx_p1 and cooling_type
amx_p1 and cooling_type are newly introduced for TPMI interface.
Display amx_p1 and cooling_type info for platforms that support them.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Wed, 10 Aug 2022 09:14:11 +0000 (17:14 +0800)]
tools/power/x86/intel-speed-select: Display punit info
Display punit info for platforms with new api_version.
For platforms with old api_version, don't display the punit info to be
backward compatible.
For example:
Intel(R) Speed Select Technology
Executing on CPU model:173[0xad]
package-0
die-0
powerdomain-0
cpu-0
get-config-current_level:0
package-0
die-0
powerdomain-3
cpu--1
get-config-current_level:0
package-0
die-0
powerdomain-4
cpu--1
get-config-current_level:0
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 16:01:00 +0000 (00:01 +0800)]
tools/power/x86/intel-speed-select: Introduce TPMI interface support
TPMI (Topology Aware Register and PM Capsule Interface) creates a
flexible, extendable and software-PCIe-driver-enumerable MMIO interface
for PM features.
SST feature is exposed via the TPMI interface on newer Xeon platforms.
Kernel TPMI based SST driver provides a series of new IOCTLs for userspace
to use.
Introduce support for the platforms that do SST control via TPMI interface.
Compared with previous platforms, Newer Xeons also supports multi-punit in a
package/die, including cpu punit and non-cpu punit. These have already
been handled in the generic code.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Srinivas Pandruvada [Mon, 6 Mar 2023 17:26:28 +0000 (09:26 -0800)]
tools/power/x86/intel-speed-select: Get punit core mapping information
Get punit core mapping information using format of MSR 0x54. Based
on the API version, decode is done using new format. The new format
also include a power domain ID. TPMI SST information is for each
power domain.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Sat, 20 Aug 2022 12:51:33 +0000 (20:51 +0800)]
tools/power/x86/intel-speed-select: Introduce api_version helper
In some cases, the output format may be different with different
api_version because of different capabilities or for backward
capabilities reason.
Introduce api_version() to get the api_version of the platform running.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Tue, 16 Aug 2022 13:20:00 +0000 (21:20 +0800)]
tools/power/x86/intel-speed-select: Support large clos_min/max
clos_min/max in TPMI interface is frequency in MHz, thus clos_min/max
needs to support larger values.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 17:56:04 +0000 (01:56 +0800)]
tools/power/x86/intel-speed-select: Introduce is_debug_enabled()
Platform specific code also needs to give debug output.
Introduce is_debug_enabled() for this purpose.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Sat, 20 Aug 2022 12:40:48 +0000 (20:40 +0800)]
tools/power/x86/intel-speed-select: Allow api_version based platform callbacks
Different api_version suggests different kernel driver used and
different interface is used to communication with the hardware.
Allow setting platform specific callbacks based on api_version.
Currently, all platforms with api_version 1 uses Mbox/MMIO interfaces.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Sat, 20 Aug 2022 12:14:15 +0000 (20:14 +0800)]
tools/power/x86/intel-speed-select: Move send_mbox_cmd to isst-core-mbox.c
After the previous cleanup, there is no user of send_mbox_cmd outside of
isst-core-mbox.c.
Thus move send_mbox_cmd to isst-core-mbox.c as internal functions.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Thu, 2 Feb 2023 07:52:42 +0000 (15:52 +0800)]
tools/power/x86/intel-speed-select: Abstract adjust_uncore_freq
Allow platform specific implementation to adjust the uncore frequency.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 15:19:55 +0000 (23:19 +0800)]
tools/power/x86/intel-speed-select: Abstract read_pm_config
Allow platform specific implementation to get SST-CP capability and
current state.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 14:57:55 +0000 (22:57 +0800)]
tools/power/x86/intel-speed-select: Abstract clos_associate
Allow platform specific implementation to set per core CLOS setting.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 14:55:51 +0000 (22:55 +0800)]
tools/power/x86/intel-speed-select: Abstract clos_get_assoc_status
Allow platform specific implementation to get per core CLOS setting.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 14:53:48 +0000 (22:53 +0800)]
tools/power/x86/intel-speed-select: Abstract set_clos
Allow platform specific implementation to set CLOS priority setting.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 14:50:28 +0000 (22:50 +0800)]
tools/power/x86/intel-speed-select: Abstract pm_get_clos
Allow platform specific implementation to get CLOS priority setting.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 14:46:57 +0000 (22:46 +0800)]
tools/power/x86/intel-speed-select: Abstract pm_qos_config
Allow platform specific implementation to set CLOS config settings.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 14:42:47 +0000 (22:42 +0800)]
tools/power/x86/intel-speed-select: Abstract get_clos_information
Allow platform specific implementation to get CLOS config setting.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 17:52:11 +0000 (01:52 +0800)]
tools/power/x86/intel-speed-select: Abstract get_get_trls
Allow platform specific implementation to get turbo ratio limits of each
AVX level, for a selected SST-PP level.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Thu, 2 Feb 2023 06:14:54 +0000 (14:14 +0800)]
tools/power/x86/intel-speed-select: Enhance get_tdp_info
mbox_get_uncore_p0_p1_info/get_p1_info/get_uncore_mem_freq can be done
inside get_tdp_info().
Fold the code into get_tdp_info().
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Wed, 17 Aug 2022 16:28:41 +0000 (00:28 +0800)]
tools/power/x86/intel-speed-select: Abstract get_uncore_p0_p1_info
Allow platform specific implementation to get uncore frequency info.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 13:52:17 +0000 (21:52 +0800)]
tools/power/x86/intel-speed-select: Abstract get_fact_info
Allow platform specific implementation to get SST-TF info.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 13:44:04 +0000 (21:44 +0800)]
tools/power/x86/intel-speed-select: Abstract set_pbf_fact_status
Allow platform specific implementation to enable/disable SST-TF/BF.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 13:37:23 +0000 (21:37 +0800)]
tools/power/x86/intel-speed-select: Remove isst_get_pbf_info_complete
isst_get_pbf_info_complete does nothing but just free the core_mask.
Remove the function and do free core_mask directly and free core mask in
the caller.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 13:13:59 +0000 (21:13 +0800)]
tools/power/x86/intel-speed-select: Abstract get_pbf_info
Allow platform specific implementation to get SST-BF information.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 17:49:48 +0000 (01:49 +0800)]
tools/power/x86/intel-speed-select: Abstract set_tdp_level
Allow platform specific implementation to set a SST-PP level.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 13:01:08 +0000 (21:01 +0800)]
tools/power/x86/intel-speed-select: Abstract get_trl_bucket_info
Allow platform specific implementation to get buckets info.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Wed, 17 Aug 2022 15:19:15 +0000 (23:19 +0800)]
tools/power/x86/intel-speed-select: Abstract get_get_trl
Allow platform specific implementation to get turbo ratio limit of the
selected SST-PP level, and AVX level.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 16:34:34 +0000 (00:34 +0800)]
tools/power/x86/intel-speed-select: Abstract get_coremask_info
Allow platform specific implementation to get the core mask for a given
SST-PP level.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 12:52:23 +0000 (20:52 +0800)]
tools/power/x86/intel-speed-select: Abstract get_tjmax_info
Allow platform specific implementation to get the Tjmax info for a
given SST-PP level.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 12:49:08 +0000 (20:49 +0800)]
tools/power/x86/intel-speed-select: Move code right before its caller
Some functions are defined far from its only caller.
Rearrange the code.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 12:34:45 +0000 (20:34 +0800)]
tools/power/x86/intel-speed-select: Abstract get_pwr_info
Allow platform specific implementation to get min and max power for a
given SST-PP level.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 12:31:38 +0000 (20:31 +0800)]
tools/power/x86/intel-speed-select: Abstract get_tdp_info
Allow platform specific implementation to get TDP information.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 12:28:06 +0000 (20:28 +0800)]
tools/power/x86/intel-speed-select: Abstract get_ctdp_control
Allow platform specific implementation to get SST-TF/BF/CP capabilities
and status.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Mon, 8 Aug 2022 12:23:26 +0000 (20:23 +0800)]
tools/power/x86/intel-speed-select: Abstract get_config_levels
Allow platform specific implementation to get SST-PP level.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Sat, 20 Aug 2022 11:39:52 +0000 (19:39 +0800)]
tools/power/x86/intel-speed-select: Abstract is_punit_valid
Allow platform specific implementation to identify a valid punit.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Sat, 20 Aug 2022 10:59:54 +0000 (18:59 +0800)]
tools/power/x86/intel-speed-select: Introduce isst-core-mbox.c
isst-core.c should contain generic core APIs only.
Platform specific implementations/configurations should be removed from
this file.
Introduce isst-core-mbox.c and move all mbox/mmio specific functions to
this file.
Introduce struct isst_platform_ops which contains a series of callbacks
that used by the core APIs but need platform specific implementation.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Sat, 20 Aug 2022 13:50:53 +0000 (21:50 +0800)]
tools/power/x86/intel-speed-select: Always invoke isst_fill_platform_info
isst_fill_platform_info fills platform specific information.
And it is the proper place to set platform specific callbacks, as done in
next patch.
As the platform specific callbacks are needed in all cases, including
isst_print_platform_information.
The best way to achieve both is to invoke isst_fill_platform_info
unconditionally, and make isst_print_platform_information leverage the
data already filled.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Sat, 20 Aug 2022 10:44:59 +0000 (18:44 +0800)]
tools/power/x86/intel-speed-select: Introduce isst_get_disp_freq_multiplier
Remove hardcoded DISP_FREQ_MULTIPLIER in the code and use
isst_get_disp_freq_multiplier() instead.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Sat, 20 Aug 2022 10:38:11 +0000 (18:38 +0800)]
tools/power/x86/intel-speed-select: Move mbox functions to isst-core.c
isst-config.c should only contain generic code.
Move mbox functions which are platform specific code to isst-core.c.
As there are some platform specific parameters set via generic
application options, introduce isst_update_platform_param to pass these
parameters to platform specific code.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Wed, 17 Aug 2022 08:11:13 +0000 (16:11 +0800)]
tools/power/x86/intel-speed-select: Improve isst_print_extended_platform_info
The main thing done in isst_print_extended_platform_info is to get the
isst feature status by checking one of the power domains of the
platform.
This can be done using the for_each_online_power_domain_in_set()
function, which makes the code clean and easier to read.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Wed, 17 Aug 2022 07:50:43 +0000 (15:50 +0800)]
tools/power/x86/intel-speed-select: Rename for_each_online_package_in_set
for_each_online_package_in_set is actually used to invoke callback for
each power domain.
This is not a problem when there is a single power domain within a
package/die, but it does not reflect the truth in multi-punit case.
Rename for_each_online_package_in_set to
for_each_online_power_domain_in_set.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Wed, 17 Aug 2022 17:06:45 +0000 (01:06 +0800)]
tools/power/x86/intel-speed-select: Introduce support for multi-punit
New platforms may have more than 1 punit in a Package/Die, thus it can
have multiple power domains in a Package/Die. Package id and die id is not
sufficient to refer to a specific Power domain.
Introduce support for multi-punit per package/die.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Wed, 17 Aug 2022 07:33:23 +0000 (15:33 +0800)]
tools/power/x86/intel-speed-select: Introduce isst_is_punit_valid()
Introduce isst_is_punit_valid() for checking a valid domain.
For current platforms, it requires a punit 0 in a valid Package/Die.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Wed, 17 Aug 2022 06:51:40 +0000 (14:51 +0800)]
tools/power/x86/intel-speed-select: Introduce punit to isst_id
Punit id can also be retrieved from ISST_IF_GET_PHY_ID.
punit id is unique within a Package/Die, and together with Package id and
Die id, they can be used to refer to a specific SST power domain.
For current platforms, Punit id is always Zero. So no functional changes
are expected for the current platforms.
While here, prevent issuing IOCTL if the file /dev/isst_interface can't be
opened.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Sat, 20 Aug 2022 10:33:01 +0000 (18:33 +0800)]
tools/power/x86/intel-speed-select: Follow TRL nameing for FACT info
SST-TF high priority core count and ratios and low priority core ratios
are also per TRL level.
Cleanup the code to follow the same nameing convention as TRL.
This removes hardcoded TRL level names and variables.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Zhang Rui [Sat, 20 Aug 2022 10:11:21 +0000 (18:11 +0800)]
tools/power/x86/intel-speed-select: Unify TRL levels
TRL supports different levels including SSE/AVX2/AVX512.
Avoid using hardcoded level name and structure fields, so that a loop can
be used to parse each TRL level instead. This reduces several lines of
source code.
No functional changes are expected.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
[srinivas.pandruvada@linux.intel.com: changelog edits]
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Hans de Goede [Mon, 20 Mar 2023 10:38:15 +0000 (11:38 +0100)]
platform/x86/intel: vsec: Use intel_vsec_dev_release() to simplify init() error cleanup
On auxiliary_device_init(auxdev) failure we need to do the exact same
cleanup steps as on device.release(), so use the intel_vsec_dev_release()
callback for this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230320103815.229729-1-hdegoede@redhat.com
David E. Box [Thu, 16 Mar 2023 22:57:35 +0000 (15:57 -0700)]
platform/x86/intel/pmt: Add INTEL_PMT module namespace
Since the currently exported symbols in pmt_class are only used by other
Intel PMT drivers, create an INTEL_PMT module namespace for them.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230316225736.2856521-1-david.e.box@linux.intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
David E. Box [Thu, 16 Mar 2023 22:46:28 +0000 (15:46 -0700)]
platform/x86/intel: vsec: Explicitly enable capabilities
Discovered Intel VSEC/DVSEC capabilities are enabled by default and only
get disabled by quirk. Instead, remove such quirks and only enable support
for capabilities that have been explicitly added to a new capabilities
field. While here, also reorder the device info structures alphabetically.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20230316224628.2855884-1-david.e.box@linux.intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Krzysztof Kozlowski [Thu, 16 Mar 2023 16:03:24 +0000 (17:03 +0100)]
platform/olpc: olpc-xo175-ec: Use SPI device ID data to bind device
The driver defines spi_device_id table for module autoloading, but does
not use it in id_table which causes W=1 warning:
drivers/platform/olpc/olpc-xo175-ec.c:737:35: error: ‘olpc_xo175_ec_id_table’ defined but not used [-Werror=unused-const-variable=]
Reference the SPI device ID table, so it can be also used for device
binding.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230316160324.78856-1-krzysztof.kozlowski@linaro.org
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Mon, 13 Mar 2023 13:02:41 +0000 (14:02 +0100)]
platform/x86: pcengines-apuv2: Drop platform:pcengines-apuv2 module-alias
The driver auto-loads based on the DMI modaliases and this platform
modalias is not necessary and broken:
1. Not necessary since the driver itself creates the platform_device,
so it is already loaded when the modalias might be used
2. From a quick scan of the code it does not create any platform-devices
called "platform:pcengines-apuv2"
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20230313130241.778146-1-hdegoede@redhat.com
Krzysztof Kozlowski [Sun, 12 Mar 2023 13:26:24 +0000 (14:26 +0100)]
platform/x86: sony: mark SPI related data as maybe unused
The driver can be compile tested as built-in making certain data unused:
drivers/platform/x86/sony-laptop.c:3290:36: error: ‘sony_device_ids’ defined but not used [-Werror=unused-const-variable=]
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230312132624.352703-3-krzysztof.kozlowski@linaro.org
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Krzysztof Kozlowski [Sun, 12 Mar 2023 13:26:23 +0000 (14:26 +0100)]
platform/x86: classmate: mark SPI related data as maybe unused
The driver can be compile tested as built-in making certain data unused:
drivers/platform/x86/classmate-laptop.c:1137:36: error: ‘cmpc_device_ids’ defined but not used [-Werror=unused-const-variable=]
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230312132624.352703-2-krzysztof.kozlowski@linaro.org
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Thomas Weißschuh [Tue, 14 Mar 2023 00:07:52 +0000 (00:07 +0000)]
platform/x86: think-lmi: Remove custom kobject sysfs_ops
think-lmi defines its own sysfs_ops that are identical to the standard
kobj_sysfs_ops. Use the standard definitions.
Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
Link: https://lore.kernel.org/r/20230314-think-lmi-sysfs_ops-v1-1-9d4f1cf9caec@weissschuh.net
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Thomas Weißschuh [Sun, 12 Mar 2023 03:47:57 +0000 (03:47 +0000)]
platform/x86: think-lmi: Properly interpret return value of tlmi_setting
The return value of tlmi_settings() is an errorcode, not an acpi_status.
Signed-off-by: Thomas Weißschuh <linux@weissschuh.net>
Link: https://lore.kernel.org/r/20230312-think-lmi-status-v1-1-4e9f36322cc4@weissschuh.net
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Jiapeng Chong [Thu, 9 Mar 2023 06:10:45 +0000 (14:10 +0800)]
platform/x86: acerhdf: Remove unneeded semicolon
Fix the following warning:
./drivers/platform/x86/acerhdf.c:343:2-3: Unneeded semicolon.
Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2271
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Link: https://lore.kernel.org/r/20230309061045.25256-1-jiapeng.chong@linux.alibaba.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Srinivas Pandruvada [Wed, 8 Mar 2023 07:06:42 +0000 (23:06 -0800)]
platform/x86: ISST: Add suspend/resume callbacks
To support S3/S4 with TPMI interface add suspend/resume callbacks.
Here HW state is stored in suspend callback and restored during
resume callback.
The hardware state which needs to be stored/restored:
- CLOS configuration
- CLOS Association
- SST-CP enable/disable status
- SST-PP perf level setting
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Suggested-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Tested-by: Pragya Tanwar <pragya.tanwar@intel.com>
Link: https://lore.kernel.org/r/20230308070642.1727167-9-srinivas.pandruvada@linux.intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Srinivas Pandruvada [Wed, 8 Mar 2023 07:06:41 +0000 (23:06 -0800)]
platform/x86: ISST: Add SST-TF support via TPMI
The support of Intel Speed Select Technology - Turbo Frequency (SST-TF)
feature enables the ability to set different “All core turbo ratio
limits” to cores based on the priority. By using this feature, some cores
can be configured to get higher turbo frequency by designating them as
high priority at the cost of lower or no turbo frequency on the low
priority cores.
One new IOCTLs are added:
ISST_IF_GET_TURBO_FREQ_INFO : Get information about turbo frequency
buckets
Once an instance is identified, read or write from correct MMIO
offset for a given field as defined in the specification.
For details on SST-TF operations using intel-speed-selet utility,
refer to:
Documentation/admin-guide/pm/intel-speed-select.rst
under the kernel documentation
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Tested-by: Pragya Tanwar <pragya.tanwar@intel.com>
Link: https://lore.kernel.org/r/20230308070642.1727167-8-srinivas.pandruvada@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Srinivas Pandruvada [Wed, 8 Mar 2023 07:06:40 +0000 (23:06 -0800)]
platform/x86: ISST: Add SST-BF support via TPMI
The Intel Speed Select Technology - Base Frequency (SST-BF) feature lets
the user control base frequency. If some critical workload threads demand
constant high guaranteed performance, then this feature can be used to
execute the thread at higher base frequency on specific sets of CPUs
(high priority CPUs) at the cost of lower base frequency (low priority
CPUs) on other CPUs.
Two new IOCTLs are added:
ISST_IF_GET_BASE_FREQ_INFO : Get frequency information for high and
low priority CPUs
ISST_IF_GET_BASE_FREQ_CPU_MASK : CPUs capable of higher frequency
Once an instance is identified, read or write from correct MMIO
offset for a given field as defined in the specification.
For details on SST-BF operations using intel-speed-selet utility,
refer to:
Documentation/admin-guide/pm/intel-speed-select.rst
under the kernel documentation
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Tested-by: Pragya Tanwar <pragya.tanwar@intel.com>
Link: https://lore.kernel.org/r/20230308070642.1727167-7-srinivas.pandruvada@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Srinivas Pandruvada [Wed, 8 Mar 2023 07:06:39 +0000 (23:06 -0800)]
platform/x86: ISST: Add SST-PP support via TPMI
This Intel Speed Select Technology - Performance Profile (SST-PP) feature
introduces a mechanism that allows multiple optimized performance profiles
per system. Each profile defines a set of CPUs that need to be online and
rest offline to sustain a guaranteed base frequency.
Five new IOCTLs are added:
ISST_IF_PERF_LEVELS : Get number of performance levels
ISST_IF_PERF_SET_LEVEL : Set to a new performance level
ISST_IF_PERF_SET_FEATURE : Activate SST-BF/SST-TF for a performance level
ISST_IF_GET_PERF_LEVEL_INFO : Get parameters for a performance level
ISST_IF_GET_PERF_LEVEL_CPU_MASK : Get CPU mask for a performance level
Once an instance is identified, read or write from correct MMIO
offset for a given field as defined in the specification.
For details on SST PP operations using intel-speed-selet utility,
refer to:
Documentation/admin-guide/pm/intel-speed-select.rst
under the kernel documentation
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Tested-by: Pragya Tanwar <pragya.tanwar@intel.com>
Link: https://lore.kernel.org/r/20230308070642.1727167-6-srinivas.pandruvada@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Srinivas Pandruvada [Wed, 8 Mar 2023 07:06:38 +0000 (23:06 -0800)]
platform/x86: ISST: Add SST-CP support via TPMI
Intel Speed Select Technology Core Power (SST-CP) is an interface that
allows users to define per core priority. This defines a mechanism to
distribute power among cores when there is a power constrained
scenario. This defines a class of service (CLOS) configuration.
Three new IOCTLs are added:
ISST_IF_CORE_POWER_STATE : Enable/Disable SST-CP
ISST_IF_CLOS_PARAM : Configure CLOS parameters
ISST_IF_CLOS_ASSOC : Associate CPUs to a CLOS
To associate CPUs to CLOS, either Linux CPU numbering or PUNIT numbering
scheme can be used, using parameter punit_cpu_map (1: for PUNIT numbering
0 for Linux CPU number).
There is no change to IOCTL to get PUNIT CPU number for a CPU.
Introduce get_instance() function, which is used by majority of IOCTLs
processing to convert a socket and power domain to
tpmi_per_power_domain_info * instance. This instance has all the MMIO
offsets stored to read a particular field.
Once an instance is identified, read or write from correct MMIO
offset for a given field as defined in the specification.
For details on SST CP operations using intel-speed-selet utility,
refer to:
Documentation/admin-guide/pm/intel-speed-select.rst
under the kernel documentation
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Tested-by: Pragya Tanwar <pragya.tanwar@intel.com>
Link: https://lore.kernel.org/r/20230308070642.1727167-5-srinivas.pandruvada@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Srinivas Pandruvada [Wed, 8 Mar 2023 07:06:37 +0000 (23:06 -0800)]
platform/x86: ISST: Parse SST MMIO and update instance
SST registers are presented to OS in multi-layer structures starting
with a SST header showing version information freezing current
definition.
For details on SST terminology refer to
Documentation/admin-guide/pm/intel-speed-select.rst
under the kernel documentation
SST TPMI details are published in the following document:
https://github.com/intel/tpmi_power_management/blob/main/SST_TPMI_public_disclosure_FINAL.docx
SST MMIO structure layout follows:
SST-HEADER
SST-CP Header
SST-CP CONTROL
SST-CP STATUS
SST-CP CONFIG0
SST-CP CONFIG1
...
...
SST-PP Header
SST-PP OFFSET_0
SST-PP OFFSET_1
SST_PP_0_INFO
SST_PP_1_INFO
SST_PP_2_INFO
SST_PP_3_INFO
SST-PP CONTROL
SST-PP STATUS
Each register bank contains information to get to next lower level
information. This information is parsed and stored in the struct
tpmi_per_power_domain_info for each domain. This information is
used to process each SST requests.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Tested-by: Pragya Tanwar <pragya.tanwar@intel.com>
Link: https://lore.kernel.org/r/20230308070642.1727167-4-srinivas.pandruvada@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Srinivas Pandruvada [Wed, 8 Mar 2023 07:06:36 +0000 (23:06 -0800)]
platform/x86: ISST: Enumerate TPMI SST and create framework
Enumerate TPMI SST driver and create basic framework to add more
features.
The basic user space interface is still same as the legacy using
/dev/isst_interface. Users of "intel-speed-select" utility should
be able to use same commands as prior gens without being aware
of new underlying hardware interface.
TPMI SST driver enumerates on device "intel_vsec.tpmi-sst". Since there
can be multiple instances and there is one common SST core, split
implementation into two parts: A common core part and an enumeration
part. The enumeration driver is loaded for each device instance and
register with the TPMI SST core driver.
On very first enumeration the TPMI SST core driver register with SST
core driver to get IOCTL callbacks. The api_version is incremented
for IOCTL ISST_IF_GET_PLATFORM_INFO, so that user space can issue
new IOCTLs.
Each TPMI package contains multiple power domains. Each power domain
has its own set of SST controls. For each domain map the MMIO memory
and update per domain struct tpmi_per_power_domain_info. This information
will be used to implement other SST interfaces.
Implement first IOCTL commands to get number of TPMI SST instances
and instance mask as some of the power domains may not have any
SST controls.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Tested-by: Pragya Tanwar <pragya.tanwar@intel.com>
Link: https://lore.kernel.org/r/20230308070642.1727167-3-srinivas.pandruvada@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Srinivas Pandruvada [Wed, 8 Mar 2023 07:06:35 +0000 (23:06 -0800)]
platform/x86: ISST: Add support for MSR 0x54
To map Linux CPU numbering scheme to hardware CPU numbering scheme
MSR 0x53 is getting used. But for new generation of CPUs, this MSR
is not valid. Since this is model specific MSR, this is possible.
A new MSR 0x54 is defined for this purpose. User space can use the
API version to distinguish format from MSR 0x53.
Intel speed select utility is updated to use the new format based
on the API version.
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reviewed-by: Zhang Rui <rui.zhang@intel.com>
Tested-by: Pragya Tanwar <pragya.tanwar@intel.com>
Link: https://lore.kernel.org/r/20230308070642.1727167-2-srinivas.pandruvada@linux.intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Koba Ko [Wed, 8 Mar 2023 06:24:14 +0000 (14:24 +0800)]
platform/x86: dell-laptop: Register ctl-led for speaker-mute
Some platforms have the speaker-mute led and
current driver doesn't control it.
If the platform support the control of speaker-mute led, register it
Signed-off-by: Koba Ko <koba.ko@canonical.com>
Link: https://lore.kernel.org/r/20230308062414.1048913-1-koba.ko@canonical.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Maximilian Luz [Sat, 4 Mar 2023 19:46:11 +0000 (20:46 +0100)]
platform/surface: aggregator_registry: Add support for tablet-mode switch on Surface Pro 9
Add support for the POS-subsystem tablet-mode switch used on the Surface
Pro 9.
Signed-off-by: Maximilian Luz <luzmaximilian@gmail.com>
Link: https://lore.kernel.org/r/20230304194611.87770-4-luzmaximilian@gmail.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>