Martin Storsjo [Wed, 20 Jun 2018 20:53:19 +0000 (20:53 +0000)]
[CMake] Convert paths to the right form in standalone builds on Windows
The paths output from llvm-config --cmakedir and from clang
--print-libgcc-file-name can contain backslashes, while CMake
can't handle the paths in this form.
This matches what compiler-rt already does (since SVN r203789
and r293195).
Differential Revision: https://reviews.llvm.org/D48353
llvm-svn: 335169
Artem Belevich [Wed, 20 Jun 2018 20:34:04 +0000 (20:34 +0000)]
[CUDA] Removed unused __nvvm_* builtins with non-generic pointers.
They were hot even hooked into CGBuiltin's machinery. Even if they were,
CUDA does not support AS-specific pointers, so there would be no legal way
no way to call these builtins.
This came up in D47154.
Differential Revision: https://reviews.llvm.org/D47845
llvm-svn: 335168
Stanislav Mekhanoshin [Wed, 20 Jun 2018 20:24:20 +0000 (20:24 +0000)]
Allow binop C1, (select cc, CF, CT) -> select folding
Previously this folding was done only if select is a first operand.
However, for non-commutative operations constant may go before
select.
Differential Revision: https://reviews.llvm.org/D48223
llvm-svn: 335167
David Carlier [Wed, 20 Jun 2018 20:17:44 +0000 (20:17 +0000)]
[TSan] fix build and couple of unit tests on FreeBSD
Similarly to Msan adding -pie provokes linkage issue, was spotted with pie_test.cc
Set to XFAIL for couple of unit tests.
Reviewers: vitalybuka, krytarowski, dim
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D48317
llvm-svn: 335166
Sanjay Patel [Wed, 20 Jun 2018 20:16:45 +0000 (20:16 +0000)]
[InstCombine] fix typo in test comment; NFC
llvm-svn: 335165
David Carlier [Wed, 20 Jun 2018 20:13:25 +0000 (20:13 +0000)]
[Lsan] intercept thr_exit on FreeBSD
Intercepts thr_exit call on FreeBSD.
Disable pthread key workflow.
The pthread key create approach does not function under FreeBSD as the libpthread is not initialised enough at this stage.
Reviewers: vitalybuka, krytarowski, dim
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D48268
llvm-svn: 335164
Pavel Labath [Wed, 20 Jun 2018 20:13:04 +0000 (20:13 +0000)]
Remove some instances of manual UUID pretty-printing
Identical functionality is already offered by the UUID::getAsString
method.
llvm-svn: 335163
Simon Dardis [Wed, 20 Jun 2018 19:59:58 +0000 (19:59 +0000)]
[mips] Correct predicates for loads, bit manipulation instructions and some pseudos
Additionally, correct the definition of the rdhwr instruction.
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D48216
llvm-svn: 335162
Matt Arsenault [Wed, 20 Jun 2018 19:45:48 +0000 (19:45 +0000)]
AMDGPU: Fix scalar_to_vector for v4i16/v4f16
llvm-svn: 335161
Matt Arsenault [Wed, 20 Jun 2018 19:45:40 +0000 (19:45 +0000)]
AMDGPU: Fix missing C++ mode comment
llvm-svn: 335160
Leonard Chan [Wed, 20 Jun 2018 19:34:05 +0000 (19:34 +0000)]
Fixed test in prior build where FileCheck tried to match against
`common` when declaring a global variable when we primarily care about
the value assigned in the test.
llvm-svn: 335159
Krzysztof Parzyszek [Wed, 20 Jun 2018 19:22:27 +0000 (19:22 +0000)]
[Hexagon] Replace .ll test for expanding post-ra pesudos with .mir
llvm-svn: 335158
Sanjay Patel [Wed, 20 Jun 2018 19:02:17 +0000 (19:02 +0000)]
[IR] add/use isIntDivRem convenience function
There are more existing potential users of this,
but I've limited this patch to the first couple
that I found to minimize typo risk.
llvm-svn: 335157
Chandler Carruth [Wed, 20 Jun 2018 18:57:07 +0000 (18:57 +0000)]
[PM/LoopUnswitch] Support partial trivial unswitching.
The idea of partial unswitching is to take a *part* of a branch's
condition that is loop invariant and just unswitching that part. This
primarily makes sense with i1 conditions of branches as opposed to
switches. When dealing with i1 conditions, we can easily extract loop
invariant inputs to a a branch and unswitch them to test them entirely
outside the loop.
As part of this, we now create much more significant cruft in the loop
body, so this relies on adding cleanup passes to the loop pipeline and
revisiting unswitched loops to do that cleanup before continuing to
process them.
This already appears to be more powerful at unswitching than the old
loop unswitch pass, and so I'd appreciate pretty careful review in case
I'm just missing some correctness checks. The `LIV-loop-condition` test
case is not unswitched by the old unswitch pass, but is with this pass.
Thanks to Sanjoy and Fedor for the review!
Differential Revision: https://reviews.llvm.org/D46706
llvm-svn: 335156
Leonard Chan [Wed, 20 Jun 2018 18:48:05 +0000 (18:48 +0000)]
Fixed test that failed when checking what variable a value was stored
in for fixed point types.
llvm-svn: 335155
Alex Bradbury [Wed, 20 Jun 2018 18:42:25 +0000 (18:42 +0000)]
[RISCV] Accept fmv.s.x and fmv.x.s as mnemonic aliases for fmv.w.x and fmv.x.w
These instructions were renamed in version 2.2 of the user-level ISA spec, but
the old name should also be accepted by standard tools.
llvm-svn: 335154
Jessica Paquette [Wed, 20 Jun 2018 18:41:11 +0000 (18:41 +0000)]
[MachineOutliner] Add debug info test for the outliner
The outliner emits debug info. Add a test that outlines a function
and uses llvm-dwarfdump to check the emitted DWARF for correctness.
llvm-svn: 335153
Vedant Kumar [Wed, 20 Jun 2018 18:40:14 +0000 (18:40 +0000)]
[Local] Generalize insertReplacementDbgValues, NFC
This utility should operate on Values, not Instructions. While I'm here,
I've also made it possible to skip emitting replacement dbg.values for
certain debug users (by having RewriteExpr return nullptr).
llvm-svn: 335152
Sanjay Patel [Wed, 20 Jun 2018 17:48:43 +0000 (17:48 +0000)]
[InstCombine] add vector select of binops tests (PR37806)
These represent the most basic requested transform - a matching
operand and 2 constant operands.
llvm-svn: 335151
Florian Hahn [Wed, 20 Jun 2018 17:42:01 +0000 (17:42 +0000)]
[PredicateInfo] Order instructions in different BBs by DFSNumIn.
Using OrderedInstructions::dominates as comparator for instructions in
BBs without dominance relation can cause a non-deterministic order
between such instructions. That in turn can cause us to materialize
copies in a non-deterministic order. While this does not effect
correctness, it causes some minor non-determinism in the final generated
code, because values have slightly different labels.
Without this patch, running -print-predicateinfo on a reasonably large
module produces slightly different output on each run.
This patch uses the dominator trees DFSInNum to order instruction from
different BBs, which should enforce a deterministic ordering and
guarantee that dominated instructions come after the instructions that
dominate them.
Reviewers: dberlin, efriedma, davide
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D48230
llvm-svn: 335150
Pavel Labath [Wed, 20 Jun 2018 17:32:48 +0000 (17:32 +0000)]
Make test sources compatible with android+libcxx+modules
In a modules build, android is very picky about which symbols are
visible after including libc++ headers (e.g. <cstdio> defines only
std::printf and not ::printf).
This consolidates the tests where this was an issue to always include
the <c???> version of the headers and prefixes the symbols with std:: as
necessary.
Apart from that, there is no functional change in the tests.
llvm-svn: 335149
Leonard Chan [Wed, 20 Jun 2018 17:19:40 +0000 (17:19 +0000)]
[Fixed Point Arithmetic] Fixed Point Precision Bits and Fixed Point Literals
This diff includes the logic for setting the precision bits for each primary fixed point type in the target info and logic for initializing a fixed point literal.
Fixed point literals are declared using the suffixes
```
hr: short _Fract
uhr: unsigned short _Fract
r: _Fract
ur: unsigned _Fract
lr: long _Fract
ulr: unsigned long _Fract
hk: short _Accum
uhk: unsigned short _Accum
k: _Accum
uk: unsigned _Accum
```
Errors are also thrown for illegal literal values
```
unsigned short _Accum u_short_accum = 256.0uhk; // expected-error{{the integral part of this literal is too large for this unsigned _Accum type}}
```
Differential Revision: https://reviews.llvm.org/D46915
llvm-svn: 335148
Alex Shlyapnikov [Wed, 20 Jun 2018 17:10:33 +0000 (17:10 +0000)]
[Sanitizers] Remove OOM/BadRequest allocator error handling policies.
Summary:
Remove the generic error nadling policies and handle each allocator error
explicitly. Although more verbose, it allows for more comprehensive, precise
and actionable allocator related failure reports.
This finishes up the series of changes of the particular sanitizer
allocators, improves the internal allocator error reporting and removes
now unused policies.
Reviewers: vitalybuka, cryptoad
Subscribers: kubamracek, delcypher, #sanitizers, llvm-commits
Differential Revision: https://reviews.llvm.org/D48328
llvm-svn: 335147
Paul Robinson [Wed, 20 Jun 2018 17:08:46 +0000 (17:08 +0000)]
[DWARF] Don't keep a ref to possibly stack allocated data.
llvm-svn: 335146
Vlad Tsyrklevich [Wed, 20 Jun 2018 16:50:56 +0000 (16:50 +0000)]
IRMover: Account for matching types present across modules
Summary:
Due to uniqueing of DICompositeTypes, it's possible for a type from one
module to be loaded into another earlier module without being renamed.
Then when the defining module is being IRMoved, the type can be used as
a Mapping destination before being loaded, such that when it's requested
using TypeMapTy::get() it will fail with an assertion that the type is a
source type when it's actually a type in both the source and
destination modules. Correctly handle that case by allowing a non-opaque
non-literal struct type be present in both modules.
Fix for PR37684.
Reviewers: pcc, tejohnson
Reviewed By: pcc, tejohnson
Subscribers: tobiasvk, mehdi_amini, steven_wu, llvm-commits, kcc
Differential Revision: https://reviews.llvm.org/D47898
llvm-svn: 335145
Vedant Kumar [Wed, 20 Jun 2018 16:50:25 +0000 (16:50 +0000)]
[Local] Add a utility to insert replacement dbg.values, NFC
The purpose of this utility is to make it easier for optimizations to
insert replacement dbg.values for instructions they are deleting. This
is useful in situations where salvageDebugInfo is inapplicable, say,
because the new dbg.value cannot refer to an operand of the dying value.
The utility is called insertReplacementDbgValues.
It assumes that the instruction 'From' is going to be deleted, and
inserts replacement dbg.values for each debug user of 'From'. The
newly-inserted dbg.values refer to 'To' instead of 'From'. Each
replacement dbg.value has the same location and variable as the debug
user it replaces, has a DIExpression determined by the result of
'RewriteExpr' applied to an old debug user of 'From', and is placed
before 'InsertBefore'.
This should simplify future patches, like D48331.
llvm-svn: 335144
Paul Robinson [Wed, 20 Jun 2018 16:12:03 +0000 (16:12 +0000)]
Remove a redundant initialization. NFC
llvm-svn: 335143
Simon Pilgrim [Wed, 20 Jun 2018 16:11:00 +0000 (16:11 +0000)]
[SLPVectorizer] Move isOneOf after InstructionsState type. NFCI.
A future patch will have isOneOf use InstructionsState.
llvm-svn: 335142
Bjorn Pettersson [Wed, 20 Jun 2018 16:06:09 +0000 (16:06 +0000)]
[DAG] Don't map a TableId to itself in the ReplacedValues map
Summary:
Found some regressions (infinite loop in DAGTypeLegalizer::RemapId)
after r334880. This patch makes sure that we do map a TableId to
itself.
Reviewers: niravd
Reviewed By: niravd
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48364
llvm-svn: 335141
Simon Atanasyan [Wed, 20 Jun 2018 15:58:48 +0000 (15:58 +0000)]
[ELF][MIPS] Fill a primary-GOT as much as possible
While building a Global Offset Table try to fill the primary GOT as much
as possible because the primary GOT can be accessed in the most
effective way. If it is not possible, try to fill the last GOT in the
multi-GOT list, and finally create a new GOT if both attempts failed.
llvm-svn: 335140
Nico Weber [Wed, 20 Jun 2018 15:57:38 +0000 (15:57 +0000)]
Simplify. No behavior change.
llvm-svn: 335139
Andrey Churbanov [Wed, 20 Jun 2018 15:54:11 +0000 (15:54 +0000)]
minor: fixed typo in debug print
llvm-svn: 335138
Nirav Dave [Wed, 20 Jun 2018 15:36:29 +0000 (15:36 +0000)]
[DAG] Fix and-mask folding when narrowing loads.
Summary:
Check that and masks are strictly smaller than implicit mask from
narrowed load.
Fixes PR37820.
Reviewers: samparker, RKSimon, nemanjai
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D48335
llvm-svn: 335137
Eugene Leviant [Wed, 20 Jun 2018 15:32:47 +0000 (15:32 +0000)]
[LIT] Enable testing of LLVM gold plugin on Mac OS X
Differential revision: https://reviews.llvm.org/D48350
llvm-svn: 335136
Sam Clegg [Wed, 20 Jun 2018 15:17:12 +0000 (15:17 +0000)]
[WebAssembly] Update know failures for the wasm waterfall
Summary:
The waterfall no longer builds .s files and no longers uses
the wasm-o when it builds object files.
Subscribers: dschuff, jgravelle-google, aheejin, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D48371
llvm-svn: 335135
Simon Pilgrim [Wed, 20 Jun 2018 15:13:40 +0000 (15:13 +0000)]
[SLPVectorizer] Use InstructionsState to record AltOpcode
This is part of a move towards generalizing the alternate opcode mechanism and not just supporting (F)Add/(F)Sub counterparts.
The patch embeds the AltOpcode in the InstructionsState instead of calling getAltOpcode so often.
I'm hoping to eventually remove all uses of getAltOpcode and handle alternate opcode selection entirely within getSameOpcode, that will require us to use InstructionsState throughout the BoUpSLP call hierarchy (similar to some of the changes in D28907), which I will begin in future patches.
Differential Revision: https://reviews.llvm.org/D48359
llvm-svn: 335134
Kuba Mracek [Wed, 20 Jun 2018 14:59:16 +0000 (14:59 +0000)]
Fix-up for r335123: Set default apple_platform to "osx".
llvm-svn: 335133
Pavel Labath [Wed, 20 Jun 2018 14:54:34 +0000 (14:54 +0000)]
Make sure TestNumThreads works with libc++
The problem was that with libc++ the std::unique_lock declaration was
completely inlined, so there was no line table entry in the main.cpp
file to set a breakpoint on. Therefore, the breakpoint got moved to the
next line, but that meant the test would deadlock as the thread would
stop with the lock already held.
I fix that issue by adding a dummy statement before the std::unique_lock
line to anchor the breakpoint.
I think this should fix the issue because of which this test was
disabled on darwin, but someone should verify that before enabling it.
llvm-svn: 335132
Andrea Di Biagio [Wed, 20 Jun 2018 14:30:17 +0000 (14:30 +0000)]
[llvm-mca] use APint::operator[] to obtain the bit value. NFC
llvm-svn: 335131
Simon Pilgrim [Wed, 20 Jun 2018 14:26:28 +0000 (14:26 +0000)]
[SLPVectorizer] Relax "alternate" opcode vectorisation to work with any SK_Select shuffle pattern
D47985 saw the old SK_Alternate 'alternating' shuffle mask replaced with the SK_Select mask which accepts either input operand for each lane, equivalent to a vector select with a constant condition operand.
This patch updates SLPVectorizer to make full use of this SK_Select shuffle pattern by removing the 'isOdd()' limitation.
The AArch64 regression will be fixed by D48172.
Differential Revision: https://reviews.llvm.org/D48174
llvm-svn: 335130
Sanjay Patel [Wed, 20 Jun 2018 14:22:49 +0000 (14:22 +0000)]
[InstSimplify] Fix missed optimization in simplifyUnsignedRangeCheck()
For both operands are unsigned, the following optimizations are valid, and missing:
1. X > Y && X != 0 --> X > Y
2. X > Y || X != 0 --> X != 0
3. X <= Y || X != 0 --> true
4. X <= Y || X == 0 --> X <= Y
5. X > Y && X == 0 --> false
unsigned foo(unsigned x, unsigned y) { return x > y && x != 0; }
should fold to x > y, but I found we haven't done it right now.
besides, unsigned foo(unsigned x, unsigned y) { return x < y && y != 0; }
Has been folded to x < y, so there may be a bug.
Patch by: Li Jia He!
Differential Revision: https://reviews.llvm.org/D47922
llvm-svn: 335129
Sanjay Patel [Wed, 20 Jun 2018 14:03:13 +0000 (14:03 +0000)]
[InstSimplify] Add tests for missed optimizations in simplifyUnsignedRangeCheck (NFC)
These are the baseline tests for the functional change in D47922.
Patch by Li Jia He!
Differential Revision: https://reviews.llvm.org/D48000
llvm-svn: 335128
Alex Bradbury [Wed, 20 Jun 2018 14:03:02 +0000 (14:03 +0000)]
[RISCV] Add InstAlias definitions for fgt.{s|d}, fge.{s|d}
These are produced by GCC and supported by GAS, but not currently contained in
the pseudoinstruction listing in the RISC-V ISA manual.
llvm-svn: 335127
Mikhail Dvoretckii [Wed, 20 Jun 2018 14:01:57 +0000 (14:01 +0000)]
[X86] Adding a test for PR37879
llvm-svn: 335126
Sam McCall [Wed, 20 Jun 2018 13:56:25 +0000 (13:56 +0000)]
[ADT] Allow llvm::hash_code as DenseMap key.
Summary:
This is useful when hash collisions are unlikely and acceptable, e.g. in clangd
completion ranking.
Reviewers: ioeric
Subscribers: ilya-biryukov, llvm-commits
Differential Revision: https://reviews.llvm.org/D48361
llvm-svn: 335125
Krzysztof Parzyszek [Wed, 20 Jun 2018 13:56:09 +0000 (13:56 +0000)]
[Hexagon] Remove 'T' from HasVNN predicates, NFC
Patch by Sumanth Gundapaneni.
llvm-svn: 335124
Kuba Mracek [Wed, 20 Jun 2018 13:33:42 +0000 (13:33 +0000)]
[sanitizer] Unify and generalize Apple platforms in CMake and lit test configs
There's more platforms than just "ios" and "iossim" that we should support, and adding more lit config variables for each platform isn't great. Let's generalize and have a single value that determines what the platform under test is.
Differential Revision: https://reviews.llvm.org/D48309
llvm-svn: 335123
Simon Dardis [Wed, 20 Jun 2018 13:29:57 +0000 (13:29 +0000)]
[mips] Fix the predicates of some DSP instructions from AdditionalPredicates to ASEPredicate
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D48166
llvm-svn: 335122
Sanjay Patel [Wed, 20 Jun 2018 13:22:26 +0000 (13:22 +0000)]
[InstCombine] ignore debuginfo when removing redundant assumes (PR37726)
This is similar to:
rL335083
Fixes::
https://bugs.llvm.org/show_bug.cgi?id=37726
llvm-svn: 335121
Alex Bradbury [Wed, 20 Jun 2018 12:54:02 +0000 (12:54 +0000)]
[RISCV] Add InstAlias definitions for sgt and sgtu
These are produced by GCC and supported by GAS, but not currently contained in
the pseudoinstruction listing in the RISC-V ISA manual.
llvm-svn: 335120
Tim Northover [Wed, 20 Jun 2018 12:09:44 +0000 (12:09 +0000)]
ARM: convert ORR instructions to ADD where possible on Thumb.
Thumb has more 16-bit encoding space dedicated to ADD than ORR, allowing both a
3-address encoding and a wider range of immediates. So, particularly when
optimizing for code size (but it doesn't make things worse elsewhere) it's
beneficial to select an OR operation to an ADD if we know overflow won't occur.
This is made even better by LLVM's penchant for putting operations in canonical
form by converting the other way.
llvm-svn: 335119
Tim Northover [Wed, 20 Jun 2018 12:09:01 +0000 (12:09 +0000)]
[AArch64] Implement FLT_ROUNDS macro.
Very similar to ARM implementation, just maps to an MRS.
Should fix PR25191.
Patch by Michael Brase.
llvm-svn: 335118
Clement Courbet [Wed, 20 Jun 2018 11:54:35 +0000 (11:54 +0000)]
[llvm-exegesis] Add mechanism to add target-specific passes.
Summary:
createX86FloatingPointStackifierPass is disabled until we handle
TracksLiveness correctly.
Reviewers: gchatelet
Subscribers: mgorny, tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48360
llvm-svn: 335117
Mikhail R. Gadelha [Wed, 20 Jun 2018 11:42:12 +0000 (11:42 +0000)]
[analyzer] Optimize constraint generation when the range is a concrete value
Summary:
If a constraint is something like:
```
$0 = [1,1]
```
it'll now be created as:
```
assert($0 == 1)
```
instead of:
```
assert($0 >= 1 && $0 <= 1)
```
In general, ~3% speedup when solving per query in my machine. Biggest improvement was when verifying sqlite3, total time went down from 3000s to 2200s.
I couldn't create a test for this as there is no way to dump the formula yet. D48221 adds a method to dump the formula but there is no way to do it from the command line.
Also, a test that prints the formula will most likely fail in the future, as different solvers print the formula in different formats.
Reviewers: NoQ, george.karpenkov, ddcc
Reviewed By: george.karpenkov
Subscribers: xazax.hun, szepet, a.sidorin
Differential Revision: https://reviews.llvm.org/D48227
llvm-svn: 335116
Guillaume Chatelet [Wed, 20 Jun 2018 11:09:36 +0000 (11:09 +0000)]
[llvm-exegesis] Fix failing test.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48358
llvm-svn: 335115
Pavel Labath [Wed, 20 Jun 2018 10:45:29 +0000 (10:45 +0000)]
IRInterpreter: fix sign extension of small types (pr37840)
Sign-extension of small types (e.g. short) was not handled correctly.
The reason for that was that when we were assigning the a value to the
Scalar object, we would accidentally promote the type to int (even
though the assignment code in AssignTypeToMatch tried to cast the value
to the appropriate type, it would still invoke the "int" version of
operator=). Instead, I use the APInt version of operator=, where the
bitwidth is specified explicitly. Among other things, this allows us to
fold the individual size cases into one.
llvm-svn: 335114
Andrea Di Biagio [Wed, 20 Jun 2018 10:08:11 +0000 (10:08 +0000)]
[llvm-mca][X86] Teach how to identify register writes that implicitly clear the upper portion of a super-register.
This patch teaches llvm-mca how to identify register writes that implicitly zero
the upper portion of a super-register.
On X86-64, a general purpose register is implemented in hardware as a 64-bit
register. Quoting the Intel 64 Software Developer's Manual: "an update to the
lower 32 bits of a 64 bit integer register is architecturally defined to zero
extend the upper 32 bits". Also, a write to an XMM register performed by an AVX
instruction implicitly zeroes the upper 128 bits of the aliasing YMM register.
This patch adds a new method named clearsSuperRegisters to the MCInstrAnalysis
interface to help identify instructions that implicitly clear the upper portion
of a super-register. The rest of the patch teaches llvm-mca how to use that new
method to obtain the information, and update the register dependencies
accordingly.
I compared the kernels from tests clear-super-register-1.s and
clear-super-register-2.s against the output from perf on btver2. Previously
there was a large discrepancy between the estimated IPC and the measured IPC.
Now the differences are mostly in the noise.
Differential Revision: https://reviews.llvm.org/D48225
llvm-svn: 335113
Pavel Labath [Wed, 20 Jun 2018 09:53:30 +0000 (09:53 +0000)]
Fix compilation with mingw-w64 (pr37873)
llvm-svn: 335112
Sjoerd Meijer [Wed, 20 Jun 2018 09:49:40 +0000 (09:49 +0000)]
[SPIR] Prevent SPIR targets from using half conversion intrinsics
The SPIR target currently allows for half precision floating point types to be
emitted using the LLVM intrinsic functions which convert half types to floats
and doubles. However, this is illegal in SPIR as the only intrinsic allowed by
SPIR is memcpy, as per section 3 of the SPIR specification. Currently this is
leading to an assert being hit in the Clang CodeGen when attempting to emit a
constant or literal _Float16 type in a comparison operation on a SPIR or SPIR64
target. This assert stems from the CodeGen attempting to emit a constant half
value as an integer because the backend has specified that it is using these
half conversion intrinsics (which represents half as i16). This patch prevents
SPIR targets from using these intrinsics by overloading the responsible target
info method, marks SPIR targets as having a legal half type and provides
additional regression testing for the _Float16 type on SPIR targets.
Patch by: Stephen McGroarty
Differential Revision: https://reviews.llvm.org/D48188
llvm-svn: 335111
Simon Pilgrim [Wed, 20 Jun 2018 09:39:01 +0000 (09:39 +0000)]
[SLPVectorizer] Split Tree/Reduction cost calls to simplify debugging. NFCI.
llvm-svn: 335110
Clement Courbet [Wed, 20 Jun 2018 09:18:37 +0000 (09:18 +0000)]
[llvm-exegesis] Remove noexcept in r335105.
gcc checks for transitivity (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53903)
llvm-svn: 335109
Clement Courbet [Wed, 20 Jun 2018 09:18:32 +0000 (09:18 +0000)]
[llvm-exegesis] Fix missing move in r335105.
llvm-svn: 335108
Martin Storsjo [Wed, 20 Jun 2018 09:17:19 +0000 (09:17 +0000)]
[Support] Add missing includes of <system_error> for std::error_code
This fixes compilation with MinGW after SVN r333798, which added
a few functions within _WIN32 ifdefs, functions returning
std::error_code. Include everything that is needed instead of
hoping that this header being inclued transitively (which it apparently
is in MSVC builds).
llvm-svn: 335107
Pavel Labath [Wed, 20 Jun 2018 09:00:30 +0000 (09:00 +0000)]
Fix windows build broken by r335104
lldb-python.h needs to be included first to work around some
incompatibilities between windows and python headers.
llvm-svn: 335106
Guillaume Chatelet [Wed, 20 Jun 2018 08:52:30 +0000 (08:52 +0000)]
[llvm-exegesis] Use a Prototype to defer picking a value for free vars.
Summary: Introducing a Prototype object to capture Variables that must be set but keeps degrees of freedom as Invalid. This allows exploring non constraint variables later on.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D48316
llvm-svn: 335105
Pavel Labath [Wed, 20 Jun 2018 08:35:45 +0000 (08:35 +0000)]
Remove dependency from Host to python
Summary:
The only reason python was used in the Host module was to compute the
python path. I resolve this the same way as D47384 did for clang, by
moving the path computation into the python plugin and modifying
SBHostOS class to call into this module for ePathTypePythonDir.
Reviewers: zturner, jingham, davide
Subscribers: mgorny, lldb-commits
Differential Revision: https://reviews.llvm.org/D48215
llvm-svn: 335104
Alexey Bader [Wed, 20 Jun 2018 08:31:24 +0000 (08:31 +0000)]
[Sema] Allow creating types with multiple of the same addrspace.
Summary:
The comment with the OpenCL clause about this clearly
says: "No type shall be qualified by qualifiers for
two or more different address spaces."
This must mean that two or more qualifiers for the
_same_ address space is allowed. However, it is
likely unintended by the programmer, so emit a
warning.
For dependent address space types, reject them like
before since we cannot know what the address space
will be.
Patch by Bevin Hansson (ebevhan).
Reviewers: Anastasia
Reviewed By: Anastasia
Subscribers: bader, cfe-commits
Differential Revision: https://reviews.llvm.org/D47630
llvm-svn: 335103
Pavel Labath [Wed, 20 Jun 2018 08:12:50 +0000 (08:12 +0000)]
BreakpointIDList: Use llvm::ArrayRef instead of pointer+length pair
NFC
llvm-svn: 335102
Roman Lebedev [Wed, 20 Jun 2018 07:54:11 +0000 (07:54 +0000)]
[NFC][SCEV] Add tests related to bit masking (PR37793)
Summary:
Related to https://bugs.llvm.org/show_bug.cgi?id=37793, https://reviews.llvm.org/D46760#1127287
We'd like to do this canonicalization https://rise4fun.com/Alive/Gmc
But it is currently restricted by rL155136 / rL155362, which says:
```
// This is a constant shift of a constant shift. Be careful about hiding
// shl instructions behind bit masks. They are used to represent multiplies
// by a constant, and it is important that simple arithmetic expressions
// are still recognizable by scalar evolution.
//
// The transforms applied to shl are very similar to the transforms applied
// to mul by constant. We can be more aggressive about optimizing right
// shifts.
//
// Combinations of right and left shifts will still be optimized in
// DAGCombine where scalar evolution no longer applies.
```
I think these tests show that for *constants*, SCEV has no issues with that canonicalization.
Reviewers: mkazantsev, spatel, efriedma, sanjoy
Reviewed By: mkazantsev
Subscribers: sanjoy, javed.absar, llvm-commits, stoklund, bixia
Differential Revision: https://reviews.llvm.org/D48229
llvm-svn: 335101
Sjoerd Meijer [Wed, 20 Jun 2018 07:27:45 +0000 (07:27 +0000)]
[PatternMatch] Add m_Store pattern match helper
Differential Revision: https://reviews.llvm.org/D48279
llvm-svn: 335100
Roman Lebedev [Wed, 20 Jun 2018 07:01:14 +0000 (07:01 +0000)]
[X86][Znver1] Specify Register Files, RCU; FP scheduler capacity.
Summary:
First off: i do not have any access to that processor,
so this is purely theoretical, no benchmarks.
I have been looking into b**d**ver2 scheduling profile, and while cross-referencing
the existing b**t**ver2, znver1 profiles, and the reference docs
(`Software Optimization Guide for AMD Family {15,16,17}h Processors`),
i have noticed that only b**t**ver2 scheduling profile specifies these.
Also, there is no mca test coverage.
Reviewers: RKSimon, craig.topper, courbet, GGanesh, andreadb
Reviewed By: GGanesh
Subscribers: gbedwell, vprasad, ddibyend, shivaram, Ashutosh, javed.absar, llvm-commits
Differential Revision: https://reviews.llvm.org/D47676
llvm-svn: 335099
Clement Courbet [Wed, 20 Jun 2018 06:44:13 +0000 (06:44 +0000)]
[X86] Fix r335097
Missed `Generic` test in llvm-mca.
llvm-svn: 335098
Clement Courbet [Wed, 20 Jun 2018 06:13:39 +0000 (06:13 +0000)]
[X86] Add sched class WriteLAHFSAHF and fix values.
Summary:
I ran llvm-exegesis on SKX, SKL, BDW, HSW, SNB.
Atom is from Agner and SLM is a guess.
I've left AMD processors alone.
Reviewers: RKSimon, craig.topper
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48079
llvm-svn: 335097
Hiroshi Inoue [Wed, 20 Jun 2018 05:29:26 +0000 (05:29 +0000)]
[NFC] fix trivial typos in comments
llvm-svn: 335096
Craig Topper [Wed, 20 Jun 2018 04:32:07 +0000 (04:32 +0000)]
[DAGCombiner] Add some comments to some true/false arguments to make it obvious what they are. NFC
llvm-svn: 335095
Craig Topper [Wed, 20 Jun 2018 04:32:06 +0000 (04:32 +0000)]
[X86] Remove a fptosi from the test_mm512_mask_reduce_max_pd fast-isel test.
The clang test inadvertently turned a floating point value into a double by having the wrong return type on the test function relative to the intrinsic it was testing.
This resulted in an extra fptosi instruction that propagated into this test when I copied the clang output.
llvm-svn: 335094
Craig Topper [Wed, 20 Jun 2018 04:32:05 +0000 (04:32 +0000)]
[SelectionDAG] Don't crash on inline assembly errors when the inline assembly return type is a struct.
Summary:
If we get an error building the SelectionDAG for inline assembly we try to continue and still build the DAG.
But if the return type for the inline assembly is a struct we end up crashing because we try to create an UNDEF node with a struct type which isn't valid.
Instead we need to create an UNDEF for each element of the struct and join them with merge_values.
This patch relies on single operand merge_values being handled gracefully by getMergeValues. If the return type is void there will be no VTs returned by ComputeValueVTs and now we just return instead of calling setValue. Hopefully that's ok, I assumed nothing would need to look up the mapped value for void node.
Fixes PR37359
Reviewers: rengolin, rovka, echristo, efriedma, bogner
Reviewed By: efriedma
Subscribers: craig.topper, llvm-commits
Differential Revision: https://reviews.llvm.org/D46560
llvm-svn: 335093
Craig Topper [Wed, 20 Jun 2018 04:32:04 +0000 (04:32 +0000)]
[X86] Use binary search of the EVEX->VEX static tables instead of populating two DenseMaps for lookups
Summary:
After r335018, the static tables are guaranteed sorted by the EVEX opcode to convert. We can use this to do a binary search and remove the need for any secondary data structures.
Right now one table is 736 entries and the other is 482 entries. It might make sense to merge the two tables as a follow up. The effort it takes to select the table is probably similar to the extra binary search step it would require for a larger table.
I haven't done any measurements to see if this has any effect on compile time, but I don't imagine that EVEX->VEX conversion is a place we spend a lot of time.
Reviewers: RKSimon, spatel, chandlerc
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48312
llvm-svn: 335092
Philip Reames [Wed, 20 Jun 2018 02:43:46 +0000 (02:43 +0000)]
Add more test cases for deopt-operands via regalloc
This time, focused on reuse of arguments slots. Only one minor todo here.
llvm-svn: 335091
Fangrui Song [Wed, 20 Jun 2018 02:06:01 +0000 (02:06 +0000)]
[ELF] Support -z initfirst
Summary:
glibc uses this option to link libpthread.so
glibc/nptl/Makefile:
LDFLAGS-pthread.so = -Wl,--enable-new-dtags,-z,nodelete,-z,initfirst
Reviewers: ruiu, echristo, espindola
Subscribers: emaste, arichardson, llvm-commits
Differential Revision: https://reviews.llvm.org/D48329
llvm-svn: 335090
Reid Kleckner [Wed, 20 Jun 2018 01:09:51 +0000 (01:09 +0000)]
[asan] Add flushes to try to fix test
llvm-svn: 335089
Douglas Yung [Wed, 20 Jun 2018 01:05:09 +0000 (01:05 +0000)]
Add a test to verify the x86 intrinsic headers compile cleanly with no warnings or errors.
llvm-svn: 335088
Reid Kleckner [Wed, 20 Jun 2018 00:45:54 +0000 (00:45 +0000)]
[asan] Add Windows test for handle_segv and SetUnhandledExceptionFilter
llvm-svn: 335087
Craig Topper [Wed, 20 Jun 2018 00:31:39 +0000 (00:31 +0000)]
[X86] Undefine _mm512_mask_reduce_operator macro in avx512fintrin.h before redefining it.
llvm-svn: 335086
Vlad Tsyrklevich [Wed, 20 Jun 2018 00:02:32 +0000 (00:02 +0000)]
Revert r334980 and 334983
This reverts commits r334980 and r334983 because they were causing build
timeouts on the x86_64-linux-ubsan bot.
llvm-svn: 335085
Michael Kruse [Tue, 19 Jun 2018 23:46:52 +0000 (23:46 +0000)]
Append new attributes to the end of an AttributeList.
... instead of prepending it at the beginning (the original behavior
since implemented in r122535 2010-12-23). This builds up an
AttributeList in the the order in which the attributes appear in the
source.
The reverse order caused nodes for attributes in the AST (e.g. LoopHint)
to be in the reverse, and therefore printed in the wrong order by
-ast-dump. Some TODO comments mention this. The order was explicitly
reversed for enable_if attribute overload resolution and name mangling,
which is not necessary anymore with this patch.
The change unfortunately has some secondary effects, especially for
diagnostic output. In the simplest cases, the CHECK lines or expected
diagnostic were changed to the the new output. If the kind of
error/warning changed, the attribute's order was changed instead.
It also causes some 'previous occurrence here' hints to be textually
after the main marker. This typically happens when attributes are
merged, but are incompatible. Interchanging the role of the the main
and note SourceLocation will also cause the case where two different
declaration's attributes (in contrast to multiple attributes of the
same declaration) are merged to be reversed. There is no easy fix
because sometimes previous attributes are merged into a new
declaration's attribute list, sometimes new attributes are added to a
previous declaration's attribute list. Since 'previous occurrence here'
pointing to locations after the main marker is not rare, I left the
markers as-is; it is only relevant when the attributes are declared in
the same declaration anyway, which often is on the same line.
Differential Revision: https://reviews.llvm.org/D48100
llvm-svn: 335084
Vedant Kumar [Tue, 19 Jun 2018 23:42:17 +0000 (23:42 +0000)]
[IR] Introduce helpers to skip debug instructions (NFC)
This patch introduces two helpers to make it easier to ignore debug
intrinsics:
- Instruction::getNextNonDebugInstruction()
This is just like Instruction::getNextNode(), except that it skips debug
info.
- skipDebugInfo(BasicBlock::iterator)
A free function which advances a BasicBlock iterator past any debug
info. This is a no-op when the iterator already points to a non-debug
instruction.
Part of: llvm.org/PR37728
Related to: https://reviews.llvm.org/D47874
Differential Revision: https://reviews.llvm.org/D48305
llvm-svn: 335083
Nico Weber [Tue, 19 Jun 2018 23:19:34 +0000 (23:19 +0000)]
clang-cl: Emit narrowing diag for initializer lists if -fmsc-version is at least 1900 (i.e. MSVC2015).
Diagnostics for narrowing conversions in initializer lists are currently
DefaultIgnored in Microsoft mode. But MSVC 2015 did add warnings about
narrowing conversions (C2397), so clang-cl can remove its special case code if
MSCompatibilityVersion is new enough.
(In MSVC, C2397 is just a warning and in clang it's default-mapped to an error,
but it can be remapped, and disabled with -Wno-c++11-narrowing, so that should
be fine.)
Fixes PR37314.
https://reviews.llvm.org/D48296
llvm-svn: 335082
Alex Lorenz [Tue, 19 Jun 2018 22:47:53 +0000 (22:47 +0000)]
Recommit r335063: [Darwin] Add a warning for missing include path for libstdc++
The recommit ensures that the tests that failed on bots don't trigger the warning.
Xcode 10 removes support for libstdc++, but the users just get a confusing
include not file warning when including an STL header (when building for iOS6
which uses libstdc++ by default for example).
This patch adds a new warning that lets the user know that the libstdc++ include
path was not found to ensure that the user is more aware of why the error occurs.
rdar://
40830462
Differential Revision: https://reviews.llvm.org/D48297
llvm-svn: 335081
Kuba Mracek [Tue, 19 Jun 2018 22:22:48 +0000 (22:22 +0000)]
[llvm] Document "%T" as deprecated in TestingGuide.rst
Differential Revision: https://reviews.llvm.org/D48189
llvm-svn: 335080
Jason Molenda [Tue, 19 Jun 2018 21:39:10 +0000 (21:39 +0000)]
Correct the pathname that PlatformDarwinKernel::ExamineKextForMatchingUUID
passes to the recursive search function so we only recursively
search the kext bundle directory, instead of its parent directory.
<rdar://problem/
41227170>
Differential Revision: https://reviews.llvm.org/D48302
llvm-svn: 335079
Raphael Isemann [Tue, 19 Jun 2018 21:25:59 +0000 (21:25 +0000)]
Refactor OnExit utility class in ClangUserExpression
Summary:
OnExit ensures we call `ResetDeclMap` before this method ends. However,
we also have a few manual calls to ResetDeclMap in there that are actually unnecessary
because of this (calling the method multiple times has no effect). This patch also moves
the class out of the method that we can reuse it for the upcoming method that handles
parsing for completion.
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D48337
llvm-svn: 335078
Philip Reames [Tue, 19 Jun 2018 21:19:59 +0000 (21:19 +0000)]
[InlineSpiller] Fix a crash due to lack of forward progress from remat specifically for STATEPOINT
This patch covers up a fairly fundemental issue around remat and register allocation which shows up with psuedo instructions with more vreg uses than there are physical registers. This patch essentially just disables remat for STATEPOINTs which are the only case we've seen so far, but long term we need a better fix.
For STATEPOINTs specifically, this is a strict improvement. It unblocks progress towards enabling a currently off-by-default mode which integrates deopt bundle operand lowering with register allocator spilling so that we end up with smaller stack sizes and more optimally placed spills. Assming no other issues turn up during my next round of integration testing - which based on experience so far, is admittedly unlikely - we might finally be able to enable something I've been working towards in small bits and pieces for years now. :)
For psuedo ops in general, there are a couple of ideas for a "proper fix" discussed on the bug, but I'm far enough outside my knowledge area to not be able to see any of them through to a successful conclusion. If anyone wants to help out here, please do.
Differential Revision: https://reviews.llvm.org/D41098
llvm-svn: 335077
Jessica Paquette [Tue, 19 Jun 2018 21:14:48 +0000 (21:14 +0000)]
[MachineOutliner] NFC: Remove insertOutlinerPrologue, rename insertOutlinerEpilogue
insertOutlinerPrologue was not used by any target, and prologue-esque code was
beginning to appear in insertOutlinerEpilogue. Refactor that into one function,
buildOutlinedFrame.
This just removes insertOutlinerPrologue and renames insertOutlinerEpilogue.
llvm-svn: 335076
Craig Topper [Tue, 19 Jun 2018 21:00:30 +0000 (21:00 +0000)]
Recommit r335070 "[X86] Rewrite the max and min reduction intrinsics to make better use of other functions and to reduce width to 256 and 128 bits were possible.""
Test has been updated to reflect the IRGen.
llvm-svn: 335075
Heejin Ahn [Tue, 19 Jun 2018 20:30:42 +0000 (20:30 +0000)]
[WebAssembly] Fix liveness tracking info after drop insertion
Summary:
This fixes liveness tracking information after `drop` instruction
insertion in ExplicitLocals pass.
When a drop instruction is inserted to drop a dead register operand, the
original operand should be marked not dead anymore because it is now
used by the new drop instruction. And the operand to the new drop
instruction should be marked killed instead. This bug caused some
programs to fail when `llc` is run with `-verify-machineinstrs` option.
Reviewers: dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D48253
llvm-svn: 335074
Alex Lorenz [Tue, 19 Jun 2018 19:43:07 +0000 (19:43 +0000)]
Revert r335063 as it causes bot failures
llvm-svn: 335073
Craig Topper [Tue, 19 Jun 2018 19:37:07 +0000 (19:37 +0000)]
Revert r335070 "[X86] Rewrite the max and min reduction intrinsics to make better use of other functions and to reduce width to 256 and 128 bits were possible."
The test changes are failing the buildbot and its going to take me some time to fix it.
llvm-svn: 335072
Craig Topper [Tue, 19 Jun 2018 19:14:50 +0000 (19:14 +0000)]
[X86] Update fast-isel tests for clang's avx512f reduction intrinsics to match the codegen from r335070.
llvm-svn: 335071
Craig Topper [Tue, 19 Jun 2018 19:13:54 +0000 (19:13 +0000)]
[X86] Rewrite the max and min reduction intrinsics to make better use of other functions and to reduce width to 256 and 128 bits were possible.
We only need to use 512 bit vectors all the way through v8i64 reductions since those max instructions are new to avx512f and only available in 512 bits until SKX.
For v16i32 and floating point we have legacy 128/256 bit instructions we can use.
I've tried to use other intrinsics to reduce the verbosity of the code and avoid having to mention all the shuffles. I've also removed all the -1 shuffle indices so the output sequence is fully specified and not left to backend optimization.
Differential Revision: https://reviews.llvm.org/D47401
llvm-svn: 335070