Denys Petrov [Fri, 28 May 2021 13:52:44 +0000 (16:52 +0300)]
[analyzer] Use Optional as a return type of StoreManager::castRegion
Summary: Make StoreManager::castRegion function usage safier. Replace `const MemRegion *` with `Optional<const MemRegion *>`. Simplified one of related test cases due to suggestions in D101635.
Differential Revision: https://reviews.llvm.org/D103319
Ulrich Weigand [Sat, 29 May 2021 10:15:18 +0000 (12:15 +0200)]
[SystemZ] Set getExtendForAtomicOps to ISD::ANY_EXTEND
The implementation of subword atomics does not actually
guarantee the result is zero-extended, which now caused
build bot failures after https://reviews.llvm.org/D101342
was landed.
LLVM GN Syncbot [Sat, 29 May 2021 07:51:43 +0000 (07:51 +0000)]
[gn build] Port
b13edf6e907b
Mark de Wever [Sat, 29 May 2021 07:50:26 +0000 (09:50 +0200)]
Revert "[libc++] NFC: Move unwrap_iter to its own header"
This reverts commit
9968896cd62a62b11ac61085534dd598c4bd3c60.
This commit seems to cause the build failures of main.
Nikita Popov [Sat, 29 May 2021 07:31:28 +0000 (09:31 +0200)]
[LoopUnroll] Make DomTree explicitly required (NFC)
Some of the code was already assuming that DT is non-null, so
make that requirement more explicit and remove unnecessary null
checks.
LemonBoy [Sat, 29 May 2021 06:50:34 +0000 (08:50 +0200)]
[AtomicExpandPass][AArch64] Promote xchg with floating-point types to integer ones
Follow the same strategy used for atomic loads/stores by converting the operands to equally-sized integer types.
This change prevents the atomic expansion pass from generating illegal LL/SC pairs when targeting AArch64: `expand-atomicrmw-xchg-fp.ll` would previously instantiate intrinsics such as `llvm.aarch64.ldaxr.p0f32` that cannot be lowered.
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D103232
Fangrui Song [Sat, 29 May 2021 04:33:32 +0000 (21:33 -0700)]
[InstrProfiling][test] Fix stale linkage.ll
Fangrui Song [Sat, 29 May 2021 04:14:03 +0000 (21:14 -0700)]
[InstrProfiling][test] Fix stale tests
* Change linkage/visibility of __profn_ variables to match the reality
* alwaysinline.ll: Add "EnableValueProfiling", otherwise it doesn't test available_externally alwaysinline.
* Delete PR23499.ll - covered by other comdat tests.
Luke [Wed, 28 Apr 2021 15:25:31 +0000 (23:25 +0800)]
[RISCV] Enable interleaved vectorization for RVV
Enable interleaved vectorization for RVV.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D101469
Nico Weber [Sat, 29 May 2021 00:37:39 +0000 (20:37 -0400)]
[lld/mac] Don't crash on -order_file with assembly inputs on arm64
.s files with `-g` generate __debug_aranges on darwin/arm64 for some
reason, and those lead to `nullptr` symbols. Don't crash on that.
Fixes PR50517.
Differential Revision: https://reviews.llvm.org/D103350
Fangrui Song [Fri, 28 May 2021 23:58:38 +0000 (16:58 -0700)]
[Internalize] Simplify comdat renaming with noduplicates after D103043
I realized that we can use `comdat noduplicates` which is available on ELF.
Add a special case for wasm which doesn't support the feature.
Amara Emerson [Fri, 28 May 2021 22:33:02 +0000 (15:33 -0700)]
[AArch64][GlobalISel] Fix a crash during selection of a G_ZEXT(s8 = G_LOAD)
We have special handling for a zext of a load <32b because the load does a zext
for free. In that case, we just select the G_ZEXT as if it were a copy but this
triggered the copy checking code to balk at the mismatched size.
This was being hidden because normally these get combined into G_ZEXTLOAD but
for atomics this doesn't happen. The test case here just uses a normal load
because the particular atomic isn't supported yet anyway.
Zhihao Yuan [Wed, 26 May 2021 20:22:44 +0000 (13:22 -0700)]
[clang-format] New BreakInheritanceList style AfterComma
This inheritance list style has been widely adopted by Symantec,
a division of Broadcom Inc. It breaks after the commas that
separate the base-specifiers:
class Derived : public Base1,
private Base2
{
};
Differential Revision: https://reviews.llvm.org/D103204
Chris Lattner [Fri, 28 May 2021 22:12:44 +0000 (15:12 -0700)]
[Verifier] Significantly speed up IsolatedFromAbove checking. NFC.
The implementation had a couple of problems, including checking
"isProperAncestor" in an inefficient way. It also recursed into
other "isolated from above" ops. In the case of CIRCT, we get
three levels of isolated ops:
mlir::ModuleOp
firrtl::CircuitOp
firrtl::FModuleOp
The verification for module would recurse into the circuits and
fmodules checking them. The verifier hook for circuit would
recurse into all the modules reverifying them, fmoduleop would
then reverify them. The same happens for mlir::ModuleOp and Func.
While here, fix an old design problem: IsolatedFromAbove checking
was implemented by a method on the Region class, which isn't
actually general and isn't used by anything else. Move it over
to be a trait impl verifier method like the others and specialize
it for its task.
Differential Revision: https://reviews.llvm.org/D103345
Eli Friedman [Fri, 28 May 2021 22:32:36 +0000 (15:32 -0700)]
[CGAtomic] Delete outdated code comparing success/failure ordering for cmpxchg.
This doesn't actually have any effect: we only call this code with
SequentiallyConsistent orderings. But delete it anyway for consistency
with other recent changes.
Fangrui Song [Fri, 28 May 2021 22:15:59 +0000 (15:15 -0700)]
[lld-macho][test] Simplify --allow-empty with count 0
Nikita Popov [Fri, 28 May 2021 20:38:36 +0000 (22:38 +0200)]
[LoopUnroll] Use changeToUnreachable() (NFC)
When fulling unrolling with a non-latch exit, the latch block is
folded to unreachable. Replace this folding with the existing
changeToUnreachable() helper, rather than performing it manually.
This also moves the fold to happen after the manual DT update
for exit blocks. I believe this is correct in that the conversion
of an unconditional backedge into unreachable should not affect
the DT at all.
Differential Revision: https://reviews.llvm.org/D103340
Craig Topper [Fri, 28 May 2021 21:04:04 +0000 (14:04 -0700)]
[RISCV] Add separate MxList tablegen classes for widening/narrowing and sext.zext.vf2/4/8. NFC
This is cleaner than slicing the MxList to remove elements from
the beginning or end since that requires hardcoding the size.
I don't expect the size of the list to change, but we shouldn't
repeat it in multiple places.
Nikita Popov [Fri, 28 May 2021 20:48:23 +0000 (22:48 +0200)]
[LoopUnroll] Add store to unreachable latch test (NFC)
This is to show that we currently only convert the terminator to
unreachable, but don't clean up instructions before it (unless
trivial DCE removes them).
Also clean up excessive whitespace in this test.
Nikita Popov [Fri, 28 May 2021 18:14:32 +0000 (20:14 +0200)]
[LoopUnroll] Clean up exit folding (NFC)
This does some non-functional cleanup of exit folding during
unrolling. The two main changes are:
* First rewrite latch->header edges, which is unrelated to exit
folding.
* Combine folding for latch and non-latch exits. After the
previous change, the only difference in their logic is that
for non-latch exits we currently only fold "known non-exit"
cases, but not "known exit" cases.
I think this helps a lot to clarify this code and prepare it for
future changes.
Differential Revision: https://reviews.llvm.org/D103333
Craig Topper [Fri, 28 May 2021 19:59:34 +0000 (12:59 -0700)]
[RISCV] Pre-commit test cases for D103211. NFC
Bardia Mahjour [Fri, 28 May 2021 20:10:04 +0000 (16:10 -0400)]
[NFC] Remove confusing info about MainLoop VF/UF from debug message
Nico Weber [Thu, 27 May 2021 19:35:41 +0000 (15:35 -0400)]
[dsymutil tests] Try to make eh_frames.test run on other platforms
We now have llvm-otool :)
Marek Kurdej [Fri, 28 May 2021 19:48:13 +0000 (21:48 +0200)]
[clang-format] [docs] Regenerate style options documentation.
Forgotten in commits
fce8c10b,
9363aa90,
8d93d7ff.
Eli Friedman [Thu, 27 May 2021 20:35:59 +0000 (13:35 -0700)]
[AArch64][RISCV] Make sure isel correctly honors failure orderings.
If a cmpxchg specifies acquire or seq_cst on failure, make sure we
generate code consistent with that ordering even if the success ordering
is not acquire/seq_cst.
At one point, it was ambiguous whether this sort of construct was valid,
but the C++ standad and LLVM now accept arbitrary combinations of
success/failure orderings.
This doesn't address the corresponding issue in AtomicExpand. (This was
reported as https://bugs.llvm.org/show_bug.cgi?id=33332 .)
Fixes https://bugs.llvm.org/show_bug.cgi?id=50512.
Differential Revision: https://reviews.llvm.org/D103284
Nico Weber [Fri, 28 May 2021 19:39:12 +0000 (15:39 -0400)]
[gn build] manually port
982e3c05108b6 (check-lld needs dsymutil)
Arthur O'Dwyer [Fri, 28 May 2021 13:46:01 +0000 (09:46 -0400)]
[libc++] [test] Constexpr-ify a couple of insert-iterator tests.
This should have been done in D96385; thanks ldionne for the catch!
Also, make the back/front inserter behavior tests a little more thorough,
which incidentally caught a cut-and-paste-bug in `nasty_list`, so fix that.
Differential Revision: https://reviews.llvm.org/D103318
LLVM GN Syncbot [Fri, 28 May 2021 18:57:30 +0000 (18:57 +0000)]
[gn build] Port
9968896cd62a
Craig Topper [Fri, 28 May 2021 18:51:20 +0000 (11:51 -0700)]
[RISCV] Add octuple to LMULInfo tablegen class, remove octuple_from_str. NFCI
octuple_from_str was always used with the MX field from an
LMULInfo. Might as well just precompute it and put it in the class.
Nico Weber [Fri, 28 May 2021 18:49:18 +0000 (14:49 -0400)]
Revert "[clang][Parse] Add parsing support for C++ attributes on using-declarations"
This reverts commit
dc672999a9b12a156991891dc400308b52d569ba.
Breaks check-clang everywhere, see https://reviews.llvm.org/D91630
Craig Topper [Fri, 28 May 2021 18:28:45 +0000 (11:28 -0700)]
[VP] Make getMaskParamPos/getVectorLengthParamPos return unsigned. Lowercase function names.
Parameter positions seem like they should be unsigned.
While there, make function names lowercase per coding standards.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D103224
Craig Topper [Fri, 28 May 2021 17:24:54 +0000 (10:24 -0700)]
[SelectionDAG] Fix typo in assert. NFC
Florian Hahn [Fri, 28 May 2021 17:20:01 +0000 (18:20 +0100)]
[VectorCombine] Check indices for all extracts we scalarize.
We need to make sure that the indices of all extracts we scalarize are
valid.
Florian Hahn [Fri, 28 May 2021 14:41:24 +0000 (15:41 +0100)]
[VectorCombine] Add variants of multi-extract tests with assumes.
Stefan Pintilie [Fri, 28 May 2021 16:35:25 +0000 (11:35 -0500)]
Revert "Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration" (try 2)"
This reverts commit
be1a23203b1de655b8c7dac7549818d975a0cbbf.
Stefan Pintilie [Fri, 28 May 2021 16:35:12 +0000 (11:35 -0500)]
Revert "[NFCI][LoopDeletion] Only query SCEV about loop successor if another successor is also in loop"
This reverts commit
b0b2bf3b5da950679db1431aae431a6dedea2245.
Stefan Pintilie [Fri, 28 May 2021 16:34:02 +0000 (11:34 -0500)]
Revert "[NFC] Formatting fix"
This reverts commit
59d938e649e62db0cef4903d495e838fbc6a6eb8.
Stefan Pintilie [Fri, 28 May 2021 16:33:45 +0000 (11:33 -0500)]
Revert "[NFC] Reuse existing variables instead of re-requesting successors"
This reverts commit
c467585682dcdda75e645ef3ab47c8b48440db12.
Stefan Pintilie [Fri, 28 May 2021 16:17:46 +0000 (11:17 -0500)]
Revert "[NFCI][LoopDeletion] Do not call complex analysis for known non-zero BTC"
This reverts commit
7d418dadf6b1e6fd9bcccf7c5b5e1db74992ee70.
Sanjay Patel [Fri, 28 May 2021 16:33:54 +0000 (12:33 -0400)]
[PassManager] unify late simplifycfg options between regular and LTO pipelines
This is split off from D102002, and I think it is clear that
the difference in behavior was not intended. Options were
added to SimplifyCFG over time, but different chunks of
the pass pipelines were not kept in sync.
Sanjay Patel [Fri, 28 May 2021 16:20:44 +0000 (12:20 -0400)]
[PhaseOrdering] add test for late simplifycfg with LTO; NFC
Part of D102002
Florian Hahn [Fri, 28 May 2021 15:58:59 +0000 (16:58 +0100)]
[LoopDeletion] Add test with potentially infinite sub-loop.
Tests for PR50511.
Louis Dionne [Fri, 28 May 2021 16:41:58 +0000 (12:41 -0400)]
[libc++] NFC: Move unwrap_iter to its own header
Jacques Pienaar [Fri, 28 May 2021 16:12:55 +0000 (09:12 -0700)]
[mlir] Add missing namespace to createCanonicalizerPass.
Erik Pilkington [Fri, 21 May 2021 16:53:02 +0000 (12:53 -0400)]
[clang][Parse] Add parsing support for C++ attributes on using-declarations
Differential Revision: https://reviews.llvm.org/D91630
Nemanja Ivanovic [Fri, 28 May 2021 15:53:49 +0000 (10:53 -0500)]
Revert "Fix "enumerator 'llvm::TargetStackID::WasmLocal' in switch of enum 'llvm::TargetStackID::Value' is not handled" MSVC warnings. NFCI."
Since
ca5f07f8c4bc96d16ed1992b810aa3897df157f2 already reverted
the cause for this warning, this commit now causes warnings about
a default label in a switch that covers the enum.
This reverts commit
cf2eeb114c59cfc3a80133e96c585188fa16cc98.
eopXD [Fri, 28 May 2021 06:58:10 +0000 (06:58 +0000)]
[LoopNest][LoopFlatten] Change LoopFlattenPass to LoopNest pass
This patch changes LoopFlattenPass from FunctionPass to LoopNestPass.
Utilize LoopNest and let function 'Flatten' generate information from it.
Reviewed By: Whitney
Differential Revision: https://reviews.llvm.org/D102904
David Stenberg [Fri, 28 May 2021 14:37:47 +0000 (16:37 +0200)]
[IR] Make TypeFinder aware of DIArgList values
TypeFinder did not find types under DIArgList. This resulted in a case
of invalid IR after GlobalOpt removed a global that was the only
non-DIArgList use of a struct type.
error: use of undefined type named 'struct.S'
call void @llvm.dbg.value(
metadata !DIArgList([1 x %struct.S]* undef, i64 %idxprom),
metadata !24, metadata !DIExpression([...]))
Reviewed By: jmorse
Differential Revision: https://reviews.llvm.org/D103306
Reid Kleckner [Fri, 28 May 2021 03:00:20 +0000 (20:00 -0700)]
[gn] Make ubsan errors fatal, as in cmake
Apparently ubsan errors are non-fatal by default. If you introduce UB
into LLVM and run the tests, if errors are not fatal, the test will
still produce the expected output and the tests will pass. In order to
make ubsan errors show up as test failures, they have to be made fatal.
Pass the -fno-sanitize-recover=all flag to make it so.
Differential Revision: https://reviews.llvm.org/D103298
LLVM GN Syncbot [Fri, 28 May 2021 14:09:31 +0000 (14:09 +0000)]
[gn build] Port
58b29a4efc22
Louis Dionne [Wed, 28 Apr 2021 19:02:08 +0000 (15:02 -0400)]
[libc++] Add all indirect callable concepts and projected
Differential Revision: https://reviews.llvm.org/D101277
Alexandre Ganea [Fri, 28 May 2021 13:45:31 +0000 (09:45 -0400)]
[LLD][COFF] Reduce the maximum size of the GHASH table
Before this patch, the maximum size of the GHASH table was 2^31 buckets. However we were storing the bucket index into a TypeIndex which has an input limit of (2^31)-4095 indices, see this link. Any value above that limit will improperly set the TypeIndex's high bit, which is interpreted as DecoratedItemIdMask. This used to cause bad indices on extraction when calling TypeIndex::toArrayIndex().
Differential Revision: https://reviews.llvm.org/D103297
Florian Hahn [Fri, 28 May 2021 12:33:40 +0000 (13:33 +0100)]
[AArch64] Add additional vector load scalarization tests for D103077.
Jan Svoboda [Fri, 28 May 2021 12:05:22 +0000 (14:05 +0200)]
[clang] NFC: Replace std::pair by a struct in InitHeaderSearch
This patch replaces a `std::pair` by a proper struct in `InitHeaderSearch`. This will be useful in a follow-up: D102923.
Reviewed By: dexonsmith
Differential Revision: https://reviews.llvm.org/D102924
Nico Weber [Fri, 28 May 2021 12:04:39 +0000 (08:04 -0400)]
[gn build] (semi-manually) port
bd04d78d649b
Florian Hahn [Fri, 28 May 2021 11:12:50 +0000 (12:12 +0100)]
[Matrix] Move C++ matrix cast checks to TryStaticCast.
At the moment, the matrix support in CheckCXXCStyleCast (added in
D101696) breaks function-style constructor calls that take a
single matrix value, because it is treated as matrix cast.
Instead, unify the C++ matrix cast handling by moving the logic to
TryStaticCast and only handle the case where both types are matrix
types. Otherwise, fall back to the generic mis-match detection.
Suggested by @rjmccall
Reviewed By: SaurabhJha
Differential Revision: https://reviews.llvm.org/D103163
Sanjay Patel [Fri, 28 May 2021 10:30:28 +0000 (06:30 -0400)]
[x86] add test for extend of legal vector compare; NFC
Additional test coverage for D103280.
Simon Pilgrim [Fri, 28 May 2021 11:47:05 +0000 (12:47 +0100)]
Fix "enumerator 'llvm::TargetStackID::WasmLocal' in switch of enum 'llvm::TargetStackID::Value' is not handled" MSVC warnings. NFCI.
Fraser Cormack [Fri, 28 May 2021 11:14:49 +0000 (12:14 +0100)]
[RISCV][NFC] Merge identical RV32 and RV64 test checks
Fraser Cormack [Fri, 28 May 2021 11:03:04 +0000 (12:03 +0100)]
[RISCV] Add tests for fixed vector conversions between fp to/from i1
These fixed-length versions don't crash unlike the corresponding
scalable ones, but the code generation is scalarized. An imminent patch
will support scalable-vector conversions and improve the codegen for
these fixed-length conversions.
Tim Northover [Fri, 28 May 2021 11:28:52 +0000 (12:28 +0100)]
SwiftAsync: add Clang attribute to apply the LLVM `swiftasync` one.
Expected to be used by Swift runtime developers.
Lei Zhang [Fri, 28 May 2021 11:21:41 +0000 (07:21 -0400)]
[mlir] Don't elide the last op if there is no terminator
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D103264
Andy Wingo [Fri, 28 May 2021 10:42:12 +0000 (12:42 +0200)]
Revert "[WebAssembly][CodeGen] IR support for WebAssembly local variables"
This reverts commit
00ecf18979e3326b3afee8af3dc701c53ffdc93f, as it
broke the AMDGPU build. Will reland later with a fix.
Tim Northover [Wed, 10 Feb 2021 14:35:16 +0000 (14:35 +0000)]
SwiftTailCC: teach verifier musttail rules applicable to this CC.
SwiftTailCC has a different set of requirements than the C calling convention
for a tail call. The exact argument sequence doesn't have to match, but fewer
ABI-affecting attributes are allowed.
Also make sure the musttail diagnostic triggers if a musttail call isn't
actually a tail call.
Tim Northover [Mon, 1 Feb 2021 10:08:40 +0000 (10:08 +0000)]
ARM: support mandatory tail calls for tailcc & swifttailcc
This adds support for callee-pop conventions to the ARM backend so that it can
ensure a call marked "tail" is actually a tail call.
dongAxis [Fri, 28 May 2021 09:50:38 +0000 (17:50 +0800)]
[NFC][Transforms][Utils] remove useless variable in CloneBasicBlock
Florian Hahn [Fri, 28 May 2021 09:32:40 +0000 (10:32 +0100)]
Revert "[LAA] Support pointer phis in loop by analyzing each incoming pointer."
This reverts commit
1ed7f8ede564c3b11da4fdca30c36ccbff422576.
This change can cause loop-distribute to crash in some cases. Revert
until I have more time to wrap up a fix.
See PR50296, PR5028 and D102266.
Sebastian Neubauer [Thu, 27 May 2021 16:32:42 +0000 (18:32 +0200)]
[AMDGPU] Fix function calls with flat scratch
When flat scratch is used, the stack pointer needs to be added when
writing arguments to the stack.
For buffer instructions, this is done in SelectMUBUFScratchOffen
and SelectMUBUFScratchOffset.
Move that to call argument lowering, like it is done in GlobalISel.
Differential Revision: https://reviews.llvm.org/D103166
Sebastian Neubauer [Wed, 26 May 2021 12:29:04 +0000 (14:29 +0200)]
[AMDGPU] Precommit test
Add scratch run to gfx-callable-argument-types.ll.
Andy Wingo [Wed, 21 Apr 2021 13:41:48 +0000 (15:41 +0200)]
[WebAssembly][CodeGen] IR support for WebAssembly local variables
This patch adds TargetStackID::WasmLocal. This stack holds locations of
values that are only addressable by name -- not via a pointer to memory.
For the WebAssembly target, these objects are lowered to WebAssembly
local variables, which are managed by the WebAssembly run-time and are
not addressable by linear memory.
For the WebAssembly target IR indicates that an AllocaInst should be put
on TargetStackID::WasmLocal by putting it in the non-integral address
space WASM_ADDRESS_SPACE_WASM_VAR, with value 1. SROA will mostly lift
these allocations to SSA locals, but any alloca that reaches instruction
selection (usually in non-optimized builds) will be assigned the new
TargetStackID there. Loads and stores to those values are transformed
to new WebAssemblyISD::LOCAL_GET / WebAssemblyISD::LOCAL_SET nodes,
which then lower to the type-specific LOCAL_GET_I32 etc instructions via
tablegen patterns.
Differential Revision: https://reviews.llvm.org/D101140
Vitaly Buka [Fri, 28 May 2021 06:05:35 +0000 (23:05 -0700)]
[cmake][scudo] Add missing headers
Vitaly Buka [Fri, 28 May 2021 08:57:55 +0000 (01:57 -0700)]
[NFC][scudo] Re-enable check in the test
It should pass with patched QEMU.
Vitaly Buka [Fri, 28 May 2021 08:53:42 +0000 (01:53 -0700)]
Revert "[scudo] Check if MADV_DONTNEED zeroes memory"
This reverts commit
d423509b8036c29bbf94dab192d12097555ce0f8.
We are going to use patched QEMU.
Martin Storsjö [Thu, 20 May 2021 20:45:21 +0000 (23:45 +0300)]
[clang] [MinGW] Fix gcc version detection/picking
Actually compare each version to the version of the last chosen one.
There's no guarantee that the added test case does showcase the
previous issue (it depends on the order that directory entries
are returned when iterating), but with the issue fixed it should behave
deterministically in any case.
Also improve the match patterns in the mingw-sysroot.cpp test a bit.
Differential Revision: https://reviews.llvm.org/D102873
Yang Fan [Fri, 28 May 2021 08:15:12 +0000 (16:15 +0800)]
[ConstantFolding] Fix -Wunused-variable warning (NFC)
GCC warning:
```
/llvm-project/llvm/lib/Analysis/ConstantFolding.cpp: In function ‘llvm::Constant* llvm::ConstantFoldLoadFromConstPtr(llvm::Constant*, llvm::Type*, const llvm::DataLayout&)’:
/llvm-project/llvm/lib/Analysis/ConstantFolding.cpp:713:19: warning: unused variable ‘SimplifiedGEP’ [-Wunused-variable]
713 | if (auto *SimplifiedGEP = dyn_cast<GEPOperator>(Simplified)) {
| ^~~~~~~~~~~~~
```
eopXD [Fri, 28 May 2021 07:51:04 +0000 (07:51 +0000)]
Revert "[LoopNest][LoopFlatten] Change LoopFlattenPass to LoopNest pass"
This reverts commit
7952ddb21fb7e086d5a6f97767f235d2f6ae2176.
Differential Revision: https://reviews.llvm.org/D103302
eopXD [Fri, 28 May 2021 07:48:04 +0000 (07:48 +0000)]
Revert "[LoopNest][LoopFlatten] Change LoopFlattenPass to LoopNest pass"
This reverts commit
ffc4d3e06855550a8bd2a691f6d05828d5bf4ddf.
KareemErgawy [Fri, 28 May 2021 06:49:45 +0000 (08:49 +0200)]
[MLIR][SPIRV] Use getAsmResultName(...) hook for ConstantOp.
Implements better naming for results of `spv.Constant` ops by making it
inherit from OpAsmOpInterface and implementing the associated
getAsmResultName(...) hook.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D103152
eopXD [Fri, 28 May 2021 07:19:46 +0000 (07:19 +0000)]
[LoopNest][LoopFlatten] Change LoopFlattenPass to LoopNest pass
This patch changes LoopFlattenPass from FunctionPass to LoopNestPass.
Utilize LoopNest and let function 'Flatten' generate information from it.
Reviewed By: Whitney
Differential Revision: https://reviews.llvm.org/D102904
eopXD [Fri, 28 May 2021 06:58:10 +0000 (06:58 +0000)]
[LoopNest][LoopFlatten] Change LoopFlattenPass to LoopNest pass
This patch changes LoopFlattenPass from FunctionPass to LoopNestPass.
Utilize LoopNest and let function 'Flatten' generate information from it.
Reviewed By: Whitney
Differential Revision: https://reviews.llvm.org/D102904
Amara Emerson [Thu, 27 May 2021 06:28:44 +0000 (23:28 -0700)]
[AArch64][GlobalISel] Legalize oversize G_EXTRACT_VECTOR_ELT sources.
Also changes the fewerElements helper to use the lookthrough constant helper
instead of m_ICst, since m_ICst doesn't look through extends.
Differential Revision: https://reviews.llvm.org/D103227
Max Kazantsev [Fri, 28 May 2021 04:05:30 +0000 (11:05 +0700)]
Revert "[NFCI] Lazily evaluate SCEVs of PHIs"
This reverts commit
51d334a845a082338735b0fdfc620a4b15fa26fe.
Reported failures, need to analyze.
Reid Kleckner [Thu, 27 May 2021 21:32:48 +0000 (14:32 -0700)]
Pass -gcodeview-ghash when using clang-cl and lld-link
This precomputes some hashes that LLD uses for type merging to speed up
linking when PDBs are enabled. Only do this if any kind of /DEBUG flag
is passed to the linker. -gcodeview-ghash is orthogonal to /Z7, -g, -g1,
or -gmlt, so it is safe to set it independently from those flags. It
will not increase debug info emission.
Differential Revision: https://reviews.llvm.org/D103287
Zequan Wu [Thu, 27 May 2021 23:38:09 +0000 (16:38 -0700)]
[clang-cl] Bump default -fms-compatibility-version to 19.14
MSVC required version is 19.14 now (https://reviews.llvm.org/D92515). Update the
default -fms-compatibility-version to 19.14.
Differential Revision: https://reviews.llvm.org/D103293
Reid Kleckner [Fri, 28 May 2021 02:48:53 +0000 (19:48 -0700)]
[PDB] Fix ubsan complaint about memcpy from null pointer
Jinsong Ji [Fri, 28 May 2021 02:18:12 +0000 (02:18 +0000)]
[AIX] Enable stackprotect feature
AIX use `__ssp_canary_word` instead of `__stack_chk_guard`.
This patch update the target hook to use correct symbol,
so that the basic stackprotect feature can work.
The traceback will be handled in follow up patch.
Reviewed By: #powerpc, shchenz
Differential Revision: https://reviews.llvm.org/D103100
Jianzhou Zhao [Wed, 26 May 2021 22:51:54 +0000 (22:51 +0000)]
[dfsan] Add a flag about whether to propagate offset labels at gep
DFSan has flags to control flows between pointers and objects referred
by pointers. For example,
a = *p;
L(a) = L(*p) when -dfsan-combine-pointer-labels-on-load = false
L(a) = L(*p) + L(p) when -dfsan-combine-pointer-labels-on-load = true
*p = b;
L(*p) = L(b) when -dfsan-combine-pointer-labels-on-store = false
L(*p) = L(b) + L(p) when -dfsan-combine-pointer-labels-on-store = true
The question is what to do with p += c.
In practice we found many confusing flows if we propagate labels from c
to p. So a new flag works like this
p += c;
L(p) = L(p) when -dfsan-propagate-via-pointer-arithmetic = false
L(p) = L(p) + L(c) when -dfsan-propagate-via-pointer-arithmetic = true
Reviewed-by: gbalats
Differential Revision: https://reviews.llvm.org/D103176
Mehdi Amini [Fri, 28 May 2021 00:02:36 +0000 (00:02 +0000)]
Fix comment to reflect what the method is doing (NFC)
Jordan Rupprecht [Thu, 27 May 2021 23:48:40 +0000 (16:48 -0700)]
[NFC][libObject] clang-format Archive{.h,.cpp}
In preparation for D100651
Andrea Di Biagio [Thu, 27 May 2021 23:14:29 +0000 (00:14 +0100)]
[MCA] Minor changes to the InOrderIssueStage. NFC
The constructor of InOrderIssueStage no longer takes as input a reference to the
target scheduling model. The stage can always query the subtarget to obtain a
reference to the scheduling model.
The ResourceManager is no longer stored internally as a unique_ptr.
Moved a couple of method definitions to the .cpp file.
Arthur Eubanks [Thu, 22 Apr 2021 19:04:14 +0000 (12:04 -0700)]
[ConstFold] Simplify a load's GEP operand through local aliases
MSVC-style RTTI produces loads through a GEP of a local alias which
itself is a GEP. Currently we aren't able to devirtualize any virtual
calls when MSVC RTTI is enabled.
This patch attempts to simplify a load's GEP operand by calling
SymbolicallyEvaluateGEP() with an option to look through local aliases.
Differential Revision: https://reviews.llvm.org/D101100
Craig Topper [Thu, 27 May 2021 22:20:02 +0000 (15:20 -0700)]
[RISCV] Teach VSETVLI insertion to look through PHIs to prove we don't need to insert a vsetvli.
If an instruction's AVL operand is a PHI node in the same block,
we may be able to peek through the PHI to find vsetvli instructions
that produce the AVL in other basic blocks. If we can prove those
vsetvli instructions have the same VTYPE and were the last vsetvli
in their respective blocks, then we don't need to insert a vsetvli
for this pseudo instruction.
Reviewed By: rogfer01
Differential Revision: https://reviews.llvm.org/D103277
Arthur Eubanks [Thu, 27 May 2021 21:54:45 +0000 (14:54 -0700)]
[SanCov] Properly set ABI parameter attributes
Arguments need to have the proper ABI parameter attributes set.
Followup to D101806.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D103288
Roman Lebedev [Thu, 27 May 2021 21:57:15 +0000 (00:57 +0300)]
[NFC][X86][Codegen] Re-autogenerate a few tests to reduce noise in future changes
Aart Bik [Thu, 27 May 2021 20:33:32 +0000 (13:33 -0700)]
[mlir][capi] fix build issue with "all passes" registration
Some builds exposed missing dependences on trafo/conv passes.
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D103283
Ryan Prichard [Thu, 27 May 2021 21:53:49 +0000 (14:53 -0700)]
[sanitizer] Android ELF TLS is supported from Q (API 29)
Reviewed By: oontvoo, MaskRay
Differential Revision: https://reviews.llvm.org/D103214
River Riddle [Thu, 27 May 2021 21:42:20 +0000 (14:42 -0700)]
[mlir-lsp-server] Add support for processing split files
MLIR tools very commonly use `// -----` to split a file into distinct sub documents, that are processed separately. This revision adds support to mlir-lsp-server for splitting MLIR files based on this sigil, and processing them separately.
Differential Revision: https://reviews.llvm.org/D102660
Andrea Di Biagio [Thu, 27 May 2021 20:50:57 +0000 (21:50 +0100)]
[MCA] Refactor the InOrderIssueStage stage. NFCI
Moved the logic that checks for RAW hazards from the InOrderIssueStage to the
RegisterFile.
Changed how the InOrderIssueStage keeps track of backend stalls. Stall events
are now generated from method notifyStallEvent().
No functional change intended.
Quinn Pham [Thu, 27 May 2021 18:35:12 +0000 (13:35 -0500)]
[PowerPC] Added multiple PowerPC builtins
This is the first in a series of patches to provide builtins for
compatibility with the XL compiler. Most of the builtins already had
intrinsics and only needed to be implemented in the front end.
Intrinsics were created for the three iospace builtins, eieio, and icbt.
Pseudo instructions were created for eieio and iospace_eieio to
ensure that nops were inserted before the eieio instruction.
Reviewed By: nemanjai, #powerpc
Differential Revision: https://reviews.llvm.org/D102443
Reid Kleckner [Thu, 20 May 2021 23:18:18 +0000 (16:18 -0700)]
[PDB] Enable parallel ghash type merging by default
Ghashing is probably going to be faster in most cases, even without
precomputed ghashes in object files.
Here is my table of results linking clang.pdb:
-------------------------------
| threads | GHASH | NOGHASH |
-------------------------------
| j1 | 51.031s | 25.141s |
| j2 | 31.079s | 22.109s |
| j4 | 18.609s | 23.156s |
| j8 | 11.938s | 21.984s |
| j28 | 8.375s | 18.391s |
-------------------------------
This shows that ghashing is faster if at least four cores are available.
This may make the linker slower if most cores are busy in the middle of
a build, but in that case, the linker probably isn't on the critical
path of the build. Incremental build performance is arguably more
important than highly contended batch build link performance.
The -time output indicates that ghash computation is the dominant
factor:
Input File Reading: 924 ms ( 1.8%)
GC: 689 ms ( 1.3%)
ICF: 527 ms ( 1.0%)
Code Layout: 414 ms ( 0.8%)
Commit Output File: 24 ms ( 0.0%)
PDB Emission (Cumulative): 49938 ms ( 94.8%)
Add Objects: 46783 ms ( 88.8%)
Global Type Hashing: 38983 ms ( 74.0%)
GHash Type Merging: 5640 ms ( 10.7%)
Symbol Merging: 2154 ms ( 4.1%)
Publics Stream Layout: 188 ms ( 0.4%)
TPI Stream Layout: 18 ms ( 0.0%)
Commit to Disk: 2818 ms ( 5.4%)
--------------------------------------------------
Total Link Time: 52669 ms (100.0%)
We can speed that up with a faster content hash (not SHA1).
Differential Revision: https://reviews.llvm.org/D102888