platform/kernel/linux-exynos.git
8 years agodrm/amd/powerplay: fix spelling mistake and add KERN_WARNING to printks
Colin Ian King [Mon, 24 Oct 2016 23:14:12 +0000 (00:14 +0100)]
drm/amd/powerplay: fix spelling mistake and add KERN_WARNING to printks

Fix trivial spelling mistake cant't -> can't and add KERN_WARNING to
printk messages.  Remove redundant spaces before \n too (thanks to
Joe Perches for spotting those).

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu:new ids flag for preempt
Monk Liu [Mon, 24 Oct 2016 03:36:17 +0000 (11:36 +0800)]
drm/amdgpu:new ids flag for preempt

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: mark symbols static where possible
Baoyou Xie [Sat, 22 Oct 2016 08:48:26 +0000 (16:48 +0800)]
drm/amdgpu: mark symbols static where possible

We get 2 warnings when building kernel with W=1:
drivers/gpu/drm/amd/amdgpu/si.c:908:5: warning: no previous prototype for 'si_pciep_rreg' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/si.c:921:6: warning: no previous prototype for 'si_pciep_wreg' [-Wmissing-prototypes]

In fact, both functions are only used in the file in which they are
declared and don't need a declaration, but can be made static.
So this patch marks these functions with 'static'.

Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: change function declarations and add missing header dependencies
Baoyou Xie [Sat, 22 Oct 2016 08:48:25 +0000 (16:48 +0800)]
drm/amdgpu: change function declarations and add missing header dependencies

We get a few warnings when building kernel with W=1:
drivers/gpu/drm/amd/amdgpu/atombios_crtc.c:38:6: warning: no previous prototype for 'amdgpu_atombios_crtc_overscan_setup' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c:661:6: warning: no previous prototype for 'dce_v8_0_disable_dce' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:40:5: warning: no previous prototype for 'amdgpu_gfx_scratch_get' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:62:6: warning: no previous prototype for 'amdgpu_gfx_scratch_free' [-Wmissing-prototypes]
....

In fact, these functions are declared in
drivers/gpu/drm/amd/amdgpu/atombios_crtc.h
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
drivers/gpu/drm/amd/amdgpu/dce_v8_0.h
drivers/gpu/drm/amd/amdgpu/dce_v10_0.h
drivers/gpu/drm/amd/amdgpu/dce_v11_0.h
drivers/gpu/drm/amd/powerplay/inc/pp_acpi.h.
So this patch adds missing header dependencies.

By the way, this patch changes declaration of amdgpu_gfx_parse_disable_cu()
to subject to its implement, and clean three function declarations
in pp_acpi.h up.

Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: s/amdgpuCrtc/amdgpu_crtc/ in pageflip code
Alex Deucher [Fri, 21 Oct 2016 20:36:12 +0000 (16:36 -0400)]
drm/amdgpu: s/amdgpuCrtc/amdgpu_crtc/ in pageflip code

Fix random CamelCase that has annoyed me for a while.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/atom: remove a bunch of unused functions
Alex Deucher [Fri, 21 Oct 2016 19:54:18 +0000 (15:54 -0400)]
drm/amdgpu/atom: remove a bunch of unused functions

Leftovers from the radeon.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: consolidate atom scratch reg handling for hangs
Alex Deucher [Fri, 21 Oct 2016 19:45:22 +0000 (15:45 -0400)]
drm/amdgpu: consolidate atom scratch reg handling for hangs

Move from asic specific code to common atom code.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use amdgpu_bo_[create|free]_kernel for wb
Alex Deucher [Fri, 21 Oct 2016 19:30:36 +0000 (15:30 -0400)]
drm/amdgpu: use amdgpu_bo_[create|free]_kernel for wb

Rather than open coding it.

Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add VCE VM session tracking
Christian König [Mon, 10 Oct 2016 13:23:32 +0000 (15:23 +0200)]
drm/amdgpu: add VCE VM session tracking

Fix the problems with killing VCE sessions in VM mode.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: improve parse_cs handling a bit
Christian König [Wed, 5 Oct 2016 14:49:19 +0000 (16:49 +0200)]
drm/amdgpu: improve parse_cs handling a bit

This way we can use parse_cs and still keep VM mode enabled.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: refine set power state logic for dpm.
Rex Zhu [Fri, 14 Oct 2016 11:23:34 +0000 (19:23 +0800)]
drm/amdgpu: refine set power state logic for dpm.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: update current ps/requeset ps in adev with real ps.
Rex Zhu [Fri, 14 Oct 2016 11:29:02 +0000 (19:29 +0800)]
drm/amdgpu: update current ps/requeset ps in adev with real ps.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add an implement for check_power_state equal for KV
Alex Deucher [Mon, 24 Oct 2016 19:50:17 +0000 (15:50 -0400)]
drm/amdgpu: add an implement for check_power_state equal for KV

KV/KB/ML was missed these was implemented for other asics.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add an implement for check_power_state equal for Si.
Rex Zhu [Fri, 14 Oct 2016 11:39:52 +0000 (19:39 +0800)]
drm/amdgpu: add an implement for check_power_state equal for Si.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add an implement for check_power_state equal for Cz.
Rex Zhu [Fri, 14 Oct 2016 11:30:08 +0000 (19:30 +0800)]
drm/amdgpu: add an implement for check_power_state equal for Cz.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add an implement for check_power_state equal for CI
Rex Zhu [Fri, 14 Oct 2016 11:16:54 +0000 (19:16 +0800)]
drm/amdgpu: add an implement for check_power_state equal for CI

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add new callback to check power state info
Rex Zhu [Mon, 17 Oct 2016 05:49:27 +0000 (13:49 +0800)]
drm/amdgpu: add new callback to check power state info

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: check min clock set by DAL before set ps.
Rex Zhu [Wed, 12 Oct 2016 12:05:03 +0000 (20:05 +0800)]
drm/amdgpu: check min clock set by DAL before set ps.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Put in rest of wave fields
Tom St Denis [Fri, 14 Oct 2016 14:50:46 +0000 (10:50 -0400)]
drm/amd/amdgpu: Put in rest of wave fields

Add the rest of the basic SQ WAVE fields to
finish off the implementation.  Eventually,
a separate interface will be needed for GPRs.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: re-factor debugfs wave reader
Tom St Denis [Fri, 14 Oct 2016 13:49:09 +0000 (09:49 -0400)]
drm/amd/amdgpu: re-factor debugfs wave reader

Move IP version specific code into a callback.

Also add support for gfx7 devices.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Make debugfs write compliment read
Tom St Denis [Mon, 10 Oct 2016 11:31:23 +0000 (07:31 -0400)]
drm/amd/amdgpu: Make debugfs write compliment read

Add PG lock support as well as bank selection to
the MMIO write function.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Allow broadcast on debugfs read (v2)
Tom St Denis [Sun, 9 Oct 2016 11:41:26 +0000 (07:41 -0400)]
drm/amd/amdgpu: Allow broadcast on debugfs read (v2)

Allow any of the se/sh/instance fields to be
specified as a broadcast by submitting 0x3FF.

(v2) Fix broadcast range checking

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Fix debugfs wave reader
Tom St Denis [Thu, 13 Oct 2016 16:15:03 +0000 (12:15 -0400)]
drm/amd/amdgpu: Fix debugfs wave reader

On non VI/CZ platforms it would not free
the grbm index lock.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Add wave reader to debugfs
Tom St Denis [Tue, 11 Oct 2016 18:48:55 +0000 (14:48 -0400)]
drm/amd/amdgpu: Add wave reader to debugfs

Currently supports CZ/VI.  Allows nearly atomic read
of wave data from GPU.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: rework IP block registration (v2)
Alex Deucher [Thu, 13 Oct 2016 21:41:13 +0000 (17:41 -0400)]
drm/amdgpu: rework IP block registration (v2)

This makes it easier to replace specific IP blocks on
asics for handling virtual_dce, DAL, etc. and for building
IP lists for hw or tables.  This also stored the status
information in the same structure.

v2: split out spelling fix into a separate patch
    add a function to add IPs to the list

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/powerplay: fix spelling in amdgpu_powerplay.h
Alex Deucher [Fri, 14 Oct 2016 15:27:15 +0000 (11:27 -0400)]
drm/amdgpu/powerplay: fix spelling in amdgpu_powerplay.h

and update a comment as well.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/virtual_dce: move define into source file
Alex Deucher [Thu, 13 Oct 2016 21:36:46 +0000 (17:36 -0400)]
drm/amdgpu/virtual_dce: move define into source file

It's not used outside the file.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: enable virtual dce on SI
Alex Deucher [Thu, 13 Oct 2016 20:01:18 +0000 (16:01 -0400)]
drm/amdgpu: enable virtual dce on SI

Add the proper IP module when requested.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: fill in vce clock info ioctl query (v2)
Alex Deucher [Fri, 7 Oct 2016 16:22:02 +0000 (12:22 -0400)]
drm/amdgpu: fill in vce clock info ioctl query (v2)

Returns the vce clock table for the user mode driver.
The user mode driver can fill this data into vce clock
data packet for optimal VCE DPM.

v2: update to the new API

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/powerplay: add an implementation for get_vce_clock_state (v3)
Alex Deucher [Fri, 7 Oct 2016 17:52:43 +0000 (13:52 -0400)]
drm/amdgpu/powerplay: add an implementation for get_vce_clock_state (v3)

Used by the powerplay dpm code.

v2: update to the new API
v3: drop old include

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/dpm: add an implementation for get_vce_clock_state (v2)
Alex Deucher [Fri, 7 Oct 2016 16:38:04 +0000 (12:38 -0400)]
drm/amdgpu/dpm: add an implementation for get_vce_clock_state (v2)

Used by the non-powerplay dpm code.

v2: update to the new API

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/dpm: add new callback to fetch vce clock state (v2)
Alex Deucher [Fri, 7 Oct 2016 18:10:15 +0000 (14:10 -0400)]
drm/amdgpu/dpm: add new callback to fetch vce clock state (v2)

Will be used by the new info ioctl query.

v2: fetch a single state per request

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add info ioctl query for vce clock info (v3)
Alex Deucher [Fri, 7 Oct 2016 16:12:46 +0000 (12:12 -0400)]
drm/amdgpu: add info ioctl query for vce clock info (v3)

This is needed to set up the vce clock table in userspace
for proper VCE DPM.

v2: fix copy paste typo in comment
v3: track number of valid states

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: save number of vce states in dpm struct.
Rex Zhu [Wed, 12 Oct 2016 07:38:56 +0000 (15:38 +0800)]
drm/amdgpu: save number of vce states in dpm struct.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use same vce state definition in dpm and powerplay
Rex Zhu [Wed, 12 Oct 2016 07:13:29 +0000 (15:13 +0800)]
drm/amdgpu: use same vce state definition in dpm and powerplay

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move dpm related definitions to amdgpu_dpm.h
Alex Deucher [Fri, 7 Oct 2016 15:40:09 +0000 (11:40 -0400)]
drm/amdgpu: move dpm related definitions to amdgpu_dpm.h

No intended functional change.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move align_mask and nop into ring funcs as well (v2)
Christian König [Wed, 5 Oct 2016 14:09:32 +0000 (16:09 +0200)]
drm/amdgpu: move align_mask and nop into ring funcs as well (v2)

They are constant as well.

v2: update uvd and vce phys ring structures as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move the ring type into the funcs structure (v2)
Christian König [Wed, 5 Oct 2016 13:36:39 +0000 (15:36 +0200)]
drm/amdgpu: move the ring type into the funcs structure (v2)

It's constant, so it doesn't make to much sense to keep it
with the variable data.

v2: update vce and uvd phys mode ring structures as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move IB and frame size directly into the engine description
Christian König [Wed, 5 Oct 2016 12:29:38 +0000 (14:29 +0200)]
drm/amdgpu: move IB and frame size directly into the engine description

I should have suggested that on the initial patchset. This saves us a
few CPU cycles during CS and a bunch of loc.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove explicit NULL init for parse_cs
Christian König [Wed, 5 Oct 2016 12:23:00 +0000 (14:23 +0200)]
drm/amdgpu: remove explicit NULL init for parse_cs

sed -i "/\.parse_cs = NULL,/d" drivers/gpu/drm/amd/amdgpu/*.c

That's just a leftover from radeon.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove 128 NOP hack from vm_flush v2
Christian König [Wed, 5 Oct 2016 10:59:20 +0000 (12:59 +0200)]
drm/amdgpu: remove 128 NOP hack from vm_flush v2

With the padding raised to 256 DW that shouldn't be needed any more.

v2: reduce estimation as well

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove ring type check for conditional execution
Christian König [Wed, 5 Oct 2016 10:51:57 +0000 (12:51 +0200)]
drm/amdgpu: remove ring type check for conditional execution

If a ring doesn't support that it shouldn't implement the function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: pad gfx and compute rings to 256 dw
Christian König [Wed, 5 Oct 2016 10:38:21 +0000 (12:38 +0200)]
drm/amdgpu: pad gfx and compute rings to 256 dw

The same as on windows to avoid further problems with CE/DE
command submission overlaps.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: clarify why we evict vram twice on suspend
Alex Deucher [Mon, 10 Oct 2016 16:42:33 +0000 (12:42 -0400)]
drm/radeon: clarify why we evict vram twice on suspend

Update the comment to explain why we do this.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: clarify why we evict vram twice on suspend
Alex Deucher [Mon, 10 Oct 2016 16:41:36 +0000 (12:41 -0400)]
drm/amdgpu: clarify why we evict vram twice on suspend

Update the comment to explain why we do this.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: used cached gca values for vi_read_register (v2)
Alex Deucher [Mon, 10 Oct 2016 16:05:32 +0000 (12:05 -0400)]
drm/amdgpu: used cached gca values for vi_read_register (v2)

Using the cached values has less latency for bare metal
and SR-IOV, and prevents reading back bogus values if the
engine is powergated.

v2: fix typo in tile idx calculation

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: use cached raster config values in csb setup
Alex Deucher [Mon, 10 Oct 2016 15:17:58 +0000 (11:17 -0400)]
drm/amdgpu/gfx8: use cached raster config values in csb setup

Simplify the code and properly set the csb for harvest values.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: cache rb config values
Alex Deucher [Mon, 10 Oct 2016 15:15:24 +0000 (11:15 -0400)]
drm/amdgpu/gfx8: cache rb config values

Needed when for SR-IOV and when PG is enabled.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add additional cached gca config variables
Alex Deucher [Mon, 10 Oct 2016 14:56:21 +0000 (10:56 -0400)]
drm/amdgpu: add additional cached gca config variables

We need to cache some additional values to handle SR-IOV
and PG.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use amdgpu_vm_get_pd_bo in the GEM code
Christian König [Wed, 28 Sep 2016 14:33:01 +0000 (16:33 +0200)]
drm/amdgpu: use amdgpu_vm_get_pd_bo in the GEM code

Instead of messing with the PD directly.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move VM defines into amdgpu_vm.h
Christian König [Wed, 28 Sep 2016 13:41:50 +0000 (15:41 +0200)]
drm/amdgpu: move VM defines into amdgpu_vm.h

Only cleanup, no intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move fence and ring defines into amdgpu_ring.h
Christian König [Wed, 28 Sep 2016 13:33:18 +0000 (15:33 +0200)]
drm/amdgpu: move fence and ring defines into amdgpu_ring.h

Only cleanup, no intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move sync handling into a separate header
Christian König [Wed, 28 Sep 2016 10:36:44 +0000 (12:36 +0200)]
drm/amdgpu: move sync handling into a separate header

Only cleanup, no intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: stop using a bo list entry for the VM PTs
Christian König [Wed, 28 Sep 2016 10:27:37 +0000 (12:27 +0200)]
drm/amdgpu: stop using a bo list entry for the VM PTs

Saves us a bit of memory.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move PT validation back into VM code v2
Christian König [Wed, 28 Sep 2016 10:03:04 +0000 (12:03 +0200)]
drm/amdgpu: move PT validation back into VM code v2

Saves a bunch of CPU cycles when swapping things back in and
allows us to split the VM headers into a separate file.

v2: rename parameters

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove adev pointer from struct amdgpu_bo v2
Christian König [Thu, 15 Sep 2016 12:58:48 +0000 (14:58 +0200)]
drm/amdgpu: remove adev pointer from struct amdgpu_bo v2

It's completely pointless to have two pointers to the
device in the same structure.

v2: rename function to amdgpu_ttm_adev, fix typos

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Enable UVD PG on Tonga
Tom St Denis [Fri, 30 Sep 2016 15:00:16 +0000 (11:00 -0400)]
drm/amd/amdgpu: Enable UVD PG on Tonga

Tested by reading tile/clk bits during load/idle.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: Enable UVD powergating for SMU7
Tom St Denis [Fri, 30 Sep 2016 14:58:44 +0000 (10:58 -0400)]
drm/amd/powerplay: Enable UVD powergating for SMU7

This patch enables detecting VCE/UVD PG features and fixes the
UVD powergate function.

Tested on a Tonga (by reading UVD tile/clk bits during playback/idle).

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: update the shadow PD together with the real one v2
Christian König [Fri, 16 Sep 2016 13:36:49 +0000 (15:36 +0200)]
drm/amdgpu: update the shadow PD together with the real one v2

Far less CPU cycles needed for this approach.

v2: fix typo

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu:wptr poll address of gfx8 is needed
Frank Min [Wed, 27 Apr 2016 11:44:56 +0000 (19:44 +0800)]
drm/amdgpu:wptr poll address of gfx8 is needed

for GFX8, gfx ring's wptr_addr is needed by SRIOV & CP for polling.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu:properly fix some JumpTable issues
Monk Liu [Tue, 27 Sep 2016 08:39:58 +0000 (16:39 +0800)]
drm/amdgpu:properly fix some JumpTable issues

we found some MEC ucode leads to IB test fail or even
ring test fail if Jump Table of it is not start in
FW bo with page aligned address, fixed by always make
JT address page aligned.

we don't need to patch JT2 for MEC2, because for VI,
MEC2 is a copy of MEC1, thus when converting fw_type
for MEC_JT2 we just return MEC1,hw can use the same
JT for both MEC1 & MEC2.

above two change fixed some ring/ib test failure issue
for some version of MEC ucode.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu:add MEC_STORAGE ucode id for sriov
Monk Liu [Mon, 26 Sep 2016 08:35:03 +0000 (16:35 +0800)]
drm/amdgpu:add MEC_STORAGE ucode id for sriov

for sriov, SMC need MEC_STORAGE reserved in fw bo.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Frank Min <frank.min@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu:add callback in cgs for sriov detect
Frank Min [Wed, 27 Apr 2016 12:04:58 +0000 (20:04 +0800)]
drm/amdgpu:add callback in cgs for sriov detect

Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu:fw bo should be in VRAM for SRIOV
Frank Min [Wed, 27 Apr 2016 12:02:57 +0000 (20:02 +0800)]
drm/amdgpu:fw bo should be in VRAM for SRIOV

for GTT memory SMC can only access it within PF space, which is not
used for SRIOV case, thus for SRIOV case, we let SMC use FB space for
ucode bo.

Signed-off-by: Frank Min <frank.min@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu:keep bo pinned in prefered domain
Frank Min [Wed, 27 Apr 2016 10:33:35 +0000 (18:33 +0800)]
drm/amdgpu:keep bo pinned in prefered domain

Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu:use smc_index_11 for VI
Monk Liu [Tue, 29 Mar 2016 03:01:51 +0000 (11:01 +0800)]
drm/amdgpu:use smc_index_11 for VI

for VI smc, index_0 to index_8 are all not safe,
they may used by BIOS/FW, and index_11 is reserved
only for driver.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu:add one more fiji device id
Frank Min [Wed, 27 Apr 2016 11:07:18 +0000 (19:07 +0800)]
drm/amdgpu:add one more fiji device id

Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: mark symbols static where possible
Baoyou Xie [Fri, 30 Sep 2016 09:58:42 +0000 (17:58 +0800)]
drm/amd/powerplay: mark symbols static where possible

We get a few warnings when building kernel with W=1:
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smumgr.c:162:5: warning: no previous prototype for 'fiji_setup_pwr_virus' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smc.c:2052:5: warning: no previous prototype for 'fiji_program_mem_timing_parameters' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/polaris10_smumgr.c:175:5: warning: no previous prototype for 'polaris10_avfs_event_mgr' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_hwmgr.c:69:10: warning: no previous prototype for 'cz_get_eclk_level' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:92:26: warning: no previous prototype for 'cast_phw_smu7_power_state' [-Wmissing-prototypes]
....

In fact, these functions are only used in the file in which they are
declared and don't need a declaration, but can be made static.
So this patch marks these functions with 'static'.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: mark symbols static where possible
Baoyou Xie [Fri, 30 Sep 2016 08:13:02 +0000 (16:13 +0800)]
drm/radeon: mark symbols static where possible

We get 4 warnings when building kernel with W=1:
drivers/gpu/drm/radeon/si.c:7850:5: warning: no previous prototype for 'si_vce_send_vcepll_ctlreq' [-Wmissing-prototypes]
drivers/gpu/drm/radeon/radeon_dp_mst.c:226:21: warning: no previous prototype for 'radeon_mst_best_encoder' [-Wmissing-prototypes]
drivers/gpu/drm/radeon/radeon_dp_mst.c:344:26: warning: no previous prototype for 'radeon_mst_find_connector' [-Wmissing-prototypes]
drivers/gpu/drm/radeon/radeon_dp_mst.c:600:6: warning: no previous prototype for 'radeon_dp_mst_encoder_destroy' [-Wmissing-prototypes]

In fact, these functions are only used in the file in which they are
declared and don't need a declaration, but can be made static.
So this patch marks these functions with 'static'.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: add missing header dependencies
Baoyou Xie [Fri, 30 Sep 2016 08:13:01 +0000 (16:13 +0800)]
drm/radeon: add missing header dependencies

We get a few warnings when building kernel with W=1:
drivers/gpu/drm/radeon/radeon_clocks.c:35:10: warning: no previous prototype for 'radeon_legacy_get_engine_clock' [-Wmissing-prototypes]
drivers/gpu/drm/radeon/atombios_encoders.c:75:1: warning: no previous prototype for 'atombios_get_backlight_level' [-Wmissing-prototypes]
drivers/gpu/drm/radeon/r600_cs.c:2268:5: warning: no previous prototype for 'r600_cs_parse' [-Wmissing-prototypes]
drivers/gpu/drm/radeon/evergreen_cs.c:2671:5: warning: no previous prototype for 'evergreen_cs_parse' [-Wmissing-prototypes]
....

In fact, these functions are declared
in drivers/gpu/drm/radeon/radeon_asic.h,
so this patch adds missing header dependencies.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: bump version for memory query info
Junwei Zhang [Wed, 28 Sep 2016 05:27:15 +0000 (13:27 +0800)]
drm/amd/amdgpu: bump version for memory query info

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: unify memory query info interface
Junwei Zhang [Thu, 29 Sep 2016 01:39:10 +0000 (09:39 +0800)]
drm/amd/amdgpu: unify memory query info interface

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add VRAM manager v2
Christian König [Wed, 24 Aug 2016 13:51:49 +0000 (15:51 +0200)]
drm/amdgpu: add VRAM manager v2

Split VRAM allocations into 4MB blocks.

v2: fix typo in comment, some suggested cleanups
v3: document how to disable the feature, fix rebase issue

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: enable amdgpu_move_blit to handle multiple MM nodes v2
Christian König [Wed, 17 Aug 2016 08:46:52 +0000 (10:46 +0200)]
drm/amdgpu: enable amdgpu_move_blit to handle multiple MM nodes v2

This allows us to move scattered buffers around.

v2: fix a couple of typos, handle scattered to scattered moves as well.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: handle multiple MM nodes in the VMs v2
Christian König [Tue, 16 Aug 2016 15:38:37 +0000 (17:38 +0200)]
drm/amdgpu: handle multiple MM nodes in the VMs v2

This allows us to map scattered VRAM BOs to the VMs.

v2: fix offset handling, use pfn instead of offset,
    fix PAGE_SIZE != AMDGPU_GPU_PAGE_SIZE case

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: set at least the node size in the gtt manager
Christian König [Wed, 14 Sep 2016 08:35:19 +0000 (10:35 +0200)]
drm/amdgpu: set at least the node size in the gtt manager

Otherwise the new VM code becomes confused.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use explicit limit for VRAM_CONTIGUOUS
Christian König [Wed, 24 Aug 2016 12:30:21 +0000 (14:30 +0200)]
drm/amdgpu: use explicit limit for VRAM_CONTIGUOUS

Split VRAM won't have a valid offset, so just set an explicit limit
when the flag is given to trigger reallocation if necessary.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS flag v3
Christian König [Mon, 15 Aug 2016 15:00:22 +0000 (17:00 +0200)]
drm/amdgpu: add AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS flag v3

Add a flag noting that a BO must be created using linear VRAM
and set this flag on all in kernel users where appropriate.

Hopefully I haven't missed anything.

v2: add it in a few more places, fix CPU mapping.
v3: rename to VRAM_CONTIGUOUS, fix typo in CS code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: add info about vram and gtt max allocation size
Junwei Zhang [Wed, 21 Sep 2016 02:33:26 +0000 (10:33 +0800)]
drm/amd/amdgpu: add info about vram and gtt max allocation size

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: add info about vram and gtt total size
Junwei Zhang [Wed, 21 Sep 2016 02:17:22 +0000 (10:17 +0800)]
drm/amd/amdgpu: add info about vram and gtt total size

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/dce6: don't enable HPD Rx interrupts
Alex Deucher [Wed, 28 Sep 2016 18:23:49 +0000 (14:23 -0400)]
drm/amdgpu/dce6: don't enable HPD Rx interrupts

Not used currently.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/dce6: RMW hpd registers
Alex Deucher [Wed, 28 Sep 2016 18:21:55 +0000 (14:21 -0400)]
drm/amdgpu/dce6: RMW hpd registers

No need to hard code the entire register to just
set/clear one bit.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/dce6: simplify hpd code
Alex Deucher [Wed, 28 Sep 2016 18:15:24 +0000 (14:15 -0400)]
drm/amdgpu/dce6: simplify hpd code

Use an address offset like other dce code.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/dce11: simplify hpd code
Alex Deucher [Wed, 28 Sep 2016 17:56:50 +0000 (13:56 -0400)]
drm/amdgpu/dce11: simplify hpd code

use the hpd enum directly as an index

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/dce8: RMW hpd registers
Alex Deucher [Wed, 28 Sep 2016 17:50:27 +0000 (13:50 -0400)]
drm/amdgpu/dce8: RMW hpd registers

No need to hard code the entire register to just
set/clear one bit.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/dce10: simplify hpd code
Alex Deucher [Wed, 28 Sep 2016 17:44:00 +0000 (13:44 -0400)]
drm/amdgpu/dce10: simplify hpd code

use the hpd enum directly as an index

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/dce8: simplify hpd code
Alex Deucher [Wed, 28 Sep 2016 16:59:11 +0000 (12:59 -0400)]
drm/amdgpu/dce8: simplify hpd code

Use an address offset like other dce code.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: For virtual display, enable multi crtcs. (v3)
Emily Deng [Fri, 30 Sep 2016 17:02:18 +0000 (13:02 -0400)]
drm/amd/amdgpu: For virtual display, enable multi crtcs. (v3)

Enable multi crtcs for virtual display, user can set the number of crtcs
by amdgpu module parameter  virtual_display.

v2: make timers per crtc
v3: agd: simplify implementation

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-By: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: rename amdgpu_whether_enable_virtual_display
Alex Deucher [Fri, 30 Sep 2016 16:43:04 +0000 (12:43 -0400)]
drm/amdgpu: rename amdgpu_whether_enable_virtual_display

to match the other functions in that file.

Reviewed-By: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agoRevert "drm/amdgpu: Add virtual connector and encoder macros."
Alex Deucher [Fri, 30 Sep 2016 16:38:20 +0000 (12:38 -0400)]
Revert "drm/amdgpu: Add virtual connector and encoder macros."

This reverts commit 16925c92dbd97524655525b6816625e1f0063d12.

This is no longer necessary.

Reviewed-By: Emily Deng <Emily.Deng@amd.com>
8 years agodrm/amdgpu: simplify encoder and connector setup (v2)
Alex Deucher [Fri, 30 Sep 2016 16:37:36 +0000 (12:37 -0400)]
drm/amdgpu: simplify encoder and connector setup (v2)

No need to emulate all of the stuff for real hw.

v2: warning fix

Reviewed-By: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/virtual_dce: clean up interrupt handling
Alex Deucher [Fri, 30 Sep 2016 15:41:37 +0000 (11:41 -0400)]
drm/amdgpu/virtual_dce: clean up interrupt handling

We handle the virtual interrupts from a timer so no
need to try an look like we are handling IV ring events.

Reviewed-By: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/virtual_dce: no need to an irq process callback
Alex Deucher [Fri, 30 Sep 2016 15:23:30 +0000 (11:23 -0400)]
drm/amdgpu/virtual_dce: no need to an irq process callback

Virtual crtcs interrupts do not show up in the IV ring,
so it will never be called.

Reviewed-By: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/virtual_dce: drop pageflip_irq funcs
Alex Deucher [Fri, 30 Sep 2016 15:19:41 +0000 (11:19 -0400)]
drm/amdgpu/virtual_dce: drop pageflip_irq funcs

Never used.

Reviewed-By: Emily Deng <Emily.Deng@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/virtual_dce: drop empty function
Alex Deucher [Fri, 30 Sep 2016 03:19:25 +0000 (23:19 -0400)]
drm/amdgpu/virtual_dce: drop empty function

No need to ack non-existent interrupts.

Reviewed-By: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/virtual_dce: add dce6 support
Alex Deucher [Fri, 30 Sep 2016 03:36:12 +0000 (23:36 -0400)]
drm/amdgpu/virtual_dce: add dce6 support

disable the real dce hw if the asic supports dce.

Reviewed-By: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/dce6: add dce_v6_0_disable_dce
Alex Deucher [Fri, 30 Sep 2016 03:30:21 +0000 (23:30 -0400)]
drm/amdgpu/dce6: add dce_v6_0_disable_dce

Needed for virtual dce support

Reviewed-By: Emily Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agoMerge tag 'drm-intel-next-2016-10-24' of git://anongit.freedesktop.org/drm-intel...
Dave Airlie [Tue, 25 Oct 2016 06:36:13 +0000 (16:36 +1000)]
Merge tag 'drm-intel-next-2016-10-24' of git://anongit.freedesktop.org/drm-intel into drm-next

- first slice of the gvt device model (Zhenyu et al)
- compression support for gpu error states (Chris)
- sunset clause on gpu errors resulting in dmesg noise telling users
  how to report them
- .rodata diet from Tvrtko
- switch over lots of macros to only take dev_priv (Tvrtko)
- underrun suppression for dp link training (Ville)
- lspcon (hmdi 2.0 on skl/bxt) support from Shashank Sharma, polish
  from Jani
- gen9 wm fixes from Paulo&Lyude
- updated ddi programming for kbl (Rodrigo)
- respect alternate aux/ddc pins (from vbt) for all ddi ports (Ville)

* tag 'drm-intel-next-2016-10-24' of git://anongit.freedesktop.org/drm-intel: (227 commits)
  drm/i915: Update DRIVER_DATE to 20161024
  drm/i915: Stop setting SNB min-freq-table 0 on powersave setup
  drm/i915/dp: add lane_count check in intel_dp_check_link_status
  drm/i915: Fix whitespace issues
  drm/i915: Clean up DDI DDC/AUX CH sanitation
  drm/i915: Respect alternate_ddc_pin for all DDI ports
  drm/i915: Respect alternate_aux_channel for all DDI ports
  drm/i915/gen9: Remove WaEnableYV12BugFixInHalfSliceChicken7
  drm/i915: KBL - Recommended buffer translation programming for DisplayPort
  drm/i915: Move down skl/kbl ddi iboost and n_edp_entires fixup
  drm/i915: Add a sunset clause to GPU hang logging
  drm/i915: Stop reporting error details in dmesg as well as the error-state
  drm/i915/gvt: do not ignore return value of create_scratch_page
  drm/i915/gvt: fix spare warnings on odd constant _Bool cast
  drm/i915/gvt: mark symbols static where possible
  drm/i915/gvt: fix sparse warnings on different address spaces
  drm/i915/gvt: properly access enabled intel_engine_cs
  drm/i915/gvt: Remove defunct vmap_batch()
  drm/i915/gvt: Use common mapping routines for shadow_bb object
  drm/i915/gvt: Use common mapping routines for indirect_ctx object
  ...

8 years agoMerge tag 'topic/drm-misc-2016-10-24' of git://anongit.freedesktop.org/drm-intel...
Dave Airlie [Tue, 25 Oct 2016 06:35:20 +0000 (16:35 +1000)]
Merge tag 'topic/drm-misc-2016-10-24' of git://anongit.freedesktop.org/drm-intel into drm-next

First -misc pull for 4.10:
- drm_format rework from Laurent
- reservation patches from Chris that missed 4.9.
- aspect ratio support in infoframe helpers and drm mode/edid code
  (Shashank Sharma)
- rotation rework from Ville (first parts at least)
- another attempt at the CRC debugfs interface from Tomeu
- piles and piles of misc patches all over

* tag 'topic/drm-misc-2016-10-24' of git://anongit.freedesktop.org/drm-intel: (55 commits)
  drm: Use u64 for intermediate dotclock calculations
  drm/i915: Use the per-plane rotation property
  drm/omap: Use per-plane rotation property
  drm/omap: Set rotation property initial value to BIT(DRM_ROTATE_0) insted of 0
  drm/atmel-hlcdc: Use per-plane rotation property
  drm/arm: Use per-plane rotation property
  drm: Add support for optional per-plane rotation property
  drm/atomic: Reject attempts to use multiple rotation angles at once
  drm: Add drm_rotation_90_or_270()
  dma-buf/sync_file: hold reference to fence when creating sync_file
  drm/virtio: kconfig: Fixup white space.
  drm/fence: release fence reference when canceling event
  drm/i915: Handle early failure during intel_get_load_detect_pipe
  drm/fb_cma_helper: do not free fbdev if there is none
  drm: fix sparse warnings on undeclared symbols in crc debugfs
  gpu: Remove depends on RESET_CONTROLLER when not a provider
  i915: don't call drm_atomic_state_put on invalid pointer
  drm: Don't export the drm_fb_get_bpp_depth() function
  drm/arm: mali-dp: Replace drm_fb_get_bpp_depth() with drm_format_plane_cpp()
  drm: vmwgfx: Replace drm_fb_get_bpp_depth() with drm_format_info()
  ...

8 years agodrm/i915: Update DRIVER_DATE to 20161024
Daniel Vetter [Mon, 24 Oct 2016 06:25:36 +0000 (08:25 +0200)]
drm/i915: Update DRIVER_DATE to 20161024

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>