Marek Vasut [Mon, 6 Mar 2023 14:53:54 +0000 (15:53 +0100)]
arm64: imx8mm: imx8mn: imx8mp: Drop FEC GPR[1] board workaround
The FEC interface mode is now configured in common board_interface_eth_init()
and called by FEC MAC driver when appropriate. Drop the board side duplicates
if the same functionality.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 6 Mar 2023 14:53:53 +0000 (15:53 +0100)]
arm64: imx8mp: Drop EQoS GPR[1] board workaround
The EQoS interface mode is now configured in common board_interface_eth_init()
and called by EQoS MAC driver when appropriate. Drop the board side duplicates
if the same functionality.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 6 Mar 2023 14:53:52 +0000 (15:53 +0100)]
arm64: dts: imx8mp: Drop EQoS clock workaround
The assigned-clock no longer have to be dropped, the clock are now
defined in clk-imx8mp.c and used by DWMAC driver to configure the
DWMAC clock. Drop the workarounds from U-Boot specific DT extras.
Signed-off-by: Marek Vasut <marex@denx.de>
Emanuele Ghidoli [Thu, 16 Feb 2023 11:31:15 +0000 (12:31 +0100)]
configs: verdin-imx8mp: Fix wrong early malloc() heap size
Set, previously unset, CONFIG_SPL_SYS_MALLOC_F_LEN to 0x4000 whose
default value is 0x10000.
Early malloc() uses CRAM_S at 0x184000 (CFG_MALLOC_F_ADDR), this ram
area end at 0x188000.
Fixes:
2bc2f817cea7 ("board: toradex: add verdin imx8m plus support")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Rasmus Villemoes [Wed, 22 Mar 2023 14:42:05 +0000 (15:42 +0100)]
ARM: imx: imx8mp: fix enable_i2c_clk
In order for i2c_num==4 and 5 to stay invalid for non-imx8mp SOCs, the
i2c_ccgr[] array must be sized by the number of initializers present,
not with a hard-coded 6 which would implicitly initialize the last two
elements with zeroes.
Also, the bounds check is off-by-one.
Fixes:
c92c3a4453b8 "ARM: imx: imx8mp: Enable support for i2c5 and i2c6 on i.MX8MP"
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Ying-Chun Liu (PaulLiu) [Mon, 13 Mar 2023 18:26:20 +0000 (02:26 +0800)]
compulab: imx8mm-cl-iot-gate: Fix some function declarations in ddr.h
We have a few places here that the function declarations do not
match their prototypes, correct them.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reported-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Marek Vasut [Mon, 6 Mar 2023 14:53:51 +0000 (15:53 +0100)]
net: fec_mxc: Add board_interface_eth_init() for i.MX8M Mini/Nano/Plus
Implement common board_interface_eth_init() and call it from the FEC
driver to configure IOMUXC GPR[1] register according to the PHY mode
obtained from DT. This supports all three interface modes supported by
the i.MX8M Mini/Nano/Plus FEC and supersedes the current board-side
configuration of the same IOMUX GPR[1] duplicated in the board files.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 6 Mar 2023 14:53:50 +0000 (15:53 +0100)]
net: fec_mxc: Add ref clock setup support for i.MX8M Mini/Nano/Plus
The FEC ref clock frequency on i.MX8M Mini/Nano/Plus was so far configured
via ad-hoc board code. Replace that with DM clock clk_set_rate() instead.
This way, the driver claims all its required clock and sets the ref clock
rate, without any need of architecture specific register fiddling.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 6 Mar 2023 14:53:49 +0000 (15:53 +0100)]
net: dwc_eth_qos: Add board_interface_eth_init() for i.MX8M Plus
Implement common board_interface_eth_init() and call it from the DWMAC
driver to configure IOMUXC GPR[1] register according to the PHY mode
obtained from DT. This supports all three interface modes supported by
the i.MX8M Plus DWMAC and supersedes current board-side configuration
of the same IOMUX GPR[1] duplicated in the board files.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 6 Mar 2023 14:53:48 +0000 (15:53 +0100)]
net: dwc_eth_qos: Add i.MX8M Plus RMII support
With DM clock support in place, it is easy to add RMII support into the
MAC driver. The RMII cannot operate at 1000 Mbps and at 100 and 10 Mbps
the clock frequency is 50 MHz and 5 MHz instead of 25 MHz and 2.5 MHz.
The board DT requires the following adjustments to EQoS node:
phy-mode = "rmii";
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
<&clk IMX8MP_SYS_PLL2_100M>,
<&clk IMX8MP_SYS_PLL2_50M>;
assigned-clock-rates = <0>, <
100000000>, <
50000000>;
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 6 Mar 2023 14:53:47 +0000 (15:53 +0100)]
net: dwc_eth_qos: Add DM CLK support for i.MX8M Plus
The DWMAC clock in i.MX8M Plus were so far configured via ad-hoc
architecture code. Replace that with DM clock instead. This way,
the driver claims all its required clock, enables and disables
them, and even gets the CSR clock rate and sets the TX clock rate,
without any need of architecture specific register fiddling. Drop
the architecture specific code while at it too.
The adjustment here is modeled after STM32MP15xx clock handling
in this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 6 Mar 2023 14:53:46 +0000 (15:53 +0100)]
net: dwc_eth_qos: Set DMA_MODE SWR bit to reset the MAC
The driver currently only waits for DMA_MODE SWR bit to clear itself.
This is insufficient e.g. on i.MX8M Plus, where the MAC must be reset
before IOMUX GPR[1] content is latched into the MAC and used. Without
the proper reset, the i.MX8M Plus MAC variant does not take the value
in IOMUX GPR[1] into account, which makes it impossible e.g. to switch
interface mode from RGMII to any other.
Since proper reset is desired in general to put the block into defined
state, always assert the DMA_MODE SWR bit before waiting for the bit
to clear itself.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 6 Mar 2023 14:53:45 +0000 (15:53 +0100)]
net: dwc_eth_qos: Staticize eqos_inval_buffer_tegra186()
This function is only used within the driver, staticize it.
Fixes:
149e80f74b6 ("net: dwc_eth_qos: public some functions")
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 6 Mar 2023 14:53:44 +0000 (15:53 +0100)]
net: dwc_eth_qos: Drop unused dm_gpio_free() on STM32
The dm_gpio_free() is never called, because for stm32, the phy_reset_gpio
pointer is never valid. This is because only tegra186 ever claims the
phy_reset_gpio, all other platforms use the PHY framework to reset the
PHY instead. Drop the dm_gpio_free() and dm_gpio_is_valid().
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 6 Mar 2023 14:53:43 +0000 (15:53 +0100)]
net: dwc_eth_qos: Drop bogus return after goto
The return is never triggered due to the goto just above it.
Drop it. No functional change.
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 6 Mar 2023 14:53:42 +0000 (15:53 +0100)]
net: Pull board_interface_eth_init() into common code
Move the board_interface_eth_init() into common ethernet uclass code,
since this function could be shared by multiple drivers.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 6 Mar 2023 14:53:41 +0000 (15:53 +0100)]
clk: imx8mp: Add EQoS MAC clock
Add clock for the DWMAC EQoS block. This is used among other things
to configure the MII clock via DM CLK.
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Andrejs Cainikovs [Fri, 3 Mar 2023 13:26:41 +0000 (14:26 +0100)]
Revert "imx: imx8x: colibri: switch to binman"
This reverts commit
bdadc140a127b14a666d2007eddc3f65c8de7d5a.
We do not want this, see [1].
[1] https://lore.kernel.org/all/
56cf058164f331ce99ce75b0751b825ee2e07fc0.camel@toradex.com/
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Marcel Ziswiler [Fri, 3 Mar 2023 13:26:40 +0000 (14:26 +0100)]
colibri-imx8x: set bootdelay
Set the boot delay to one second.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Andrejs Cainikovs [Fri, 3 Mar 2023 13:26:38 +0000 (14:26 +0100)]
colibri-imx8x: set bootaux memory base and size
Move i.MX auxiliary core memory base and size configuration
to defconfig where it should belong.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Marcel Ziswiler [Fri, 3 Mar 2023 13:26:37 +0000 (14:26 +0100)]
colibri-imx8x: update env memory layout
Update the distro config env memory layout for the Colibri iMX8X:
- kernel_comp_addr_r=0xb0000000 temporary area for uncompressing (ie FIT
images or Image.gz booted using booti)
- kernel_comp_size=0x08000000
- loadaddr=0x95400000 avoiding any reserved areas located before that
- fdt_addr_r = loadaddr + 128MB - allows for 128MB kernel
- scriptaddr = fdt_addr_r + 512KB - allows for 512KB fdt
- ramdisk_addr_r = scriptaddr + 512KB - allows for 512KB script
Idea of memory layout taken from commit
a9f1e35bedc4
("apalis-imx8: update env memory layout").
Note that for our regular BSP Layers and Reference Images for Yocto
Project an updated distro boot script is required (see
meta-toradex-bsp-common/recipes-bsp/u-boot/u-boot-distro-boot).
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Andrejs Cainikovs [Fri, 3 Mar 2023 13:26:36 +0000 (14:26 +0100)]
colibri-imx8x: switch from fatload to load
Make sure M4 binary loading works equally well
on ext4 as well as fat file systems.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Andrejs Cainikovs [Fri, 3 Mar 2023 13:26:34 +0000 (14:26 +0100)]
colibri-imx8x: drop obsolete environment variables
Drop obsolete environment variables boot_file, bootcmd_mfg,
fdt_addr, finduuid, image, mfgtool_args, mmcargs, mmcdev, mmcpart,
panel, sec_boot, vidargs.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Andrejs Cainikovs [Fri, 3 Mar 2023 13:26:33 +0000 (14:26 +0100)]
colibri-imx8x: construct fdtfile dynamically
The following expression is used to construct the device tree name:
fdtfile=${soc}-colibri-${fdt_board}.dtb
- soc is set dynamically (either imx8qxp or imx8dx)
- fdt_board can be modified by the user (eval-v3, aster, iris/iris-v2)
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Philippe Schenker [Fri, 3 Mar 2023 13:26:28 +0000 (14:26 +0100)]
defconfig: colibri-imx8x: enable CONFIG_OF_SYSTEM_SETUP
Enable a call to ft_system_setup() which reserves M4 memory region.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Andrejs Cainikovs [Fri, 3 Mar 2023 13:26:42 +0000 (14:26 +0100)]
colibri-imx8x: enable fuse command
This command is required for initial SoC provisioning.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Marcel Ziswiler [Fri, 3 Mar 2023 13:26:39 +0000 (14:26 +0100)]
colibri-imx8x: enable environment bootcount limit
Enable optional environment bootcount limit functionality.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Igor Opaniuk [Fri, 3 Mar 2023 13:26:35 +0000 (14:26 +0100)]
colibri-imx8x: provide proper CONFIG_SYS_PROMPT
Provide proper sys prompt, which should be "Colibri iMX8X #".
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Max Krummenacher [Fri, 3 Mar 2023 13:26:32 +0000 (14:26 +0100)]
colibri-imx8x: extract is_imx8dx() from ram detection
Refactor the detection of QXP vs. DX SoC into its own helper function.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Marcel Ziswiler [Fri, 3 Mar 2023 13:26:31 +0000 (14:26 +0100)]
colibri-imx8x: update update_uboot confirmation message
Update update_uboot confirmation message.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Marcel Ziswiler [Fri, 3 Mar 2023 13:26:30 +0000 (14:26 +0100)]
colibri-imx8x: remove obsolete sdhc related config defines
Remove obsolete SDHC related config defines. Nowadays, all SDHC related
hardware configuration comes from the device tree.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Marcel Ziswiler [Fri, 3 Mar 2023 13:26:29 +0000 (14:26 +0100)]
colibri-imx8x: remove obsolete net usb start
Remove obsolete net USB start.
While at it also add a comment about enabling distro-boot.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Philippe Schenker [Fri, 3 Mar 2023 13:26:27 +0000 (14:26 +0100)]
colibri-imx8x: Remove baudrate from console argument
This commit does remove the options argument from the console
kernel-argument as it prevents the serial driver from outputting
anything.
Do this by switchting to use the variable "setup" as it is done on other
Toradex modules.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Andrejs Cainikovs [Fri, 3 Mar 2023 13:26:26 +0000 (14:26 +0100)]
board: colibri-imx8x: add 2nd ethernet address
All Colibri iMX8X variants have 2nd RGMII on SoC, so add the address
for 2nd ethernet.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Marek Vasut [Thu, 2 Mar 2023 22:40:44 +0000 (23:40 +0100)]
ARM: dts: imx: Add support for DH electronics i.MX8M Plus DHCOM on PDK3
Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK3 carrier board.
Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD,
SPI NOR and USB 3.0 host.
Signed-off-by: Marek Vasut <marex@denx.de>
Fabio Estevam [Tue, 14 Mar 2023 11:58:16 +0000 (08:58 -0300)]
mx51evk: Remove unused mx51evk_video.c file
Since commit
1fa43cad8625 ("video: Drop references to CONFIG_VIDEO et al")
the mx51evk_video.c is no longer used.
Remove the unused file.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Tue, 14 Mar 2023 11:58:15 +0000 (08:58 -0300)]
mx53loco: Remove unused mx53loco_video.c file
Since commit
1fa43cad8625 ("video: Drop references to CONFIG_VIDEO et al")
the mx53loco_video.c is no longer used.
Remove the unused file.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Marek Vasut [Sun, 5 Mar 2023 23:21:31 +0000 (00:21 +0100)]
ARM: imx: Include on-SoM microSD in list of i.MX6 DHCOM boot devices
Add mmc1, which is mapped to optional on-SoM microSD socket,
to the list of distro boot command boot devices.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Marek Vasut [Sun, 5 Mar 2023 20:48:35 +0000 (21:48 +0100)]
ARM: imx: Convert DH i.MX6 DHSOM to DM_SERIAL
Enable CONFIG_DM_SERIAL on DH i.MX6 DHSOM to convert it to DM serial .
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tim Harvey [Tue, 21 Feb 2023 17:18:49 +0000 (09:18 -0800)]
configs: remove gwventana_gw5904_defconfig
Now that the gwventana_emmc_defconfig is the same as the
gwventana_gw5904_defconfig we can remove the latter.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Tue, 21 Feb 2023 17:18:48 +0000 (09:18 -0800)]
configs: gwventana_emmc_defconfig: add MV88E61XX DSA switch support
The MV88E61XX switch is used on the GW5904 which is an eMMC based board.
Adding it here allows us to remove the gwventana_gw5904_defconfig.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Jean-Marie Lemetayer [Mon, 13 Feb 2023 13:12:25 +0000 (14:12 +0100)]
misc: imx: remove DM dependency for ocotp driver in SPL
The ocotp driver is available for regular and SPL builds using the
(SPL_)MXC_OCOTP configuration. Also, the ocotp driver does not support
the driver model (DM) configuration.
But, for SPL builds, the SPL_MXC_OCOTP configuration depends on
SPL_MISC which implies on SPL_DM.
This commit replaces the dependency on SPL_MISC with SPL_DRIVERS_MISC.
So the only requirement is to have enabled miscellaneous drivers for
the SPL.
Signed-off-by: Jean-Marie Lemetayer <j.lemetayer@kerlink.fr>
Marek Vasut [Sat, 11 Feb 2023 22:38:01 +0000 (23:38 +0100)]
arm64: dts: imx8mp: Do not delete PHY nodes on i.MX8MP DHCOM PDK2
The PHY nodes may be activated via DTO in case another SoM variant
is populated into the development kit. Do not delete the nodes.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 11 Feb 2023 22:38:00 +0000 (23:38 +0100)]
arm64: dts: imx8mp: Add FEC RMII pin mux on i.MX8MP DHCOM
The i.MX8MP DHCOM SoM may come with either external RGMII PHY or
LAN8740Ai RMII PHY on the SoM attached to FEC MAC. Add pin mux
settings for both options, so that DT overlay can override these
settings on SoM variant with the LAN8740Ai PHY.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 11 Feb 2023 22:37:59 +0000 (23:37 +0100)]
arm64: dts: imx8mp: Add EQoS RMII pin mux on i.MX8MP DHCOM
The i.MX8MP DHCOM SoM may come with either KSZ9131RNXI RGMII PHY
or LAN8740Ai RMII PHY on the SoM attached to EQoS MAC. Add pin
mux settings for both options, so that DT overlay can override
these settings on SoM variant with the LAN8740Ai PHY.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 11 Feb 2023 22:37:58 +0000 (23:37 +0100)]
arm64: dts: imx8mp: Adjust EQoS PHY address on i.MX8MP DHCOM
The current variant of the SoM has LAN8740Ai PHY connected to EQoS
strapped to MDIO address 0 , adjust the MDIO address to match the
hardware.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 11 Feb 2023 22:10:50 +0000 (23:10 +0100)]
arm64: imx8mp: Auto-detect PHY on i.MX8MP DHCOM
The i.MX8MP DHCOM SoM may be populated with either KSZ9131RNXI RGMII PHY
or LAN8740Ai RMII PHY attached to EQoS MAC, and either external RGMII PHY
or LAN8740Ai RMII PHY attached to FEC MAC. The SoM configuration can be
detected for each MAC by reading RX_CTL pull resistor state early on boot.
Make use of this, detect the exact PHY configuration, and patch control DT
accordingly so that the ethernet is configured correctly in U-Boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 11 Feb 2023 21:49:01 +0000 (22:49 +0100)]
ARM: imx: Add 2 GiB DRAM support for DH electronics i.MX8M Plus DHCOM
The DH electronics i.MX8M Plus DHCOM SoM currently supports only 4 GiB
of DRAM population option. Add another population option with 2 GiB of
DRAM. The chips used on the 2 GiB option are 2x K4F6E3S4HM-MGCJ .
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 11 Feb 2023 21:48:24 +0000 (22:48 +0100)]
ARM: imx: Enable LTO for DH electronics i.MX8M Plus DHCOM
Enable LTO to reduce the size of SPL, which with multiple DRAM
calibration tables may be close to the limit.
Signed-off-by: Marek Vasut <marex@denx.de>
Stefan Eichenberger [Fri, 10 Feb 2023 10:33:51 +0000 (11:33 +0100)]
configs: colibri-imx7: Fix bad block table in flash configuration
Make sure that the bad block table in flash is used on Colibri iMX7.
Without this configuration enabled U-Boot corrupts the bad block table
and Linux will update the table on each reboot. The corruption occurs
because if CONFIG_SYS_NAND_USE_FLASH_BBT is not set, U-boot will store
bad blocks out of band, while the Linux driver for the iMX7 will store
them in band in a bad block table.
Fixes:
fd8c1fc9430 ("arm: dts: imx7: colibri: add raw NAND support")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Frieder Schrempf [Wed, 8 Feb 2023 16:20:33 +0000 (17:20 +0100)]
doc: sl-mx8mm: Fix mistake in merge conflict resolution
There was a conflict between the following two commits, that wasn't
resolved correctly. Fix this.
a93985ddfcc3 ("doc: sl-mx8mm: Update the NXP TF-A source reference")
f0f461287eff ("imx: Suggest the NXP ATF github repo")
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Tim Harvey [Tue, 7 Feb 2023 23:44:21 +0000 (15:44 -0800)]
board: gateworks: venice: enable XWAY PHY support
Enable XWAY PHY driver and remove board specific config from
board_phy_config weak override.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Ye Li [Fri, 3 Feb 2023 10:24:36 +0000 (18:24 +0800)]
power: pmic: Add NXP PCA9451A PMIC support
PCA9451A uses similar BUCKs and LDO regulators as PCA9450B/C but
has LDO2 and LDO3 removed. So reuse pca9450 PMIC and regulator driver
and add new type for PCA9451A.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Ye Li [Fri, 3 Feb 2023 10:21:47 +0000 (18:21 +0800)]
imx: spl_imx_romapi: Get and print boot stage
Get and print boot stage through ROM API in SPL
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Thu, 16 Feb 2023 10:08:49 +0000 (07:08 -0300)]
mx6sabresd: Convert to DM_PMIC
The usage of DM_PMIC is preferred, so convert to it.
This also brings the benefit of causing a significant amount
of code removal.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Thu, 16 Feb 2023 10:08:48 +0000 (07:08 -0300)]
mx6sabreauto: Convert to DM_PMIC
The usage of DM_PMIC is preferred, so convert to it.
This also brings the benefit of causing a significant amount
of code removal.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Wed, 15 Feb 2023 18:32:54 +0000 (15:32 -0300)]
mx6sxsabreauto: Remove myself from MAINTAINERS
I don't have access to the mx6sxsabreauto board, so remove myself
from the MAINTAINERS entry and add Peng instead.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Wed, 15 Feb 2023 18:24:44 +0000 (15:24 -0300)]
pico-imx6: Pass the mmc alias to fix boot regression
Originally, the mmc aliases node was present in imx6qdl-pico.dtsi.
After the sync with Linux in commit
d0399a46e7cd ("imx6dl/imx6qdl:
synchronise device trees with linux"), the aliases node is gone as
the upstream version does not have it.
This causes a boot regression in which the eMMC card cannot be found anymore.
Fix it by passing the alias node in the u-boot.dtsi file to
restore the original behaviour where the eMMC (esdhc3) was
mapped to mmc0.
Fixes:
d0399a46e7cd ("imx6dl/imx6qdl: synchronise device trees with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Wed, 15 Feb 2023 18:24:43 +0000 (15:24 -0300)]
pico-imx6: Add DM_SERIAL support
The conversion to DM_SERIAL is mandatory, so add support
for it.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Wed, 15 Feb 2023 17:46:33 +0000 (14:46 -0300)]
udoo: Add DM_SERIAL support
The conversion to DM_SERIAL is mandatory, so add support
for it.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Wed, 15 Feb 2023 17:08:56 +0000 (14:08 -0300)]
mx6sxsabresd: Add DM_SERIAL support
The conversion to DM_SERIAL is mandatory, so add support
for it.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Wed, 15 Feb 2023 14:48:49 +0000 (11:48 -0300)]
mx51evk: Add DM_SERIAL support
The conversion to DM_SERIAL is mandatory, so add support
for it.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Wed, 15 Feb 2023 14:41:51 +0000 (11:41 -0300)]
mx53loco: Add DM_I2C support
The conversion to DM_I2C is mandatory, so add support
for it.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Fabio Estevam [Wed, 15 Feb 2023 14:41:50 +0000 (11:41 -0300)]
mx53loco: Add DM_SERIAL support
The conversion to DM_SERIAL is mandatory, so add support
for it.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Ye Li [Mon, 30 Jan 2023 10:39:55 +0000 (18:39 +0800)]
imx: ele_ahab: Remove OEM Secure World Closed print
The OEM Secure World Closed is not a valid lifecycle on iMX8ULP/iMX9.
So remove it from lifecycle print.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Mon, 30 Jan 2023 10:39:54 +0000 (18:39 +0800)]
imx: ele_ahab: confirm lifecycle before closing the part
Before moving the lifecycle to OEM closed, confirm the lifecycle is
OEM open, otherwise cancel to move forward the lifecycle.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Mon, 30 Jan 2023 10:39:53 +0000 (18:39 +0800)]
misc: sentinel: s400_api: Use new command request definitions
Remove legacy command definitions, change to use new ELE_xxx command
request.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Mon, 30 Jan 2023 10:39:52 +0000 (18:39 +0800)]
imx: ahab: Move imx9 and imx8ulp AHAB support together
Use common file ele_ahab.c for i.MX9 and iMX8ULP AHAB support, since
both of them use same sentinel ELE APIs
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Mon, 30 Jan 2023 10:39:51 +0000 (18:39 +0800)]
imx93: ahab: Get and decode AHAB events
For ahab_status command, support to get and decode AHAB events
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Mon, 30 Jan 2023 10:39:50 +0000 (18:39 +0800)]
misc: sentinel: s400_api: Add get_events API
Add get_events API to retrieve any singular events that has occurred
since the FW has started from sentinel
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:34 +0000 (16:42 +0800)]
imx8ulp_evk: Clear data at fdt_addr_r before booting kernel
When using dual boot mode, the DDR won't be reset when APD power off
or reboot. It has possibility that obsolete fdt data existing on
fdt_addr_r address. Then even nothing in EFI partitions, the distro boot
still continue to parse fdt and get uboot crashed.
Clear the data at fdt_addr_r, so the fdt header check in above case
will not pass.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 31 Jan 2023 08:42:33 +0000 (16:42 +0800)]
imx8ulp_evk: disable overflow of port0 for LPAV
Bit0: Port 0 behavior when bandwidth maximized. Set to 1 to allow overflow
With overflow set, we see some issue that A35 may not able to get enough
bandwidth and A35 will report hrtimer takes too much time, workqueue
lockup. With overflow cleared, the issues are gone.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:32 +0000 (16:42 +0800)]
imx8ulp_evk: Update DDR ports arbitration for DCNANO underrun
To resolve DCNANO underrun issue, change the DDR Port 0 arbitration
from round robin fashion to fixed priority level 1, while other ports
are not assigned any priority, so they will be serviced in round robin
fashion if there is no active request from Port 0.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:31 +0000 (16:42 +0800)]
imx8ulp_evk: Change to use DDR driver
Remove the DDR initialization codes from board and enable the iMX8ULP
DDR driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
Jacky Bai [Tue, 31 Jan 2023 08:42:30 +0000 (16:42 +0800)]
imx8ulp_evk: Update the DDR timing
Update the dram timing to support PLL bypass mode
for F1.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Jacky Bai [Tue, 31 Jan 2023 08:42:29 +0000 (16:42 +0800)]
ddr: imx: Update the ddr init flow on imx8ulp
Update the ddr init flow to support LPDDR3 and PLL bypass mode.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:28 +0000 (16:42 +0800)]
misc: fuse: Lock 8ULP ECC-protected fuse when programming
The ECC fuse on 8ULP can't be written twice. If any user did it, the
ECC value would be wrong then cause accessing problem to the fuse.
The patch will lock the ECC fuse word to avoid this problem.
For iMX9, the OTP controller automatically prevents an ECC fuse word to
be written twice. So it does not need the setting.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:27 +0000 (16:42 +0800)]
misc: fuse: Update fuse mapping for 8ULP S400 API
Since new 8ULP A1 S400 FW (v0.0.8-
e329b760) can support to read
more fuses: like PMU trim, Test flow/USB, GP1-5, GP8-10. Update
the u-boot driver for the new mapping.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:26 +0000 (16:42 +0800)]
imx: sentinel: Update S400 API get info message structure
From Sentinel FW v0.0.9-
9df0f503, the response message of get info API
is changed to add OEM SRK and some states (IMEM, CSAL, TRNG).
With old structure, we get failure from sentinel due to the buffer
size can't fit with new response message. So update the API structure
to fix the issue.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:25 +0000 (16:42 +0800)]
imx: imx8ulp: Update clocks to meet max rate restrictions
Update PLL3/PLL4 PFD and USDHC clocks to meet maximum frequency
restrictions. Detail clock rate changes in the patch:
PLL3 PFD2: 389M -> 324M
PLL3 PFD3: 336M -> 389M
PLL3 PFD3: DIV1 336M -> 389M (OD), 194M (ND/LD)
PLL3 PFD3: DIV2 336M -> 194M (OD), 97M (ND/LD)
PLL4 PFD0: 792M -> 594M
PLL4 PFD2: 792M -> 316.8M
NIC_AP: 96M (ND) -> 192M, 48M (LD) -> 96M
NIC_LPAV: 198 (ND) -> 192M, 99M (LD) -> 96M
USDHC0: PLL3 PFD3 DIV1, 389M (OD), 194M (ND/LD)
USDHC1: PLL3 PFD3 DIV2, 194M (OD), 97M (ND/LD)
USDHC2: PLL3 PFD3 DIV2, 194M (OD), 97M (ND/LD)
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:24 +0000 (16:42 +0800)]
imx: imx8ulp: Configure XRDC PDAC and MSC for DBD owner=S400 only
This patch is used to support DBD owner fuse changed to S400 only.
The XRDC PDAC2 for LPAV pbridge5 and MSC1/2/3 for GPIO and LPAV are not
configured by S400 default setting. So these PDAC and MSC are invalid,
only DBD owner can access the corresponding resources.
We have to configure necessary PDAC and MSC for SPL before DDR
initialization.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 31 Jan 2023 08:42:23 +0000 (16:42 +0800)]
imx: imx8ulp: upower: make code cleaner
To clean the upower codes by aligning codes format, check err_code
and add detail bits list for the memory magic number
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 31 Jan 2023 08:42:22 +0000 (16:42 +0800)]
imx: imx8ulp: upower: replace magic number with macro
The swton indicates the logic switch, magic number 0xfff80 is hard
to understand, so use macro.
Some board design may not have MIPI_CSI voltage input connected per
data sheet. In that case, the upower power on API may dead loop mu to wait
response, however there is no response. So remove MIPI_CSI here, let
linux power domain driver to runtime enable the power domain.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:21 +0000 (16:42 +0800)]
imx: imx8ulp: Clear dividers in PLL3DIV_PFD registers
At present, in cgc1_pll3_init we don't set the pll3pfd div values,
just use the default 0. But on A1 part, ROM will set PLL3 pfd1div2
to 1 and pfd2div1 to 3.
This finally causes some clocks' rate decreased, for example USDHC.
So clear the PLL3DIV_PFD dividers to get correct rate.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:20 +0000 (16:42 +0800)]
imx: imx8ulp: Reconfigure MRC3 for SRAM0 access
Some space in SRAM0 will be protected by S400 to allow RX SecPriv mode
access only for boot purpose. Since SW will reuse the SRAM0 as SCMI
buffer and SPL container loading buffer, need to reconfigure MRC3.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:19 +0000 (16:42 +0800)]
ddr: imx8ulp: Change DRAM timing save area to 0x20055000
To align with ARM trusted firmware's change, adjust DRAM timing
save area to new position 0x20055000. So we can release the space
since 0x2006c000 for the NOBITS region of ARM trusted firmware
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:18 +0000 (16:42 +0800)]
imx: imx8ulp: configure XRDC for DRAM access from S400
Need to add DRAM access permission for S400, as S400 needs to access
it When SPL calls image authentication
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:17 +0000 (16:42 +0800)]
imx: imx8ulp: Adjust handshake to sync TRDC and XRDC completion
To fit the DBD_EN fused part, we re-design the TRDC and XRDC assignment.
M33 will be the TRDC owner and needs to configure TRDC. A35 is the
XRDC owner, ATF will configure XRDC.
The handshake between U-boot and M33 image is used to sync TRDC and
XRDC configuration completion. Once the handshake is done, A35 and M33
can access the allowed resources in others domain.
The handshake is needed when M33 is booted or DBD_EN fused, because both
cases will enable the TRDC. If handshake is timeout, the boot will hang.
We use SIM GPR0 to pass the info from SPL to u-boot, because before the
handshake, u-boot can't access SEC SIM and FSB.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:16 +0000 (16:42 +0800)]
imx: imx8ulp: Remove the TRDC configure from A35
As M33 is responsible for TRDC configuration, the settings for A35
nonsecure world access and DMA0 access are moved to M33 image.
So remove the codes to release TRDC and configure it. Just keep
the configurations for reference.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:15 +0000 (16:42 +0800)]
imx: imx8ulp: Set XRDC MRC4/5 for access DDR from APD
iMX8ULP A1 S400 ROM removes the setting for MRC4/5. So we have to set
them in SPL to allow access to DDR from A35 and APD PER masters
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:14 +0000 (16:42 +0800)]
imx: imx8ulp: Limit the eMMC ROM API workaround to A0.1 part
Since A1 ROM has fixed the ROM API eMMC issue, we should only use
the workaround for A0.1 part. Add a SOC revision check.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:13 +0000 (16:42 +0800)]
imx: imx8ulp: Get chip revision from Sentinel
In both SPL and u-boot, after probing the S400 MU, get the chip revision,
lifecycle and UID from Sentinel.
Update get_cpu_rev to use the chip revision not hard coded it for A0
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 31 Jan 2023 08:42:12 +0000 (16:42 +0800)]
imx: imx8ulp: Fix MU device probe failure
Since latest DTS has added multiple MU nodes, using compatible
string to find the device node is not proper. It finds the first
node with the compatible string matched even the node is disabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tom Rini [Tue, 28 Mar 2023 15:21:29 +0000 (11:21 -0400)]
Merge tag 'u-boot-at91-2023.07-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2023.07 cycle:
This feature set includes the clock changes required for sam9x60 SoC to
support USB host.
Tom Rini [Mon, 27 Mar 2023 19:20:19 +0000 (15:20 -0400)]
Revert "rockchip: Fix early use of bootph props"
While this change is correct for v2023.04 it is not correct for next
(where this is right now) nor post-v2023.04.
This reverts commit
8653e5d3b745925fced5fa6897c92f4a46ec2757.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 27 Mar 2023 19:19:57 +0000 (15:19 -0400)]
Merge branch 'master' into next
Tom Rini [Mon, 27 Mar 2023 18:23:26 +0000 (14:23 -0400)]
Prepare v2023.04-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 27 Mar 2023 17:39:17 +0000 (13:39 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 27 Mar 2023 15:16:51 +0000 (11:16 -0400)]
Merge branch '2023-03-27-rockchip-rk3399-fixes'
- A series of minor cleanups to DISTRO_DEFAULTS and BOOTSTD so that the
rk3399 bootstd migration can be complete and functional now, and make
future migrations easier.
Tom Rini [Fri, 24 Mar 2023 20:58:16 +0000 (16:58 -0400)]
rockchip: rk3399: Drop altbootcmd
The defined altbootcmd was specific to distro_bootcmd which is not
longer in use on these platforms, so drop it.
Tested-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>