Xiang, Haihao [Thu, 2 Feb 2012 02:37:38 +0000 (10:37 +0800)]
Guess the format of a VA surface in vaDeriveImage()
Sometimes we don't know the usage of a VA surface, so we have to
guess the format according to the current valid context (a hint).
Note it is not always right, pixel format conversion is
needed internally for mismatched pixel format.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 1 Feb 2012 06:26:51 +0000 (14:26 +0800)]
Add support for I420, YV12 etc. formatted YUV surface for encoding
MFX only supports NV12 formatted YUV surface, so the driver converts
I420/YV12 formatted surface to NV12 surface internally.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 1 Feb 2012 06:22:56 +0000 (14:22 +0800)]
Fix the base offset of cr(V) surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 30 Jan 2012 08:38:13 +0000 (16:38 +0800)]
Accelerated vaGetImage() on Sandybridge & Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 30 Jan 2012 07:17:30 +0000 (15:17 +0800)]
Reuse AVS kernel for pixel format conversion on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 30 Jan 2012 07:07:58 +0000 (15:07 +0800)]
Add support for I420/YV12/IMC1/IMC3 input/output surface for AVS on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 02:44:33 +0000 (10:44 +0800)]
Build new shaders for Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 30 Jan 2012 05:52:51 +0000 (13:52 +0800)]
Normal scaling on Ivybridge
Need to adjust parameters later
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 30 Jan 2012 05:33:06 +0000 (13:33 +0800)]
Clear target surface with specified color
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 30 Jan 2012 05:42:09 +0000 (13:42 +0800)]
Fix AVS parameters for Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 08:28:37 +0000 (16:28 +0800)]
Fix y offset for Cb/Cr
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 08:25:33 +0000 (16:25 +0800)]
Remove whitespace following trailing backslash
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 01:17:13 +0000 (09:17 +0800)]
JPEG component id macros are removed, so don't use them in driver
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 01:01:59 +0000 (09:01 +0800)]
Fix frame height/width for YUV400/YUV444/YUV422V_2Y JPEG image
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 01:00:48 +0000 (09:00 +0800)]
Map JPEG component id to Y, Cb, Cr
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 19 Jan 2012 00:59:09 +0000 (08:59 +0800)]
Render YUV400 image on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 18 Jan 2012 03:27:10 +0000 (11:27 +0800)]
Fix graphics memory allocation for VA surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 13 Jan 2012 00:44:46 +0000 (08:44 +0800)]
use AM_V_GEN to generate files quietly on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 13 Jan 2012 00:43:00 +0000 (08:43 +0800)]
Add the missed register for vme on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 12 Jan 2012 08:48:21 +0000 (16:48 +0800)]
Merge branch 'master' into vaapi-ext
Conflicts:
.gitignore
src/i965_drv_video.c
src/shaders/post_processing/Makefile.am
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 12 Jan 2012 05:30:34 +0000 (13:30 +0800)]
use the revised JPEG decoding interface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 29 Dec 2011 08:27:24 +0000 (16:27 +0800)]
Avoid depending on va_backend.h for some files
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 10 Jan 2012 06:59:21 +0000 (14:59 +0800)]
Remove legacy DRI support
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Hai Lan [Wed, 21 Dec 2011 22:03:44 +0000 (06:03 +0800)]
Fix the bug for IVB jpeg decoding
When call i965_BeginPicture for JPEG decoding, Assertion `0' failed.
Signed-off-by: Hai Lan <hai.lan@intel.com>
Xiang, Haihao [Fri, 15 Jul 2011 08:33:41 +0000 (16:33 +0800)]
i965_drv_video: check the internal format of a surface before rendering
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 19 Dec 2011 00:55:20 +0000 (08:55 +0800)]
Split Gen6 MFC and Gen7 MFC
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 16 Dec 2011 05:38:32 +0000 (13:38 +0800)]
Add support for transform 8x8 on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 16 Dec 2011 01:03:49 +0000 (09:03 +0800)]
Fix INSERT_OBJECT command on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 7 Dec 2011 00:43:29 +0000 (08:43 +0800)]
Add support for B43 chipset
B43 is another 4 series chipset like G41/G45
Signed-off-by: Alexander Inyukhin <shurick@sectorb.msk.ru>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 24 Nov 2011 06:21:03 +0000 (14:21 +0800)]
Fix parameters for SCALING & AVS
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 22 Nov 2011 05:47:36 +0000 (13:47 +0800)]
add support for VAQMatrixBufferType
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 17 Nov 2011 03:23:32 +0000 (11:23 +0800)]
Using deinterlaced chroma in DNDI kernel
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 17 Nov 2011 02:47:45 +0000 (10:47 +0800)]
Fixed surface height for DN/DI
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 16 Nov 2011 07:42:34 +0000 (15:42 +0800)]
Internal CSC if the format of the input surface of VPP isn't NV12
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 16 Nov 2011 06:16:38 +0000 (14:16 +0800)]
Update DNDI kernel and DNDI states on Sandybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 10 Nov 2011 05:27:23 +0000 (13:27 +0800)]
Switch scaling method according to the setting
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Wed, 2 Nov 2011 14:32:32 +0000 (15:32 +0100)]
configure: bump version for development.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Xiang, Haihao [Wed, 2 Nov 2011 01:57:54 +0000 (09:57 +0800)]
support picture order count type 2 for H.264 encoding
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Fri, 28 Oct 2011 14:32:40 +0000 (16:32 +0200)]
NEWS: add missing entry for auto-generated Debian packaging.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Fri, 28 Oct 2011 14:20:23 +0000 (16:20 +0200)]
build: fix make dist when intel-gen4asm is not installed.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Fri, 28 Oct 2011 13:43:39 +0000 (15:43 +0200)]
1.0.15.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Fri, 28 Oct 2011 13:42:45 +0000 (15:42 +0200)]
debian: don't use simple-patchsys (upstream has no patches).
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Xiang, Haihao [Wed, 26 Oct 2011 06:02:20 +0000 (14:02 +0800)]
Update surface state, sampler state and kernel for AVS on Sandybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 25 Oct 2011 07:38:27 +0000 (15:38 +0800)]
Use the same tiling format for VPP input/output surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 24 Oct 2011 05:28:42 +0000 (13:28 +0800)]
use the new JPEG decoding interface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Fri, 21 Oct 2011 01:24:28 +0000 (09:24 +0800)]
Fixed CAVLC/CABAC hardcoded issue.
Xiang, Haihao [Mon, 24 Oct 2011 05:15:36 +0000 (13:15 +0800)]
Update for post processing on IVB
AVS works on IVB
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Mon, 17 Oct 2011 13:13:39 +0000 (15:13 +0200)]
i965_drv_video: fix return values to vaRenderPicture().
Undefined status was returned from vaRenderPicture() with no VA buffer.
Likewise, any failure to process a VA buffer could still lead to success.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Mon, 17 Oct 2011 12:58:05 +0000 (14:58 +0200)]
build: use AM_V_GEN to generate files quietly.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Mon, 17 Oct 2011 12:44:21 +0000 (14:44 +0200)]
build: use GEN4ASM variable to hold path to intel-gen4asm program.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Mon, 17 Oct 2011 12:43:39 +0000 (14:43 +0200)]
.gitignore: filter out generated Gen assembly files.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Zhou Chang [Thu, 13 Oct 2011 07:09:00 +0000 (15:09 +0800)]
Fixed 1080p issue and add transform 8x8 support.
Gwenole Beauchesne [Tue, 11 Oct 2011 12:16:31 +0000 (14:16 +0200)]
Fix slice-param & slice-data buffer memory leaks.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Gwenole Beauchesne [Tue, 11 Oct 2011 11:12:35 +0000 (13:12 +0200)]
Add new .gitignore rules.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Xiang, Haihao [Tue, 11 Oct 2011 05:38:09 +0000 (13:38 +0800)]
Merge branch 'master' into vaapi-ext
Gwenole Beauchesne [Mon, 10 Oct 2011 09:02:57 +0000 (11:02 +0200)]
NEWS: update.
Gwenole Beauchesne [Mon, 10 Oct 2011 09:02:43 +0000 (11:02 +0200)]
configure: bump version for development.
Gwenole Beauchesne [Thu, 6 Oct 2011 12:21:35 +0000 (14:21 +0200)]
vc1: fix TTFRM (picture-level transform type) packing.
Xiang, Haihao [Mon, 10 Oct 2011 05:42:44 +0000 (13:42 +0800)]
update due to the change of interface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 19 Sep 2011 07:07:02 +0000 (15:07 +0800)]
silence compiler warning
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 19 Sep 2011 07:33:59 +0000 (15:33 +0800)]
Merge branch 'master' into vaapi-ext
Conflicts:
src/i965_drv_video.c
Xiang, Haihao [Mon, 19 Sep 2011 07:04:37 +0000 (15:04 +0800)]
decode: fix for next slice when decoding MPEG2 on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Mon, 19 Sep 2011 07:13:25 +0000 (15:13 +0800)]
VAImage.data_size represents the allocated size, thus accounting for
any line size alignment
Xiang, Haihao [Mon, 19 Sep 2011 06:27:36 +0000 (14:27 +0800)]
VPP: Add support for mixed content(frame & field)
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 16 Sep 2011 07:37:31 +0000 (15:37 +0800)]
VPP: update AVS kernel
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Gwenole Beauchesne [Tue, 13 Sep 2011 12:14:52 +0000 (20:14 +0800)]
Make MPEG-2 QM state live until the next change from application.
Hi,
This patch fixes MPEG-2 decoding when VAIQMatrixBufferMPEG2 is not submitted
for each frame. i.e. the quantization matrices shall be live until the next
change from the application.
Tested on CTG & SNB only with GStreamer.
I will push the patch to master if the IVB hunk is OK. It should since it's the
same as gen6 code. :)
Note: similar changes may be necessary for other codecs but I will submit them as
I test them on my system.
Regards,
Gwenole.
Xiang, Haihao [Wed, 14 Sep 2011 01:06:44 +0000 (09:06 +0800)]
encode: Correct slice QP and macroblock QP
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 13 Sep 2011 07:40:22 +0000 (15:40 +0800)]
Support DN only on Ironlake and Sandybridge
The GPU kernel isn't ready on Ivybridge yet.
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 13 Sep 2011 05:29:29 +0000 (13:29 +0800)]
Fix the step for VAProcFilterNoiseReduction
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 9 Sep 2011 08:55:56 +0000 (16:55 +0800)]
Support parameter for VAProcFilterNoiseReduction
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 9 Sep 2011 02:21:37 +0000 (10:21 +0800)]
.gitignore
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 9 Sep 2011 02:20:54 +0000 (10:20 +0800)]
update Makefile.am
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 8 Sep 2011 05:55:34 +0000 (13:55 +0800)]
i965_drv_video: add missed break
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 7 Sep 2011 08:18:19 +0000 (16:18 +0800)]
i965_drv_video: support JPEG decoding on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Wed, 7 Sep 2011 01:42:00 +0000 (09:42 +0800)]
Improve performance of CBR mode.
Zhou Chang [Thu, 8 Sep 2011 08:46:27 +0000 (16:46 +0800)]
Improved CBR's accuracy based on a multi-try based mechanism.
Xiang, Haihao [Mon, 15 Aug 2011 08:17:15 +0000 (16:17 +0800)]
i965_drv_video: emit base address command before other commands
This fixes potential GPU hang issue on SandyBridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Mon, 15 Aug 2011 06:45:02 +0000 (14:45 +0800)]
i965_drv_video: set surface base address for post processing
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 8 Sep 2011 08:40:14 +0000 (16:40 +0800)]
update configure.ac as well
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 12 Aug 2011 02:43:33 +0000 (10:43 +0800)]
Shaders for post processing on Ivybridge
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 8 Sep 2011 08:35:15 +0000 (16:35 +0800)]
move all post processing shader for GEN5/GEN6 to a directory
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 3 Aug 2011 02:48:06 +0000 (10:48 +0800)]
i965_drv_video: query attribute VAConfigAttribEncHeaderPacking
Currently driver only support slice header packing
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Wed, 3 Aug 2011 02:36:59 +0000 (10:36 +0800)]
i965_drv_video: query video processing pipeline
Currently only support denoise and deinterlacing
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 29 Jul 2011 08:31:14 +0000 (16:31 +0800)]
i965_drv_video: vaQueryVideoProcReferenceFramesCap stub
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 29 Jul 2011 07:33:45 +0000 (15:33 +0800)]
i965_drv_vidoe: update packed header iterface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 29 Jul 2011 01:37:34 +0000 (09:37 +0800)]
i965_drv_video: handle VPP pipeline
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Fri, 29 Jul 2011 02:05:59 +0000 (10:05 +0800)]
Revert "The MV's quarlity has been improved and multi MB type is enabled."
This reverts commit
a9d641303dfda37b843b7b36e11889173110a83a.
Zhou Chang [Thu, 28 Jul 2011 06:36:46 +0000 (14:36 +0800)]
The MV's quarlity has been improved and multi MB type is enabled.
Xiang, Haihao [Thu, 28 Jul 2011 01:18:58 +0000 (09:18 +0800)]
i965_drv_video: post process depends on the internal pixel format of a surface
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Tue, 26 Jul 2011 03:16:47 +0000 (11:16 +0800)]
i965_drv_video: fix the pixel format of the derived image
If the derived image doesn't satisfy the requirement, use
vaCreateImage/vaGetImage/vaPutImage instead
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 28 Jul 2011 01:10:47 +0000 (09:10 +0800)]
i965_drv_video: implement vaPutImage by post process pipeline
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 22 Jul 2011 06:40:42 +0000 (14:40 +0800)]
i965_drv_video: code clean up
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 21 Jul 2011 05:07:11 +0000 (13:07 +0800)]
i965_drv_video: enable AVS for scaling
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Thu, 21 Jul 2011 03:06:47 +0000 (11:06 +0800)]
Fixed a vme search path bug, current search area is 48x40.
Xiang, Haihao [Fri, 15 Jul 2011 08:34:47 +0000 (16:34 +0800)]
i965_drv_video: handle VPP buffers
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Fri, 15 Jul 2011 08:33:41 +0000 (16:33 +0800)]
i965_drv_video: check the internal format of a surface before rendering
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Thu, 14 Jul 2011 03:33:44 +0000 (11:33 +0800)]
i965_drv_video: support for Video Proc Pipeline (VPP)
Currently only support simply scaling
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Zhou Chang [Thu, 14 Jul 2011 02:34:45 +0000 (10:34 +0800)]
Improve VME search area from 32x32 to 48x48.
Xiang, Haihao [Wed, 13 Jul 2011 06:21:49 +0000 (14:21 +0800)]
i965_drv_video: add missed break
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Xiang, Haihao [Sat, 9 Jul 2011 03:44:15 +0000 (11:44 +0800)]
i965_drv_video: deallocate all unused surfaces
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
projects / platform / upstream / libva-intel-driver.git / log