review.tizen.org Git - platform/kernel/u-boot.git/log

ppc/85xx/86xx: Device tree fixup for number of cores

Fixing the number of cores in the device tree based on the actual number of
cores on the system. With this same device tree image can be used for dual
core and single core members of otherwise exactly same SOC.

For example:
* P2020RDB and P2010RDB
* P1020RDB and P1011RDB
* MPC8641D and MPC8641

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

ppc/85xx,86xx: Handling Unknown SOC version

Incase the system is detected with Unknown SVR, let the system boot
with a default value and a proper message.

Now with dynamic detection of SOC properties from SVR, this is necessary
to prevent a crash.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host

Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.

Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

ppc/85xx: Cleanup makefile and related optional files

Cleaned up cpu/mpc85xx/Makefile to use CONFIG_* for those obvious cases
we have like PCI, CPM2, QE. Also reworked it to use one line per file
for everything and sorted in alphabetical order.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

fsl: add register read-back to set_law()

After programming a new LAW, we should read-back the LAWAR register so that
we sync the writes. Otherwise, code that attempts to use the new LAW-mapped
memory might fail right away.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

ppc/85xx: Fix bug in setup_mp code

Its possible that we try and copy the boot page code out of flash into a
DDR location that doesn't have a TLB cover it. For example, if we have
3G of DDR we typically only map the first 2G. In the cases of 4G+ this
wasn't an issue since the reset page TLB mapping covered the last page
of memory which we wanted to copy to.

We now change the physical address of the reset page TLB to map to the
true physical location of the boot page code, copy and than set the
TLB back to its 1:1 mapping of the reset page.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

ppc/85xx: Add a simple function to search the TLB

Allow us to search the TLB array based on an address. This is useful
if we want to change an entry but dont know where it happens to be
located.

For example, the boot page mapping we use on MP or the flash TLB that
we change the WIMGE settings for after we've relocated.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Add support for setting IVORs to fixed offset defaults

In future Book-E implementations IVORs will most likely go away and be
replaced with fixed offsets. The IVPR will continue to exist to allow
for relocation of the interrupt vectors.

This code adds support to setup the IVORs as their fixed offset values
per the ISA 2.06 spec when we transition from u-boot to another OS
either via 'bootm' or a cpu release.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

ppc/85xx: Fix up eSDHC controller clock frequency in the device tree

Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist

The ddr_pd_cntl isn't defined in any reference manual and thus we wil
remove especially since we set it to 0, which would most likely be its
POR value.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

ppc/8xxx: relocate cpu pointer in global data

Now that we have a pointer to the cpu struct we need to relocate it once
we get into ram.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

fsl: sys_eeprom: Fix 'may be used uninitialized' warning

The warning is bogus, so silence it by initializing the 'ret' variable.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clk

Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a
platform define. This will enable all the 85xx platforms to use sdhc_clk
based on CONFIG_FSL_ESDHC.

Signed-off-by: Gao Guanhua <B22826@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Merge branch 'master' of git://git.denx.de/u-boot-i2c

Merge branch 'master' of git://git.denx.de/u-boot-arm

fsl_i2c: increase I2C timeout values and make them configurable

The value of I2C_TIMEOUT in fsl_i2c.c has several problems.  First, it is
defined as CONFIG_HZ/4, but it is used as a count of microseconds, so it makes
no sense to derive it from a clock rate.  Second, the current value (250) is
too low for some boards, so it needs to be increased.  Third, the timeout
necessary for multiple-master arbitration is larger than the timeout for basic
read/write operations, so we shouldn't have a single constant for both timeouts.
Finally, it would be nice if we could override these values on a per-board
basis.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Tested-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Peter Tyser <ptyser@xes-inc.com>

Reset i2c slave devices during init on mpc5xxx cpus

Reset any i2c devices that may have been interrupted during a system reset.
Normally this would be accomplished by clocking the line until SCL and SDA
are released and then sending a start condtiion (From an Atmel datasheet).
There is no direct access to the i2c pins so instead create start commands
through the i2c interface. Send a start command then delay for the SDA Hold
time, repeat this by disabling/enabling the bus a total of 9 times.

Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>

ARM: DaVinci: Adding Support for DaVinci DM365 EVM

This patch adds support for the DM365 EVM.
It has been tested on a DM365 EVM.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

ARM: DaVinci: DaVinci DM365 SOC specific code

This patch adds support for DaVinci DM365 SOC.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

DM9000 init for pm9261

Signed-off-by: Ilko Iliev <iliev@ronetix.at>

Add support for the DevKit8000 board

This patch adds support for the DevKit8000 board.

Signed-off-by: Frederik Kriewitz <frederik@kriewitz.eu>

omap3: move the other boards to board/

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

arm: move Logicpd's boards to board/logicpd/

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

omap: move TI's boards to board/ti/

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

ARM: Update mach-types

Signed-off-by: Wolfgang Denk <wd@denx.de>

push LOAD_ADDR out to arch mk files

Rather than maintain/extend the current ifeq($(ARCH)) mess that exists in
the standalone Makefile, push the setting up of LOAD_ADDR out to the arch
config.mk (and rename to STANDALONE_LOAD_ADDR in the process). This keeps
the common code clean and lets the arch do whatever crazy crap it wants in
its own area.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

zlib: fix code when DEBUG is defined

Removed stdio.h inclusion and moved trace macros to use printf avoiding to
write debug informations to standard error.

Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>

License cleanup: remove unintended "All Rights Reserved" notices.

Some files included my old standerd file header which had a "All
Rights Reserved" part. As this has never been my intention, I remove
these lines to make the files compatible with GPL v.2 and later.

Signed-off-by: Wolfgang Denk <wd@denx.de>

cmd_mtdparts.c: fix compiler warning in debug code

Fix warning messages:
cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long
unsigned int', but argument 6 has type 'u32'
cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long
unsigned int', but argument 7 has type 'u32'

Signed-off-by: Wolfgang Denk <wd@denx.de>

Move uninitialized_var() macro from ubi_uboot.h to compiler.h

This is needed so that we could use this macro for non-UBI code.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>

arm: Remove -fno-strict-aliasing

-fno-strict-aliasing is hidding warnings.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

ppc: Remove -fno-strict-aliasing

-fno-strict-aliasing is hidding warnings.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

galaxy5200: Add chip select region for an Epson S1D15313

Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>

Add ability for arch code to make changes before we boot

Added a arch_preboot_os() function that cpu specific code can implement to
allow for various modifications to the state of the machine right before
we boot. This can be useful to setup register state to a specific
configuration.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

Use different PBA value for E1000 PCI and PCIe cards

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: André Schwarz <andre.schwarz@matrix-vision.de>

Add PCI support to eNET board

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

i386: Moved PCI from #ifdef to conditional compile for sc520 boards

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

i386: Replace [read, write]_mmcr_[byte, word, long] with memory mapped structure

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

Misc sc520 cdp fixups

Now that the PCI, SATA et al compile problems have been resolved, the
cludge that was applied to avoid them can be removed

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

Fixup sc520_spunk board

Primary intent is to resolve build errors for this board which has been
neglected for a very long time. I do not have one of these boards, so I
cannot test functionality

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

Misc ds1722 fixups

This patch is based on a patch submitted by Jean-Christophe PLAGNIOL-VILLARD
on 18th May 2008 as part of a general i386 / sc520 fixup which was never
applied

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

Misc ti_pci1410a fixups

Removed do_pinit() - now declared in cmd_pcmcia.c

Added #define CONFIG_CMD_PCMCIA around pcmcia_off() in line with other
PCMCIA drivers

signed/unsigned type fixups

Added semi-colon after default: label as required by newer gcc

The only board that appears to use this driver is the sc520_spunk which
is very old and very likely very broken anyway. I do not have one to test
whether this patch breaks anything functionaly, I have can only check
that it compiles without warning or error

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

Misc SATA fixups

Cast first parameter to sata_cpy()

In /drivers/block/ata_piix.h, ata_id_has_lba48(), ata_id_has_lba(),
ata_id_has_dma(), ata_id_u32(), ata_id_u64() are all defined in
include/libata.h which is included in ata.h which is included by all files
which include ata_piix.h (only ata_piix.c) so these definitions are
supurflous to (and conlict with) this in libata.h. Interestingly, my
compiler complains about ata_id_u64 already being defined, but not
ata_id_u32

ata_dump_id() is defined in include/libata.h and should not be static
(maybe should even use ata_dump_id() in libata.c

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

i386: Misc PCI fixups

Change PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY (Originally done in
commit ff4e66e93c1a, regressed by commit 6d7f610b09f8)

Cast PCI_ROM_ADDRESS_MASK to u32

Wrap probe_pci_video() call inside #ifdef CONFIG_VIDEO

Change call to pci_find_class() to pci_find_devices(). This is based on a
patch submitted on 1st March 2007 (Patch that fixes the compilation errors
for sc520_cdp board) by mushtaq_k

This patch requires that PCI_VIDEO_VENDOR_ID and PCI_VIDEO_DEVICE_ID be
specified in the board config file. Dummy values have been added for the
SC520 CDP board to enable compilation, but since I do not have one of these,
I do know what the values should be

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

Fix sc520 timer interrupt generation

The current implementation has the timer being started before the interrupt
handler is installed. It the interrupt occurs before the handler is
installed, the timer interrupt is never reset and the timer stops

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

Fix environment configuration for eNET board

The current configuration of the Environment has the redundant copy of the
environment in the Boot Flash - This was never the intent. The Environment
should instead be in the first two sectors of the first Strata Flash

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

i386: Fix regression introduced by commit 8c63d47651f7

A local variable was deleted that should not have been

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

i386: Change inline asm global symbols to local

gcc 4.3.2 optimiser creates multiple copies of inline asm (who knows why)
Remove use of global names for labels to prevent 'symbol already defined'
errors

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

i386: Add errno.h

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>

Consolidate arch-specific mem_malloc_init() implementations

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

Standardize mem_malloc_init() implementation

This lays the groundwork to allow architectures to share a common
mem_malloc_init().

Note that the x86 implementation was not modified as it did not fit the
mold of all other architectures.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

Consolidate arch-specific sbrk() implementations

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

atmel_df_pow2: standalone to convert dataflashes to pow2

Atmel DataFlashes by default operate with pages that are slightly bigger
than normal binary sizes (i.e. many are 1056 byte pages rather than 1024
bytes).  However, they also have a "power of 2" mode where the pages show
up with the normal binary size.  The latter mode is required in order to
boot with a Blackfin processor, so many people wish to convert their
DataFlashes on their development systems to this mode.  This standalone
application does just that.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Blackfin: cm-bf548: fix device->stdio_dev fallout

The recent 52cb4d4fb348 commit which renamed device to stdio_dev missed the
cm-bf548's video board.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Blackfin: enable 64bit printf for nand

Since the NAND code now uses 64bit code, make sure we enable support for
ADI Blackfin boards in printf to avoid the warning:
nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output!

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Blackfin: use scratch pad for exception stack

If the memory layout pushes the stack out of the default DCPLB coverage,
the exception handler may trigger a double fault by trying to push onto
the uncovered stack. So handle the exception stack similar to the kernel
by using the top of the scratch pad SRAM.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Blackfin: increase default console size

The default console size indirectly applies to length of env vars, so a
smaller length makes it hard to pass longer command lines to kernels.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Blackfin: fix debug printf modifiers

The display_global_data() function generated warnings with pretty much
every variable.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Blackfin: cm-bf537u: new board port

The CM-BF537U is similar to the CM-BF537E module, but enough to need its
own board port.

Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Blackfin: change global data register from P5 to P3

Since the Blackfin ABI favors higher scratch registers by default, use the
last scratch register (P3) for global data rather than the first (P5).
This allows the compiler's register allocator to use higher number scratch
P registers, which in turn better matches the Blackfin instruction set,
which reduces the size of U-Boot by more than 1024 bytes...

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Blackfin: enable more network commands for ADI dev boards

Add dns and ntp to default networking commands, and ask for more dhcp
options to better configure the network environment.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Blackfin: bf537-stamp: comment CF-Flash Card Support better

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Blackfin: use +(filesize) to make sure we are only doing what is necessary

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

Support for the Calao TNY-A9260/TNY-A9G20 boards

The Calao TNY-A9260 and TNY-9G20 are boards manufactured and sold by
Calao Systems <http://www.calao-systems.com>. Their components are very
similar to the AT91SAM9260EK board, so their configuration is based on
the configuration of this board. There are however some differences:
different clocks, no LCD, no ethernet. They also can use SPI EEPROM to
store the environment.

Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

arm: Kirkwood: add SYSRSTn Duration Counter Support

This feature can be used to trigger special command "sysrstcmd" using
reset key long press event and environment variable "sysrstdelay" is set
(useful for reset to factory or manufacturing mode execution)

Kirkwood SoC implements a hardware-based SYSRSTn duration counter.
When SYSRSTn is asserted low, a SYSRSTn duration counter is running.
The counter value is stored in the SYSRSTn Length Counter Register
The counter is based on the 25-MHz reference clock (40ns)
It is a 29-bit counter, yielding a maximum counting duration of
2^29/25 MHz (21.4 seconds). When the counter reach its maximum value,
it remains at this value until counter reset is triggered by setting
bit 31 of KW_REG_SYSRST_CNT

Implementation:
Upon long reset assertion (> ${sysrstdelay} in secs) sysrstcmd will be
executed if pre-defined in environment variables.
This feature will be disabled if "sysrstdelay" variable is unset.

for-ex.
setenv sysrst_cmd "echo starting factory reset;
nand erase 0xa0000 0x20000;
echo finish ed sysrst command;"
will erase particular nand sector if triggered by this event

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>

Add support for the Calao SBC35-A9G20 board

The Calao SBC35-A9G20 board is manufactured and sold by Calao Systems
<http://www.calao-systems.com>. It is built around an AT91SAM9G20 ARM SoC
running at 400MHz. It features an Ethernet port, an SPI RTC backed by an onboard
battery , an SD/MMC slot, a CompactFlash slot, 64Mo of SDRAM, 256Mo of NAND
flash, two USB host ports, and an USB device port. More informations can be
found at <http://www.calao-systems.com/articles.php?lng=en&pg=5936>

Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>

imx27lite: add support for imx27lite board from LogicPD

This patch adds support for i.MX27-LITEKIT development board from
LogicPD. This board uses i.MX27 SoC and has 2MB NOR flash, 64MB NAND
flash, FEC ethernet controller integrated into i.MX27.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Acked-by: Wolfgang Denk <wd@denx.de>

at91sam9260/afeb9260: Fix SPI initialization

Commit 7ebafb7ec1a0285af8380623c009576f92583b98 introduced a mistake in the spi
init function call for those boards. This patch fixes this.

Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>

Remove duplicate set_cr

Remove duplicate set_cr

set_cr is defined in both asm-arm/proc-armv/system.h and
include/asm-arm/system.h. This patch removes it (and some duplicate
defines) from the former.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>

Merge branch 'next' of ../next

Prepare 2009.08

Update CHANGELOG

Signed-off-by: Wolfgang Denk <wd@denx.de>

Add common code dir for Matrix Vision boards.

This fixes current build failure.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
mvblm7.c: fix warning: implicit declaration of function
'mv_reset_environment'

Signed-off-by: Wolfgang Denk <wd@denx.de>

bugfix CONFIG_SYS_CONSOLE_INFO_QUIET

The "console: unify printing current devices" patch goofed:
CONFIG_SYS_CONSOLE_INFO_QUIET is supposed to *REMOVE* boot
time noise, not add it. Said patch changed the #ifndefs
to #ifdef; this one restores them to the proper sense.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

fsl: simplify the "mac id" command, improve boot-time informational message

The "mac id" command took a 4-character parameter as the identifier string.
However, for any given board, only one kind of identifier is acceptable, so it
makes no sense to ask the user to type it in.  Instead, if the user enters
"mac id", the identifier (and also the version, if it's NXID) will
automatically be set to the correct value.

Improve the message that is displayed when EEPROM is read during boot.  It now
displays "EEPROM:" and then either an error message or the EEPROM identifier
if successful.

If the identifier in EEPROM is valid, then always reject a bad CRC, even if the
CRC field has not been initialized.

Don't force the MAC address count to MAX_NUM_PORTS or less.  Forcing the value
to be changed resulting in an in-memory copy that does not match what's in
hardware, even though the user did not request that change.

Finally, always update the CRC value in the in-memory copy after any field
is changed, so that the CRC is always correct.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Added PCIe support for P1 P2 RDB

Call fsl_pci_init_port() to initialize all the PCIe ports on the board.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

driver/fsl_pci: Add fsl_pci_init_port function to initialize a PCI controller

fsl_pci_init_port can be called from board specific PCI initialization
routines to setup the PCI (or PCIe) controller. This will reduce code
redundancy in most of the 85xx/86xx FSL board ports that setup PCI.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Improve MPIC initialization

The MPIC initialization code for Freescale e500 CPUs was not using I/O
accessors, and it was not issuing a read-back to the MPIC after setting
mixed mode. This may be the cause of a spurious interrupt on some systems.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Added support for P1011RDB and P2010RDB

P1011 and P2010 are single core variants of P1010 and P2020 respectively.
The board(RDB) will be same.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Added single core members of FSL P1xx/P2xx processors series

P1011 - Single core variant of P1020
P2010 - Single core variant of P2020

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: P1020RDB Support Added

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Added CONFIG_MAX_CPUS for P1020

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Add L2SRAM Register's macro definition

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Fix memory test range on MPC8536DS

With current values of CONFIG_SYS_MEMTEST_START and CONFIG_SYS_MEMTEST_END
memory test hangs if run without arguments. Set them to sane values, so
that all available 512MB of RAM excluding exception vectors at the bottom
and u-boot code and stack at the top can be tested.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Removed BEDBUG support on P1_P2_RDB

To match all other 85xx platforms we are removing BEDBUG support.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Init pci ethernet cards if we enable any on MPC8572DS

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

xes: Use proper IO access functions

Also fix some minor whitespace oddities while we're cleaning up

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Move to a common linker script

There are really no differences between all the 85xx linker scripts so
we can just move to a single common one. Board code is still able to
override the common one if need be.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Added P1020 Processor Support.

P1020 is another member of QorIQ series of processors which falls in ULE
category. It is an e500 based dual core SOC.

Being a scaled down version of P2020 it has following differences:
- 533MHz - 800MHz core frequency.
- 256Kbyte L2 cache
- Ethernet controllers with classification capabilities.
Also the SOC is pin compatible with P2020

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Add support for P2020RDB board

The code base adds P1 & P2 RDB platforms support.
The folder and file names can cater to future SOCs of P1/P2 family.
P1 & P2 processors are 85xx platforms, part of Freescale QorIQ series.

Tested following on P2020RDB:
1. eTSECs
2. DDR, NAND, NOR, I2C.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx

The number of CPUs are getting detected dynamically by checking the
processor SVR value. Also removed CONFIG_NUM_CPUS references from all
the platforms with 85xx/86xx processors.

This can help to use the same u-boot image across the platforms.

Also revamped and corrected few Freescale Copyright messages.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

8xxx: Refactored common cpu specific code for 85xx/86xx into one file.

Removed same code pieces from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c
and moved to cpu/mpc8xxx/cpu.c(new file)

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

stx: create common vendor/board hierarchy for STx boards

Move files belonging to the STx boards into common vendor directory and
update the Makefile to reflect this.

Signed-off-by: Alex Dubov <oakad@yahoo.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Remove unused CONFIG_CLEAR_LAW0 defines

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

86xx: Remove redudant PLATFORM_CPPFLAGS

For historic reasons we had defined some additional PLATFORM_CPPFLAGS like:

PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8641=1

However these are all captured in the config.h and thus redudant. Also
moved common 86xx flags into cpu/mpc86xx/config.mk.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Remove redudant PLATFORM_CPPFLAGS

For historic reasons we had defined some additional PLATFORM_CPPFLAGS
like:

PLATFORM_CPPFLAGS += -DCONFIG_E500=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1

However these are all captured in the config.h and thus redudant.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Add a 36-bit physical configuration for MPC8536DS

We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary
to allow for larger memory sizes.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

85xx: Cleanup whitespace in mpc8536ds.c

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

pci/fsl_pci_init: Rework PCI ATMU setup to handle >4G of memory

The old PCI ATMU setup code would just mimic the PCI regions into the
ATMU registers.  For simple memory maps in which all memory, MMIO, etc
space fit into 4G this works ok.  However there are issues with we have
>4G of memory as we know can't access all of memory and we need to
ensure that PCICSRBAR (PEXCSRBAR on PCIe) isn't overlapping with
anything since we can't turn it off.

We first setup outbound windows based on what the board code setup
in the pci regions for MMIO and IO access.  Next we place PCICSRBAR
below the MMIO window.  After which we try to setup the inbound windows
to map as much of memory as possible.

On PCIe based controllers we are able to overmap the ATMU setup since
RX & TX links are separate but report the proper amount of inbound
address space to the region tracking to ensure there is no overlap.

On PCI based controllers we use as many inbound windows as available to
map as much of the memory as possible.

Additionally we changed all the CCSR register access to use proper IO
accessor functions.  Also had to add CONFIG_SYS_CCSRBAR_PHYS to some
86xx platforms that didn't have it defined.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>