zink: disable queries for clear_texture()

this otherwise can do weird things

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21628>

ci/ci_run_n_monitor: while we usually disable many jobs, print them inline

Saving scrolling time...

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21713>

radv: Use LDS for closest-hit hit attributes

Q2RTX: 23.1ms -> 22.9ms

shader-db:
Totals from 19 (0.69% of 2764) affected shaders:

MaxWaves: 197 -> 208 (+5.58%)
Instrs: 87702 -> 87817 (+0.13%); split: -0.03%, +0.16%
CodeSize: 474320 -> 475128 (+0.17%)
VGPRs: 1840 -> 1728 (-6.09%)
Latency: 2771599 -> 2773173 (+0.06%); split: -0.13%, +0.18%
InvThroughput: 561281 -> 533010 (-5.04%); split: -5.16%, +0.12%
VClause: 2782 -> 2788 (+0.22%); split: -0.18%, +0.40%
Copies: 12115 -> 12136 (+0.17%); split: -0.45%, +0.63%
Branches: 4116 -> 4122 (+0.15%)
PreVGPRs: 1665 -> 1638 (-1.62%); split: -1.92%, +0.30%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21635>

radv: Extend hit attribute lowering for LDS

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21635>

asahi: Wire up compute kernels

Now that we have multiple sysval tables, implementing compute kernels --
including with indirect dispatch and load_num_workgroups -- is straightforward.
This patch adds the straightforward launch_grid implementation.

As usual needs UAPI support patches to actually do anything, but the relevant
compute tests are passing downstream.

It's not possible to properly test compute shaders support right now (pending
support for images), so we don't update the CAPs or features.txt here. This is
more about flushing out the piles of downstream patches we have (and getting
reviewed!) in preparation for cutting a downstream release soon.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21703>

asahi: Rework system value lowering

The previous lowering was insufficient in two areas:

* No support for indirection. This is required for dynamically indexing into
  UBOs, SSBOS, etc in OpenGL ES 3.2

* Only a single table supported. Multiple tables are required to implement
  indirect dispatch/draws efficiently, in order to bind the indirect buffer as
  uniforms.

The first problem is addressed here by reworking the lowering of
system values to happen in NIR, decoupled from the uniform register assignment
details, such that we can handle 1:n lowerings in a straightforward way.
Namely, indirect sysvals are lowered to indirect memory loads relative to the
base address of the sysval table, where the table address is itself pushed as a
(direct) sysval.

The second problem is addressed in this patch by generalizing to multiple
uniform tables.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21703>

agx: Handle fragment shader side effects

Fragment shaders with side effects need to be lowered to ensure they execute for
all shaded pixels but no helper threads. Add a lowering pass to handle this.

Fixes dEQP-GLES31.functional.shaders.opaque_type_indexing.atomic_counter.const_literal_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21712>

agx: Disable tri merging with side effects

As Metal does.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21712>

crocus/meson: add dependency on libintel_dev also for versioned static libraries

Fixes: a0fa31bcdd8 ("intel/dev: create a helper dependency for libintel_dev")

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21709>

vk/runtime: Use libdrm shim

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21636>

loader: Use libdrm shim

Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21636>

turnip: Use libdrm shim

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21636>

util: Add a simple no-op libdrm shim

Make it easier to deal with build configs that do not have libdrm.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21636>

ci/freedreno: rare flake KHR-GL45.sample_variables.mask.rgba8i.samples_4.mask_3

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21718>

ci/lavapipe: add recent occasional flake

Issue: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8441

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21717>

r600/sfn: Fix atomic lowering

Fixes: 56dedf052f4af1903a0d312eb9c7721c69f36c69
  r600/sfn: add r600 specific lowering pass for atomics and use it

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>

r600/sfn/tests: Add a test for the copy prop into a group

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>

r600/sfn: redirect copy propagation to alu parent group

If an ALU instruction was emitted from the get-go as group, then
we have to make sure that replacing a source doesn't violate the
readport configuration in the group.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8374

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>

r600/sfn: Add print method to AluReadportValidation

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>

r600/sfn: Add method to AluGroup to replace sources

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8374

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>

r600/sfn: Split AluInstr replace_source into test and actual replace

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8374

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>

r600/sfn: Add AluGroup method to update readport validation from scratch

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8374

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21684>

asahi/meta: Use lowered I/O

No point in creating a variable when we can just synthesize the store_output
directly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>

asahi: Bump shader buffers

No reason to limit it, it's direct access anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>

agx: Only lower int64 late

This is required for address arithmetic to be lowered properly for compute
kernels, which may have u2u64 in the source NIR.

No shader-db changes (for GLES3.0).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>

agx: Don't print pre-optimization shader

It's usually too noisy to be useful, especially before DCE. The optimized (but
pre-RA) shader is usually the useful bit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>

agx: Use agx_emit_collect for st_tile

Instead of open coding.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>

agx: Refactor vector creation

agx_vec4 is unused, drop in, and split out the common logic since we'll use it
in a new helper.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>

agx: Constify agx_print

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>

agx: Inline 16-bit load/store offsets

Most integer immediates are only 8-bit, but load/store instructions allow their
immediate offsets to be 16-bit instead. Take advantage of this in the optimizer.
This eliminates 36% of the instructions in
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.36, a fitting
percentage.

Insignificant effect on dEQP-GLES31.functional.ssbo.* performance... Only a
small % of our compile-time pie is actually spent in the backend anyway (as
opposed to NIR passes or GLSL IR).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>

agx: Factor out allows_16bit_immediate check

The optimizer needs this information to inline immediates effectively.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>

agx: Clean up after lowering address arithmetic

This avoids creating silly preambles that don't actually do anything except push
a constant that we could've inlined for cheaper anyway, since nir_opt_preamble's
cost model is sensitive to e.g. constant folding.

This avoids a pointless preamble in split-hell.

As a nice bonus, this also improves compile-time on address-heavy shaders. With
a release build, CPU time in dEQP-GLES31.functional.ssbo.* reduces from 12.87s
to 10.77... a 16% improvement is nothing to sneeze at.

shader-db results are mostly noise.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>

agx: Add AGX_MESA_DEBUG=nopreamble option

Useful both for ruling out issues with shader preambles as well as (in some
cases) making for a nicer reading experience of the compiled assembly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21430>

agx: Don't write sample mask from preambles

It doesn't make sense, they're basically little compute kernel environments.
Noticed while debugging dEQP-GLES31.functional.fbo.no_attachments.multisample.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21710>

asahi: Mark PIPE_FORMAT_NONE "supported"

Kinda silly but fixes
dEQP-GLES31.functional.state_query.integer.max_framebuffer_samples_* which
queries the number of samples of a NONE format, required for
ARB_framebuffer_no_attachments to make sense.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21710>

agx: Fix 2D MSAA array texture register allocation

Sample index and layer index are both 16-bits, even though they are zero
extended for compiler simplicity in some cases. In particular this means that 2D
MSAA arrays consume 6 half-regs for their coordinates, not 8. This is what the
IR translation (actually agx_nir_lower_texture) produces, we just need to fix
the calculation in agx_read_registers to agree.

Fixes validation failure in tests like
dEQP-GLES31.functional.texture.multisample.samples_4.use_texture_color_2d_array

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21708>

agx: Mask shifts in the backend

This gives our shifts SM5 behaviour at the cost of a little extra ALU. That way,
we match NIR's shifts.

This fixes unsoundness of GLSL expressions like "a << (b & 31)", where the &
would mistakenly get optimized away.

Closes: #8181
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reported-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21673>

asahi: Advertise dual-source blending

This is handled entirely in common code.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21545>

wsi/display: check alloc failure in wsi_display_alloc_connector()

vulkancts test dEQP-VK.wsi.direct_drm.surface.create_simulate_oom is failing
because in wsi_display_alloc_connector() function memory allocation for
connector is not checked for return NULL. create_simulate_oom test simulates
out of memory, hence memory allocation fails for connector and later when
tried to dereference connector program will segfault.

This patch fixes the dEQP-VK.wsi.direct_drm.surface.create_simulate_oom test
segfault issue by checking if connector is NULL afer memory allocation.

Cc: mesa-stable
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21701>

freedreno/a6xx: Fix mirror x/y blits

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21706>

freedreno/a6xx: Convert blitter to OUT_REG()

We'll need this to add a7xx support, since some of the regs are
different btwn a6xx and a7xx and reg variants are not supported with
the legacy reg builders.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21706>

freedreno/a6xx: Namespace reg/pkt packer vars

Otherwise they could conflict with parameters to the reg/pkt.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21706>

pan/mdg: Use nir_lower_helper_writes

It's now in common code, drop our (buggier) copy.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21413>

nir: Add nir_lower_helper_writes pass

This NIR pass lowers stores in fragment shaders to:

   if (!gl_HelperInvocaton) {
      store();
   }

This implements the API requirement that helper invocations do not have visible
side effects, and the lowering is required on any hardware that cannot directly
mask helper invocation's side effects. The pass was originally written for
Midgard (which has this issue) but is also needed for Asahi. Let's share the
code, and fix it while we're at it.

Changes from the Midgard pass:

1. Add an option to only lower atomics.

   AGX hardware can mask helper invocations for "plain" stores but not for
   atomics.  Accordingly, the AGX compiler wants this lowering for atomics but
   not store_global. By contrast, Midgard cannot mask any stores and needs the
   lowering for all store intrinsics. Add an option to the common pass to
   accommodate both cases.

   This is an optimization for AGX. It is not required for correctness, this
   lowering is always legal.

2. Fix dominance issues.

   It's invalid to have NIR like

      if ... {
         ssa_1 = ...
      }

      foo ssa_1

   Instead we need to rewrite as

      if ... {
         ssa_1 = ...
      } else {
         ssa_2 = undef
      }
      ssa_3 = phi ssa_1, ssa_2

      foo ssa_3

   By default, neither nir_validate nor the backends check this, so this doesn't
   currently fix a (known) real bug. But it's still invalid and fails validation
   with NIR_DEBUG=validate_ssa_dominance.

   Fix this in lower_helper_writes for intrinsics that return data (atomics).

3. Assert that the pass is run only for fragment shaders. This encourages
   backends to be judicious about which passes they call instead of just
   throwing everything in a giant lower everything spaghetti.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21413>

asahi: Assert on TIB strides > 64

These just don't seem to work. macOS falls back to eMRT here...

dEQP-GLES3.functional.draw_buffers_indexed.random.max_implementation_draw_buffers.13
from Fail -> Crash. Proper solution will come when we implement eMRT later on.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21705>

nir/range_analysis: fix vectorized phis and intrinsics

Found by inspection.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21288>

vk: be stricter about symbols check between android and other platforms

Don't allow HMI on non-Android, don't allow non-HMI on Android, and
don't allow missing HMI on Android.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>

android/vk: drop unnecessary symbols

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>

vn: add linker script to fix android symbols

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>

anv: add linker script to fix android symbols

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>

tu: add linker script to fix android symbols

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>

v3dv: add linker script to fix android symbols

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>

vk: move radv's linker symbols scripts for use in all drivers

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>

anv: VK_EXT_image_sliced_view_of_3d

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>

isl: Set Depth to array len for 3D storage images

This is necessary for RESINFO to work properly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>

intel/blorp: Set array_len for 3D images properly

We need to minify the depth so we don't set a size that's out-of-bounds.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>

vulkan/runtime: only consider slice info with 3D image views

Because we can have 2D views of 3D images, we want to consider the
slice info only with 3D *image views*.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 66e3ccbcac ("vulkan/runtime: store parameters of VK_EXT_sliced_view_of_3d")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>

vulkan/runtime: Rename and document storage image Z range

This makes it more clear that the fields specifically apply to the Z
range and aren't array slices.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>

venus: shader cache fossilize replay fix

venus utilizes the host side shader cache.

This is a WA to generate shader cache files containing headers with
a unique cache id that will change based on host driver identifiers.
This allows fossilize replay to detect if the host side shader cache
is no longer up to date.
The shader cache is destroyed after creating the necessary files and
not utilized by venus.

Signed-off-by: Juston Li <justonli@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21664>

ci/zink: add skip for the Single-GL46.enhanced_layouts.ssb_member_align_non_power_of_2

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21668>

ci: Retry, retry, retry... No one likes to trigger Marge more than once.

Sadly, have to decrease retry attempts from 2 to 1 for `runner_system_failure` since it's not doable while keeping one attempt for every other failure.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21668>

ci: deqp-runner: drop already unused function

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21668>

ci: make meson build and test uncollapsed

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8419

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21668>

d3d12: VP9 Decode - Fix use_prev_in_find_mvs_refs calculation

Fixes: c8e8ce83 ("d3d12: Add VP9 Decode support")

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21694>

frontend/va: Keep track of some VP9 previous frame data for current frame use_prev_in_find_mvs_refs

Fixes: c8e8ce83 ("d3d12: Add VP9 Decode support")

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21694>

radv/rt: Use ushr for extracting the cull mask

Fixes the following tests:
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.ahit.4_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.ahit.16_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.chit.4_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.chit.16_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.isec.4_bits
dEQP-VK.ray_tracing_pipeline.acceleration_structures.ray_cull_mask.gpu_built.isec.16_bits

Fixes: 2d93ab7 ("radv/rt: Pre shift cull_mask")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21659>

util: Add util_format_get_array.

This is a poor man's version of MESA_ARRAY_FORMAT.
Implemented based on a gigantic switch-case
with some help from the C preprocessor.
Thank you, preprocessor!

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21692>

asahi: clang-format the world again

Some things were missed (like winsys) and there's still some bad include
orders lying around and some other randomness.

We should set up CI checks for this soon... ^^;;

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21687>

intel/vk/grl: genX-ify grl_cl_kernel_name()

I don't see any code calling this, but with multiple gens, the symbol
name would conflict.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21670>

intel/vk/grl: genX-ify genX_grl_uuid.cpp

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21670>

intel/vk/grl: Allow grl/grl_cl_kernel.h to be included by C++ files

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21670>

intel/vk/grl: Allow genX_grl.h to be included by C++ files

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21670>

intel/vk/grl: Don't include anv_private.h in genX_grl.h

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21670>

asahi/winsys: add .clang-format

Copied from src/asahi/.clang-format

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21691>

asahi: Destroy the renderonly context on screen destroy

This fixes an fd leak due to leaving behind the dup'd renderonly fd.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21677>

asahi: Fix device fd leak in agx_close_device

I'm not sure if this was always broken downstream or just got dropped at
some point, but it's definitely UAPI-agnostic and missing now that we
have all the non-UAPI bits upstream.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21677>

asahi/decode: Handle VDM barriers

We emit these now (for transform feedback).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21675>

docs/feature: Mark ARB_sync as done on Asahi

Strictly, this extension was already advertised, but it didn't seem nice to mark
it DONE when there was no sync support in the driver whatsoever. Mark it done
now that we do have proper explicit sync (well, in conjunction with the "add
Linux UAPI" patches that are blocked on getting the kernel driver upstream, but
that's needed for *any* of these extensions to be there!)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21676>

radv: Emulate VGT_ESGS_ITEMSIZE in shaders on GFX9+.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21434>

aco: make IDSet sparse

Improves compilation time of huge shaders.

A ray tracing pipeline of Hellblade: Senua's Sacrifice compiles in about
half the time, with this patch.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8179
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21022>

asahi: Fix scissor culling check when out of bounds for FB/viewport

Fixes a bunch of the `assert(maxx > minx && maxy > miny)` failures in
dEQP-EGL and probably others.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21678>

asahi: Do not overread user index buffers

We need to align the extent to 4 for the GPU, but we can't copy more
than the original size out of the user buffer. Always alloc the exact
size we need.

This does mean the GPU gets an IB extent that could include some other
stuff later in the pool, if not aligned. This is probably safe? Given
the base alignment, it should never cross a page boundary and fault or
anything like that.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21686>

iris: Add iris_bo_set_caching()

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21688>

iris: Move iris_bo_madvise() to i915/iris_bufmgr.c

Start to split functions that are not in hot paths to specific i915
files.

Also making it static as iris_bo_madvise() is only called from
iris_bufmgr.c and adding a enum iris_madvice to be used among all
backends.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21688>

aco/tests: add tests for v_fma_f32 with 2 fp16 literals

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21633>

blorp: add dependency on idep_intel_dev

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3c9a8f7a6d ("intel/dev: generate helpers to identify platform workarounds")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8421
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21679>

crocus/meson: add back dependency on libintel_dev

Fixes: a0fa31bcdd8 ("intel/dev: create a helper dependency for libintel_dev")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21679>

anv: add gfx9 generated draw support

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

anv: remove unused item_count parameter

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

anv: use a list of generated shaders

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

anv: move common shader code into header

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

anv: pack more data into generated draws input

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

anv: use 64bit int support in generation shaders

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

anv: rename generated draws for Gfx11

We'll need different shaders for Gfx9

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

anv: use a single generation shader for indirect draws

The indirect draw count shader can be used as a more generic case of
the indirect draw one. We'll never enter the last condition of the
shader (writing the MI_BATCH_BUFFER_START) with non count variants of
draws.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

anv: remove MI_NOOPs at the end of the generation batch

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

anv: make sure mi_memcpy lands before push constant loads

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e2dc32d755 ("anv: move functions around to plan for generated draws")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

anv: fix indirect draws VF cache tracking of index buffer

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e2dc32d755 ("anv: move functions around to plan for generated draws")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

anv: fix 3DSTATE_PS emission in generation shaders

We have to use the helper and also were missing the vector mask
programming.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>

anv: remove commented code

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>