Kirill Stoimenov [Thu, 1 Dec 2022 00:18:49 +0000 (00:18 +0000)]
[HWASAN] Modified __hwasan::Thread::unique_id_ to be u32 instead of u64.
This is needed for LSAN integration work. LSAN uses context to store thread_id << 32 + stack_id. In order to fit both we would need thread_id to be 32 bit.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D139060
Lei Zhang [Thu, 1 Dec 2022 00:35:41 +0000 (00:35 +0000)]
[mlir][spirv] Improve vector extract/insert element conversion
* Fix type conversions around positions--we need to use the
converted value from the adaptor.
* Convert constant position cases to composite extract/insert.
Reviewed By: kuhar
Differential Revision: https://reviews.llvm.org/D139057
Jakub Kuderski [Thu, 1 Dec 2022 00:25:39 +0000 (19:25 -0500)]
[mlir][spirv] Drop experimental LinalgToSPIRV pass
This experimental pass is unused and obsolete.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D139056
Lei Zhang [Thu, 1 Dec 2022 00:07:19 +0000 (19:07 -0500)]
[mlir][spirv] Check GlobalVariableOp result to be of pointer types
Querying the storage class in the verifier will assume the result
type is of pointer types. We need to check that's true first to
make sure it won't crash.
Reviewed By: kuhar
Differential Revision: https://reviews.llvm.org/D139053
Mircea Trofin [Wed, 30 Nov 2022 18:03:45 +0000 (10:03 -0800)]
[mlgo][nfc] Make `LoggedFeatureSpec` an implementation detail
It's an artifact very specific to using TFAgents during training, so it
belongs with ModelUnderTrainingRunner.
Differential Revision: https://reviews.llvm.org/D139031
Jakub Kuderski [Wed, 30 Nov 2022 23:52:54 +0000 (18:52 -0500)]
[mlir][vector] Reapply remaining cleanups from D139022. NFC.
It appears that structured bindings in function templates require extra
`template` keyword sparkled before `.cast<T>()` calls.
Peter Rong [Tue, 29 Nov 2022 02:42:11 +0000 (18:42 -0800)]
[FuzzMutate] New InsertPHINode strategy.
PHI Node can't be modeled like other instructions since its operand
number depends on predecessors. So we have a stand alone strategy for it.
Signed-off-by: Peter Rong <PeterRong96@gmail.com>
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D138959
LLVM GN Syncbot [Wed, 30 Nov 2022 22:46:01 +0000 (22:46 +0000)]
[gn build] Port
b95646fe7058
Jakub Kuderski [Wed, 30 Nov 2022 22:39:00 +0000 (17:39 -0500)]
[mlir][vector] Attempt to please gcc 9. NFC.
This is a post-commit fix to D139022.
Marco Elver [Wed, 30 Nov 2022 22:35:50 +0000 (23:35 +0100)]
Revert "Use-after-return sanitizer binary metadata"
This reverts commit
d3c851d3fc8b69dda70bf5f999c5b39dc314dd73.
Some bots broke:
- https://luci-milo.appspot.com/ui/p/fuchsia/builders/toolchain.ci/clang-linux-x64/
b8796062278266465473/overview
- https://lab.llvm.org/buildbot/#/builders/124/builds/5759/steps/7/logs/stdio
Jakub Kuderski [Wed, 30 Nov 2022 22:27:23 +0000 (17:27 -0500)]
Reapply "[mlir][vector] Clean up use of `llvm::zip` in `VectorOps.cpp`"
This reverts commit
0689edd68717df9218a6a8b2b3897263d36a5cc9.
Reapply D139022 without `enumerate` over `zip` to fix build errors on
gcc 9.4.
Jakub Kuderski [Wed, 30 Nov 2022 22:23:18 +0000 (17:23 -0500)]
Revert "[mlir][vector] Clean up use of `llvm::zip` in `VectorOps.cpp`"
This reverts commit
f22a573b2b8afaee88001168eeeb70c77f28a03e.
There's a buildbot that report compilation errors:
https://lab.llvm.org/buildbot/#/builders/199/builds/13507.
Roman Lebedev [Wed, 30 Nov 2022 22:16:21 +0000 (01:16 +0300)]
[NFC][SROA] Ensure that all check lines in SROA tests are autogenerated
Jakub Kuderski [Wed, 30 Nov 2022 22:11:35 +0000 (17:11 -0500)]
[mlir][vector] Clean up use of `llvm::zip` in `VectorOps.cpp`
- Use `zip_equal` where iteratees are supposted to have equal lenght.
- Use `zip_first` where the first iteratee is supposed to be the
shortest.
- Use `llvm::enumerate` instead of calculating index manually.
- Use structured bindings to unpack tuples where appropriate.
- Fix a bug in a comparison in `intersectsWhereNonNegative`.
Both `zip_first` (after D138858) and `zip_equal` (introduced in D138865)
assert interatee lengths, which allows us to more precisely convey
whether we want to iterate over the common prefix (`zip`), or expect all
lengths to be the same (`zip_equal`).
Reviewed By: dcaballe, antiagainst
Differential Revision: https://reviews.llvm.org/D139022
Paul Robinson [Wed, 30 Nov 2022 22:11:40 +0000 (14:11 -0800)]
[analyzer] Test depends on windows as host, not target
Adrian Prantl [Wed, 30 Nov 2022 22:06:58 +0000 (14:06 -0800)]
Add a log message to the IR interpreter.
This line existed in our internal branch and seems to be generally
useful, so I'm upstreaming it.
Eli Friedman [Wed, 30 Nov 2022 21:47:35 +0000 (13:47 -0800)]
[AArch64] Make sure we don't emit packed unwind for .seh_save_any_reg_p
Obvious oversight in implementation in D135417.
Differential Revision: https://reviews.llvm.org/D138955
Paul Robinson [Wed, 30 Nov 2022 21:32:42 +0000 (13:32 -0800)]
[Hexagon] Convert tests to check 'target=hexagon-.*'
Part of the project to eliminate special handling for triples in lit
expressions.
Arthur Eubanks [Wed, 23 Nov 2022 22:29:40 +0000 (14:29 -0800)]
[lldb] Change FindDefinitionTypeForDWARFDeclContext() to take DWARFDIE
This simplifies an upcoming patch.
Reviewed By: labath
Differential Revision: https://reviews.llvm.org/D138612
Jordan Rupprecht [Wed, 30 Nov 2022 21:20:13 +0000 (13:20 -0800)]
[DataFormatter] Fix variant npos with `_LIBCPP_ABI_VARIANT_INDEX_TYPE_OPTIMIZATION` enabled.
This data formatter should print "No Value" if a variant is unset. It does so by checking if `__index` has a value of `-1`, however it does so by interpreting it as a signed int.
By default, `__index` has type `unsigned int`. When `_LIBCPP_ABI_VARIANT_INDEX_TYPE_OPTIMIZATION` is enabled, the type of `__index` is either `unsigned char`, `unsigned short`, or `unsigned int`, depending on how many fields there are -- as small as possible. For example, when `std::variant` has only a few types, the index type is `unsigned char`, and the npos value will be interpreted by LLDB as `255` when it should be `-1`.
This change does not special case the variant optimization; it just reads the type instead of assuming it's `unsigned int`.
Reviewed By: labath
Differential Revision: https://reviews.llvm.org/D138892
Roy Sundahl [Wed, 30 Nov 2022 17:57:06 +0000 (09:57 -0800)]
[asan][aarch64] Don't use 64 bit allocator for Apple ios family
The recent change (https://reviews.llvm.org/D137136) to unconditionally
choose the 64 bit allocator on aarch64 breaks Apple iOS family of devices
which purposely use a smaller address space than is used with macOS.
rdar://
102527313
Reviewed By: thetruestblue, yln
Differential Revision: https://reviews.llvm.org/D139030
Samira Bazuzi [Wed, 30 Nov 2022 20:48:42 +0000 (12:48 -0800)]
[test] Fix aggregate initialization incompatible with c++20
In C++20, types that declare or delete any constructors are no longer aggregates, breaking compilation of many existing uses of aggregate initialization. In this test, provide a one-arg constructor so that `StructWithoutCopyOrMove{1}` still works.
Jonas Devlieghere [Wed, 30 Nov 2022 20:42:53 +0000 (12:42 -0800)]
[lldb] Use LLDB_ENABLE_SWIG as the canonical CMake variable
Use LLDB_ENABLE_SWIG instead of SWIG_EXECUTABLE or SWIG_FOUND as the
canonical CMake variable to determine whether we have SWIG available in
LLDB. This is a follow-up to
b3c978e850d3.
Sanjay Patel [Wed, 30 Nov 2022 20:31:55 +0000 (15:31 -0500)]
[InstSimplify] (X && Y) ? X : Y --> Y
Similar to the recent fold that was added for 'or' in D138815:
https://alive2.llvm.org/ce/z/PBapTJ
Sanjay Patel [Wed, 30 Nov 2022 20:28:11 +0000 (15:28 -0500)]
[InstSimplify] add tests for select with common 'and' ops; NFC
Alex Richardson [Fri, 18 Nov 2022 12:14:00 +0000 (12:14 +0000)]
[clang][TargetInfo] Use LangAS for getPointer{Width,Align}()
Mixing LLVM and Clang address spaces can result in subtle bugs, and there
is no need for this hook to use the LLVM IR level address spaces.
Most of this change is just replacing zero with LangAS::Default,
but it also allows us to remove a few calls to getTargetAddressSpace().
This also removes a stale comment+workaround in
CGDebugInfo::CreatePointerLikeType(): ASTContext::getTypeSize() does
return the expected size for ReferenceType (and handles address spaces).
Differential Revision: https://reviews.llvm.org/D138295
Paul Robinson [Wed, 30 Nov 2022 20:07:27 +0000 (12:07 -0800)]
[Windows] Canonicalize on 'target=.*-windows'
Part of the project to eliminate special handling for triples in lit
expressions.
Paul Robinson [Wed, 30 Nov 2022 20:02:06 +0000 (12:02 -0800)]
[PS4/PS5] Convert tests to check 'target=<triple>'
Part of the project to eliminate special handling for triples in lit
expressions.
Sanjay Patel [Wed, 30 Nov 2022 19:48:32 +0000 (14:48 -0500)]
[InstCombine] canonicalize trunc + insert as bitcast + shuffle, part 1 (2nd try)
The first attempt was reverted because a clang test changed
unexpectedly - the file is already marked with a FIXME, so
I just updated it this time to pass.
Original commit message:
This is the main patch for converting a truncated scalar that is
inserted into a vector to bitcast+shuffle. We could go either way
on patterns like this, but this direction will allow collapsing a
pair of these sequences on the motivating example from issue
The patch is split into 3 parts to make it easier to see the
progression of tests diffs. We allow inserting/shuffling into a
different size vector for flexibility, so there are several test
variations. The length-changing is handled by shortening/padding
the shuffle mask with undef elements.
In part 1, handle the basic pattern:
inselt undef, (trunc T), IndexC --> shuffle (bitcast T), IdentityMask
Proof for the endian-dependency behaving as expected:
https://alive2.llvm.org/ce/z/BsA7yC
The TODO items for handling shifts and insert into an arbitrary base
vector value are implemented as follow-ups.
Differential Revision: https://reviews.llvm.org/D138872
Slava Zakharin [Fri, 18 Nov 2022 20:08:02 +0000 (12:08 -0800)]
[flang] Use proper attributes for runtime calls with 'i1' arguments/returns.
Clang uses signext/zeroext attributes for integer arguments shorter than
the default 'int' type on a target. So Flang has to match this for functions
from Fortran runtime and also for BIND(C) routines. This patch implements
ABI adjustments only for Fortran runtime calls. BIND(C) part will be done
separately.
This resolves https://github.com/llvm/llvm-project/issues/58579
Differential Revision: https://reviews.llvm.org/D137050
Aart Bik [Tue, 29 Nov 2022 23:02:38 +0000 (15:02 -0800)]
[mlir][sparse][vectorization] implement "index" vectorization
This adds the capability to vectorize computations like a[i] = i.
This also generalizes the supported unary and binary ops and
adds a test for each to ensure actual SIMD code can result.
Reviewed By: bixia
Differential Revision: https://reviews.llvm.org/D138956
Shoaib Meenai [Wed, 30 Nov 2022 01:32:06 +0000 (17:32 -0800)]
[compiler-rt] Fix check-profile dependencies
It relies on InstrProfData.inc being in the compiler resource directory.
Reviewed By: ellis
Differential Revision: https://reviews.llvm.org/D138969
Shoaib Meenai [Wed, 30 Nov 2022 01:43:37 +0000 (17:43 -0800)]
[runtimes] Add check-profile dependencies to runtimes
check-profile needs llvm-cov and llvm-profdata.
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D138968
Shoaib Meenai [Wed, 30 Nov 2022 01:41:57 +0000 (17:41 -0800)]
[runtimes] Create check- targets for LLVM_RUNTIME_DISTRIBUTION_COMPONENTS
The sub-component check targets won't be automatically created until the
runtime configurations have run (and the main LLVM configure has rerun
afterwards). Work around this by creating check- targets for components
in LLVM_RUNTIME_DISTRIBUTION_COMPONENTS as well (and making sure they
get the proper test dependencies).
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D138967
Shoaib Meenai [Wed, 30 Nov 2022 01:38:12 +0000 (17:38 -0800)]
[runtimes] Support sub-components in LLVM_RUNTIME_DISTRIBUTION_COMPONENTS
Right now, sub-components are only accounted for when the runtime has
been configured and the main LLVM configure is rerun after that. We can
make use of LLVM_RUNTIME_DISTRIBUTION_COMPONENTS to make sub-component
targets available from the start, but that currently clashes with the
sub-component target generation once they are picked up. Make sure we
don't create duplicate targets; an analogous check already exists in
runtime_default_target.
Reviewed By: phosek
Differential Revision: https://reviews.llvm.org/D138966
Shoaib Meenai [Wed, 30 Nov 2022 01:34:23 +0000 (17:34 -0800)]
[runtimes] Name stripped install targets consistently
We were previously naming sub-component stripped install targets as
`install-${component}-stripped-${triple}`, whereas everywhere else names
them `install-${component}-${triple}-stripped`. This inconsistency would
cause issues when LLVM_RUNTIME_DISTRIBUTION_COMPONENTS contained a
sub-component (which I'm addding support for next).
Reviewed By: phosek, #libc, #libc_abi, ldionne
Differential Revision: https://reviews.llvm.org/D138965
Sanjay Patel [Wed, 30 Nov 2022 19:10:02 +0000 (14:10 -0500)]
Revert "[InstCombine] canonicalize trunc + insert as bitcast + shuffle, part 1"
This reverts commit
a4c466766db77cd1fb42d7f98f32bb87a3d38829.
This broke clang tests that are wrongly dependent on the optimizer.
Michael Maitland [Thu, 3 Nov 2022 17:27:32 +0000 (10:27 -0700)]
[RISCV][Codegen] Account for LMUL in Vector floating-point instructions
It is likley that subtargets act differently for vector floating-point instructions based on the LMUL.
This patch creates seperate SchedRead, SchedWrite, WriteRes, ReadAdvance for each relevant LMUL.
Differential Revision: https://reviews.llvm.org/D137426
Philip Reames [Wed, 30 Nov 2022 19:02:19 +0000 (11:02 -0800)]
[RISCV] Inline RISCVFrameLowering::adjustReg out of existance [nfc]
This was requested by a reviewer in D138926.
serge-sans-paille [Tue, 29 Nov 2022 06:45:55 +0000 (07:45 +0100)]
[Nomination] Adding Mozilla representative to security group
Hey folks,
I recently moved from Redhat to Mozilla, still working on compiler /
build issues. I'd like to both
- resign as a member of Redhat
- apply as a member of Mozilla
Mozilla's mission makes it very sensible to compiler security flags, so
it makes sense (at least to me) to have it represented in the group.
Although I've been a discrete member of group, I'm still actively
dealing with some security-related patches [0] and blogging about it [1,2]
[0] https://reviews.llvm.org/D137707
[1] https://developers.redhat.com/articles/2022/06/02/use-compiler-flags-stack-protection-gcc-and-clang
[2] https://developers.redhat.com/articles/2022/09/29/benefits-limitations-flexible-array-members
Differential Revision: https://reviews.llvm.org/D138898
Momchil Velikov [Wed, 30 Nov 2022 18:28:31 +0000 (18:28 +0000)]
[FuncSpec] Invalidate analyses when deleting a fully specialised function
Deleting a fully specialised function left dangling pointers in
`FunctionAnalysisManager`, which causes an internal compiler error
when the function's storage was reused.
Fixes bug #58759.
Reviewed By: ChuanqiXu
Differential Revision: https://reviews.llvm.org/D138909
Change-Id: Ifed378c748af35e8fe7dcbdddb0f41b8777cbe87
Philip Reames [Wed, 30 Nov 2022 18:44:51 +0000 (10:44 -0800)]
[RISCV] Adjust code to fallthrough to a single adjustReg callsite [nfc]
Note that we have to now pass alignment to that callsite because the wrapper previously did that for us for fixed offsets.
Craig Topper [Wed, 30 Nov 2022 18:28:55 +0000 (10:28 -0800)]
[RISCV] Teach getRegAllocationHints about compressible SRAI/SRLI.
Similar to previous patches for ADDI/ADDIW/SLLI/ADD, but restricted
to only cases where the register is x8-x15(GPRC reg class).
I've restricted it so that we can be precise about whether the
resulting instruction would be compressible. Changing the register
allocation may make some other instruction not compressible so we
should try to be accurate.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D138740
yijiagu [Wed, 30 Nov 2022 18:14:56 +0000 (10:14 -0800)]
Add async_funcs_only option to AsyncToAsyncRuntime pass
This change adds async_funcs_only option to AsyncToAsyncRuntimePass. The goal is to convert async functions to regular functions in early stages of compilation pipeline.
Differential Revision: https://reviews.llvm.org/D138611
Sanjay Patel [Wed, 30 Nov 2022 18:04:46 +0000 (13:04 -0500)]
[InstCombine] canonicalize trunc + insert as bitcast + shuffle, part 1
This is the main patch for converting a truncated scalar that is
inserted into a vector to bitcast+shuffle. We could go either way
on patterns like this, but this direction will allow collapsing a
pair of these sequences on the motivating example from issue
The patch is split into 3 parts to make it easier to see the
progression of tests diffs. We allow inserting/shuffling into a
different size vector for flexibility, so there are several test
variations. The length-changing is handled by shortening/padding
the shuffle mask with undef elements.
In part 1, handle the basic pattern:
inselt undef, (trunc T), IndexC --> shuffle (bitcast T), IdentityMask
Proof for the endian-dependency behaving as expected:
https://alive2.llvm.org/ce/z/BsA7yC
The TODO items for handling shifts and insert into an arbitrary base
vector value are implemented as follow-ups.
Differential Revision: https://reviews.llvm.org/D138872
Thurston Dang [Wed, 30 Nov 2022 18:18:28 +0000 (18:18 +0000)]
msan: update tests for new memory mappings on aarch64
D137666 changed the memory mappings for msan on aarch64.
This patch updates two more tests to match the new
mappings.
Differential Revision: https://reviews.llvm.org/D139033
Sterling Augustine [Wed, 30 Nov 2022 18:16:34 +0000 (10:16 -0800)]
Fix bazel build for https://reviews.llvm.org/D138980
Philip Reames [Wed, 30 Nov 2022 18:09:46 +0000 (10:09 -0800)]
[RISCV] Merge two versions of adjustReg on TRI [nfc]
After ac1ec9e, the version with the StackOffset param has a strict superset of behavior. As a result, we can switch callers to use it, and then inline the other version into the now-single caller.
Jay Foad [Wed, 30 Nov 2022 10:39:53 +0000 (10:39 +0000)]
[AMDGPU] Use s_cmp instead of s_cmpk
Don't bother pre-shrinking "s_cmp_lg_u32 reg, 0" to s_cmpk_lg_u32
because 0 is already an inline constant so the s_cmpk form is no
smaller.
This is just for consistency with the surrounding code and to simplify a
downstream patch.
Differential Revision: https://reviews.llvm.org/D138993
Valentin Clement [Wed, 30 Nov 2022 17:57:28 +0000 (18:57 +0100)]
[flang] Delegate pointer association to class(*) pointer to the runtime
Pointer association with an unlimited polymorphic pointer on the lhs
requires more than just updating the base_addr. Delegate the association to
the runtime function `PointerAssociation`.
Reviewed By: PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D139019
Philip Reames [Wed, 30 Nov 2022 17:38:21 +0000 (09:38 -0800)]
[RISCV] Reuse and generalize adjustReg from another spot in frame lowering [nfc]
Differential Revision: https://reviews.llvm.org/D138926
Thurston Dang [Wed, 30 Nov 2022 17:25:30 +0000 (17:25 +0000)]
msan: update shadow constant in strlen_of_shadow test
strlen_of_shadow hardcodes the mem-to-shadow
constant. That constant was changed in D137666;
this CL updates the test accordingly.
(Other tests will be updated separately.)
Differential Revision: https://reviews.llvm.org/D139027
Lei Zhang [Wed, 30 Nov 2022 17:33:38 +0000 (12:33 -0500)]
[mlir][spirv] Allow controlling subgroup size
This commit extends the `ResourceLimitsAttr` to support specifying
a minimal and maximal subgroup size, and extends `EntryPointABIAttr`
to support specifying the requested subgroup size. This is possible
now in Vulkan with the VK_EXT_subgroup_size_control extension.
For OpenCL it's possible to use the `SubgroupSize` execution mode
directly.
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D138962
Philip Reames [Wed, 30 Nov 2022 15:22:52 +0000 (07:22 -0800)]
[RISCV] Share code for fixed offsets adjustRegs (thus materializing fewer constants)
This reuses the existing optimized implementation of adjustReg, and commons up code. This has the effect of enabling two code changes for the new caller. First, we enable the "split andi" lowering (with no alignment requirement), and second we use a sub with smaller constant in register instead of a add with negative constant in register.
Differential Revision: https://reviews.llvm.org/D132839
Sam McCall [Wed, 30 Nov 2022 15:33:50 +0000 (16:33 +0100)]
[include-cleaner] Move RecordedPP::RecordedIncludes -> Includes in Types.h. NFC
Requiring everything that wants to match Includes to depend on Record is weird.
This isn't lightweight enough that it feels perfect in Types, could be its own
header instead. But pragmatically it doesn't add bad deps, and is widely used.
Differential Revision: https://reviews.llvm.org/D139014
Sam McCall [Wed, 30 Nov 2022 16:00:31 +0000 (17:00 +0100)]
[include-cleaner] Record whether includes are spelled with <angle> quotes
This is needed to accurately remove headers with tooling::IncludeHeaders in the
rare cases where <foo> and "foo" resolve to something different.
This is also nice to have in HTML report and command-line -print=changes output.
Differential Revision: https://reviews.llvm.org/D139018
eopXD [Wed, 30 Nov 2022 17:07:15 +0000 (09:07 -0800)]
[NFC] Add missing period
Florian Hahn [Wed, 30 Nov 2022 17:04:19 +0000 (17:04 +0000)]
Recommit "[VPlan] Add VPDerivedIVRecipe, use for VPScalarIVStepsRecipe."
This reverts commit
bf15f1e489aa2f1ac13268c9081a992a8963eb5b.
The updated version fixes a crash by checking the induction kind instead
of the opcode; for integer inductions, the step is always added, but the
opcode might not be set.
Archibald Elliott [Wed, 30 Nov 2022 15:18:14 +0000 (15:18 +0000)]
[Threading] Ensure Tests Reflect Disabled Threads
D137836 changed what llvm::get_physical_cores returns when threads are
disabled, to bring it inline with the other parts of Threading. It now
returns the value for "unknown" when threading is disabled.
This commit updates the tests (which are failing on some platforms), to
also reflect this change.
Differential Revision: https://reviews.llvm.org/D139015
Kazu Hirata [Wed, 30 Nov 2022 16:57:07 +0000 (08:57 -0800)]
[mlir] Fix a warning
This patch fixes:
mlir/lib/Dialect/Vector/IR/VectorOps.cpp:1751:13: error: unused
function 'allBitsSet' [-Werror,-Wunused-function]
Kazu Hirata [Wed, 30 Nov 2022 16:57:05 +0000 (08:57 -0800)]
[Basic] Fix a warning
This patch fixes:
clang/lib/Basic/SourceManager.cpp:1292:19: error: comparison of
integers of different signs: 'long' and 'unsigned long'
[-Werror,-Wsign-compare]
Florian Hahn [Wed, 30 Nov 2022 16:51:24 +0000 (16:51 +0000)]
[LV] Add test showing crash with
0fa666ecedc3.
eopXD [Tue, 29 Nov 2022 16:37:51 +0000 (08:37 -0800)]
[RISCV] Add macro to imply compiler availability on RISC-V Vector intrinsics version
According to version_macro.adoc under rvv-intrinsic-doc, the compiler
should have a macro to imply such availability.
Link: https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/master/version_macro.adoc
Reviewed By: kito-cheng, asb
Differential Revision: https://reviews.llvm.org/D138930
Amy Wang [Wed, 30 Nov 2022 15:59:13 +0000 (10:59 -0500)]
[MLIR][Transform] Consolidate the transform ops of get_parent_for and loop unroll from affine and scf dialects.
This patch consolidates the two transform ops from the affine dialect
and the scf dialect to avoid code duplication.
This is to address the review comments from
https://reviews.llvm.org/D137997.
The transform ops directory / file structure for the affine dialect is
kept for the purpose of forth-coming transform ops
for affine, but get_parent_for and unroll are removed.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D138980
Jakub Kuderski [Wed, 30 Nov 2022 16:06:17 +0000 (11:06 -0500)]
[mlir][vector] Use zip_equal instead of size assertions. NFC.
Tue Ly [Tue, 22 Nov 2022 16:33:40 +0000 (11:33 -0500)]
[libc][math] Improve the performance of subtraction for UInt<>.
Use built-in sub_with_borrow to improve the performance of subtraction
for UInt<>.
Microbenchmark: https://quick-bench.com/q/UEg6Z6VK4PP2yLBtTi9C0cL9xpY
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D138506
Joseph Huber [Wed, 30 Nov 2022 15:33:06 +0000 (09:33 -0600)]
[libc][docs] Fix code block not being emitted
Qiongsi Wu [Wed, 30 Nov 2022 14:57:55 +0000 (09:57 -0500)]
[AIX][LTO] Enabling Context Sensitive PGO Options
This patch enables context sensitive PGO (CSPGO) for LTO on AIX. Two parts are involved:
# Frontend logic is added so libLTO can understand the CSPGO related options.
# Two options are added to the backend so that the LTOCodeGenerator can understand the CSPGO related options and make use of them.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D138854
Florian Hahn [Wed, 30 Nov 2022 15:21:52 +0000 (15:21 +0000)]
[LV] Update test to use opaque pointers.
Philip Reames [Wed, 30 Nov 2022 15:12:53 +0000 (07:12 -0800)]
[RISCV][TTI] Account for constant materialization cost when costing arithmetic operations
At the IR level, we generally assume that constants are free to materialize. However, for RISCV due to some quirks of the ISA, materializing arbitrary constants can be rather expensive. We frequently fallback to constant pool loads.
We've been slowly moving in the direction of modeling the cost of the remat as part of the instruction cost. This has the effect of disincentivizing vectorization - mostly SLP - when we'd have to materialize an expensive constant.
We need better modeling of which constants are expensive and not, but the moment let's be consistent with how we model arithmetic and memory instructions. The difference between the two is that arithmetic can sometimes fold a splat operation which stores can not.
Differential Revision: https://reviews.llvm.org/D138941
Paul Robinson [Wed, 30 Nov 2022 15:19:39 +0000 (07:19 -0800)]
[Sanitizers] Fix test that never ran anywhere
Incorrect REQUIRES clause. Also fixed the incorrect 'opt' line
and removed a redundant -mtriple option.
Sam McCall [Wed, 30 Nov 2022 15:12:23 +0000 (16:12 +0100)]
[include-cleaner] don't clang-format tests. NFC
Timm Bäder [Wed, 30 Nov 2022 15:07:52 +0000 (16:07 +0100)]
Revert "[clang][Interp] Use placement new to construct opcode args into vector"
This reverts commit
aaf73ae266db44fce107a0b73fcb33527bfb52eb.
This breaks sanitized builds because the constructor is called with an
unaligned address.
Timm Bäder [Sun, 30 Oct 2022 09:13:18 +0000 (10:13 +0100)]
[clang][Interp][NFC] Avoid unnecessary work in compileFunc()
We don't need to create the paramter descriptors etc. if we've already
done that in the past.
Corentin Jabot [Wed, 30 Nov 2022 15:02:14 +0000 (16:02 +0100)]
Revert "Implement CWG2631"
This reverts commit
26fa17ed2914bd80c066d36b325fd3104e45554c.
This reverts commit
4403c4f9e77e673a2771edfc7ab0ebb234e97485.
There is still an ODR issue causing linker errors, investigating.
Valentin Clement [Wed, 30 Nov 2022 14:53:01 +0000 (15:53 +0100)]
[flang] Allow non polymorphic pointer assignment with polymorphic rhs
Remove the TODO and allow pointer assignment with non
polymorphic entity on the lhs. The assignment follow the same scheme
as derived-type pointer assignment to parent component.
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D138998
LLVM GN Syncbot [Wed, 30 Nov 2022 14:41:02 +0000 (14:41 +0000)]
[gn build] Port
77b220524541
Michael Buch [Tue, 25 Oct 2022 09:57:44 +0000 (10:57 +0100)]
[lldb][DataFormatter] Add std::ranges::ref_view formatter
This patch adds a formatter for `std::ranges::ref_view<T>`.
It simply holds a `T*`, so all this formatter does is dereference
this pointer and format it as `T` would be.
**Testing**
* Added API tests
Differential Revision: https://reviews.llvm.org/D138558
Aaron Ballman [Wed, 30 Nov 2022 14:36:50 +0000 (09:36 -0500)]
Remove 'modindex' from the Clang docs
This was added in the initial commit to use Sphinx ~12 years ago, but
is a dead link in our docs. Removing it and the python bits that appear
to be unused.
Matt Arsenault [Thu, 17 Nov 2022 05:59:50 +0000 (21:59 -0800)]
InstCombine: Add baseline tests for folding or of is.fpclass
Matt Arsenault [Thu, 17 Nov 2022 05:24:11 +0000 (21:24 -0800)]
InstCombine: Add baseline tests for negated is_fpclass
David Stuttard [Wed, 23 Nov 2022 15:53:36 +0000 (15:53 +0000)]
ConstantFolding: Guard use of getFunction
Add additional guards for a use of getFunction on an Instruction
In some cases constanfFoldCanonicalize can be called with a cloned instruction
that doesn't have a parent (or associated function), causing a seg fault.
Differential Revision: https://reviews.llvm.org/D138642
Henrik G. Olsson [Wed, 30 Nov 2022 13:59:49 +0000 (14:59 +0100)]
[clang] Do not merge traps in functions annotated optnone
This aligns the behaviour with that of disabling optimisations for the
translation unit entirely. Not merging the traps allows us to keep
separate debug information for each, improving the debugging experience
when finding the cause for a ubsan trap.
Differential Revision: https://reviews.llvm.org/D137714
Matt Arsenault [Thu, 10 Nov 2022 23:27:18 +0000 (15:27 -0800)]
InstCombine: Add baseline checks for is_fpclass
LLVM GN Syncbot [Wed, 30 Nov 2022 13:51:23 +0000 (13:51 +0000)]
[gn build] Port
d3c851d3fc8b
Dmitry Vyukov [Mon, 17 Oct 2022 13:13:56 +0000 (15:13 +0200)]
Use-after-return sanitizer binary metadata
Currently per-function metadata consists of:
(start-pc, size, features)
This adds a new UAR feature and if it's set an additional element:
(start-pc, size, features, stack-args-size)
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D136078
Jean Perier [Wed, 30 Nov 2022 13:44:10 +0000 (14:44 +0100)]
[flang][NFC] add genType(FunctionRef<T>) entry points in lowering
This will help lowering to HLFIR to not use the AsGenericExpr/AsExpr
patterns that copies sub-expresssions into evaluate::SomeExpr so that
they can be passed to helpers. Sub-expressions like FunctionRef can
be heavy (hundreds of arguments, constant array expression arguments...).
Differential Revision: https://reviews.llvm.org/D138997
Tomas Matheson [Thu, 24 Nov 2022 15:25:14 +0000 (15:25 +0000)]
[AArch64] Assembly support for VMSA
Virtual Memory System Architecture (VMSA)
This is part of the 2022 A-Profile Architecture extensions and adds support for
the following:
- Translation Hardening Extension (FEAT_THE)
- 128-bit Page Table Descriptors (FEAT_D128)
- 56-bit Virtual Address (FEAT_LVA3)
- Support for 128-bit System Registers (FEAT_SYSREG128)
- System Instructions that can take 128-bit inputs (FEAT_SYSINSTR128)
- 128-bit Atomic Instructions (FEAT_LSE128)
- Permission Indirection Extension (FEAT_S1PIE, FEAT_S2PIE)
- Permission Overlay Extension (FEAT_S1POE, FEAT_S2POE)
- Memory Attribute Index Enhancement (FEAT_AIE)
New instructions added:
- FEAT_SYSREG128 adds MRRS and MSRR.
- FEAT_SYSINSTR128 adds the SYSP instruction and TLBIP aliases.
- FEAT_LSE128 adds LDCLRP, LDSET, and SWPP instructions.
- FEAT_THE adds the set of RCW* instructions.
Specs for individual instructions can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/
Contributors:
Keith Walker
Lucas Prates
Sam Elliott
Son Tuan Vu
Tomas Matheson
Differential Revision: https://reviews.llvm.org/D138920
serge-sans-paille [Mon, 21 Nov 2022 15:01:32 +0000 (16:01 +0100)]
[clang] Speedup LineOffsetMapping::get
LineOffsetMapping::get is a critical function that consistently appears
in the top 5 more computation intensive functions when running the
preprocessor.
This change brings consistent speedup of ~.5% on, preprocessing time,
see
https://llvm-compile-time-tracker.com/compare.php?from=
0745b0c0354a0c8e1fefb68a3876d15db6c2e27a&to=
460f3f04dac025e6952d78fce104a88151508a29&stat=instructions:u
for detailed statistics.
Differential Revision: https://reviews.llvm.org/D138474
Nicolas Vasilache [Wed, 30 Nov 2022 12:20:18 +0000 (04:20 -0800)]
[mlir][Vector] Add a Broadcast::createBroadcastOp helper
This helper handles non trivial cases of broadcast + optional transpose creation
that should not leak to the outside world.
Differential Revision: https://reviews.llvm.org/D139003
Sebastian Neubauer [Wed, 30 Nov 2022 12:18:32 +0000 (13:18 +0100)]
[AMDGPU] Remove todo about vector types
D138205 added all the new vector types, so the todo is fixed now.
Differential Revision: https://reviews.llvm.org/D139002
David Green [Wed, 30 Nov 2022 13:09:48 +0000 (13:09 +0000)]
[AArch64] Don't treat SVE scalable extends as free widening instructions
The logic in isWideningInstruction handles instructions like uaddw and
smull, where 'add(x, zext(y))' or 'mul(sext(x), sext(y))' can be
converted to single instructions, making the extends free. This doesn't
apply the same to SVE instructions though.
https://godbolt.org/z/695d3nhGd
(There are instructions like SMULLT/B, but they require top/bottom lane
interleaving. That is similar to MVE instructions, which required a
special pass to perform the lane interleaving).
This patch just bails out of the call to isWideningInstruction if the
vector is scalable, getting a more accurate cost.
Differential Revision: https://reviews.llvm.org/D138591
ShihPo Hung [Wed, 30 Nov 2022 12:58:52 +0000 (04:58 -0800)]
[RISCV] Add cost model for fixed broadcast shuffle
This patch adds basic broadcast shuffle costs in order to enable SLP vectorization.
And adds `getLMULCost` to consider reciprocal throughput for different LMUL.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D137276
Aaron Ballman [Wed, 30 Nov 2022 12:52:59 +0000 (07:52 -0500)]
Fix Clang sphinx build
This addresses the issue found by:
https://lab.llvm.org/buildbot/#/builders/92/builds/36449
Jean Perier [Wed, 30 Nov 2022 12:41:44 +0000 (13:41 +0100)]
[flang] Add hlfir.associate and hlfir.end_associate definitions
These operations allow creating an HLFIR variable from a HLFIR value and
destroying it at the end of the variable lifetime.
This will both be used to implement procedure reference arguments association
when the actual is an expression, and to implement the Fortran associate
construct when the associated entity is an expression.
See https://github.com/llvm/llvm-project/blob/main/flang/docs/HighLevelFIR.md
for more details.
Differential Revision: https://reviews.llvm.org/D138996
Simon Pilgrim [Tue, 29 Nov 2022 18:17:44 +0000 (18:17 +0000)]
[X86] Add missing PFM port mappings for Core2/Nehalem
This was an old patch from when I was trying to improve pre-AVX scheduler support as part of D103695, we were missing port mappings entirely for these targets - although tbh they don't map well to the SandyBridge model that they currently use.
Sara Bellei [Wed, 30 Nov 2022 10:25:35 +0000 (10:25 +0000)]
[clang-repl] Add basic documentation about clang-repl
Differential revision: https://reviews.llvm.org/D138698
Sylvain Audi [Fri, 4 Nov 2022 20:34:23 +0000 (16:34 -0400)]
[CodeGen][X86] Crash fixes for "patchable-function" pass
This patch fixes crashes related with how PatchableFunction selects the instruction to make patchable:
- Ensure PatchableFunction skips all instructions that don't generate actual machine instructions.
- Handle the case where the first MachineBasicBlock is empty
- Removed support for 16 bit x86 architectures.
Note: another issue remains related with PatchableFunction, in the lowering part.
See https://github.com/llvm/llvm-project/issues/59039
Differential Revision: https://reviews.llvm.org/D137642
Pierre van Houtryve [Mon, 28 Nov 2022 13:58:23 +0000 (13:58 +0000)]
[AMDGPU] Use aperture registers instead of S_GETREG
Fixes a longstanding TODO in the codebase where we were using S_GETREG + shift to do something that could simply be done with an inline constant (register).
Patch based on D31874 by @kzhuravl
Depends on D137767
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D137542
Dmitry Preobrazhensky [Wed, 30 Nov 2022 11:45:52 +0000 (14:45 +0300)]
[AMDGPU][MC][GFX11] Disable non-VGPR src operands for VOP3_DPP variants of fmac instructions
Differential Revision: https://reviews.llvm.org/D138710