Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:13 +0000 (12:43 +0300)]
phy: qcom-qmp: qserdes-com: add missing registers
Add missing registers, verified against:
- msm-3.18's phy-qcom-ufs-qmp-14nm.h
- msm-3.18's mdss-hdmi-pll-8996.c
- msm-5.4's ep_pcie_phy.h
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-22-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:12 +0000 (12:43 +0300)]
phy: qcom-qmp: split PCS_UFS V3 symbols to separate header
Several registers defined in the PCS V3 namespace in reality belong to
the PCS_UFS V3 register space. Move them to the separate header and
rename them to explicitly mention PCS_UFS. While we are at it, correct
one register in the msm8998_usb3_pcs_tbl table to use PCS register name.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-21-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:11 +0000 (12:43 +0300)]
phy: qcom-qmp: split allegedly 4.20 and 5.20 PCS registers
Split registers definitions belonging allegedly to 4.20 and 5.20 QMP
PHYs. They are used for the PCIe QMP PHYs, which have no good open
source reference.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-20-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:10 +0000 (12:43 +0300)]
phy: qcom-qmp: split allegedly 4.20 and 5.20 TX/RX registers
Split registers definitions belonging allegedly to 4.20 and 5.20 QMP
PHYs. They are used for the PCIe QMP PHYs, which have no good open
source reference.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-19-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:09 +0000 (12:43 +0300)]
phy: qcom-qmp: move PCIE QHP registers to separate header
Move PCIE QHP registers to the separate header. QHP is a sepecial PHY
kind used on sdm845 to drive one of PCIe links.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-18-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:08 +0000 (12:43 +0300)]
phy: qcom-qmp: move PCS V5 registers to separate headers
Move PCS V5 registers to the separate headers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-17-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:07 +0000 (12:43 +0300)]
phy: qcom-qmp: move PCS V4 registers to separate headers
Move PCS V4 registers to the separate headers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-16-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:06 +0000 (12:43 +0300)]
phy: qcom-qmp: move PCS V3 registers to separate headers
Move PCS V3 registers to the separate headers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-15-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:05 +0000 (12:43 +0300)]
phy: qcom-qmp: move PCS V2 registers to separate header
Move PCS V2 registers to the separate header.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-14-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:04 +0000 (12:43 +0300)]
phy: qcom-qmp: move QSERDES PLL registers to separate header
Move QSERDES PLL registers to the separate header. This register set is
unique for the IPQ PCIe Gen3 PHYs.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-13-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:03 +0000 (12:43 +0300)]
phy: qcom-qmp: move QSERDES V5 registers to separate headers
Move QSERDES V5 registers to the separate headers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-12-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:02 +0000 (12:43 +0300)]
phy: qcom-qmp: move QSERDES V4 registers to separate headers
Move QSERDES V4 registers to the separate headers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-11-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:01 +0000 (12:43 +0300)]
phy: qcom-qmp: move QSERDES V3 registers to separate headers
Move QSERDES V3 registers to the separate headers.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-10-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:43:00 +0000 (12:43 +0300)]
phy: qcom-qmp: move QSERDES registers to separate header
Move QSERDES V2 registers to the separate header.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-9-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:42:59 +0000 (12:42 +0300)]
phy: qcom-qmp: use QPHY_V4_PCS for ipq6018/ipq8074 PCIe gen3
PCS_COM_* symbols duplicate the QPHY_V4_PCS_*. PCS_PCIE_* symbols
duplicate the QPHY_V4_PCS_PCIE_*. Use generic register names for the
IPQ6018 and IPQ8074 tables and drop the custom PCS_COM_*/PCS_PCIE*
names.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-8-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:42:58 +0000 (12:42 +0300)]
phy: qcom-qmp: rename QMP V2 PCS registers
Rename QMP V2 PCS registers to follow the usual pattern of
QPHY_V2_PCS_*.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-7-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:42:57 +0000 (12:42 +0300)]
phy: qcom-qmp: drop special QMP V2 PCIE gen3 defines
Replace separate defines for QMP V2 PHY for PCIe gen3 ports. They are
equivalent to the QSERDES_V4_ symbols.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-6-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:42:56 +0000 (12:42 +0300)]
phy: qcom-qmp-pcie: split pcs_misc region for ipq6018 pcie gen3
Follow the example of other PCIe PHYs and use separate pcs_misc region
to access PCS_PCIE_* resources.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-5-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:42:55 +0000 (12:42 +0300)]
phy: qcom-qmp-combo,usb: add support for separate PCS_USB region
Different QMP USB PHYs might have different offset from PCS to PCS_USB
register space, but the same PCS_USB register layout. Add separate
PCS_USB region space and merge related PCS_USB definitions.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:42:54 +0000 (12:42 +0300)]
phy: qcom-qmp-ufs: remove spurious register write in the msm8996 table
The msm8996_ufs_serdes_tbl table contains write to
QPHY_POWER_DOWN_CONTROL, however this register doesn't belong to the
QSERDES register space. Also the PHY power down is already handled in
the qcom_qmp_phy_ufs_com_init(). Drop this entry completely.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 5 Jul 2022 09:42:53 +0000 (12:42 +0300)]
phy: qcom-qmp: fix the QSERDES_V5_COM_CMN_MODE register
Change QSERDES_V5_COM_CMN_MODE to be defined to 0x1a0 rather than 0x1a4.
The only user of this register name (sm8450_qmp_gen4x2_pcie_serdes_tbl)
should use the 0x1a0 register, as stated in the downstream dtsi tree.
Fixes:
2c91bf6bf290 ("phy: qcom-qmp: Add SM8450 PCIe1 PHY support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220705094320.1313312-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Kuogee Hsieh [Tue, 5 Jul 2022 16:29:16 +0000 (09:29 -0700)]
drm/msm/dp: delete vdda regulator related functions from eDP/DP controller
Vdda regulators are related to both eDP and DP phy so that it should be
managed at eDP and DP phy driver instead of controller. This patch removes
vdda regulators related functions out of eDP/DP controller.
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/1657038556-2231-4-git-send-email-quic_khsieh@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Kuogee Hsieh [Tue, 5 Jul 2022 16:29:15 +0000 (09:29 -0700)]
phy: qcom-qmp: add regulator_set_load to dp phy
This patch add regulator_set_load() before enable regulator at
DP phy driver.
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/1657038556-2231-3-git-send-email-quic_khsieh@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Kuogee Hsieh [Tue, 5 Jul 2022 16:29:14 +0000 (09:29 -0700)]
phy: qcom-edp: add regulator_set_load to edp phy
This patch add regulator_set_load() before enable regulator at
eDP phy driver.
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/1657038556-2231-2-git-send-email-quic_khsieh@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Neil Armstrong [Tue, 5 Jul 2022 07:56:50 +0000 (09:56 +0200)]
phy: amlogic: Add G12A Analog MIPI D-PHY driver
The Amlogic G12A SoCs embeds an Analog MIPI D-PHY used to communicate with DSI
panels.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220705075650.3165348-3-narmstrong@baylibre.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Neil Armstrong [Tue, 5 Jul 2022 07:56:49 +0000 (09:56 +0200)]
dt-bindings: phy: add Amlogic G12A Analog MIPI D-PHY bindings
The Amlogic G12A SoCs embeds an Analog MIPI D-PHY to communicate with DSI
panels, this adds the bindings.
This Analog D-PHY works with a separate Digital MIPI D-PHY.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220705075650.3165348-2-narmstrong@baylibre.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Jiang Jian [Tue, 21 Jun 2022 12:24:01 +0000 (20:24 +0800)]
phy: phy-brcm-usb: drop unexpected word "the" in the comments
there is an unexpected word "the" in the comments that need to be dropped
file: ./drivers/phy/broadcom/phy-brcm-usb-init.c
line: 864
* Make sure the the second and third memory controller
changed to
* Make sure the second and third memory controller
Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20220621122401.115500-1-jiangjian@cdjrlc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Peter Geis [Wed, 22 Jun 2022 00:31:40 +0000 (20:31 -0400)]
phy: rockchip-inno-usb2: Sync initial otg state
The initial otg state for the phy defaults to device mode. The actual
state isn't detected until an ID IRQ fires. Fix this by syncing the ID
state during initialization.
Fixes:
51a9b2c03dd3 ("phy: rockchip-inno-usb2: Handle ID IRQ")
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220622003140.30365-1-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Robert Marko [Tue, 21 Jun 2022 19:55:12 +0000 (21:55 +0200)]
phy: qcom-qmp-pcie: add IPQ8074 PCIe Gen3 QMP PHY support
IPQ8074 has 2 different single lane PCIe PHY-s, one Gen2 and one Gen3.
Gen2 one is already supported, so add the support for the Gen3 one.
It uses the same register layout as IPQ6018.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220621195512.1760362-3-robimarko@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Robert Marko [Tue, 21 Jun 2022 19:55:11 +0000 (21:55 +0200)]
dt-bindings: phy: qcom,qmp: add IPQ8074 PCIe Gen3 PHY binding
IPQ8074 has 2 different single lane PCIe PHY-s, one Gen2 and one Gen3.
Gen2 one is already supported, document the bindings for the Gen3 one.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220621195512.1760362-2-robimarko@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Robert Marko [Tue, 21 Jun 2022 19:55:10 +0000 (21:55 +0200)]
phy: qcom-qmp-pcie: make pipe clock rate configurable
IPQ8074 Gen3 PCIe PHY uses 250MHz as the pipe clock rate instead of 125MHz
like every other PCIe QMP PHY does, so make it configurable as part of the
qmp_phy_cfg.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220621195512.1760362-1-robimarko@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Johan Hovold [Thu, 9 Jun 2022 12:03:38 +0000 (14:03 +0200)]
phy: qcom-qmp: clean up hex defines
Use lower case hex consistently for define values.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220609120338.4080-4-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Johan Hovold [Thu, 9 Jun 2022 12:03:37 +0000 (14:03 +0200)]
phy: qcom-qmp: clean up define alignment
Clean up the QMP defines by removing some stray white space and making
sure values are aligned.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20220609120338.4080-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Johan Hovold [Thu, 9 Jun 2022 12:03:36 +0000 (14:03 +0200)]
phy: qcom-qmp: clean up v4 and v5 define order
Clean up the QMP v4 and v5 defines by moving a few entries that were out
of order.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220609120338.4080-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Johan Hovold [Thu, 23 Jun 2022 11:33:14 +0000 (13:33 +0200)]
phy: qcom-qmp-usb: clean up pipe clock handling
Clean up the pipe clock handling by using dev_err_probe() to handle
probe deferral and dropping the obsolete comment that claimed that the
pipe clock was optional for some other PHY types.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220623113314.29761-4-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Johan Hovold [Thu, 23 Jun 2022 11:33:13 +0000 (13:33 +0200)]
phy: qcom-qmp-pcie-msm8996: drop obsolete pipe clock type check
Drop the obsolete pipe clock handling which was used to treat the pipe
clock as optional for types other than PCIe and USB and which is no
longer needed since splitting the PHY driver.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220623113314.29761-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Johan Hovold [Thu, 23 Jun 2022 11:33:12 +0000 (13:33 +0200)]
phy: qcom-qmp-pcie: drop obsolete pipe clock type check
Drop the obsolete pipe clock handling which was used to treat the pipe
clock as optional for types other than PCIe and USB and which is no
longer needed since splitting the PHY driver.
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220623113314.29761-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Markus Schneider-Pargmann [Fri, 24 Jun 2022 06:27:25 +0000 (14:27 +0800)]
phy: phy-mtk-dp: Add driver for DP phy
This is a new driver that supports the integrated DisplayPort phy for
mediatek SoCs, especially the mt8195. The phy is integrated into the
DisplayPort controller and will be created by the mtk-dp driver. This
driver expects a struct regmap to be able to work on the same registers
as the DisplayPort controller. It sets the device data to be the struct
phy so that the DisplayPort controller can easily work with it.
The driver does not have any devicetree bindings because the datasheet
does not list the controller and the phy as distinct units.
The interaction with the controller can be covered by the configure
callback of the phy framework and its displayport parameters.
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
[Bo-Chen: Modify reviewers' comments.]
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220624062725.4095-1-rex-bc.chen@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Rahul T R [Thu, 23 Jun 2022 12:54:33 +0000 (18:24 +0530)]
phy: cdns-dphy: Add support for DPHY TX on J721e
Add support new compatible for dphy-tx on j721e
and implement dphy ops required.
Signed-off-by: Rahul T R <r-ravikumar@ti.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220623125433.18467-4-r-ravikumar@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Rahul T R [Thu, 23 Jun 2022 12:54:32 +0000 (18:24 +0530)]
phy: cdns-dphy: Add band config for dphy tx
Add support for band ctrl config for dphy tx.
Signed-off-by: Rahul T R <r-ravikumar@ti.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220623125433.18467-3-r-ravikumar@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Rahul T R [Thu, 23 Jun 2022 12:54:31 +0000 (18:24 +0530)]
phy: dt-bindings: cdns,dphy: Add compatible for dphy on j721e
Add compatible to support dphy tx on j721e
Signed-off-by: Rahul T R <r-ravikumar@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220623125433.18467-2-r-ravikumar@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Peter Geis [Sat, 25 Jun 2022 21:27:11 +0000 (17:27 -0400)]
phy: rockchip-inno-usb2: Prevent incorrect error on probe
If a phy supply is designated but isn't available at probe time, an
EPROBE_DEFER is returned. Use dev_err_probe to prevent this from
incorrectly printing during boot.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220625212711.558495-1-pgwipeout@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Jiang Jian [Tue, 21 Jun 2022 12:00:15 +0000 (20:00 +0800)]
phy: dphy: drop unexpected word "the" in the comments
there is an unexpected word "the" in the comments that need to be dropped
file: ./drivers/phy/amlogic/phy-meson-axg-mipi-dphy.c
line: 139
* when in RxULPS check state, after the the logic enable the analog,
changed to
* when in RxULPS check state, after the logic enable the analog,
Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220621120015.113682-1-jiangjian@cdjrlc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Vidya Sagar [Wed, 29 Jun 2022 06:04:32 +0000 (11:34 +0530)]
phy: tegra: Add PCIe PIPE2UPHY support for Tegra234
Synopsys DesignWare core based PCIe controllers in Tegra234 SoC
interface with Universal PHY (UPHY) module through a PIPE2UPHY (P2U)
module. For each PCIe lane of a controller, there is a P2U unit
instantiated at hardware level. This driver provides support for the
programming required for each P2U that is going to be used for a PCIe
controller.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Link: https://lore.kernel.org/r/20220629060435.25297-9-vidyas@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Vidya Sagar [Wed, 29 Jun 2022 06:04:25 +0000 (11:34 +0530)]
dt-bindings: PHY: P2U: Add support for Tegra234 P2U block
Add support for Tegra234 P2U (PIPE to UPHY) module block which is a glue
module instantiated once for each PCIe lane between Synopsys DesignWare
core based PCIe IP and Universal PHY block.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220629060435.25297-2-vidyas@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Jianjun Wang [Fri, 17 Jun 2022 07:02:46 +0000 (15:02 +0800)]
phy: mediatek: Add PCIe PHY driver
Add PCIe GEN3 PHY driver support on MediaTek chipsets.
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Reviewed-by: AngeloGioachino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220617070246.20142-3-jianjun.wang@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Jianjun Wang [Fri, 17 Jun 2022 07:02:45 +0000 (15:02 +0800)]
dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY
Add YAML schema documentation for PCIe PHY on MediaTek chipsets.
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220617070246.20142-2-jianjun.wang@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Andy Shevchenko [Mon, 13 Jun 2022 16:08:48 +0000 (19:08 +0300)]
phy: ti: tusb1210: Don't check for write errors when powering on
On some platforms, like Intel Merrifield, the writing values during power on
may timeout:
tusb1210 dwc3.0.auto.ulpi: error -110 writing val 0x41 to reg 0x80
phy phy-dwc3.0.auto.ulpi.0: phy poweron failed --> -110
dwc3 dwc3.0.auto: error -ETIMEDOUT: failed to initialize core
dwc3: probe of dwc3.0.auto failed with error -110
which effectively fails the probe of the USB controller.
Drop the check as it was before the culprit commit (see Fixes tag).
Fixes:
09a3512681b3 ("phy: ti: tusb1210: Improve ulpi_read()/_write() error checking")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Ferry Toth <fntoth@gmail.com>
Link: https://lore.kernel.org/r/20220613160848.82746-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Lukas Bulwahn [Mon, 13 Jun 2022 12:26:21 +0000 (14:26 +0200)]
MAINTAINERS: add include/dt-bindings/phy to GENERIC PHY FRAMEWORK
Maintainers of the directory Documentation/devicetree/bindings/phy
are also the maintainers of the corresponding directory
include/dt-bindings/phy.
Add the file entry for include/dt-bindings/phy to the appropriate
section in MAINTAINERS.
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
Link: https://lore.kernel.org/r/20220613122621.18397-1-lukas.bulwahn@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Fri, 10 Jun 2022 18:55:42 +0000 (21:55 +0300)]
phy: qcom-qmp: fix PCIe PHY support
Replace init/exit ops with power_on/power_off which should be used for
the PCIe PHYs to fix PHY initialization.
Fixes:
da07a06b905f ("phy: qcom-qmp-pcie: drop support for non-PCIe PHY types")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220610185542.3662484-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Fri, 10 Jun 2022 18:55:41 +0000 (21:55 +0300)]
phy: qcom-qmp: fix msm8996 PCIe PHY support
Replace init/exit ops with power_on/power_off which should be used for
the PCIe PHYs to fix PHY initialization.
Fixes:
f575ac2d64e7 ("phy: qcom-qmp-pcie-msm8996: drop support for non-PCIe PHY types")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220610185542.3662484-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Roger Quadros [Thu, 26 May 2022 06:41:21 +0000 (09:41 +0300)]
phy: ti: phy-j721e-wiz: use OF data for device specific data
Move device specific data into OF data structure so it
is easier to maintain and we can get rid of if statements.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Matt Ranostay <mranostay@ti.com>
Link: https://lore.kernel.org/r/20220526064121.27625-1-rogerq@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Geert Uytterhoeven [Mon, 9 May 2022 12:53:34 +0000 (14:53 +0200)]
dt-bindings: phy: renesas: usb3-phy: Spelling s/funcional/functional/
Fix a misspelling of the word "functional".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/3da9bd360e1c83007af0e0e90fa4e6c2b50fdab3.1652100633.git.geert+renesas@glider.be
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Alim Akhtar [Fri, 10 Jun 2022 10:41:16 +0000 (16:11 +0530)]
phy: samsung-ufs: add support for FSD ufs phy driver
Adds support for Tesla Full Self-Driving (FSD) ufs phy driver.
This SoC has different cdr lock status offset.
Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220610104119.66401-4-alim.akhtar@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Alim Akhtar [Fri, 10 Jun 2022 10:41:15 +0000 (16:11 +0530)]
phy: samsung-ufs: move cdr offset to drvdata
Move CDR lock offset to drv data so that it can be extended for other SoCs
which are having CDR lock at different register offset.
Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220610104119.66401-3-alim.akhtar@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Alim Akhtar [Fri, 10 Jun 2022 10:41:14 +0000 (16:11 +0530)]
dt-bindings: phy: Add FSD UFS PHY bindings
Add tesla,fsd-ufs-phy compatible for Tesla Full Self-Driving (FSD) SoC.
Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220610104119.66401-2-alim.akhtar@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Douglas Anderson [Mon, 25 Apr 2022 21:06:43 +0000 (14:06 -0700)]
dt-bindings: phy: List supplies for qcom,edp-phy
We're supposed to list the supplies in the dt bindings but there are
none in the eDP PHY bindings.
Looking at the driver in Linux, I can see that there seem to be two
relevant supplies: "vdda-phy" and "vdda-pll". Let's add those to the
bindings.
NOTE: from looking at the Qualcomm datasheet for sc7280, it's not
immediately clear how to figure out how to fill in these supplies. The
only two eDP related supplies are simply described as "power for eDP
0.9V circuits" and "power for eDP 1.2V circuits". From guessing and
from comparing how a similar PHY is hooked up on other similar
Qualcomm boards, I'll make the educated guess that the 1.2V supply
goes to "vdda-phy" and the 0.9V supply goes to "vdda-pll" and I'll use
that in the example here.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Sankeerth Billakanti <quic_sbillaka@quicinc.com>
Link: https://lore.kernel.org/r/20220425140619.2.Iae013f0ff4599294189f3a6e91376fad137bbabf@changeid
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:32:03 +0000 (00:32 +0300)]
phy: qcom-qmp-usb: use bulk reset_control API
Switch qcom-qmp-usb driver to use reset_control_bulk_assert / _deassert
functions rather than hardcoding the loops in the driver itself.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-31-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:32:02 +0000 (00:32 +0300)]
phy: qcom-qmp-pcie-msm8996: use bulk reset_control API
Switch qcom-qmp-pcie-msm8996 driver to use reset_control_bulk_assert /
_deassert functions rather than hardcoding the loops in the driver
itself.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-30-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:32:01 +0000 (00:32 +0300)]
phy: qcom-qmp-pcie: use bulk reset_control API
Switch qcom-qmp-pcie driver to use reset_control_bulk_assert / _deassert
functions rather than hardcoding the loops in the driver itself.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-29-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:32:00 +0000 (00:32 +0300)]
phy: qcom-qmp-combo: use bulk reset_control API
Switch qcom-qmp-combo driver to use reset_control_bulk_assert / _deassert
functions rather than hardcoding the loops in the driver itself.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-28-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:59 +0000 (00:31 +0300)]
phy: qcom-qmp-usb: drop multi-PHY support
Each USB QMP PHY device provides just a single UFS PHY. Drop support
for handling multiple child PHYs. Use phy->init_count to check if the
PHY was initialized rather than duplicating this count.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-27-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:58 +0000 (00:31 +0300)]
phy: qcom-qmp-ufs: drop multi-PHY support
Each UFS QMP PHY device provides just a single UFS PHY. Drop support
for handling multiple child PHYs.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-26-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:57 +0000 (00:31 +0300)]
phy: qcom-qmp-pcie: drop multi-PHY support
Each PCIe QMP PHY device provides just a single PCIe PHY. Drop support
for handling multiple child PHYs.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-25-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:56 +0000 (00:31 +0300)]
phy: qcom-qmp-usb: cleanup the driver
Remove the conditionals and options that are not used by any of USB PHY
devices.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-24-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:55 +0000 (00:31 +0300)]
phy: qcom-qmp-ufs: cleanup the driver
Remove the conditionals and options that are not used by any of UFS PHY
devices.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-23-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:54 +0000 (00:31 +0300)]
phy: qcom-qmp-pcie-msm8996: cleanup the driver
Remove the conditionals and options that are not used by the MSM8996
PCIe PHY device. Hardcode has_lane_rst and has_phy_com_ctrl as this is
the case for this PHY.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-22-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:53 +0000 (00:31 +0300)]
phy: qcom-qmp-pcie: cleanup the driver
Remove the conditionals and options that are not used by any of PCIe PHY
devices.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-21-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:52 +0000 (00:31 +0300)]
phy: qcom-qmp-combo: cleanup the driver
Remove the conditionals and options that are not used by any of combo
USB+DP PHY devices.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-20-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:51 +0000 (00:31 +0300)]
phy: qcom-qmp-usb: drop support for non-USB PHY types
Drop remaining support for PHY types other than USB.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-19-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:50 +0000 (00:31 +0300)]
phy: qcom-qmp-ufs: drop support for non-UFS PHY types
Drop remaining support for PHY types other than UFS.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-18-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:49 +0000 (00:31 +0300)]
phy: qcom-qmp-pcie-msm8996: drop support for non-PCIe PHY types
Drop remaining support for PHY types other than PCIe.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-17-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:48 +0000 (00:31 +0300)]
phy: qcom-qmp-pcie: drop support for non-PCIe PHY types
Drop remaining support for PHY types other than PCIe.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-16-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:47 +0000 (00:31 +0300)]
phy: qcom-qmp-combo: drop support for PCIe,UFS PHY types
Drop remaining support for unused PHY types (PCIe, UFS).
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-15-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:46 +0000 (00:31 +0300)]
phy: qcom-qmp: drop old QMP PHY driver source
As we have switched to the new (split) QMP PHY driver, drop the old
monolithic QMP driver source.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-14-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:45 +0000 (00:31 +0300)]
phy: qcom-qmp: switch to new split QMP PHY driver
Use new split QMP PHY driver and remove all monolith phy-qcom-qmp
driver.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-13-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:44 +0000 (00:31 +0300)]
phy: qcom-qmp-usb: change symbol prefix to qcom_qmp_phy_usb
Change all symbol names to start with qcom_qmp_phy_usb_ rather than old
qcom_qmp_phy_
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-12-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:43 +0000 (00:31 +0300)]
phy: qcom-qmp-ufs: change symbol prefix to qcom_qmp_phy_ufs
Change all symbol names to start with qcom_qmp_phy_ufs_ rather than old
qcom_qmp_phy_
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-11-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:42 +0000 (00:31 +0300)]
phy: qcom-qmp-pcie: change symbol prefix to qcom_qmp_phy_pcie_msm8996
Change all symbol names to start with qcom_qmp_phy_pcie_msm8996_ rather
than old qcom_qmp_phy_.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-10-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:41 +0000 (00:31 +0300)]
phy: qcom-qmp-pcie: change symbol prefix to qcom_qmp_phy_pcie
Change all symbol names to start with qcom_qmp_phy_pcie_ rather than old
qcom_qmp_phy_
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-9-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:40 +0000 (00:31 +0300)]
phy: qcom-qmp-combo: change symbol prefix to qcom_qmp_phy_combo
Change all symbol names to start with qcom_qmp_phy_combo_ rather than old
qcom_qmp_phy_
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-8-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:39 +0000 (00:31 +0300)]
phy: qcom-qmp-combo: drop all non-combo compatibles support
Drop support for all non-USB+DP compatibles from the new qmp-combo
driver. Currently this will result in duplication (both in terms of code
and in terms of config tables) with USB PHY support. This will be sorted
out later, after fixing the combo PHY init/reinit issues.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-7-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:38 +0000 (00:31 +0300)]
phy: qcom-qmp-usb: drop all non-USB compatibles support
Drop support for all non-USB compatibles from the new qmp-usb driver.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-6-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:37 +0000 (00:31 +0300)]
phy: qcom-qmp-ufs: drop all non-UFS compatibles support
Drop support for all non-UFS compatibles from the new qmp-ufs driver.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-5-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:36 +0000 (00:31 +0300)]
phy: qcom-qmp-pcie-msm8996: drop all compatibles except msm8996-pcie-phy
Drop support for all compatibles from the new qmp-pcie driver except the
qcom,msm8996-qmp-pcie-phy. This PHY differs from the rest of PCIe PHYs,
so it warrants a separate device driver.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:31:35 +0000 (00:31 +0300)]
phy: qcom-qmp-pcie: drop all non-PCIe compatibles support
Drop support for all non-PCIe compatibles from the new qmp-pcie driver.
The MSM8996 compat is also removed, it is going to be handled by a
separate driver.
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Dmitry Baryshkov [Tue, 7 Jun 2022 21:35:32 +0000 (00:35 +0300)]
phy: qcom-qmp: create copies of QMP PHY driver
In order to split and cleanup the single monstrous QMP PHY driver,
create blind copies of the current file. They will be used for:
- PCIe (and a separate msm8996 PCIe PHY driver)
- UFS
- USB
- Combo DP + USB
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> # UFS, PCIe and USB on SC8180X
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20220607213203.2819885-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Fabien Parent [Tue, 31 May 2022 13:50:21 +0000 (15:50 +0200)]
dt-bindings: phy: mediatek,tphy: add MT8365 SoC bindings
Add binding documentation for the MT8365 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220531135026.238475-13-fparent@baylibre.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Fabien Parent [Tue, 31 May 2022 13:50:20 +0000 (15:50 +0200)]
dt-bindings: phy: mediatek,dsi-phy: Add MT8365 SoC bindings
Add binding documentation for the MT8365 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220531135026.238475-12-fparent@baylibre.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Chanho Park [Fri, 3 Jun 2022 05:05:36 +0000 (14:05 +0900)]
phy: samsung: exynosautov9-ufs: correct TSRV register configurations
For exynos auto v9's UFS MPHY, We should use 0x50 offset of TSRV register
configurations. So, it must be
s/PHY_TRSV_REG_CFG/PHY_TRSV_REG_CFG_AUTOV9/g
Fixes:
d64519249e1d ("phy: samsung-ufs: support exynosauto ufs phy driver")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220603050536.61957-1-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Abel Vesa [Tue, 7 Jun 2022 11:16:21 +0000 (14:16 +0300)]
dt-bindings: phy: mxs-usb-phy: Add i.MX8DXL compatible string
Add compatible for i.MX8DXL USB PHY.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220607111625.1845393-9-abel.vesa@nxp.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Chanho Park [Tue, 7 Jun 2022 07:29:07 +0000 (16:29 +0900)]
phy: samsung: ufs: support secondary ufs phy
To support secondary ufs phy device, we need to get an offset for phy
isolation from the syscon DT node. If the first index argument of the
node is existing, we can read the offset value and set it as isol->offset.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220607072907.127000-6-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Chanho Park [Tue, 7 Jun 2022 07:29:06 +0000 (16:29 +0900)]
phy: samsung: ufs: remove drvdata from struct samsung_ufs_phy
To change an offset of pmu_isol, we need to store its data instead of
having drvdata's pointer. The definition of the pmu_isol structure
should be extracted from samsung_ufs_phy_drvdata and rename the name
with samsung_ufs_phy_ prefix.
Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220607072907.127000-5-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Chanho Park [Tue, 7 Jun 2022 07:29:05 +0000 (16:29 +0900)]
phy: samsung: ufs: constify samsung_ufs_phy_cfg
Put const qualifier of samsung_ufs_phy_cfg pointer because they will
not be changed from drvdata.
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220607072907.127000-4-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Chanho Park [Tue, 7 Jun 2022 07:29:04 +0000 (16:29 +0900)]
phy: samsung: ufs: rename cfg to cfgs for clarification
Rename **cfg to **cfgs to clarify the naming.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220607072907.127000-3-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Chanho Park [Tue, 7 Jun 2022 07:29:03 +0000 (16:29 +0900)]
dt-bindings: phy: samsung,ufs-phy: make pmu-syscon as phandle-array
To support secondary ufs phy devices, we need to get an offset value
from pmu-syscon.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220607072907.127000-2-chanho61.park@samsung.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Linus Torvalds [Mon, 6 Jun 2022 00:18:54 +0000 (17:18 -0700)]
Linux 5.19-rc1
Linus Torvalds [Mon, 6 Jun 2022 00:14:03 +0000 (17:14 -0700)]
Merge tag 'pull-work.fd-fixes' of git://git./linux/kernel/git/viro/vfs
Pull file descriptor fix from Al Viro:
"Fix for breakage in #work.fd this window"
* tag 'pull-work.fd-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
fix the breakage in close_fd_get_file() calling conventions change
Linus Torvalds [Mon, 6 Jun 2022 00:05:38 +0000 (17:05 -0700)]
Merge tag 'mm-hotfixes-stable-2022-06-05' of git://git./linux/kernel/git/akpm/mm
Pull mm hotfixes from Andrew Morton:
"Fixups for various recently-added and longer-term issues and a few
minor tweaks:
- fixes for material merged during this merge window
- cc:stable fixes for more longstanding issues
- minor mailmap and MAINTAINERS updates"
* tag 'mm-hotfixes-stable-2022-06-05' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm:
mm/oom_kill.c: fix vm_oom_kill_table[] ifdeffery
x86/kexec: fix memory leak of elf header buffer
mm/memremap: fix missing call to untrack_pfn() in pagemap_range()
mm: page_isolation: use compound_nr() correctly in isolate_single_pageblock()
mm: hugetlb_vmemmap: fix CONFIG_HUGETLB_PAGE_FREE_VMEMMAP_DEFAULT_ON
MAINTAINERS: add maintainer information for z3fold
mailmap: update Josh Poimboeuf's email
Linus Torvalds [Sun, 5 Jun 2022 23:58:27 +0000 (16:58 -0700)]
Merge tag 'mm-nonmm-stable-2022-06-05' of git://git./linux/kernel/git/akpm/mm
Pull delay-accounting update from Andrew Morton:
"A single featurette for delay accounting.
Delayed a bit because, unusually, it had dependencies on both the
mm-stable and mm-nonmm-stable queues"
* tag 'mm-nonmm-stable-2022-06-05' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm:
delayacct: track delays from write-protect copy