Pavel Labath [Tue, 5 Nov 2019 10:37:59 +0000 (11:37 +0100)]
lldb/breakpad: add suppport for the "x86_64h" architecture
serge-sans-paille [Tue, 5 Nov 2019 10:38:39 +0000 (11:38 +0100)]
Revert and patch "[Python] Remove readline module"
Fix https://bugs.llvm.org/show_bug.cgi?id=43830 while avoiding polluting the
global Python namespace.
This both reverts r357277 to rebundle a version of Python's readline module
based on libedit.
However, this patch also provides two improvements over the previous
implementation:
1. use PyMem_RawMalloc instead of PyMem_Malloc, as expected by PyOS_Readline
(prevents to segfault upon exit of interactive session)
2. patch the readline module upon embedded interpreter loading, instead of
patching it globally, which should prevent any side effect on other
modules/packages
3. only activate the patched module if libedit is actually linked in lldb
Differential Revision: https://reviews.llvm.org/D69793
Sven van Haastregt [Tue, 5 Nov 2019 10:16:45 +0000 (10:16 +0000)]
[OpenCL] Group builtin functions by prototype
The TableGen-generated file containing the function definitions can be
reorganized to save some memory in the Clang binary. Functions having
the same prototype(s) will point to a shared list of prototype(s).
Patch by Pierre Gondois and Sven van Haastregt.
Differential Revision: https://reviews.llvm.org/D63557
Sven van Haastregt [Tue, 5 Nov 2019 10:07:43 +0000 (10:07 +0000)]
[OpenCL] Add builtin function attribute handling
Add handling for the "pure", "const" and "convergent" function
attributes for OpenCL builtin functions.
Patch by Pierre Gondois and Sven van Haastregt.
Differential Revision: https://reviews.llvm.org/D64319
Pavel Labath [Tue, 5 Nov 2019 10:26:06 +0000 (11:26 +0100)]
lldb/minidump: Add support for the alternate ARM64 constant
Pavel Labath [Wed, 16 Oct 2019 13:29:20 +0000 (15:29 +0200)]
MemoryRegion: Print "don't know" permission values as such
Summary:
The permissions in a memory region have ternary states (yes, no, don't
know), but the memory region command only prints in binary, treating
"don't know" as "yes", which is particularly confusing as for instance
the unwinder will treat an unknown value as "no".
This patch makes is so that we distinguish all three states when
printing the values, using "?" to indicate the lack of information. It
is implemented via a special argument to the format provider for the
OptionalBool enumeration.
Reviewers: clayborg, jingham
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D69106
Roman Lebedev [Tue, 5 Nov 2019 10:02:57 +0000 (13:02 +0300)]
[LoopUnroll] peel-loop-conditions.ll: add some 'is even/odd' peeling tests
Roman Lebedev [Tue, 5 Nov 2019 08:49:12 +0000 (11:49 +0300)]
[InstCombine] dropRedundantMaskingOfLeftShiftInput(): truncation (PR42563)
Summary:
That fold keeps growing and growing :(
I think this may be one of the last pieces for it.
Since D67677/D67725, the fold knowns the general form
of the pattern - where some masking is needed:
https://rise4fun.com/Alive/F5R
https://rise4fun.com/Alive/gslRa
But there is one more huge piece missing - if you are extracting some bits,
it is not impossible that the origin is wider than the extraction,
i.e. there may be a truncation. And we don't deal with that yet.
But we can, and the generalization remains fully identical:
https://rise4fun.com/Alive/Uar
https://rise4fun.com/Alive/5SW
After a preparatory cleanup i think the diff looks rather clean.
One missing piece is that in some patterns (especially pat. b),
`-1` only needs to be `-1` in final type, but that is for later..
https://bugs.llvm.org/show_bug.cgi?id=42563
Reviewers: spatel, nikic
Reviewed By: spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69125
Luís Marques [Tue, 5 Nov 2019 09:36:08 +0000 (09:36 +0000)]
[RISCV] Add InstrInfo areMemAccessesTriviallyDisjoint hook
Summary: Introduces the `InstrInfo::areMemAccessesTriviallyDisjoint`
hook. The test could check for instruction reorderings, but to avoid
being brittle it just checks instruction dependencies.
Reviewers: asb, lenary
Reviewed By: lenary
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67046
Pavel Labath [Thu, 31 Oct 2019 13:31:42 +0000 (14:31 +0100)]
DWARFDebugLoclists: Make it possible to read relocated addresses
Summary:
Handling relocations was not needed when the loclists section was a
DWO-only thing. But since DWARF5, it is possible to use it in regular
objects too, and the standard permits embedding addresses into the
section directly. These addresses need to be relocated in unlinked
files.
Reviewers: JDevlieghere, dblaikie, probinson
Subscribers: aprantl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68271
Simon Atanasyan [Tue, 5 Nov 2019 08:01:15 +0000 (11:01 +0300)]
[mips] Set __OCTEON__ macros
Simon Atanasyan [Tue, 5 Nov 2019 07:31:16 +0000 (10:31 +0300)]
[mips] Fix `__mips_isa_rev` macros value for Octeon CPU
Sjoerd Meijer [Tue, 5 Nov 2019 08:56:14 +0000 (08:56 +0000)]
Recommit "[HardwareLoops] Optimisation remarks"
With a few things fixed:
- initialisaiton of the optimisation remark pass (this was causing the buildbot
failures on PPC),
- a test case.
Differential Revision: https://reviews.llvm.org/D69660
David Green [Tue, 5 Nov 2019 09:01:32 +0000 (09:01 +0000)]
[AArch64] Update test checks on merge-store-dependency.ll. NFC
Raphael Isemann [Mon, 4 Nov 2019 13:34:13 +0000 (14:34 +0100)]
[lldb][NFC] Give some parameters in CommandInterpreter more descriptive names
aqjune [Tue, 5 Nov 2019 07:31:51 +0000 (16:31 +0900)]
[IR] Remove switch's default block that causes clang 8 raise error
Craig Topper [Tue, 5 Nov 2019 06:23:16 +0000 (22:23 -0800)]
[X86] Lower the cost of avx512 horizontal bool and/or reductions to 2*log2(bitwidth)+1 for legal types.
This better represents the kshift+binop we'd get for each stage
before the final extract. Its likely we'll do even better by
doing a kmov and a cmp with a GPR, but this is a good start.
The default handling was costing a worst case single source
permute shuffle of the vector before the binop. This worst
case assumes the shuffle might have to be emulated with
extracts and inserts. But since we know we're doing a reduction
we can assume we'll get kshift lowering.
There's still some room for improvement here, but this is
much better than it was.
aqjune [Tue, 5 Nov 2019 06:53:22 +0000 (15:53 +0900)]
[IR] Add Freeze instruction
Summary:
- Define Instruction::Freeze, let it be UnaryOperator
- Add support for freeze to LLLexer/LLParser/BitcodeReader/BitcodeWriter
The format is `%x = freeze <ty> %v`
- Add support for freeze instruction to llvm-c interface.
- Add m_Freeze in PatternMatch.
- Erase freeze when lowering IR to SelDag.
Reviewers: deadalnix, hfinkel, efriedma, lebedev.ri, nlopes, jdoerfert, regehr, filcab, delcypher, whitequark
Reviewed By: lebedev.ri, jdoerfert
Subscribers: jfb, kristof.beyls, hiraditya, lebedev.ri, steven_wu, dexonsmith, xbolva00, delcypher, spatel, regehr, trentxintong, vsk, filcab, nlopes, mehdi_amini, deadalnix, llvm-commits
Differential Revision: https://reviews.llvm.org/D29011
Yonghong Song [Tue, 5 Nov 2019 06:12:52 +0000 (22:12 -0800)]
[BPF] fix a use after free bug
Commit
fff2721286e1 ("[BPF] Fix CO-RE bugs with bitfields")
fixed CO-RE handling bitfield issues. But the implementation
introduced a use after free bug. The "Base" of the intrinsic
might be freed so later on accessing the Type of "Base"
might access the freed memory. The failed test case,
CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
is exactly used to test such a case.
Similarly to previous attempt to remember Metadata etc,
remember "Base" pointee Alignment in advance to avoid
such use after free bug.
Craig Topper [Tue, 5 Nov 2019 03:58:53 +0000 (19:58 -0800)]
[X86] Teach X86MCInstLower to swap operands of commutable instructions to enable 2-byte VEX encoding.
Summary:
The 2 source operands commutable instructions are encoded in the
VEX.VVVV field and the r/m field of the MODRM byte plus the VEX.B
field.
The VEX.B field is missing from the 2-byte VEX encoding. If the
VEX.VVVV source is 0-7 and the other register is 8-15 we can
swap them to avoid needing the VEX.B field. This works as long as
the VEX.W, VEX.mmmmm, and VEX.X fields are also not needed.
Fixes PR36706.
Reviewers: RKSimon, spatel
Reviewed By: RKSimon
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68550
Devin Coughlin [Tue, 5 Nov 2019 05:17:55 +0000 (21:17 -0800)]
[analyzer] Require darwin for scan-build tests
Let's at least get some coverage from these tests. We can generalize to
other platforms later.
Devin Coughlin [Tue, 5 Nov 2019 05:10:18 +0000 (21:10 -0800)]
[analyzer] Fixup scan-build tests for non-Darwin platforms.
This is a fix to
0aba69eb1a01c44185009f50cc633e3c648e9950 to
address failing bots.
aqjune [Tue, 5 Nov 2019 04:26:51 +0000 (13:26 +0900)]
Fix clone_constant_impl to correctly deal with null pointers
Summary:
This patch resolves llvm-c-test's following error
```
LLVM ERROR: LLVMGetValueKind returned incorrect type
```
which arises when the input bitcode contains a null pointer.
Reviewers: jdoerfert, CodaFi, deadalnix
Reviewed By: jdoerfert
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68928
Devin Coughlin [Tue, 5 Nov 2019 04:26:35 +0000 (20:26 -0800)]
[analyzer] Add test directory for scan-build.
The static analyzer's scan-build script is critical infrastructure but
is not well tested. To start to address this, add a new test directory under
tests/Analysis for scan-build lit tests and seed it with several tests. The
goal is that future scan-build changes will be accompanied by corresponding
tests.
Differential Revision: https://reviews.llvm.org/D69781
Yaxun (Sam) Liu [Thu, 31 Oct 2019 00:57:14 +0000 (20:57 -0400)]
[CUDA][HIP] Disable emitting llvm.linker.options in device compilation
The linker options (e.g. pragma detect_mismatch) are intended for host
compilation only, therefore disable it for device compilation.
Differential Revision: https://reviews.llvm.org/D57829
Yonghong Song [Wed, 30 Oct 2019 16:44:49 +0000 (12:44 -0400)]
[BPF] Fix CO-RE bugs with bitfields
bitfield handling is not robust with current implementation.
I have seen two issues as described below.
Issue 1:
struct s {
long long f1;
char f2;
char b1:1;
} *p;
The current approach will generate an access bit size
56 (from b1 to the end of structure) which will be
rejected as it is not power of 2.
Issue 2:
struct s {
char f1;
char b1:3;
char b2:5;
char b3:6:
char b4:2;
char f2;
};
The LLVM will group 4 bitfields together with 2 bytes. But
loading 2 bytes is not correct as it violates alignment
requirement. Note that sometimes, LLVM breaks a large
bitfield groups into multiple groups, but not in this case.
To resolve the above two issues, this patch takes a
different approach. The alignment for the structure is used
to construct the offset of the bitfield access. The bitfield
incurred memory access is an aligned memory access with alignment/size
equal to the alignment of the structure.
This also simplified the code.
This may not be the optimal memory access in terms of memory access
width. But this should be okay since extracting the bitfield value
will have the same amount of work regardless of what kind of
memory access width.
Differential Revision: https://reviews.llvm.org/D69837
Jorg Brown [Tue, 5 Nov 2019 03:00:23 +0000 (19:00 -0800)]
Optimize std::midpoint for integers
Same idea as the current algorithm, that is, add (half of the difference between a and b) to a.
But we use a different technique for computing the difference: we compute b - a into a pair of integers that are named "sign_bit" and "diff". We have to use a pair because subtracting two 32-bit integers produces a 33-bit result.
Computing half of that is a simple matter of shifting diff right by 1, and adding sign_bit shifted left by 31. llvm knows how to do that with one instruction: shld.
The only tricky part is that if the difference is odd and negative, then shifting it by one isn't the same as dividing it by two - shifting a negative one produces a negative one, for example. So there's one more adjustment: if the sign bit and the low bit of diff are one, we add one.
For a demonstration of the codegen difference, see https://godbolt.org/z/7ar3K9 , which also has a built-in test.
Differential Revision: https://reviews.llvm.org/D69459
Vedant Kumar [Tue, 5 Nov 2019 01:00:23 +0000 (17:00 -0800)]
[cmake] Add an option to skip stripping before install
The swift build system has support for cross-compiling, installing, and
generating symbols for lldb. As the swift symbol-generation step occurs
after installation, we need to disable stripping during the install.
Saleem Abdulrasool [Tue, 5 Nov 2019 00:55:31 +0000 (16:55 -0800)]
build: explicitly set the linker language for unwind
The unwinder should not depend on libc++. In fact, we do not end up
with a link against libc++ as we do not have a dependency on libc++ at
runtime. This ensures that we link with `clang` rather than `clang++`.
Vedant Kumar [Sat, 2 Nov 2019 00:20:38 +0000 (17:20 -0700)]
[CGDebugInfo] Emit subprograms for decls when AT_tail_call is understood
Currently, clang emits subprograms for declared functions when the
target debugger or DWARF standard is known to support entry values
(DW_OP_entry_value & the GNU equivalent).
Treat DW_AT_tail_call the same way to allow debuggers to follow cross-TU
tail calls.
Pre-patch debug session with a cross-TU tail call:
```
* frame #0: 0x0000000100000fa4 main`target at b.c:4:3 [opt]
frame #1: 0x0000000100000f99 main`main at a.c:8:10 [opt]
```
Post-patch (note that the tail-calling frame, "helper", is visible):
```
* frame #0: 0x0000000100000fa4 main`target at b.c:4:3 [opt]
frame #1: 0x0000000100000f80 main`helper [opt] [artificial]
frame #2: 0x0000000100000f99 main`main at a.c:8:10 [opt]
```
rdar://
46577651
Differential Revision: https://reviews.llvm.org/D69743
Ron Lieberman [Mon, 4 Nov 2019 22:51:03 +0000 (16:51 -0600)]
Test commit: adds a . to comment. NFC
Evandro Menezes [Mon, 4 Nov 2019 22:12:09 +0000 (16:12 -0600)]
[AArch64] Update for Exynos
Fix the costs of integer division.
Sam Clegg [Wed, 30 Oct 2019 19:50:14 +0000 (12:50 -0700)]
Add more binutils tools to LLVM_INSTALL_TOOLCHAIN_ONLY target
Also add the aliases for these tools so that
LLVM_INSTALL_BINUTILS_SYMLINKS and LLVM_INSTALL_TOOLCHAIN_ONLY can work
together.
Differential Revision: https://reviews.llvm.org/D69635
Mark de Wever [Mon, 4 Nov 2019 21:27:53 +0000 (22:27 +0100)]
[AST][NFC] Fixes a comment typo
Also a test for commit access.
Stanislav Mekhanoshin [Mon, 4 Nov 2019 21:21:19 +0000 (13:21 -0800)]
[AMDGPU] Added assert in SIFoldOperands before ptr use. NFC.
Alexey Bataev [Mon, 4 Nov 2019 21:28:34 +0000 (16:28 -0500)]
[OPENMP][DOCS]Update list of implemented features, NFC.
James Y Knight [Mon, 4 Nov 2019 17:44:31 +0000 (12:44 -0500)]
Add release notes for commit
ccc4d83cda16bea1d9dfd0967dc7d2cfb24b8e75.
(Which was "[ObjC] Diagnose implicit type coercion from ObjC 'Class'
to object pointer types.")
Alexey Bataev [Mon, 4 Nov 2019 14:59:11 +0000 (09:59 -0500)]
[OPENMP50]Support for imperfectly nested loops.
Added support for imperfectly nested loops introduced in OpenMP 5.0.
Lawrence D'Anna [Mon, 4 Nov 2019 20:48:49 +0000 (12:48 -0800)]
[LLDB][Python] remove ArgInfo::count
Summary:
This patch updates the last user of ArgInfo::count and deletes
it. I also delete `GetNumInitArguments()` and `GetInitArgInfo()`.
Classess are callables and `GetArgInfo()` should work on them.
On python 3 it already works, of course. `inspect` is good.
On python 2 we have to add yet another special case. But hey if
python 2 wasn't crufty we wouln't need python 3.
I also delete `is_bound_method` becuase it is unused.
This path is tested in `TestStepScripted.py`
Reviewers: labath, mgorny, JDevlieghere
Reviewed By: labath, JDevlieghere
Subscribers: lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D69742
Stanislav Mekhanoshin [Mon, 4 Nov 2019 19:50:18 +0000 (11:50 -0800)]
[AMDGPU] deduplicate tablegen predicates
We are duplicating predicates if several parts of the combined
predicate list contain the same condition. Added code to deduplicate
the list.
We have AssemblerPredicates and AssemblerPredicate in the
PredicateControl, but we never use AssemblerPredicates with an
actual list, so this one is dropped.
This addresses the first part of the llvm bug 43886:
https://bugs.llvm.org/show_bug.cgi?id=43886
Differential Revision: https://reviews.llvm.org/D69815
Erik Pilkington [Mon, 4 Nov 2019 18:47:44 +0000 (10:47 -0800)]
[demangle] NFC: get rid of NodeOrString
This class was a bit overengineered, and was triggering some PVS warnings.
Instead, put strings into a NameType and let clients unconditionally treat it
as a Node.
Alexandre Ganea [Mon, 4 Nov 2019 19:55:51 +0000 (14:55 -0500)]
Remove unused variables, as suggested by @mcgov.
Fixes warning: unused variable 'XXX' [-Wunused-const-variable]
Alexandre Ganea [Mon, 4 Nov 2019 19:36:36 +0000 (14:36 -0500)]
Fix warning: format specifies type 'unsigned long' but the argument has type 'unsigned long long' [-Wformat]
Duncan P. N. Exon Smith [Mon, 4 Nov 2019 19:10:09 +0000 (11:10 -0800)]
clang/Modules: Bring back optimization lost in
31e14f41a21f
31e14f41a21f9016050a20f07d5da03db2e8c13e accidentally dropped caching of
failed module loads. This brings it back by making
ModuleMap::getCachedModuleLoad return an Optional.
Craig Topper [Mon, 4 Nov 2019 18:20:00 +0000 (10:20 -0800)]
[X86] Add support for -mvzeroupper and -mno-vzeroupper to match gcc
-mvzeroupper will force the vzeroupper insertion pass to run on
CPUs that normally wouldn't. -mno-vzeroupper disables it on CPUs
where it normally runs.
To support this with the default feature handling in clang, we
need a vzeroupper feature flag in X86.td. Since this flag has
the opposite polarity of the fast-partial-ymm-or-zmm-write we
used to use to disable the pass, we now need to add this new
flag to every CPU except KNL/KNM and BTVER2 to keep identical
behavior.
Remove -fast-partial-ymm-or-zmm-write which is no longer used.
Differential Revision: https://reviews.llvm.org/D69786
Philip Reames [Mon, 4 Nov 2019 17:40:53 +0000 (09:40 -0800)]
[SimplifyCFG] Use a (trivially) dominanting widenable branch to remove later slow path blocks
This transformation is a variation on the GuardWidening transformation we have checked in as it's own pass. Instead of focusing on merge (i.e. hoisting and simplifying) two widenable branches, this transform makes the observation that simply removing a second slowpath block (by reusing an existing one) is often a very useful canonicalization. This may lead to later merging, or may not. This is a useful generalization when the intermediate block has loads whose dereferenceability is hard to establish.
As noted in the patch, this can be generalized further, and will be.
Differential Revision: https://reviews.llvm.org/D69689
Sanjay Patel [Mon, 4 Nov 2019 18:41:41 +0000 (13:41 -0500)]
[DAGCombine][MSP430] use shift amount threshold in DAGCombine (2/2)
Continuation of:
D69116
Contributes to a fix for PR43559:
https://bugs.llvm.org/show_bug.cgi?id=43559
See also D69099 and D69116
Use the TLI hook in DAGCombine.cpp to guard against creating
shift nodes that are not optimal for a target.
Patch by: @joanlluch (Joan LLuch)
Differential Revision: https://reviews.llvm.org/D69120
Michał Górny [Thu, 31 Oct 2019 16:04:35 +0000 (17:04 +0100)]
[lldb] [Process/NetBSD] Add register info for missing register sets
Add info for all register sets supported in NetBSD, particularly for all
registers 'expected' by LLDB. This is necessary in order to fix
python_api/lldbutil/iter/TestRegistersIterator.py test that currently
fails due to missing names of register sets (None).
This copies fpreg descriptions from Linux, and combines Linux' AVX
and MPX registers into a single XState group, to fit NetBSD register
group design. Technically, we do not support MPX registers
at the moment but gdb-remote insists on passing their errors anyway,
and if we do not include it in any group, they end up in a separate
anonymous group that breaks the test.
While at it, swap the enums for XState and DBRegs to match register set
ordering.
This also adds a few consts to the lldb-x86-register-enums.h to provide
more consistency between user registers and debug registers.
Differential Revision: https://reviews.llvm.org/D69667
Julian Lettner [Tue, 26 Feb 2019 05:14:43 +0000 (21:14 -0800)]
[lit] Move measurement of testing time out of Run.execute
Julian Lettner [Sat, 2 Nov 2019 01:52:50 +0000 (18:52 -0700)]
[lit] Better/earlier errors when no tests are executed
Fail early, when we discover no tests at all, or filter out all of them.
Eric Astor [Wed, 30 Oct 2019 16:44:49 +0000 (12:44 -0400)]
[ms] Fix Microsoft compatibility handling of commas in nested macro expansions.
In Microsoft-compatibility mode, single commas from nested macro expansions
should not be considered as argument separators; we already emulated this by
marking them to be ignored. However, in MSVC's preprocessor, subsequent
expansions DO treat these commas as argument separators... so we now ignore
each comma at most once.
Includes a small unit test that validates we match MSVC's behavior as shown
in https://gcc.godbolt.org/z/y0twaq
Fixes PR43282
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69626
Simon Pilgrim [Mon, 4 Nov 2019 17:24:18 +0000 (17:24 +0000)]
[X86] Fix uninitialized variable warnings. NFCI.
Simon Pilgrim [Mon, 4 Nov 2019 17:23:07 +0000 (17:23 +0000)]
VirtualFileSystem - fix uninitialized variable warnings. NFCI.
Simon Pilgrim [Mon, 4 Nov 2019 17:17:37 +0000 (17:17 +0000)]
createMCObjectStreamer - fix uninitialized variable warning. NFCI.
Simon Pilgrim [Mon, 4 Nov 2019 17:16:52 +0000 (17:16 +0000)]
MCDwarfFile::DirIndex - fix uninitialized variable warning. NFCI.
LLVM GN Syncbot [Mon, 4 Nov 2019 17:20:23 +0000 (17:20 +0000)]
gn build: Merge
40d0d4e2335
Oliver Stannard [Mon, 4 Nov 2019 13:10:37 +0000 (13:10 +0000)]
Fix static analysis warnings in ARM calling convention lowering
Fixes https://bugs.llvm.org/show_bug.cgi?id=43891
Jinsong Ji [Mon, 4 Nov 2019 16:27:23 +0000 (16:27 +0000)]
Lower generic MASSV entries to PowerPC subtarget-specific entries
This patch (second of two patches) lowers the generic PowerPC vector
entries to PowerPC subtarget-specific entries.
For instance, the PowerPC generic entry 'cbrtd2_massv' is lowered to
'cbrtd2_P9' or Power9 subtarget.
The first patch enables the vectorizer to recognize the IBM MASS vector
library routines. This patch specifically adds support for recognizing
the '-vector-library=MASSV' option, and defines mappings from IEEE
standard scalar math functions to generic PowerPC MASS vector
counterparts.
For instance, the generic PowerPC MASS vector entry for double-precision
'cbrt' function is '__cbrtd2_massv'
The overall support for MASS vector library is presented as such in two
patches for ease of review.
Patch by pjeeva01 (Jeeva P.)
Differential Revision: https://reviews.llvm.org/D59883
Amy Huang [Thu, 31 Oct 2019 16:15:53 +0000 (09:15 -0700)]
Recommit "[CodeView] Add option to disable inline line tables."
This reverts commit
004ed2b0d1b86d424643ffc88fce20ad8bab6804.
Original commit hash
6d03890384517919a3ba7fe4c35535425f278f89
Summary:
This adds a clang option to disable inline line tables. When it is used,
the inliner uses the call site as the location of the inlined function instead of
marking it as an inline location with the function location.
https://reviews.llvm.org/D67723
Peter Collingbourne [Sat, 2 Nov 2019 01:48:59 +0000 (18:48 -0700)]
ELF: Discard .ARM.exidx sections for empty functions instead of misordering them.
The logic added in r372781 caused ARMExidxSyntheticSection::addSection()
to return false for exidx sections without a link order dep that passed
isValidExidxSectionDep(). This included exidx sections for empty functions. As
a result, such exidx sections would end up treated like ordinary sections and
would end up being laid out before the ARMExidxSyntheticSection, most likely in
the wrong order relative to the exidx entries in the ARMExidxSyntheticSection,
breaking the orderedness invariant relied upon by unwinders. Fix this by
simply discarding such sections.
Differential Revision: https://reviews.llvm.org/D69744
Ulrich Weigand [Mon, 4 Nov 2019 16:42:32 +0000 (17:42 +0100)]
[FPEnv][SelectionDAG] Refactor strict FP node construction
Small refactoring in visitConstrainedFPIntrinsic that should make
it easier to create DAG nodes requiring extra arguments. That is
the case currently only for STRICT_FP_ROUND, but may be the case
for additional nodes (in particular compares) in the future.
Extracted from the patch for D69281.
NFC.
Ilya Biryukov [Mon, 4 Nov 2019 08:20:38 +0000 (09:20 +0100)]
[Sema] Make helper in TreeTransform.h 'inline' instead of 'static'. NFC
Summary:
There seems to be no evidence that having internal linkage for the function
was intentional. Since 'static' functions are normally used only in .cpp
files, using 'inline' in the header file is more appropriate.
Reviewers: Anastasia
Reviewed By: Anastasia
Subscribers: merge_guards_bot, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D69242
Jonas Paulsson [Mon, 4 Nov 2019 15:52:41 +0000 (16:52 +0100)]
Fix buildbots troubled by b7b170c.
Add '# REQUIRES: systemz-registered-target' in the new tests.
Alexey Bataev [Wed, 30 Oct 2019 16:51:58 +0000 (12:51 -0400)]
[SLP]Fix PR43799: Crash on different sizes of GEP indices.
Summary:
If the GEP instructions are going to be vectorized, the indices in those
GEP instructions must be of the same type. Otherwise, the compiler may
crash when trying to build the vector constant.
Reviewers: RKSimon, spatel
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69627
Simon Pilgrim [Mon, 4 Nov 2019 15:32:57 +0000 (15:32 +0000)]
[X86] Convert ShrinkMode to scoped enum class. NFCI.
Simon Pilgrim [Mon, 4 Nov 2019 15:30:18 +0000 (15:30 +0000)]
AliasSetTracker - fix uninitialized variable warnings. NFCI.
Dávid Bolvanský [Mon, 4 Nov 2019 15:26:21 +0000 (16:26 +0100)]
[Diagnostics] Improve some error messages related to bad use of dynamic_cast
Thomas Preud'homme [Thu, 10 Oct 2019 11:48:30 +0000 (11:48 +0000)]
[test] Use system locale for mri-utf8.test
Summary:
llvm-ar's mri-utf8.test test relies on the en_US.UTF-8 locale to be
installed for its last RUN line to work. If not installed, the unicode
string gets encoded (interpreted) as ascii which fails since the most
significant byte is non zero. This commit changes the test to only rely
on the system being able to encode the pound sign in its default
encoding (e.g. UTF-16 for Microsoft Windows) by always opening the file
via input/output redirection. This avoids forcing a given locale to be
present and supported. A Byte Order Mark is also added to help
recognizing the encoding of the file and its endianness. Finally the
XFAIL on system-darwin is removed since the test actually passes fine on
Mac OS X and XFAIL was only added because it failed before.
Reviewers: gbreynoo, MaskRay, rupprecht, JamesNagurne, jfb
Subscribers: dexonsmith, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68472
Jonas Paulsson [Mon, 4 Nov 2019 15:11:12 +0000 (16:11 +0100)]
[SystemZ] Use LivePhysRegs instead of isCCLiveOut() in SystemZElimCompare.cpp
Review: Ulrich Weigand
https://reviews.llvm.org/D68267
Jonas Paulsson [Mon, 4 Nov 2019 14:59:18 +0000 (15:59 +0100)]
[MachineVerifier] Improve verification of live-in lists.
MachineVerifier::visitMachineFunctionAfter() is extended to check the
live-through case for live-in lists. This is only done for registers without
aliases and that are neither allocatable or reserved, such as the SystemZ::CC
register.
The MachineVerifier earlier only catched the case of a live-in use without
an entry in the live-in list (as "using an undefined physical register").
A comment in LivePhysRegs.h has been added stating a guarantee that
addLiveOuts() can be trusted for a full register both before and after
register allocation.
Review: Quentin Colombet
https://reviews.llvm.org/D68267
Simon Pilgrim [Mon, 4 Nov 2019 15:07:37 +0000 (15:07 +0000)]
SanitizerMask::bitPosToMask - fix operator precedence warnings. NFCI.
Fix static analyzer operator precedence warnings with suitable bracketing. Pull out the mask generation code so clang-format doesn't make such a mess of it.
Simon Pilgrim [Mon, 4 Nov 2019 13:17:14 +0000 (13:17 +0000)]
[X86] Regenerate known-signbits-vector.ll tests.
Use X86 instead of X32 and add a common CHECK prefix
Sven van Haastregt [Mon, 4 Nov 2019 14:51:24 +0000 (14:51 +0000)]
[OpenCL] Fix FileCheck pattern
For this test, FileCheck is not run with the CHECK prefix; it seems
COMMON was intended here.
David Green [Mon, 4 Nov 2019 14:06:04 +0000 (14:06 +0000)]
[ARM] Use isFMAFasterThanFMulAndFAdd for MVE
The Arm backend will usually return false for isFMAFasterThanFMulAndFAdd,
where both the fused VFMA.f32 and a non-fused VMLA.f32 are usually
available for scalar code. For MVE we don't have the non-fused version
though. It makes more sense for isFMAFasterThanFMulAndFAdd to return
true, allowing us to simplify some of the existing ISel patterns.
The tests here are that non of the existing tests failed, and so we are
still selecting VFMA and VFMS. The one test that changed shows we can
now select from fast math flags, as opposed to just relying on the
isFMADLegalForFAddFSub option.
Differential Revision: https://reviews.llvm.org/D69115
Sanjay Patel [Mon, 4 Nov 2019 15:02:08 +0000 (10:02 -0500)]
[IR] adjust assert when replacing undef elements in vector constant
As noted in follow-up to:
rGa1e8ad4f2fa7
It's not safe to assume that an element of the constant is always
non-null. It's definitely not an expected case for the current
instcombine user, but that may not hold if this function is
eventually called from arbitrary places.
Michael Liao [Mon, 4 Nov 2019 14:59:39 +0000 (09:59 -0500)]
Fix compilation warning. NFC.
Ulrich Weigand [Mon, 4 Nov 2019 15:00:32 +0000 (16:00 +0100)]
[SystemZ] Fix typo
Typo in comment. NFC.
Nico Weber [Mon, 4 Nov 2019 14:51:41 +0000 (09:51 -0500)]
gn build: (manually) merge
51b4b17eb
Also reverts r353980 since that duplicated the GenAsmMatcher target for
AArch64. Instead use visiblity.
Nico Weber [Mon, 4 Nov 2019 14:50:16 +0000 (09:50 -0500)]
gn build: run "gn format"
Nico Weber [Mon, 4 Nov 2019 14:18:05 +0000 (09:18 -0500)]
gn build: add deps, see discussion on D69130
Benjamin Kramer [Mon, 4 Nov 2019 14:04:42 +0000 (15:04 +0100)]
Revert "[LV] Apply sink-after & interleave-groups as VPlan transformations (NFC)"
This reverts commit
2be17087f8c38934b7fc9208ae6cf4e9b4d44f4b. Fails ASAN.
David Green [Mon, 4 Nov 2019 13:38:09 +0000 (13:38 +0000)]
[ARM] More MVE shuffle tests for sequences that can be converted to VMOVS. NFC.
David Green [Mon, 4 Nov 2019 13:33:22 +0000 (13:33 +0000)]
[ARM] Add vrev32 NEON fp16 patterns
Fill in the gaps for vrev32.16 f16 patterns, extending the existing i16
patterns.
Differential Revision: https://reviews.llvm.org/D69508
Sanjay Patel [Mon, 4 Nov 2019 13:29:56 +0000 (08:29 -0500)]
[InstSimplify] use FMF to improve fcmp+select fold
This is part of a series of patches needed to solve PR39535:
https://bugs.llvm.org/show_bug.cgi?id=39535
Sanjay Patel [Mon, 4 Nov 2019 13:23:08 +0000 (08:23 -0500)]
[InstSimplify] add more tests for fcmp+select; NFC
The easy code fix won't catch non-canonical mismatched
constant patterns, so adding extra coverage for those in
case we decide that's important (but seems unlikely).
Sven van Haastregt [Mon, 4 Nov 2019 13:12:17 +0000 (13:12 +0000)]
[OpenCL] Fix address space for const method call from nonconst (PR43145)
Patch by Anastasia Stulova and Sven van Haastregt.
Differential Revision: https://reviews.llvm.org/D68781
Ulrich Weigand [Mon, 4 Nov 2019 12:26:38 +0000 (13:26 +0100)]
[SystemZ] Add GHC calling convention
This is a special calling convention to be used by the GHC compiler.
Author: Stefan Schulze Frielinghaus
Differential Revision: https://reviews.llvm.org/D69024
Sanjay Patel [Mon, 4 Nov 2019 12:36:03 +0000 (07:36 -0500)]
[InstSimplify] add more tests for fcmp+select; NFC
The addition of FMF for select allows more folding for these
kinds of patterns.
James Henderson [Mon, 4 Nov 2019 12:00:39 +0000 (12:00 +0000)]
[llvm-readobj] Change errors to warnings for symbol section name dumping
Also only print each such warning once.
LLVM-style output will now print "<?>" for sections it cannot identify,
e.g. because the section index is invalid. GNU output continues to print
the raw index. In both cases where the st_shndx value is SHN_XINDEX and
the index cannot be looked up in the SHT_SYMTAB_SHNDX section (e.g.
because it is missing), the symbol is printed like other symbols with
st_shndx >= SHN_LORESERVE.
Reviewed by: grimar, MaskRay
Differential Revision: https://reviews.llvm.org/D69671
Simon Pilgrim [Mon, 4 Nov 2019 11:37:42 +0000 (11:37 +0000)]
[X86] SimplifyDemandedVectorElts - attempt to recombine target shuffle using DemandedElts mask (REAPPLIED)
If we don't demand all elements, then attempt to combine to a simpler shuffle.
At the moment we can only do this if Depth == 0 as combineX86ShufflesRecursively uses Depth to track whether the shuffle has really changed or not - we'll need to change this before we can properly start merging combineX86ShufflesRecursively into SimplifyDemandedVectorElts (see D66004).
This reapplies rL368307 (reverted at rL369167) after the fix for the infinite loop reported at PR43024 was applied at rG3f087e38a2e7b87a5adaaac1c1b61e51220e7ff3
Diogo Sampaio [Mon, 4 Nov 2019 10:41:32 +0000 (10:41 +0000)]
[FIX] Removed duplicated v4f16 and v8f16 declarations
Reviewers: RKSimon, ostannard
Reviewed By: RKSimon
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69795
Luís Marques [Mon, 4 Nov 2019 11:21:51 +0000 (11:21 +0000)]
[RISCV] Implement the TargetLowering::getRegisterByName hook
Summary: The hook should work for any RISC-V register. Non-allocatable registers
do not need to be reserved, for the remaining the hook will only succeed
if you pass clang the -ffixed-xX flag. This builds upon D67185, which
currently only allows reserving GPRs.
Reviewers: asb, lenary
Reviewed By: lenary
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D69130
David Spickett [Mon, 4 Nov 2019 10:58:46 +0000 (10:58 +0000)]
[hwasan] Remove lazy thread-initialisation
This was an experiment made possible by a non-standard feature of the
Android dynamic loader.
It required introducing a flag to tell the compiler which ABI was being
targeted.
This flag is no longer needed, since the generated code now works for
both ABI's.
We leave that flag untouched for backwards compatibility. This also
means that if we need to distinguish between targeted ABI's again
we can do that without disturbing any existing workflows.
We leave a comment in the source code and mention in the help text to
explain this for any confused person reading the code in the future.
Patch by Matthew Malcomson
Differential Revision: https://reviews.llvm.org/D69574
Raphael Isemann [Mon, 4 Nov 2019 10:14:26 +0000 (11:14 +0100)]
[lldb][NFC] Remove Ocaml from TypeSystem::LLVMCastKind
Ocaml support was removed.
Raphael Isemann [Mon, 4 Nov 2019 10:12:27 +0000 (11:12 +0100)]
[lldb][NFC] Remove unused ExpressionParser::Parse
Summary:
This function is only used internally by ClangExpressionParser. By putting it in the ExpressionParser class all languages
that implement ExpressionParser::Parse have to share the same signature (which forces us in downstream to add
swift-specific arguments to ExpressionParser::Parse which then propagate to ClangExpressionParser and so on).
Reviewers: davide
Subscribers: JDevlieghere, lldb-commits
Tags: #upstreaming_lldb_s_downstream_patches, #lldb
Differential Revision: https://reviews.llvm.org/D69710
Jonas Paulsson [Sat, 2 Nov 2019 08:38:25 +0000 (09:38 +0100)]
[SystemZ] Improve handling of huge PC relative immediate offsets.
Demand that an immediate offset to a PC relative address fits in 32 bits, or
else load it into a register and perform a separate add.
Verify in the assembler that such immediate offsets fit the bitwidth.
Even though the final address of a Load Address Relative Long may fit in 32
bits even with a >32 bit offset (depending on where the symbol lives relative
to PC), the GNU toolchain demands the offset by itself to be in range. This
patch adapts the same behavior for llvm.
Review: Ulrich Weigand
https://reviews.llvm.org/D69749
Gil Rapaport [Mon, 7 Oct 2019 14:24:33 +0000 (17:24 +0300)]
[LV] Apply sink-after & interleave-groups as VPlan transformations (NFC)
The sink-after and interleave-group vectorization decisions were so far applied to
VPlan during initial VPlan construction, which complicates VPlan construction – also because of
their inter-dependence. This patch refactors buildVPlanWithRecipes() to construct a simpler
initial VPlan and later apply both these vectorization decisions, in order, as VPlan-to-VPlan
transformations.
Differential Revision: https://reviews.llvm.org/D68577
Raphael Isemann [Mon, 4 Nov 2019 08:25:01 +0000 (09:25 +0100)]
[lldb][NFC] Make test/python_api/module_section test smaller
Summary:
I don't see why this test needs to compile this rather complicated file for just testing module sections. This just removes all this code with a simple
"Hello world!" program which should be faster to compile
Reviewers: labath, davide, JDevlieghere
Reviewed By: JDevlieghere
Subscribers: jfb, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D69705
Raphael Isemann [Mon, 4 Nov 2019 08:23:37 +0000 (09:23 +0100)]
[lldb] Also disable de-registration of EHFrames in IRExecutionUnit
Summary:
We disabled registration by providing an empty `registerEHFrames`, so we should also provide an empty `deregisterEHFrames`
in case that function relies on `registerEHFrames` being called before. Currently `deregisterEHFrames` is a no-op anyway
as it just iterates over the (empty( list of registered EHFrames and then clear the empty list.
Reviewers: davide, JDevlieghere
Reviewed By: JDevlieghere
Subscribers: JDevlieghere, lldb-commits
Tags: #upstreaming_lldb_s_downstream_patches, #lldb
Differential Revision: https://reviews.llvm.org/D69713
Raphael Isemann [Mon, 4 Nov 2019 08:05:24 +0000 (09:05 +0100)]
[lldb] Provide a getter for m_materializer_up in LLVMUserExpression instead of relying on it being accessible.
Summary:
Motivated by Swift using the materializer in a few places which requires us to add this getter ourselves.
We also need a setter, but let's keep this minimal to unblock the downstream reverts in Swift.
Reviewers: davide
Reviewed By: davide
Subscribers: abidh, JDevlieghere, lldb-commits
Tags: #upstreaming_lldb_s_downstream_patches, #lldb
Differential Revision: https://reviews.llvm.org/D69714