Simon Glass [Sat, 25 Apr 2015 04:33:07 +0000 (22:33 -0600)]
dm: core: Correct bug introduced in uclass_first/next_device()
These functions now rely on uclass_find_first/next_device() and assume that
they will either return failure (-ve error code) or a device. In fact,
coming to the end of a list is not considered failure and they return 0
in that case.
The logic to deal with this was replaced in commit
acb9ca2a with just using
uclass_get_device_tail(). Add back the missing logic. This bug was
caught by unit tests but since they were broken for other reasons at the
time, this was not noticed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Axel Lin [Sat, 25 Apr 2015 02:53:14 +0000 (10:53 +0800)]
serial: ns16550: Remove hard-coded baud_divisor setting
This was accidentally added by commit
dd0b0122bacc
"serial: ns16550: Add an option to specify the debug UART register shift".
Remove it.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 24 Apr 2015 08:28:40 +0000 (17:28 +0900)]
dm: core: drop device removal error path correctly
Trivial bug fix for commit
5a87c4174d18 (dm: core: Drop device
removal error path when not supported).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 28 Apr 2015 11:28:43 +0000 (07:28 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi
Jagannadha Sutradharudu Teki [Mon, 27 Apr 2015 15:34:15 +0000 (21:04 +0530)]
sf: Fix to compute proper sector_size
Upto now flash sector_size is assigned from params which isn't
necessarily a sector size from vendor, so based on the SECT_*
flags from flash_params the erase_size will compute and it will
become the sector_size finally.
Bug report (from Bin Meng):
=> sf probe
SF: Detected SST25VF016B with page size 256 Bytes, erase size 4 KiB,
total 2 MiB, mapped at
ffe00000
=> sf erase 0 +100
SF: 65536 bytes @ 0x0 Erased: OK
Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Fri, 24 Apr 2015 11:51:10 +0000 (19:51 +0800)]
dm: sf: Make SST flash write op work again
With SPI flash moving to driver model, commit fbb0991 "dm: Convert
spi_flash_probe() and 'sf probe' to use driver model" ignored the
SST flash-specific write op (byte program & word program), which
actually broke the SST flash from wroking.
This commit makes SST flash work again under driver model, by adding
SST flash-specific handling in the spi_flash_std_write().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Bin Meng [Tue, 28 Apr 2015 07:59:54 +0000 (13:29 +0530)]
dm: sf: Save flash flags to struct spi_flash
Add a new member 'flags' in struct spi_flash to store the flash flags
during spi_flash_validate_params().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
David Dueck [Wed, 1 Apr 2015 12:20:24 +0000 (14:20 +0200)]
spi: omap3: Fix timeout handling
The timeout value is never reset during the transfer. This means that when
transferring more data we eventually trigger the timeout.
This was reported on the mailing list:
"Spansion SPI flash read timeout with AM335x"
Signed-off-by: David Dueck <davidcdueck@googlemail.com>
CC: Tom Rini <trini@konsulko.com>
CC: Stefan Roese <sr@denx.de>
CC: Andy Pont <andy.pont@sdcsystems.com>
Tested-by: David Dueck <davidcdueck@googlemail.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Tom Rini [Fri, 24 Apr 2015 19:07:19 +0000 (15:07 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fdt
Tom Rini [Fri, 24 Apr 2015 17:44:28 +0000 (13:44 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Fri, 24 Apr 2015 17:43:24 +0000 (13:43 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Daniel Schwierzeck [Sun, 22 Feb 2015 15:58:30 +0000 (16:58 +0100)]
MIPS: implement device-tree handover to Linux kernel
Add device-tree handover to Linux kernel conforming with MIPS UHI [1].
Register $a0 will be set to the reserved value -2. The address of
the device-tree blob will be stored as KSEG0 address in $a1. $a2 and
$a3 are set to zero.
[1] http://prplfoundation.org/wiki/MIPS_documentation
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Hans de Goede [Mon, 20 Apr 2015 09:13:37 +0000 (11:13 +0200)]
fdt: Fix handling of paths with options in them
After syncing the sunxi dts files with the upstream kernel dm/fdt sunxi
builds would no longer boot.
The problem is that stdout-path is now set like this in the upstream dts
files: stdout-path = "serial0:115200n8". The use of options in of-paths,
either after an alias name, or after a full path, e.g. stdout-path =
"/soc@
01c00000/serial@
01c28000:115200", is standard of usage, but something
which the u-boot dts code so far did not handle.
This commit fixes this, adding support for both path formats.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
York Sun [Mon, 23 Mar 2015 17:41:35 +0000 (10:41 -0700)]
armv8/fsl-lsch3: Implement workaround for I2C erratum A009203
This erratum requires setting GLITCH_EN bit in debug register to
enable digital filter to improve clock stability.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Heiko Schocher <hs@denx.de>
Yangbo Lu [Sat, 21 Mar 2015 02:28:31 +0000 (19:28 -0700)]
ls2085a: esdhc: Add esdhc support for ls2085a
This patch adds esdhc support for ls2085a.
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Scott Wood [Tue, 24 Mar 2015 20:25:03 +0000 (13:25 -0700)]
armv8/ls2085ardb: Enable NAND SPL support
Enable NAND boot support using SPL framework. To boot from
NAND, either use DIP switches on board, or "qixis_reset nand"
command. Details of forming NAND image can be found in README.
Signed-off-by: Scott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit
252ed872]
Signed-off-by: York Sun <yorksun@freescale.com>
Scott Wood [Sat, 21 Mar 2015 02:28:29 +0000 (19:28 -0700)]
freescale/qixis: Add support for booting from NAND
Use "qixis_reset nand" to reset the board to boot from NAND.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Scott Wood [Tue, 24 Mar 2015 20:25:02 +0000 (13:25 -0700)]
armv8/ls2085aqds: NAND boot support
This adds NAND boot support for LS2085AQDS, using SPL framework.
Details of forming NAND image can be found in README.
Signed-off-by: Scott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit
252ed872]
Signed-off-by: York Sun <yorksun@freescale.com>
Jaiprakash Singh [Sat, 21 Mar 2015 02:28:27 +0000 (19:28 -0700)]
driver/ifc: Add 64KB page support
IFC has two register pages.Till IFC version 1.4 each
register page is 4KB each.But IFC ver 2.0 register page
size is 64KB each.IFC regiters structure is break into
two viz FCM and RUNTIME.FCM(Flash control machine) registers
are defined in PAGE0 and controls IFC generic functionality.
RUNTIME registers are defined in PAGE1 and controls NAND and
GPCM funcinality.
FCM and RUNTIME structures defination is common for IFC
version 1.4 and 2.0.
Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Sat, 21 Mar 2015 02:28:26 +0000 (19:28 -0700)]
board/ls2085qds: Add support ethernet
Add support of ethernet:
- eth.c: mapping lane to slot for (0x2A, 0x07)
- ls2085a.c: To enable/disable dpmac and get link type
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Tom Rini [Thu, 23 Apr 2015 18:56:47 +0000 (14:56 -0400)]
Merge branch 'buildman' of git://git.denx.de/u-boot-x86
Tom Rini [Thu, 23 Apr 2015 17:53:09 +0000 (13:53 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-dm
Sanchayan Maity [Fri, 17 Apr 2015 13:26:42 +0000 (18:56 +0530)]
colibri_vf: Enable USB support for Colibri Vybrid
Enable USB support on Toradex Colibri Vybrid Modules.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Sanchayan Maity [Wed, 15 Apr 2015 10:54:27 +0000 (16:24 +0530)]
usb: host: Add ehci-vf USB driver for ARM Vybrid SoC's
This driver adds support for the USB peripheral on Freescale Vybrid
SoC's.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Sanchayan Maity [Wed, 15 Apr 2015 10:54:26 +0000 (16:24 +0530)]
ARM: vf610: Initial integration for Colibri VF50/VF61
This adds initial support for Colibri VF50/VF61 based on Freescale
Vybrid SoC.
- CPU clocked at 396/500 MHz
- DDR3 at 396MHz
- for VF50, use PLL2 as memory clock (synchronous mode)
- for VF61, use PLL1 as memory clock (asynchronous mode)
- Console on UART0 (Colibri UART_A)
- Ethernet on FEC1
- PLL5 based RMII clocking (E.g. No external crystal)
- UART_A and UART_C I/O muxing
- Boot from NAND by default
Tested on Colibri VF50/VF61 booting using serial loader over UART.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Stefan Agner [Wed, 15 Apr 2015 10:54:25 +0000 (16:24 +0530)]
ARM: vf610: Enable caches
Enables caches which provides a rather huge speedup of the boot loader.
Also mark the on-chip RAM as cachable since this is the area U-Boot runs
from.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Sanchayan Maity [Wed, 15 Apr 2015 10:54:24 +0000 (16:24 +0530)]
ARM: vf610: Add SoC and CPU type detection
Vybrid product family consists of several rather similar SoC which
can be determined by softare during boot time. This allows use of
variable ${soc} for Linux device tree files. Detect VF5xx CPU's by
reading the CPU count register. We can determine the second number
of the CPU type (VF6x0) which indicates the presence of a L2 cache.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Stefan Agner [Wed, 15 Apr 2015 10:54:23 +0000 (16:24 +0530)]
ARM: vf610: Enable external 32KHz oscillator
Enable the SCSC (Slow Clock Source Controller) and select the external
32KHz oscillator. This improves the accuracy of the RTC.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Sanchayan Maity [Wed, 15 Apr 2015 10:54:22 +0000 (16:24 +0530)]
ARM: vf610: Move DDR3 initialization to imx-common
In order to avoid code duplication, move the DDR3 initialization to the
common place under imx-common. Currently ROW_DIFF and COL_DIFF can be
chosen from the board file. The JEDEC timings are specified using a
common ddr3_jedec_timings structure.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Heiko Schocher [Sun, 12 Apr 2015 08:18:09 +0000 (10:18 +0200)]
cmd, nand: add more info to "nand info"
add subpagesize, nand options and bbt options to the
"nand info" output.
=> nand info
Device 0: nand0, sector size 256 KiB
Page size 4096 b
OOB size 256 b
Erase size 262144 b
subpagesize 4096 b
options 0x 200
bbt options 0x 8000
Signed-off-by: Heiko Schocher <hs@denx.de>
Marek Vasut [Thu, 9 Apr 2015 23:11:54 +0000 (01:11 +0200)]
rtc: Set valid date after reset
Some RTC chips tend to set garbage date after reset.
This patch sets the date to 2000-01-01 00:00 immediatelly
after the RTC chip reset is issued using the "date reset"
command.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Bryan De Faria [Thu, 2 Apr 2015 08:57:07 +0000 (10:57 +0200)]
arm: am437x: mux: Update mux names
Correct and complete the mux names following AM437x Technical Reference Manual.
Signed-off-by: Bryan De Faria <bdefaria-ext@adeneo-embedded.com>
angelo@sysam.it [Sun, 29 Mar 2015 20:54:16 +0000 (22:54 +0200)]
m68k: add architecture-specific u-boot.lds
Add architecture-specific u-boot.lds and remove all board-specific
u-boot.lds.
All the .text customization that was board-specific have been
moved inside the related include/configs, inside a
LDS_BOARD_TEXT define.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Dileep Katta [Fri, 27 Mar 2015 17:36:57 +0000 (23:06 +0530)]
fastboot: ARM: OMAP5: Enable reboot-bootloader
Implemented fb_set_reboot_flag() for OMAP5 to set
an environment variable 'dofastboot' when reboot-bootloader called.
This environment variable will be checked in boot command and fastboot
will be called if the variable is set.
If the bootcmd env variable of OMAP5 common is overwritten with board-specific
command, then these changes will not apply.
This was originally intended for DRA7 platform, but now applies to all OMAP5.
Ref:
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=
19da2e436e9806259cf1f4988b9e046ab256bf2c
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Dileep Katta <dileep.katta@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Make it check for !CONFIG_ENV_IS_NOWHERE as we can't saveenv()
in that case]
Signed-off-by: Tom Rini <trini@konsulko.com>
Wu, Josh [Wed, 15 Apr 2015 02:25:18 +0000 (10:25 +0800)]
patman: check git format.subjectprefix setting when generate patches prefix
For the local project, we may specified format.subjectprefix setting.
Then the patch will be formated as [Project_prefix][PATCH].
But patman will not check this setting. It will remove the
format.subjectprefix.
So This patch will let patman check this setting and add it as a
project prefix.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Michal Simek [Mon, 20 Apr 2015 09:46:24 +0000 (11:46 +0200)]
buildman: Add gcc 4.9.0 with Microblaze toolchain
Also read gcc 4.9.0 at kernel.org which also have Microblaze toolchain.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Fixed unit test failure by updating the test:
Signed-off-by: Simon Glass <sjg@chromium.org>
Dileep Katta [Tue, 24 Mar 2015 22:34:51 +0000 (04:04 +0530)]
ARM: DRA7: Set serial number environment variable
This patch populates serial number environment variable from
die_id_0 and die_id_1 register values for DRA7xx boards.
The function is added in omap common code so that this can be re-used.
Serial# environment variable will be useful to show correct
information in "fastboot devices" commands.
Ref:
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=
a6bcaaf67f6e4bcd97808f53d0ceb4b0c04d583c
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Dileep Katta <dileep.katta@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Dileep Katta [Tue, 24 Mar 2015 22:34:50 +0000 (04:04 +0530)]
ARM: DRA7XX: Enable Fastboot
- Fastboot is enable by default for DRA7XX
- This is based on following patch modified accordingly
http://git.omapzoom.org/?p=repo/u-boot.git;a=commit;h=
b2e04f92b5d91c708b6fd6b79d2266966ac51f4b
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Dileep Katta <dileep.katta@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Zhou Zhu [Mon, 23 Mar 2015 22:57:01 +0000 (17:57 -0500)]
mvgpio: remove CONFIG_SHEEVA_88SV331xV5 dependency
The Marvell GPIO driver can be used on Marvell platforms other than
Sheeva, so remove the ifdef to enable it for others.
Signed-off-by: Rob Herring <robh@kernel.org>
Xiang Wang [Mon, 23 Mar 2015 22:56:58 +0000 (17:56 -0500)]
gpio: mvmfp: support newer MFP bit definitions
1. The bits 11..10 for mfp driver strength is only valid for
aspen and old xscale family, for newer Marvell chip, this range
has been moved to 12..11.
2. add sleep bit support
Signed-off-by: Xiang Wang <wangx@marvell.com>
[robh: rebase to current mainline]
Signed-off-by: Rob Herring <robh@kernel.org>
Peter Howard [Sun, 22 Mar 2015 22:19:56 +0000 (09:19 +1100)]
davinci: add support for omapl138-lcdk board
Signed-off-by: Peter Howard <phoward@gme.net.au>
[trini: Add config file, update for ..._ether_addr() -> ..._ethaddr() rename]
Signed-off-by: Tom Rini <trini@konsulko.com>
York Sun [Sat, 21 Mar 2015 02:28:24 +0000 (19:28 -0700)]
armv8/ls2085ardb: Add support of LS2085ARDB platform
The LS2085ARDB is a evaluation platform that supports LS2085A
family SoCs. This patch add sbasic support for the platform.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
York Sun [Sat, 21 Mar 2015 02:28:23 +0000 (19:28 -0700)]
armv8/ls2085aqds: Add support of LS2085AQDS platform
The LS2085AQDS is an evaluatoin platform that supports the LS2085A
family SoCs. This patch add basic support of the platform.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Prabhakar Kushwaha [Sat, 21 Mar 2015 02:28:22 +0000 (19:28 -0700)]
driver/ldpaa: Add support of WRIOP static data structure
Wire rate IO Processor (WRIOP) provide support of receive and transmit
ethernet frames from the ethernet MAC. Here Each WRIOP block supports
upto 64 DPMACs.
Create a house keeping data structure to support upto 16 DPMACs and
store external phy related information.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Bhupesh Sharma [Sat, 21 Mar 2015 02:28:20 +0000 (19:28 -0700)]
armv8/fsl-ch3: Add support to print RCW configuration
This patch adds support to print out the Reset Configuration Word
information.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Shaohui Xie [Sat, 21 Mar 2015 02:28:19 +0000 (19:28 -0700)]
net/memac_phy: reuse driver for little endian SoCs
The memac for PHY management on little endian SoCs is similar on big
endian SoCs, so we modify the driver by using I/O accessor function to
handle the endianness, so the driver can be reused on little endian
SoCs, we introduce CONFIG_SYS_MEMAC_LITTLE_ENDIAN for little endian
SoCs, if the CONFIG_SYS_MEMAC_LITTLE_ENDIAN is defined, the I/O access
is little endian, if not, the I/O access is big endian. Move fsl_memac.h
out of powerpc include.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
J. German Rivera [Sat, 21 Mar 2015 02:28:18 +0000 (19:28 -0700)]
drivers/fsl-mc: Changed MC firmware loading for new boot architecture
Changed MC firmware loading to comply with the new MC boot architecture.
Flush D-cache hierarchy after loading MC images. Add environment
variables "mcboottimeout" for MC boot timeout in milliseconds,
"mcmemsize" for MC DRAM block size. Check MC boot status before calling
flib functions.
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
pankaj chauhan [Sat, 21 Mar 2015 02:28:17 +0000 (19:28 -0700)]
net/phy/cortina: Fix compilation warning
Fix comilation warning which is emitted when
firmware address is more than 32 bit.
Signed-off-by: pankaj chauhan <pankaj.chauhan@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Minghuan Lian [Sat, 21 Mar 2015 02:28:16 +0000 (19:28 -0700)]
armv8: Add SerDes framework for Layerscape Architecture
Add support of SerDes framework for Layerscape Architecture.
- Add support of 2 SerDes block
- Add SerDes protocol parsing and detection
- Create table of SerDes protocol supported by LS2085A
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Sat, 21 Mar 2015 02:28:15 +0000 (19:28 -0700)]
driver/ldpaa_eth: Update ldpaa ethernet driver
Fix flush_dcache_range() input parameter to use start and end addresses.
Change ethernet interface name to DPNI. Update entry criteria for
ldpaa_eth_stop. Ethernet stack first stop the device before performing
next operation. At the time of Ethernet driver registration,
net_dev->state is set as ETH_STATE_INIT So take care net_dev->state as
ETH_STATE_INIT in ldpaa_eth_stop.
Undef CONFIG_PHYLIB temorarily because ldpaa_eth driver currently does
not support PHYLIB.
Instead of clearing pull descriptor one time, clear it before issuing any
volatile dequeue command.
Volatile command does not return frame immidiately, wait till a frame
is available in DQRR. This frame can be valid or expired.
Flush buffer before releasing to BMan ensure the core does not have any
cachelines that the WRIOP will DMA to.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: pankaj chauhan <pankaj.chauhan@freescale.com>
Signed-off-by: Roy Pledge <Roy.Pledge@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Scott Wood [Sat, 21 Mar 2015 02:28:14 +0000 (19:28 -0700)]
armv8/fsl-lsch3: Use correct compatible for serial clock fixup
The serial nodes in the fsl-lsch3 device trees have compatible =
"fsl,ns16550", "ns16550a" -- so don't look for "ns16550".
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Scott Wood [Sat, 21 Mar 2015 02:28:13 +0000 (19:28 -0700)]
armv8/ls2085a: Add workaround for USB erratum A-008751
Without this "USB may not work" according to the erratum text, though I
did not notice a problem without it.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Scott Wood [Sat, 21 Mar 2015 02:28:12 +0000 (19:28 -0700)]
fsl-lsch3: Introduce place for common early SoC init
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Sat, 21 Mar 2015 02:28:11 +0000 (19:28 -0700)]
armv8/fsl-lsch3: Update early MMU table
During booting, IFC is mapped to low region. After booting up, IFC is
remapped to high region for larger space. The environmental variables are
also stored at high region. In order to read the variables during booting,
a virtual mapping is required.
Cache was enabled for entire IFC space before. Actually the first two
entries are big enough (4MB) to cover the boot code and environmental
variables. Remove extra entries. Move OCRAM entry out of ifdef.
Signed-off-by: York Sun <yorksun@freescale.com>
Scott Wood [Sat, 21 Mar 2015 02:28:10 +0000 (19:28 -0700)]
armv8/fsl-lsch3: Set nodes in DVM domain
This is required for TLB invalidation broadcasts to work.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
pankaj chauhan [Sat, 21 Mar 2015 02:28:09 +0000 (19:28 -0700)]
armv8/ls2085a: Add support for reset request
Add support for reset_cpu() by asserting RESET_REQ_B.
Signed-off-by: pankaj chauhan <pankaj.chauhan@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Sat, 21 Mar 2015 02:28:08 +0000 (19:28 -0700)]
armv8/ls2085a: Fix generic timer clock source
The timer clock is system clock divided by 4, not fixed 12MHz.
This is common to the SoC, not board specific. Primary core is
fixed when u-boot still runs in board_f. Secondary cores are
fixed by reading a variable set by u-boot.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Mark Rutland <mark.rutland@arm.com>
York Sun [Sat, 21 Mar 2015 02:28:07 +0000 (19:28 -0700)]
armv8/fsl-lsch3: Fix platform clock calculation
Platform clock is half of platform PLL. There is an additional divisor
in place. Clean up code copied from powerpc.
Signed-off-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Sat, 21 Mar 2015 02:28:06 +0000 (19:28 -0700)]
armv8/ls2085a: Update common header file
ls2085a_common.h contains hard-coded information for NOR/NAND flash,
I2C, DDR, etc. These are platform specific. Move them out of common
header file and placed into respective board header files.
Move TEXTBASE to 1MB offset to fit NOR flash with up to 1MB sector
size.
Enable command auto complete. Update prompt symbol. Set fdt_high to
0xa0000000 because Linux requires that the fdt be 8-byte aligned
and below 512 MiB. Besides ensuring compliance with the 512 MiB
limit, this avoids problems with the dtb being misaligned within
the FIT image.
Change the MC FW, MC DPL and Debug server NOR addresses in compliance
with the NOR flash layouts for 128MB flash.
Add PCIe macros. Enable "loadb" command. Disable debug server.
Enable workaround for erratum A008511.
Stop reset on panic for postmortem debugging.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Sat, 21 Mar 2015 02:28:05 +0000 (19:28 -0700)]
armv8/fsl-lsch3: Implement workaround for erratum A008585
Generic Timer may contain an erroneous value. The workaround is to
read it twice until getting the same value.
Signed-off-by: York Sun <yorksun@freescale.com>
Minghuan Lian [Thu, 19 Mar 2015 16:43:51 +0000 (09:43 -0700)]
drivers/net/e1000.c: Cleanup whitespace
The patch removes unnecessary whitespace to fix checkpatch's
warning: unnecessary whitespace before a quoted newline
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Scott Wood [Thu, 19 Mar 2015 16:43:12 +0000 (09:43 -0700)]
cmd_mem: Store last address/size/etc as ulong
Otherwise the high 32 bits get truncated on 64-bit U-boot.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <yorksun@freescale.com>
York Sun [Thu, 19 Mar 2015 16:30:29 +0000 (09:30 -0700)]
driver/ddr/fsl: Add workaround for DDR erratum A008511
This erratum only applies to general purpose DDR controllers in LS2.
It shouldn't be applied to DP-DDR controller. Check DDRC versoin number
before applying workaround.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Thu, 19 Mar 2015 16:30:28 +0000 (09:30 -0700)]
driver/ddr/fsl: Add built-in memory test for DDR4 driver
Add built-in memory test to catch errors after DDR is initialized, before
any other transactions. To enable this test, define CONFIG_FSL_DDR_BIST.
An environmental variable "ddr_bist" is checked before starting test.
It takes a while (several seconds) depending on system memory size.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Thu, 19 Mar 2015 16:30:27 +0000 (09:30 -0700)]
driver/ddr/fsl: Fix driver to support empty first slot
CS0 was not allowed to be empty by u-boot driver in the past to simplify
the driver. This may be inconvenient for some debugging. This patch lifts
the restrictions. Controller interleaving still requires CS0 populated.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Thu, 19 Mar 2015 16:30:26 +0000 (09:30 -0700)]
drivers/ddr/fsl: Update DDR driver for DDR4
Add/update registers for DDR4, including DQ mappings. Allow raw timing
method used for all controllers. Update mode_9 register to 0x500 for
improved stability. Check DDR controller version number individually
in case a SoC has multiple DDR controllers of different versions.
Increase read-write turnaround for DDR4 high speeds.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Fri, 20 Mar 2015 17:20:40 +0000 (10:20 -0700)]
driver/i2c/mxc: Enable I2C bus 3 and 4
Some SoCs have more than two I2C busses. Instead of adding ifdef
to the driver, macros are put into board header file where
CONFIG_SYS_I2C_MXC is defined.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Heiko Schocher <hs@denx.de>
Scott Wood [Thu, 19 Mar 2015 16:20:49 +0000 (09:20 -0700)]
nand/fsl_ifc: Increase eccstat[] for IFC 2.0
IFC 2.0 doubled the SRAM size, which means double the number of
ECCSTAT registers. Fix the resulting array overflow.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Thu, 19 Mar 2015 16:20:48 +0000 (09:20 -0700)]
driver/fsl_ifc: Add support to finalize CS1, CS3 address binding
For fsl-lsch3, IFC is binded with address within 32-bit at fist.
After u-boot relocates to DDR, CS1, CS3 can be binded to higher
address to support large space.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Thu, 19 Mar 2015 16:20:47 +0000 (09:20 -0700)]
board/ls2085_common: Increase malloc length
Increase malloc length for more than 2M.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Thu, 19 Mar 2015 16:20:46 +0000 (09:20 -0700)]
driver/ldpaa_eth: Add LDPAA Ethernet driver
LDPAA Ethernet driver is a freescale's new ethernet driver based on
Layerscape architecture.
Every ethernet driver controls on DPNI object. Where all DPNIs share
one common DPBP and DPIO object to support Rx and Tx flows.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
CC: Cristian Sovaiala <cristian.sovaiala@freescale.com>
CC: Bogdan Hamciuc <bogdan.hamciuc@freescale.com>
CC: J. German Rivera <German.Rivera@freescale.com>
[York Sun: s/NetReceive/net_process_received_packet]
Reviewed-by: York Sun <yorksun@freescale.com>
Simon Glass [Sat, 28 Feb 2015 05:06:42 +0000 (22:06 -0700)]
dm: Init device tree as well as driver model in SPL
If enabled, make sure that the device tree is available in SPL before
setting up driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 28 Feb 2015 05:06:41 +0000 (22:06 -0700)]
dm: core: Select device tree control correctly for SPL
Some boards will not use device tree for SPL even with driver model. Add
the logic to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 28 Feb 2015 05:06:40 +0000 (22:06 -0700)]
fdt: Allow FDT functions to be built for SPL
Remove the implicit assumption that SPL does not support device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 28 Feb 2015 05:06:38 +0000 (22:06 -0700)]
fdt: Add an option to disable device tree in SPL
Some boards cannot support device tree due to lack of memory. Add an option
to allow these boards to continue to work (and even use driver model).
This is a 'negative' option since most boards are expected to support device
tree in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 28 Feb 2015 05:06:37 +0000 (22:06 -0700)]
Correct malloc_limit value for pre-relocation malloc()
The limit is measured from the start of the malloc() area and is not an
absolute address. Correct this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 28 Feb 2015 05:06:36 +0000 (22:06 -0700)]
Move initf_malloc() to a common place
To allow this function to be used from SPL, move it to the malloc()
code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 28 Feb 2015 05:06:35 +0000 (22:06 -0700)]
fdt: Rename setup_fdt() and make it prepare also
There is little reason to split these two functions. Bring them together
which simplifies the init sequence.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 28 Feb 2015 05:06:34 +0000 (22:06 -0700)]
fdt: sandbox: Move setup code from board_f to fdtdec
We want to be able to set up the device tree in SPL, so move this code
to a common place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 28 Feb 2015 05:06:33 +0000 (22:06 -0700)]
dm: core: Drop device removal error path when not supported
When CONFIG_DM_DEVICE_REMOVE is not enabled, such as in SPL, we cannot
remove or unbind devices and do not expect to get errors when binding
and probing devices. So drop the error path to reduce code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 28 Feb 2015 05:06:32 +0000 (22:06 -0700)]
dm: Add a panic_str() function to reduce code size
The printf() in panic() adds about 1.5KB of code size to SPL when compiled
with Thumb-2. Provide a smaller version that does not support printf()-style
arguments and use it in two commonly compiled places.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 28 Feb 2015 05:06:31 +0000 (22:06 -0700)]
dm: core: Remove unbind operations when not required
The CONFIG_DM_DEVICE_REMOVE option takes out code related to removing
devices. It should also remove the 'unbind' code since if we cannot
remove we probably don't need to unbind.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 28 Feb 2015 05:06:30 +0000 (22:06 -0700)]
dm: core: Allow sequence alias support to be removed for SPL
In many cases SPL only uses a single serial port and there is no need for
alias sequence support. We will just use the serial port pointed to by
stdout-path in the /chosen node.
Signed-off-by: Simon Glass <sjg@chromium.org>
Jagannadha Sutradharudu Teki [Thu, 23 Apr 2015 14:22:11 +0000 (19:52 +0530)]
Revert "spi: add config option to enable the WP pin function on st micron flashes"
This reverts commit
562f8df18da62ae02c4ace1e530451fe82c3312d.
Note: Even un-reverting this patch couldn't works as expected, based
on the latest testing from Heiko Schocher.
Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Stefan Roese [Wed, 11 Mar 2015 08:51:39 +0000 (09:51 +0100)]
cmd_led: Extend led command to support blinking and more leds
This patch extends the U-Boot "led" command to support automatic blinking
by setting a blink frequency in milliseconds. Additionally the number of
supported LEDs is increased to 6 (0...5).
This will be used by the PCA9551 LED driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Linus Walleij [Tue, 21 Apr 2015 13:35:59 +0000 (15:35 +0200)]
integrator: stop zeroing the gd flags
This assignment conflicts with code that add flags with
gd->flags |= FOO prior to the execution of this function.
Seems like a historical artifact and creates bugs with
early alloc().
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 21 Apr 2015 12:59:39 +0000 (21:59 +0900)]
ARM: integrator: move CONFIG_ARCH_CINTEGRATOR to Kconfig
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Masahiro Yamada [Tue, 21 Apr 2015 12:59:38 +0000 (21:59 +0900)]
ARM: integrator: abolish CONFIG_INTEGRATOR
Switch to CONFIG_ARCH_INTEGRATOR defined by Kconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Masahiro Yamada [Tue, 21 Apr 2015 12:59:37 +0000 (21:59 +0900)]
ARM: integrator: split board select into AP/CP select and CM select
Select integrator boards by the combination of platform select (AP/CP)
and core module select (CM720T, CM920T, ...).
This allows us to remove CONFIG_SYS_EXTRA_OPTIONS and make Kconfig
much cleaner.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Masahiro Yamada [Tue, 21 Apr 2015 12:59:36 +0000 (21:59 +0900)]
ARM: integrator: move board select into mach-integrator/Kconfig
The board/SoC select menu in arch/arm/Kconfig is still cluttered.
Add ARCH_INTEGRATOR into arch/arm/Kconfig and move the board select
under arch/arm/mach-integrator.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Masahiro Yamada [Tue, 21 Apr 2015 12:59:35 +0000 (21:59 +0900)]
ARM: ARM720t: remove empty asm/arch/hardware.h
arch/arm/cpu/arm720t/start.S includes <asm/arch/hardware.h>,
but the hardware.h headers of ARM720T boards are all empty.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
Masahiro Yamada [Tue, 21 Apr 2015 04:39:27 +0000 (13:39 +0900)]
SPDX: add X11 SPDX-License-Identifier
These is a growing trend to license DT files dual GPL and X11
especially in the Linux community. It allows easier reuse of
device trees for other software projects.
This commit prepares for doing so in U-Boot too, since DT files are
often copied from the kernel to U-Boot.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 17 Apr 2015 01:20:43 +0000 (10:20 +0900)]
Licenses: fix a typo in README
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Linus Walleij [Tue, 14 Apr 2015 08:01:35 +0000 (10:01 +0200)]
vexpress64: use DM for all vexpress64 boards
Commit
d8bafe1310487ba0e0785997726b4792072178d3
"ARMv8: enable DM in vexpress64 board" only enabled DM
for the simulated vexpress64 board (FVP) with the
hardcoded clock value for the simulated board, causing
a console regression on the Juno board which was using
a different clock setting.
Fix this by enabling DM for all vexpress64 boards,
defining the clock frequency per-board, deleting the
static array of PL01x ports from the config file and
relying solely on the port defined in the boardfile
using platform data.
Cc: David Feng <fenghua@phytium.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Hannes Petermaier [Wed, 8 Apr 2015 05:38:35 +0000 (07:38 +0200)]
board/BuR/tseries: change pinmux
some pins on the board have been rerouted to other peripherals, so we
change the pinmux to apply with hardware-design.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Hannes Petermaier [Wed, 8 Apr 2015 05:38:34 +0000 (07:38 +0200)]
board/BuR/tseries: reactivate NAND-board
The NAND-version has been become a bit orphan.
Now we need to reactivate it, so bring necessary things:
- loading devicetree
- switch control signal to correct pins
- setup pinmux
- default-environment
up to date.
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Hannes Petermaier [Wed, 8 Apr 2015 05:38:33 +0000 (07:38 +0200)]
board/BuR/common: simplify access to devicetree
instead of polling everytime the environment, we take usage of the global
gd->fdt_blob variable and check it only against NULL.
Variable "dtbaddr" from environment is needed only one time on loading the
devicetree within "load_devicetree()"
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Simon Glass [Sun, 19 Apr 2015 15:05:40 +0000 (09:05 -0600)]
dm: spi: Correct SPI claim/release_bus() methods
These methods should be passed a slave device, not a bus. This matches the
old SPI interface. It is important to know which device is claiming the bus
so passing a bus is not that useful.
Reported-by: Haikun Wang <haikun.wang@freescale.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Simon Glass [Sat, 28 Feb 2015 05:06:28 +0000 (22:06 -0700)]
serial: ns16550: Remove unnecessary init on UART setup
It is not necessary to write a zero baud rate to the device, and for some
chips this will cause problems. Drop this code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 28 Feb 2015 05:06:26 +0000 (22:06 -0700)]
dm: ns16550: Support non-byte register spacing with driver model
Allow this driver to support boards where the register shift is not 0.
This fixes some compiler warnings which appear in that case.
Signed-off-by: Simon Glass <sjg@chromium.org>