platform/kernel/u-boot.git
3 years agoconfigs: ls1088ardb: enable DM_GPIO and CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:17 +0000 (19:02 +0800)]
configs: ls1088ardb: enable DM_GPIO and CMD_GPIO

Enable DM_GPIO and CMD_GPIO for board ls1088ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1088aqds: enable DM_GPIO and CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:16 +0000 (19:02 +0800)]
configs: ls1088aqds: enable DM_GPIO and CMD_GPIO

Enable DM_GPIO and CMD_GPIO for board ls1088aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls2088aqds: enable CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:15 +0000 (19:02 +0800)]
configs: ls2088aqds: enable CMD_GPIO

Enable CMD_GPIO for board ls2088aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls2088ardb: enable DM_GPIO and CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:14 +0000 (19:02 +0800)]
configs: ls2088ardb: enable DM_GPIO and CMD_GPIO

Enable DM_GPIO and CMD_GPIO for board ls2088ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1046aqds: enable CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:13 +0000 (19:02 +0800)]
configs: ls1046aqds: enable CMD_GPIO

Enable CMD_GPIO for board ls1046aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1046ardb: enable CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:12 +0000 (19:02 +0800)]
configs: ls1046ardb: enable CMD_GPIO

Enable CMD_GPIO for board ls1046ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1043ardb: enable CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:11 +0000 (19:02 +0800)]
configs: ls1043ardb: enable CMD_GPIO

Enable CMD_GPIO for board ls1043ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1043aqds: enable CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:10 +0000 (19:02 +0800)]
configs: ls1043aqds: enable CMD_GPIO

Enable CMD_GPIO for board ls1043aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1028ardb: enable CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:09 +0000 (19:02 +0800)]
configs: ls1028ardb: enable CMD_GPIO

Enable CMD_GPIO for board ls1028ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1028aqds: enable CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:08 +0000 (19:02 +0800)]
configs: ls1028aqds: enable CMD_GPIO

Enable CMD_GPIO for board ls1028aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1021atwr: enable CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:07 +0000 (19:02 +0800)]
configs: ls1021atwr: enable CMD_GPIO

Enable CMD_GPIO for ls1021atwr

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1021aqds: enable CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:06 +0000 (19:02 +0800)]
configs: ls1021aqds: enable CMD_GPIO

Enable CMD_GPIO for board ls1021aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1012ardb: enable CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:05 +0000 (19:02 +0800)]
configs: ls1012ardb: enable CMD_GPIO

Enable CMD_GPIO for ls1012ardb

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1012afrwy: enable CMD_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:04 +0000 (19:02 +0800)]
configs: ls1012afrwy: enable CMD_GPIO

Enable CMD_GPIO for ls1012afrwy

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1021aqds: enable CONFIG_MPC8XXX_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:03 +0000 (19:02 +0800)]
configs: ls1021aqds: enable CONFIG_MPC8XXX_GPIO

Enable CONFIG_MPC8XXX_GPIO for board ls1021aqds

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1021atwr: enable CONFIG_MPC8XXX_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:02 +0000 (19:02 +0800)]
configs: ls1021atwr: enable CONFIG_MPC8XXX_GPIO

Enable CONFIG_MPC8XXX_GPIO for board ls1021atwr

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1046a: enable MPC8XXX_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:01 +0000 (19:02 +0800)]
configs: ls1046a: enable MPC8XXX_GPIO

Enable MPC8XXX_GPIO for SoC LS1046A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: lx2160a: enable CONFIG_MPC8XXX_GPIO
Biwen Li [Fri, 5 Feb 2021 11:02:00 +0000 (19:02 +0800)]
configs: lx2160a: enable CONFIG_MPC8XXX_GPIO

Enable CONFIG_MPC8XXX_GPIO for SoC LX2160A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls208xa: enable CONFIG_MPC8XXX_GPIO
Biwen Li [Fri, 5 Feb 2021 11:01:59 +0000 (19:01 +0800)]
configs: ls208xa: enable CONFIG_MPC8XXX_GPIO

Enable CONFIG_MPC8XXX_GPIO for LS208xA

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1088a: enable CONFIG_MPC8XXX_GPIO
Biwen Li [Fri, 5 Feb 2021 11:01:58 +0000 (19:01 +0800)]
configs: ls1088a: enable CONFIG_MPC8XXX_GPIO

Enable CONFIG_MPC8XXX_GPIO for LS1088A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1028a: enable CONFIG_MPC8XXX_GPIO
Biwen Li [Fri, 5 Feb 2021 11:01:57 +0000 (19:01 +0800)]
configs: ls1028a: enable CONFIG_MPC8XXX_GPIO

Enable CONFIG_MPC8XXX_GPIO for SoC LS1028A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1043a: enable CONFIG_MPC8XXX_GPIO
Biwen Li [Fri, 5 Feb 2021 11:01:56 +0000 (19:01 +0800)]
configs: ls1043a: enable CONFIG_MPC8XXX_GPIO

Enable CONFIG_MPC8XXX_GPIO for SoC LS1043A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1012a: enable CONFIG_MPC8XXX_GPIO
Biwen Li [Fri, 5 Feb 2021 11:01:55 +0000 (19:01 +0800)]
configs: ls1012a: enable CONFIG_MPC8XXX_GPIO

Enable CONFIG_MPC8XXX_GPIO for SoC LS1012A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm64: dts: ls208xa: add gpio node
Biwen Li [Fri, 5 Feb 2021 11:01:54 +0000 (19:01 +0800)]
arm64: dts: ls208xa: add gpio node

Add gpio node for SoC LS208xA

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm64: dts: ls1088a: add gpio node
Biwen Li [Fri, 5 Feb 2021 11:01:53 +0000 (19:01 +0800)]
arm64: dts: ls1088a: add gpio node

Add gpio node for SoC LS1088A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm64: dts: ls1046a: add gpio node
Biwen Li [Fri, 5 Feb 2021 11:01:52 +0000 (19:01 +0800)]
arm64: dts: ls1046a: add gpio node

Add gpio node for SoC LS1046A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm64: dts: ls1043a: add gpio node
Biwen Li [Fri, 5 Feb 2021 11:01:51 +0000 (19:01 +0800)]
arm64: dts: ls1043a: add gpio node

Add gpio node for SoC LS1043A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm64: dts: ls1028a: add gpio node
Biwen Li [Fri, 5 Feb 2021 11:01:50 +0000 (19:01 +0800)]
arm64: dts: ls1028a: add gpio node

Add gpio node for SoC LS1028A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm64: dts: ls1012a: add gpio node
Biwen Li [Fri, 5 Feb 2021 11:01:49 +0000 (19:01 +0800)]
arm64: dts: ls1012a: add gpio node

Add gpio node for SoC LS1012A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarm: dts: ls1021a: add gpio node
Biwen Li [Fri, 5 Feb 2021 11:01:48 +0000 (19:01 +0800)]
arm: dts: ls1021a: add gpio node

Add gpio node for SoC LS1021A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agogpio: mpc8xxx_gpio: Fix for litte endian
Biwen Li [Fri, 5 Feb 2021 11:01:47 +0000 (19:01 +0800)]
gpio: mpc8xxx_gpio: Fix for litte endian

Update gpio driver to use same logic for big-endian and little-endian

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: T1042: Drop the CONFIG_VIDEO
Hou Zhiqiang [Fri, 5 Feb 2021 08:34:02 +0000 (16:34 +0800)]
configs: T1042: Drop the CONFIG_VIDEO

Drop the CONFIG_VIDEO to fix the following build warning.
===================== WARNING ======================
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.
UPD     include/generated/dt.h
Failure to update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
UPD     include/generated/timestamp_autogenerated.h
====================================================

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agompc8xxx: fsl_pamu: Update data type in config_pamu
Priyanka Jain [Fri, 5 Feb 2021 08:31:11 +0000 (14:01 +0530)]
mpc8xxx: fsl_pamu: Update data type in config_pamu

Update data type of '1' to '1ull' in below assignment
size = 1ull << sizebit;

to fix incorrect assignment issue.
e.g: when sizebit was 31, 0x80000000 got sign extended to
0xffffffff_80000000

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reported-by: Dean Saridakis <dean.saridakis@baesystems.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarmv7: ls102xa: Enable I-Cache to speed up the boot time
Hou Zhiqiang [Fri, 5 Feb 2021 07:45:12 +0000 (15:45 +0800)]
armv7: ls102xa: Enable I-Cache to speed up the boot time

Enable the I-Cache to speed up the boot time, especailly for the NOR
boot, currently it takes about 15 seconds from power up to the U-Boot
prompt, and with the I-Cache enabled it only takes around 2.5 seconds.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard/km: move km i2c deblock declarations to a km/common.h
Aleksandar Gerasimovski [Fri, 5 Feb 2021 06:02:01 +0000 (06:02 +0000)]
board/km: move km i2c deblock declarations to a km/common.h

Cleanup, move the declarations to keymile/common.h instead declaring them
per-board config.h

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agopci: kconfig: layerscape: Change LX2162A PCIe node compatible string
Hou Zhiqiang [Fri, 29 Jan 2021 05:22:02 +0000 (13:22 +0800)]
pci: kconfig: layerscape: Change LX2162A PCIe node compatible string

LX2162A is not like LX2160A which has different PCIe controller
in rev1 and rev2 silicon. It supports only one configuration of
PCIe controller, which is same as LS2088A. So update PCIe
compatible string same as LS2088A.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Tested-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agopci: layerscape: Remove the shadow SVR definitions
Hou Zhiqiang [Fri, 29 Jan 2021 04:47:05 +0000 (12:47 +0800)]
pci: layerscape: Remove the shadow SVR definitions

This patch moves the SVR definitions to a new svr.h for
Layerscape armv7 and armv8 platforms respectively, so that
the PCIe driver can reuse them.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agospi: fsl_qspi: apply the same settings for LS1088 as LS208x
Mathew McBride [Mon, 25 Jan 2021 03:55:22 +0000 (03:55 +0000)]
spi: fsl_qspi: apply the same settings for LS1088 as LS208x

The LS1088 requires the same QUADSPI_QURIK_BASE_INTERNAL
workaround as the LS208x and also has a 64 byte TX buffer.

With the previous settings SPI-NAND reads over AHB were
corrupted.

Fixes: 91afd36f3802 ("spi: Transform the FSL QuadSPI driver to use the SPI MEM API")
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agospi: fsl_qspi: Ensure width is respected in spi-mem operations
Mathew McBride [Mon, 25 Jan 2021 03:55:21 +0000 (03:55 +0000)]
spi: fsl_qspi: Ensure width is respected in spi-mem operations

Adapted from kernel commit b0177aca7aea
From: Michael Walle <michael@walle.cc>

Make use of a core helper to ensure the desired width is respected
when calling spi-mem operators.

Otherwise only the SPI controller will be matched with the flash chip,
which might lead to wrong widths. Also consider the width specified by
the user in the device tree.

Fixes: 91afd36f38 ("spi: Add a driver for the Freescale/NXP QuadSPI controller")
Signed-off-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20200114154613.8195-1-michael@walle.cc
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Mathew McBride <matt@traverse.com.au> [adapt for U-Boot]
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agomem: spi-mem: add declaration for spi_mem_default_supports_op
Mathew McBride [Mon, 25 Jan 2021 03:55:20 +0000 (03:55 +0000)]
mem: spi-mem: add declaration for spi_mem_default_supports_op

spi_mem_default_supports_op is used internally by controller
drivers to verify operation semantics are correct.

It is used internally inside spi-mem but has not (in U-Boot)
been declared in spi-mem.h for external use.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoPowerPC: keymile: Add support for kmcent2 board
Niel Fourie [Thu, 21 Jan 2021 12:19:20 +0000 (13:19 +0100)]
PowerPC: keymile: Add support for kmcent2 board

Add basic support for the Hitachi Power Grids kmcent2 board, based
on the NXP QorIQ T1040 SoC.

Signed-off-by: Valentin Longchamp <valentin.longchamp@hitachi-powergrids.com>
Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
[Fixed blank line at EOF errors]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agokeymile: common: update to set_env_hex(), fix "pram" radix
Niel Fourie [Thu, 21 Jan 2021 12:19:19 +0000 (13:19 +0100)]
keymile: common: update to set_env_hex(), fix "pram" radix

Replace instances of sprintf()/set_env() for setting hexadecimal
values with set_env_hex().

In set_km_env() the "pram" variable was set to an hexadecimal
value, while initr_mem() expects an unsigned decimal, so use
set_env_ulong() instead.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoPowerPC: dts: Pulled in kmcent2 dts files from Linux 5.10
Niel Fourie [Thu, 21 Jan 2021 12:19:18 +0000 (13:19 +0100)]
PowerPC: dts: Pulled in kmcent2 dts files from Linux 5.10

Pulled in the kmcent2.dts and all its dependents from Linux 5.10,
commit 2c85ebc57b3e upstream. Replaced the license text with
SPDX License Identifiers.

Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Holger Brunck <holger.brunck@hitachi-powergrids.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard/km/common: fix pnvramaddr and varaddr
Aleksandar Gerasimovski [Tue, 19 Jan 2021 10:41:00 +0000 (10:41 +0000)]
board/km/common: fix pnvramaddr and varaddr

Take into account SDRAM_BASE address when calculating pnvramaddr and
varaddr offsets.
Up to now Keymile designs had SDRAM_BASE equal to zero and the offsets
where calculated correctly, this fix is for the upcoming designs that
have SDRAM_BASE different then zero.

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agokeymile: common: qrio: print QRIO id and revision number
Aleksandar Gerasimovski [Wed, 13 Jan 2021 16:20:51 +0000 (16:20 +0000)]
keymile: common: qrio: print QRIO id and revision number

Add show_qrio function to print chip id and revision information.
There are already multiple QRIO chip versions available and the upcoming
designs may want to show used version.

Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: keymile: common: fix qrio compilation for arm
Aleksandar Gerasimovski [Wed, 13 Jan 2021 16:20:35 +0000 (16:20 +0000)]
board: keymile: common: fix qrio compilation for arm

This patch is fixing qrio driver compilation for ARM architecture:
- It includes asm/io.h for in_/out_ access
- It use correct names for set/clear_bits as defined in linux/bitops.h

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarmv8: lx2: SVR_SOC_VER: Mask CAN_FD and security bit
Wasim Khan [Wed, 13 Jan 2021 11:01:23 +0000 (12:01 +0100)]
armv8: lx2: SVR_SOC_VER: Mask CAN_FD and security bit

Multiple LX2(LX2160A/LX2162A SoC) personality variants
exists based on CAN-FD and security bit in SVR.

Currenly SVR_SOC_VER mask only security bit.
Update SVR_SOC_VER to mask CAN_FD and security bit
for LX2 products.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarmv8: ls1028a: fix stream id allocation
Nipun Gupta [Tue, 12 Jan 2021 13:12:46 +0000 (18:42 +0530)]
armv8: ls1028a: fix stream id allocation

When A-050382 errata is enabled, ECAM and EDMA have
conflicting stream id 40. This patch fixes the same.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: sl28: add SATA support
Michael Walle [Thu, 7 Jan 2021 23:08:59 +0000 (00:08 +0100)]
board: sl28: add SATA support

Enable SATA support. Although not supported by the usual SATA pins on
the SMARC baseboard connector, SATA mode is supported on a PCIe lane.
This way one can use a mSATA card in a Mini PCI slot.

We need to invert the received data because in this mode the polarity of
the SerDes lane is swapped. Provide a fixup in board_early_init_f() for
the SPL. board_early_init_f() is then not common between SPL and u-boot
proper anymore, thus common.c is removed, as it just contained said
function.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: sl28: add network variant 2 support
Michael Walle [Thu, 7 Jan 2021 23:08:58 +0000 (00:08 +0100)]
board: sl28: add network variant 2 support

Although this variant has two external network ports, they are not (yet)
supported by the bootloader because they are connected via an internal
network switch. Otherwise its the same as the other variants.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: sl28: add network variant 1 support
Michael Walle [Thu, 7 Jan 2021 23:08:57 +0000 (00:08 +0100)]
board: sl28: add network variant 1 support

This variant has one network port connected via RGMII and doesn't have
any TSN capabilities out-of-the-box. Instead it has all four SerDes
lanes available for customer use.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: sl28: move ethernet aliases to variant specific dtsi
Michael Walle [Thu, 7 Jan 2021 23:08:56 +0000 (00:08 +0100)]
board: sl28: move ethernet aliases to variant specific dtsi

The variants differ in their network configuration. Move the first two
network aliases to the proper variant device tree includes. This is in
prepartion for variant 1 and 2 support which has a different network
port mapping. The network aliases for the two internal ports will stay
in the common dtsi because they are present on all board variants.

This might leave a hole if there is no ethernet1 alias. This is
intended.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agonet: eqos: Reduce the MDIO wait time
Ye Li [Mon, 28 Dec 2020 12:15:10 +0000 (20:15 +0800)]
net: eqos: Reduce the MDIO wait time

Current MDIO wait time is too long, which introduce long delay when
PHY negotiation register checking. Reduce it to 10us

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fugang Duan <Fugang.duan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarmv8: dts: fsl-lx2162a: add dspi node into qds dts
Zhao Qiang [Fri, 11 Dec 2020 09:31:39 +0000 (17:31 +0800)]
armv8: dts: fsl-lx2162a: add dspi node into qds dts

Add dspi node into lx2162aqds device tree

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoarmv8: lx2162aqds: disable non existing pcie controllers
Wasim Khan [Fri, 11 Dec 2020 08:56:51 +0000 (14:26 +0530)]
armv8: lx2162aqds: disable non existing pcie controllers

disable non existing pcie controllers on lx2162aqds

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoconfigs: ls1088aqds: add COMMON_ENV to fix distroboot
Biwen Li [Thu, 10 Dec 2020 03:02:47 +0000 (11:02 +0800)]
configs: ls1088aqds: add COMMON_ENV to fix distroboot

Add COMMON_ENV(kernelheader_addr_r, fdtheader_addr_r,
kernel_addr_r, fdt_addr_r, load_addr)
to fix a bug that failed to boot to ubuntu
Failed log as follows,
## Executing script at 80000000
load - load binary file from a filesystemUsage:
load <interface> [<dev[:part]> [<addr> [<filename> [bytes [pos]]]]]
    - Load binary file filename from partition part on device
       type interface instance dev to address addr in memory.
      bytes gives the size to load in bytes.
      If bytes is 0 or omitted, the file is read until the end.
      pos gives the file byte position to start reading from.
      If pos is 0 or omitted, the file is read from the start.
...
Bad Linux ARM64 Image magic!
SCRIPT FAILED: continuing...

Signed-off-by: Biwen Li <biwen.li@nxp.com>
[Updated description]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agonet: memac_phy: add a timeout to MDIO operations
Ioana Ciornei [Wed, 9 Dec 2020 11:31:58 +0000 (13:31 +0200)]
net: memac_phy: add a timeout to MDIO operations

We have encountered circumstances when a board design does not include
pull-up resistors on the external MDIO buses which are not used. This
leads to the MDIO data line not being pulled-up, thus the MDIO controller
will always see the line as busy.

Without a timeout in the MDIO bus driver, the execution is stuck in an
infinite loop when any access is initiated on that external bus.

Add a timeout in the driver so that we are protected in this
circumstance. This is similar to what is being done in the Linux
xgmac_mdio driver.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Reviewed-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoboard: kontron: disable flash unlock all
Michael Walle [Wed, 9 Dec 2020 09:53:26 +0000 (10:53 +0100)]
board: kontron: disable flash unlock all

Although the status register is protected by the hardware write
protection, there is a hardware jumper to disable that hardware write
protection. Thus if a user would set this jumper any u-boot start would
disable the write protection altogether.

Circumvent that by not disabling the write protection in the first
place.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agomtd: spi-nor: add unlock all config option
Michael Walle [Wed, 9 Dec 2020 09:53:25 +0000 (10:53 +0100)]
mtd: spi-nor: add unlock all config option

Provide an explicit configuration option to disable default "unlock all"
of any flash chip which supports locking. It doesn't make sense to
automatically unprotect the entire flash on each u-boot startup if the
block protection bits are actually used.

Traditionally, the unlock was there to be able to write to flash devices
which powered-up with the block protection bits set. Over time this
feature creeped into all flash devices which support locking.

For a more detailed description and discussion see:
https://lore.kernel.org/linux-mtd/20201203162959.29589-8-michael@walle.cc/

Keep things simple in u-boot and just provide a configration option to
disable this behavior which can be set per board.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
3 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
Tom Rini [Sat, 6 Feb 2021 14:45:58 +0000 (09:45 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86

- introduces some standard sysinfo options as a source, e.g. to read
  strapping pins to determine the board revision
- allows the U-Boot version number to be included
- allows the version number to be provided programmatically, e.g. to
  support the build system adding information after U-Boot is built

3 years agosmbios: Allow a few values to come from sysinfo
Simon Glass [Fri, 5 Feb 2021 04:17:23 +0000 (21:17 -0700)]
smbios: Allow a few values to come from sysinfo

While static configuration is useful it cannot cover every case. Sometimes
board revisions are encoded in resistor straps and must be read at
runtime.

The easiest way to provide this information is via sysinfo, since the
board can then provide a driver to read whatever is needed.

Add some standard sysinfo options for this, and use them to obtain the
required information.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agox86: coral: Add sysinfo ops
Simon Glass [Fri, 5 Feb 2021 04:17:22 +0000 (21:17 -0700)]
x86: coral: Add sysinfo ops

These ops are missing at present which is not permitted. Add an empty
operation struct.

Note: If the uclass requires operations then the drivers should provide
them. Otherwise, checking for missing operations must be done in every
uclass operation, so it adds to code size.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agosysinfo: Move #ifdef so that operations are always defined
Simon Glass [Fri, 5 Feb 2021 04:17:21 +0000 (21:17 -0700)]
sysinfo: Move #ifdef so that operations are always defined

At present the struct is not available unless SYSINFO is enabled. This is
annoying since code it is not possible to use compile-time checks like
CONFIG_IS_ENABLED(SYSINFO) with this header.

Fix it by moving the #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agosmbios: Add more options for the BIOS version string
Simon Glass [Fri, 5 Feb 2021 04:17:20 +0000 (21:17 -0700)]
smbios: Add more options for the BIOS version string

At present the version string is obtained from PLAIN_VERSION. Some boards
may want to configure this using the device tree, since the build system
can more easily insert things there after U-Boot itself is built. Add this
option to the code.

Also in some cases the version needs to be generated programmatically,
such as when it is stored elsewhere in the ROM and must be read first.
To handle this, keep a pointer around so that it can be updated later.
This works by storing the last string in the context, since it is easier
than passing out a little-used extra parameter.

Provide a function to update the version string.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agosmbios: Track the end of the string table
Simon Glass [Fri, 5 Feb 2021 04:17:19 +0000 (21:17 -0700)]
smbios: Track the end of the string table

Add a new member to the context struct which tracks the end of the string
table. This allows us to avoid recalculating this at the end.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agosmbios: Drop the eos parameter
Simon Glass [Fri, 5 Feb 2021 04:17:18 +0000 (21:17 -0700)]
smbios: Drop the eos parameter

We can store this in the context and avoid passing it to each function.
This makes it easier to follow and will also allow keeping track of the
end of the string table (in future patches).

Add an 'eos' field to the context and create a function to set it up.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agosmbios: Use a struct to keep track of context
Simon Glass [Fri, 5 Feb 2021 04:17:17 +0000 (21:17 -0700)]
smbios: Use a struct to keep track of context

At present we pass the ofnode to each function. We also pass the 'eos'
pointer for adding new strings. We don't track the current end of the
string table, so have smbios_string_table_len() to find that.

The code can be made more efficient if it keeps information in a
context struct. This also makes it easier to add more features.

As a first step, switch the ofnode parameter to be a context pointer.
Update smbios_add_prop() at the same time to avoid changing the same
lines of code in consecutive patches.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agosmbios: Set BIOS release version
Simon Glass [Fri, 5 Feb 2021 04:17:16 +0000 (21:17 -0700)]
smbios: Set BIOS release version

We may as well include the U-Boot release information in the type-0 table
since it is designed for that purpose.

U-Boot uses release versions based on the year and month. The year cannot
fit in a byte, so drop the century.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agosmbios: Use char consistently for the eos member
Simon Glass [Fri, 5 Feb 2021 04:17:15 +0000 (21:17 -0700)]
smbios: Use char consistently for the eos member

At present a few of the structs use u8 instead of char. This is a string,
so char is better. Update them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agosmbios: Move smbios_write_type to the C file
Simon Glass [Fri, 5 Feb 2021 04:17:14 +0000 (21:17 -0700)]
smbios: Move smbios_write_type to the C file

This type is not used outside the smbios.c file so there is no need for it
to be in the header file. Move it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoMakefile: Provide numeric versions
Simon Glass [Fri, 5 Feb 2021 04:17:13 +0000 (21:17 -0700)]
Makefile: Provide numeric versions

For SMBIOS we want to store the numeric version numbers in the tables. It
does not make sense to parse the strings. Instead, add new #defines with
the version and patchlevel.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoREADME: Add doumentation for version information
Simon Glass [Fri, 5 Feb 2021 04:17:12 +0000 (21:17 -0700)]
README: Add doumentation for version information

There are quite a few available version options in U-Boot. Add a list of
the available Makefile variables and #defines, along with examples.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agoMerge tag 'ti-v2021.04-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
Tom Rini [Fri, 5 Feb 2021 14:39:31 +0000 (09:39 -0500)]
Merge tag 'ti-v2021.04-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti

- Sync DTS from Linux kernel for all K3 platforms
- Add MMC higher speed nodes for AM65x, J721e, J7200
- Convert Nokia RX-51 to use CONFIG_DM_MMC
- Minor fixes for LEGO MINDSTORMS

3 years agoMerge tag 'efi-2021-04-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Thu, 4 Feb 2021 22:35:50 +0000 (17:35 -0500)]
Merge tag 'efi-2021-04-rc2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2021-04-rc2

Bug fixes:

* do not allow creating of files with filenames on FAT file system
* install UEFI System Partition GUID on ESP handle
* in dtbdump.efi test tool use GUID to find ESP handle

Documentation:

* man-page for load command
* describe end of life of plat_auto

3 years agodoc: dm: describe end of life of plat_auto
Heinrich Schuchardt [Sun, 31 Jan 2021 10:04:12 +0000 (11:04 +0100)]
doc: dm: describe end of life of plat_auto

Describe when plat_auto is freed.

Fix a typo.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodoc: return value exception command
Heinrich Schuchardt [Wed, 27 Jan 2021 20:19:12 +0000 (21:19 +0100)]
doc: return value exception command

If the exception cannot be raised, the command returns.
Currently the return values are not all the same.

Remove the sub-chapter 'Return value'

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: describe load command
Heinrich Schuchardt [Wed, 27 Jan 2021 20:07:40 +0000 (21:07 +0100)]
doc: describe load command

Man-page for load command.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agoefi_loader: VenMedia device path node
Heinrich Schuchardt [Wed, 3 Feb 2021 17:46:07 +0000 (18:46 +0100)]
efi_loader: VenMedia device path node

The Load File2 protocol exposes a device path with a VenMedia() node. Hence
our implementation of the device path to text protocol should support this
node.

Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_selftest: use GUID to find ESP in dtbdump
Heinrich Schuchardt [Tue, 2 Feb 2021 17:02:19 +0000 (18:02 +0100)]
efi_selftest: use GUID to find ESP in dtbdump

If dtbdump.efi is loaded from memory when calling LoadImage the loaded
image protocol will not indicate the partition from where it was loaded.
In this case use the EFI system partition for the 'load' and 'save'
commands.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: install UEFI System Partition GUID
Heinrich Schuchardt [Tue, 2 Feb 2021 16:53:14 +0000 (17:53 +0100)]
efi_loader: install UEFI System Partition GUID

On the handle for the UEFI System Partition we must install the System
Partition GUID (with a NULL interface).

Let the efidebug command display the GUID.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: only check size if EFI_DT_APPLY_FIXUPS
Heinrich Schuchardt [Tue, 2 Feb 2021 06:27:42 +0000 (07:27 +0100)]
efi_loader: only check size if EFI_DT_APPLY_FIXUPS

In the implementation of the EFI_DT_FIXUP_PROTOCOL:

* Only check the buffer size when EFI_DT_APPLY_FIXUPS is set.
* In this case the field totalsize of the device-tree may not exceed the
  buffer size.
* Install device-tree only if EFI_DT_INSTALL_TABLE is set.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoarm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot
Lokesh Vutla [Mon, 1 Feb 2021 05:56:41 +0000 (11:26 +0530)]
arm: dts: k3-j7200: Sync Linux v5.11-rc6 dts into U-Boot

Sync all J7200 related v5.11-rc6 Linux kernel dts into U-Boot.
MCU R5F nodes are not yet added in Linux kernel yet but were added
in U-Boot. In order to avoid regressions, r5f nodes are kept intact.
These will be added in kernel in future.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
3 years agoarm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot
Lokesh Vutla [Mon, 1 Feb 2021 05:56:40 +0000 (11:26 +0530)]
arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot

Sync all J721e related v5.11-rc6 Linux kernel dts into U-Boot.
HBMC nodes are not yet added in Linux kernel yet but were added
in U-Boot. In order to avoid any regressions, hbmc nodes are kept
intact. These will be added in kernel in future.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
3 years agoarm: dts: k3-am65: Sync Linux v5.11-rc6 dts into U-Boot
Lokesh Vutla [Mon, 1 Feb 2021 05:56:39 +0000 (11:26 +0530)]
arm: dts: k3-am65: Sync Linux v5.11-rc6 dts into U-Boot

Sync all AM65 related v5.11-rc6 Linux kernel dts into U-Boot.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
3 years agoconfigs: am65x_evm: Add configs for UHS modes
Faiz Abbas [Thu, 4 Feb 2021 09:41:05 +0000 (15:11 +0530)]
configs: am65x_evm: Add configs for UHS modes

Add configs for voltage switching and UHS modes for the SD card
and HS200 for the eMMC.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
3 years agoarm: dts: k3-am654-base-board: Limit Sd card to High speed modes
Faiz Abbas [Thu, 4 Feb 2021 09:41:04 +0000 (15:11 +0530)]
arm: dts: k3-am654-base-board: Limit Sd card to High speed modes

There's an issue with the base board in which the power cycle
circuit takes way longer to power down than expected by mmc core.
code. This prevents the card from enumerating in UHS modes.

Disable UHS modes for this board until a new board revision fixes
the issue.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
3 years agoarm: dts: k3-am65-main: Add itapdly and clkbuf-sel values
Faiz Abbas [Thu, 4 Feb 2021 09:41:03 +0000 (15:11 +0530)]
arm: dts: k3-am65-main: Add itapdly and clkbuf-sel values

Add the appropriate itapdly and clkbuf-sel values required for
some lower speed modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
3 years agoconfigs: j7200_evm: Add support for UHS modes
Faiz Abbas [Thu, 4 Feb 2021 09:41:02 +0000 (15:11 +0530)]
configs: j7200_evm: Add support for UHS modes

Add configs to support UHS modes for the SD card and HS200 for the eMMC.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
3 years agoconfigs: j721e_evm: Add support for UHS modes
Faiz Abbas [Thu, 4 Feb 2021 09:41:01 +0000 (15:11 +0530)]
configs: j721e_evm: Add support for UHS modes

Add configs to support UHS modes for the SD card and HS200 for the eMMC.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
3 years agoarm: dts: k3-j7200-common-proc-board: Enable support for UHS modes
Faiz Abbas [Thu, 4 Feb 2021 09:41:00 +0000 (15:11 +0530)]
arm: dts: k3-j7200-common-proc-board: Enable support for UHS modes

Add support for UHS modes by adding the regulators to power cycle
and voltage switch the card. Also add pinmuxes required for each
node

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
3 years agoarm: dts: k3-j7200-main: Add support for gpio0
Faiz Abbas [Thu, 4 Feb 2021 09:40:59 +0000 (15:10 +0530)]
arm: dts: k3-j7200-main: Add support for gpio0

Add support for the main_gpio0 node

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
3 years agoarm: dts: k3-j721e-common-proc-board: Add support for UHS modes for SD card
Faiz Abbas [Thu, 4 Feb 2021 09:40:58 +0000 (15:10 +0530)]
arm: dts: k3-j721e-common-proc-board: Add support for UHS modes for SD card

Add support for regulators to power cycle and switch IO voltage to the
SD card. This enables support for UHS modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
3 years agoarm: dts: k3-j721e-main: Update otap-delay values
Faiz Abbas [Thu, 4 Feb 2021 09:40:57 +0000 (15:10 +0530)]
arm: dts: k3-j721e-main: Update otap-delay values

Update otap delay values to match with the latest Data Manual[1].

[1] https://www.ti.com/lit/gpn/dra829v

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
3 years agoarm: dts: k3-am65: Fix mmc nodes
Faiz Abbas [Thu, 4 Feb 2021 09:40:56 +0000 (15:10 +0530)]
arm: dts: k3-am65: Fix mmc nodes

Because of fundamental interface issues in am65x pg1, only the
initial sdhci1 node at 25 MHz was added in the u-boot.dtsi
from which both the base-board.dts and r5-base-board.dts
inherit the node. Move the node out to k3-am65-main.dtsi
where it belongs and add the board specific properties
in base-board.dts and r5-base-board.dts

This ensures dts compatibility with the kernel dts in the
base-board.dts and enables the SD card interface at 50 MHz
and High Speed mode

While we are here, also fix the main_mmc0_pins_default
property to be included and inherit from the base-board.dts
instead of the u-boot.dtsi

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
3 years agommc: am654_sdhci: Use sdhci_set_control_reg()
Faiz Abbas [Thu, 4 Feb 2021 09:40:55 +0000 (15:10 +0530)]
mmc: am654_sdhci: Use sdhci_set_control_reg()

Use the generic sdhci_set_control_reg() instead of duplicating
in platform driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
3 years agommc: am654_sdhci: Fix HISPD bit configuration in some lower speed modes
Faiz Abbas [Thu, 4 Feb 2021 09:40:54 +0000 (15:10 +0530)]
mmc: am654_sdhci: Fix HISPD bit configuration in some lower speed modes

According to the AM654x Data Manual[1], the setup timing in lower speed
modes can only be met if the controller uses a falling edge data launch.

To ensure this, the HIGH_SPEED_ENA (HOST_CONTROL[2]) bit should be
cleared in default speed, SD high speed, MMC high speed, SDR12 and SDR25
speed modes.

Use the sdhci writeb callback to implement this condition.

[1] http://www.ti.com/lit/gpn/am6546 Section 5.10.5.16.1

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
3 years agommc: am654_sdhci: Add support for software tuning
Faiz Abbas [Thu, 4 Feb 2021 09:40:53 +0000 (15:10 +0530)]
mmc: am654_sdhci: Add support for software tuning

With the new SW tuning App note[1], a custom tuning algorithm is
required for eMMC HS200, HS400 and SD card UHS modes. The algorithm
involves running through the 32 possible input tap delay values and
sending the appropriate tuning command (CMD19/21) for each of them
to get a fail or pass result for each of the values. Typically, the
range will have a small contiguous failing window. Considering the
tuning range as a circular buffer, the algorithm then sets a final
tuned value directly opposite to the failing window.

[1] https://www.ti.com/lit/pdf/spract9

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
3 years agommc: am654_sdhci: Add support for writing to clkbuf_sel
Faiz Abbas [Thu, 4 Feb 2021 09:40:52 +0000 (15:10 +0530)]
mmc: am654_sdhci: Add support for writing to clkbuf_sel

Add support for writing new clock buffer select property for both
the am654x and j721e 4 bit IPs

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
3 years agommc: am654_sdhci: Add support for input tap delay
Faiz Abbas [Thu, 4 Feb 2021 09:40:51 +0000 (15:10 +0530)]
mmc: am654_sdhci: Add support for input tap delay

DLL need only be enabled for speed modes and clock frequencies at or
above 50 MHz. For speed modes that don't enable the DLL, we need to
configure a static input delay value. This involves reading an optional
itap-del-sel-* value from the device tree and configuring it for the
appropriate speed mode.

Therefore, move all dll configurations to their own functions and gate it
with 50 MHz speed and a minimum mode. If both these conditions are not
satisfied then configure delay chain modes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
3 years agommc: am654_sdhci: Add support for AM65x SR2.0
Faiz Abbas [Thu, 4 Feb 2021 09:40:50 +0000 (15:10 +0530)]
mmc: am654_sdhci: Add support for AM65x SR2.0

Add Support for AM65x PG2.0. Use the SoC bus framework to fixup
the platform data and do DLL calibration if the revision is 1.0

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>