Lei Zhang [Mon, 26 Oct 2020 21:54:46 +0000 (17:54 -0400)]
[mlir] NFC: properly align IR in comments
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D90164
Stanislav Mekhanoshin [Wed, 21 Oct 2020 21:27:03 +0000 (14:27 -0700)]
[AMDGPU] Use flat scratch instructions where available
The support is disabled by default. So far there is instruction
selection, spilling, and frame elimination. It also changes SP
from unswizzled to swizzled as used by flat scratch instructions,
so it cannot be mixed with MUBUF stack access.
At the very least missing:
- GlobalISel;
- Some optimizations in frame elimination in between vector
and scalar ALU;
- It shall finally allow to always materialize frame index
as an SGPR, but that is not implemented and frame elimination
cannot handle it yet;
- Unaligned and/or multidword flat scratch shall work, but it
is legalized now for MUBUF;
- Operand folding cannot optimize FI like with MUBUF yet;
- It will need scaling the value of the SP/FP in the DWARF
expression to recover the unswizzled scratch address;
Differential Revision: https://reviews.llvm.org/D89170
Kiran Chandramohan [Mon, 26 Oct 2020 21:26:10 +0000 (21:26 +0000)]
Run test only if X86 target is available
This fixes failures in AArch64 buildbots by running the
clang/test/CodeGen/X86/att-inline-asm-prefix.c only when the X86
target is available.
Sriraman Tallam [Mon, 26 Oct 2020 21:20:35 +0000 (14:20 -0700)]
Prepend "__uniq" to symbol names hash with -funique-internal-linkage-names.
Prepend the module name hash with a fixed string ".__uniq." which helps tools
that consume sampled profiles and attribute it to functions to understand
that this symbol belongs to a unique internal linkage type symbol.
Symbols with suffixes can result from various optimizations in the compiler.
Function Multiversioning, function splitting, parameter constant propogation,
unique internal linkage names.
External tools like sampled profile aggregators combine profiles from multiple
runs of a binary. They use various heuristics with symbols that have suffixes
to try and attribute the profile to the right function instance. For instance
multi-versioned symbols like foo.avx, foo.sse4.2, etc even though different
should be attributed to the same source function if a single function is
versioned, using attribute target_clones (supported in GCC but yet to land in
LLVM). Similarly, functions that are split (split part having a .cold suffix)
could have profiles for both the original and split symbols but would be
aggregated and attributed to the original function that was split.
Unique internal linkage functions however have different source instances and
the aggregator must not put them together but attribute it to the appropriate
function instance. To be sure that we are dealing with a symbol of a unique
internal linkage function, we would like to prepend the hash with a known
string ".__uniq." which these tools can check to understand the suffix type.
Differential Revision: https://reviews.llvm.org/D89617
Martin Storsjö [Fri, 23 Oct 2020 19:51:21 +0000 (22:51 +0300)]
[libunwind] Add -Wno-dll-attribute-on-redeclaration when building for windows
It's not worth trying to fix these warnings within libunwind, instead
silence them.
Differential Revision: https://reviews.llvm.org/D90075
Xiangling Liao [Mon, 26 Oct 2020 21:11:57 +0000 (17:11 -0400)]
[NFC] Remove max_align.c LIT testcase
Since we fixed the definition of `SuitableAlign`[https://reviews.llvm.org/D88659],
`max_align_t` and `__BIGGEST_ALIGNMENT__` are not necessarily the same always.
The original testcase was added here: https://reviews.llvm.org/D59048
Differential Revision: https://reviews.llvm.org/D90187
Sriraman Tallam [Mon, 26 Oct 2020 20:42:18 +0000 (13:42 -0700)]
Test to check backtraces with machine function splitting.
clang supports option -fsplit-machine-functions and this test checks if the
backtraces are sane when functions are split.
With -fsplit-machine-functions, a function with profiles can get split into 2
parts, the original function containing hot code and a cold part as determined
by the profile info and the cold cutoff threshold.. The cold part gets the
".cold" suffix to disambiguate its symbol from the hot part and can be placed
arbitrarily in the address space.
This test checks if the back-trace looks correct when the cold part is executed.
Differential Revision: https://reviews.llvm.org/D90081
Duncan P. N. Exon Smith [Fri, 23 Oct 2020 21:55:41 +0000 (17:55 -0400)]
Avoid unnecessary uses of `MDNode::getTemporary`, NFC
This is a long-delayed follow-up to
5e5b85098dbeaea2cfa5d01695b5d2982634d7dd.
`TempMDNode` includes a bunch of machinery for RAUW, and should only be
used when necessary. RAUW wasn't being used in any of these cases... it
was just a placeholder for a self-reference.
Where the real node was using `MDNode::getDistinct`, just replace the
temporary argument with `nullptr`.
Where the real node was using `MDNode::get`, the `replaceOperandWith`
call was "promoting" the node to a distinct one implicitly due to
self-reference detection in `MDNode::handleChangedOperand`. The
`TempMDNode` was serving a purpose by delaying uniquing, but it's way
simpler to just call `MDNode::getDistinct` in the first place.
Note that using a self-reference at all in these places is a hold-over
from before `distinct` metadata existed. It was an old trick to create
distinct nodes. It would be intrusive to change, including bitcode
upgrades, etc., and it's harmless so I'm not sure there's much value in
removing it from existing schemas. After this commit it still has a tiny
memory cost (in the extra metadata operand) but no more overhead in
construction.
Differential Revision: https://reviews.llvm.org/D90079
Louis Dionne [Mon, 26 Oct 2020 20:56:35 +0000 (16:56 -0400)]
[libc++] Get rid of <iostream> in a filesystem test
Teresa Johnson [Mon, 26 Oct 2020 20:36:01 +0000 (13:36 -0700)]
[MemProf] Decouple memprof build from COMPILER_RT_BUILD_SANITIZERS
The MemProf compiler-rt support relies on some of the support only built
when COMPILER_RT_BUILD_SANITIZERS was enabled. This showed up in some
initial bot failures, and I addressed those by making the memprof
runtime build also conditional on COMPILER_RT_BUILD_SANITIZERS
(
3ed77ecd0a5d5e5c33770f0f9d3d75cf2f80c80b). However, this resulted in
another inconsistency with how the tests were set up that was hit by
Chromium:
https://bugs.chromium.org/p/chromium/issues/detail?id=1142191
Undo the original bot fix and address this with a more comprehensive fix
that enables memprof to be built even when COMPILER_RT_BUILD_SANITIZERS
is disabled, by also building the necessary pieces under
COMPILER_RT_BUILD_MEMPROF.
Tested by configuring with a similar command as to what was used in the
failing Chromium configure. I reproduced the Chromium failure, as well
as the original bot failure I tried to fix in
3ed77ecd0a5d5e5c33770f0f9d3d75cf2f80c80b, with that fix reverted.
Confirmed it now works.
Differential Revision: https://reviews.llvm.org/D90190
Xiangling Liao [Mon, 26 Oct 2020 20:23:30 +0000 (16:23 -0400)]
[AIX] Also error on -G for link-only step
Error on -G on AIX for all modes(preprocess, assemble, compile, link).
Differential Revision: https://reviews.llvm.org/D90063
Sanjay Patel [Mon, 26 Oct 2020 20:28:01 +0000 (16:28 -0400)]
[InstCombine] add folds for icmp+ctpop
https://alive2.llvm.org/ce/z/XjFPQJ
define void @src(i64 %value) {
%t0 = call i64 @llvm.ctpop.i64(i64 %value)
%gt = icmp ugt i64 %t0, 63
%lt = icmp ult i64 %t0, 64
call void @use(i1 %gt, i1 %lt)
ret void
}
define void @tgt(i64 %value) {
%eq = icmp eq i64 %value, -1
%ne = icmp ne i64 %value, -1
call void @use(i1 %eq, i1 %ne)
ret void
}
declare i64 @llvm.ctpop.i64(i64) #1
declare void @use(i1, i1)
Sanjay Patel [Mon, 26 Oct 2020 20:24:35 +0000 (16:24 -0400)]
[InstCombine] add tests for ctpop at bitwidth limit; NFC
Sanjay Patel [Mon, 26 Oct 2020 20:17:29 +0000 (16:17 -0400)]
[InstCombine] reduce code duplication in icmp intrinsic folds; NFC
Louis Dionne [Mon, 26 Oct 2020 20:33:15 +0000 (16:33 -0400)]
[libc++] NFC: Minor refactoring in filesystem_test_helper.h to ease readability
The variable declarations interleaved with logic was really difficult
to read. Instead, simply have two different implementations for _WIN32
and others.
Kostya Kortchinsky [Thu, 22 Oct 2020 22:53:50 +0000 (15:53 -0700)]
[GWP-ASan] Refactor memory mapping functions
In preparation for Fuchsia support, this CL refactors the memory
mapping functions.
The new functions are as follows:
- for Freeslots and Metadata:
`void *map(size_t Size, const char *Name) const;`
`void unmap(void *Ptr, size_t Size) const;`
- for the Pool:
`void *reservePool(size_t Size);`
`void commitPool(void *Ptr, size_t Size) const;`
`void decommitPool(void *Ptr, size_t Size) const;`
`void unreservePool();`
Note that those don't need a `Name` parameter as those are fixed per
function. `{reserve,unreserve}Pool` are not `const` because they will
modify platform specific class member on Fuchsia.
I added a plethora of `assert()` as the initial code was not enforcing
page alignment for sizes and addresses, which caused problem in the
initial Fuchsia draft. All sizes should now be properly rounded up to
a page.
Differential Revision: https://reviews.llvm.org/D89993
David Blaikie [Mon, 26 Oct 2020 20:14:55 +0000 (13:14 -0700)]
llvm-reduce: Test reduction for D88684 (
ee6e25e4391a6d3ac0a3c89615474e512f44cda6 )
Nick Desaulniers [Mon, 26 Oct 2020 20:00:50 +0000 (13:00 -0700)]
[BitCode] decode nossp fn attr
I missed this in https://reviews.llvm.org/D87956.
Reviewed By: void
Differential Revision: https://reviews.llvm.org/D90177
Stanislav Mekhanoshin [Thu, 22 Oct 2020 18:14:35 +0000 (11:14 -0700)]
Fix SROA with a PHI mergig values from a same block
This fixes the bug 47945. It is legal to have a PHI with values
from from the same block, but values must stay the same. In this
case it is illegal to merge different values.
Differential Revision: https://reviews.llvm.org/D89978
Kirill Bobyrev [Mon, 26 Oct 2020 19:37:43 +0000 (20:37 +0100)]
[clangd] Add back dependency on proto generated targets
Previous attempts:
*
15f6bad6d74a993e366c8fc93a9c91f213ac6bc3
*
58d0ef2d0466a893ab400f6a9829057b9d851038
The combination results in both link- and build-time dependency which is
the desired behavior.
Duncan P. N. Exon Smith [Fri, 16 Oct 2020 18:39:28 +0000 (14:39 -0400)]
SourceManager: Fix an SLocEntry memory regression introduced with FileEntryRef
4dc5573acc0d2e7c59d8bac2543eb25cb4b32984 added `FileEntryRef` in order to
help enable sharing of a `FileManager` between `CompilerInstance`s.
It also added a `StringRef` with the filename on `FileInfo`. This
doubled `sizeof(FileInfo)`, bloating `sizeof(SLocEntry)`, of which we
have one for each (loaded and unloaded) file and macro expansion. This
causes a memory regression in modules builds.
Move the filename down into the `ContentCache`, which is a side data
structure for `FileInfo` that does not impact `sizeof(SLocEntry)`. Once
`FileEntryRef` is used for `ContentCache::OrigEntry` this can go away.
Differential Revision: https://reviews.llvm.org/D89580
Radar-Id: rdar://
59908826
Aaron Puchert [Mon, 26 Oct 2020 19:32:46 +0000 (20:32 +0100)]
Add release tarballs for libclc
Fixes PR47917.
Reviewed By: tstellar
Differential Revision: https://reviews.llvm.org/D90100
Evgeny Leviant [Mon, 26 Oct 2020 19:31:41 +0000 (22:31 +0300)]
[ARM][SchedModels] Move IsLDMBaseRegInListPred to ARMSchedule.td. NFC
This predicate is not specific to cortex-a57 and can be used in other processor
models as well.
Joe Turner [Mon, 26 Oct 2020 18:54:42 +0000 (11:54 -0700)]
Make sure Objective-C category support in IncludeSorter handles top-level imports
Currently, this would not correctly associate a category with the related include if it was top-level (i.e. no slashes in the path). This ensures that we explicitly think about that case.
Reviewed By: gribozavr2
Differential Revision: https://reviews.llvm.org/D89608
Benjamin Kramer [Mon, 26 Oct 2020 19:20:23 +0000 (20:20 +0100)]
[clang-tidy] Silence unused variable warning in Release builds. NFCI.
ExpandModularHeadersPPCallbacks.cpp:55:15: warning: unused variable 'FileEntry'
for (auto FileEntry : FilesToRecord)
^
Alexander Belyaev [Fri, 23 Oct 2020 12:34:50 +0000 (14:34 +0200)]
[mlir] Convert MemRefReinterpretCastOp to LLVM.
https://llvm.discourse.group/t/rfc-standard-memref-cast-ops/1454/15
Differential Revision: https://reviews.llvm.org/D90033
Zequan Wu [Mon, 26 Oct 2020 19:08:57 +0000 (12:08 -0700)]
Revert "Revert "Ensure that checkInitIsICE is called exactly once for every variable""
This reverts commit
a2ac64dd905422ed84e273a98d846df022a5e2ec.
Zequan Wu [Mon, 26 Oct 2020 18:58:45 +0000 (11:58 -0700)]
Revert "Ensure that checkInitIsICE is called exactly once for every variable"
This causing `Assertion Result && "Could not evaluate expression"' failed` at https://bugs.chromium.org/p/chromium/issues/detail?id=1142009
This reverts commit
76c0092665867a6defcd328ba0d0d976eb65d991.
Stanislav Mekhanoshin [Mon, 26 Oct 2020 18:53:40 +0000 (11:53 -0700)]
[AMDGPU] Fix VC warning about singed/unsigned comparison. NFC.
This is the warning reported in https://reviews.llvm.org/D89599
Louis Dionne [Mon, 26 Oct 2020 18:53:59 +0000 (14:53 -0400)]
[libc++] NFC: Consistent indentation for buildkite-pipeline.yml
Zequan Wu [Mon, 26 Oct 2020 18:37:56 +0000 (11:37 -0700)]
[lldb][NativePDB] fix test load-pdb.cpp
Nick Desaulniers [Mon, 26 Oct 2020 18:25:23 +0000 (11:25 -0700)]
[Clang][CodeGen] fix failed assertion
Ensure we can emit symbol aliases via function attribute
even when function signatures contain incomplete types.
Via bugreport:
https://reviews.llvm.org/D66492#2350947
Reviewed By: erichkeane
Differential Revision: https://reviews.llvm.org/D90073
Louis Dionne [Mon, 26 Oct 2020 18:25:49 +0000 (14:25 -0400)]
[libc++abi] Make sure we can run the tests in Standalone mode
The tests would previously fail if the `python` executable wasn't found,
because we were missing the mandatory find_package.
Duncan P. N. Exon Smith [Fri, 23 Oct 2020 19:14:51 +0000 (15:14 -0400)]
SourceManager: Return non-const references in getOrCreateContentCache and related, NFC
Update a few APIs to return non-const references instead of pointers,
and remove associated `const_cast`s and non-null assertions.
Differential Revision: https://reviews.llvm.org/D90067
Florian Hahn [Mon, 26 Oct 2020 17:05:40 +0000 (17:05 +0000)]
[AArch64] Extend tests for insertelement improvements.
Extends the tests added in
a562dc82a8d9488d35ff535302716141bc6feaa3 to
cover more vector variants.
Thomas Raoux [Mon, 26 Oct 2020 17:28:48 +0000 (10:28 -0700)]
[mlir][vector] Update doc strings for insert_map/extract_map and fix insert_map semantic
Based on discourse discussion, fix the doc string and remove examples with
wrong semantic. Also fix insert_map semantic by adding missing operand for
vector we are inserting into.
Differential Revision: https://reviews.llvm.org/D89563
Joe Ellis [Mon, 26 Oct 2020 17:40:31 +0000 (17:40 +0000)]
[SVE] Fix TypeSize warning in llvm::getGEPInductionOperand
We do not need to use the implicit cast here. We can instead can rely on
a comparison between two TypeSize objects instead. This algorithm will
work fine with scalable vectors.
Reviewed By: DavidTruby
Differential Revision: https://reviews.llvm.org/D90146
Joe Ellis [Mon, 26 Oct 2020 17:40:25 +0000 (17:40 +0000)]
[SVE][InstCombine] Fix TypeSize warning in canReplaceGEPIdxWithZero
The warning would fire when calling canReplaceGEPIdxWithZero on a GEP
whose source element type is a scalable vector. The size of scalable
vector types is not known, so this optimization cannot be performed.
This patch fixes the issue by:
- bailing out early in this routine if the GEP instruction's source
element type is a scalable vector.
- making use of getFixedSize -- this removes the dependency on the
deprecated interface.
Reviewed By: fpetrogalli
Differential Revision: https://reviews.llvm.org/D89968
Joe Ellis [Mon, 26 Oct 2020 17:40:17 +0000 (17:40 +0000)]
[SVE][AArch64] Fix TypeSize warning in GEP cost analysis
The warning would fire when calling getGEPCost for analyzing the cost of
a GEP instruction. This would result in the use of the now deprecated
implicit cast of TypeSize to uint64_t through the overloaded operator.
This patch fixes the issue by using getKnownMinSize instead of the
implicit cast. This is possible because the code is already
scalable-vector aware. The semantic behaviour of the code is unchanged
by this patch.
Reviewed By: sdesmalen, fpetrogalli
Differential Revision: https://reviews.llvm.org/D89872
Joe Ellis [Mon, 26 Oct 2020 17:40:01 +0000 (17:40 +0000)]
[SVE][AArch64] Fix TypeSize warning in loop vectorization legality
The warning would fire when calling isDereferenceableAndAlignedInLoop
with a scalable load. Calling isDereferenceableAndAlignedInLoop with a
scalable load would result in the use of the now deprecated implicit
cast of TypeSize to uint64_t through the overloaded operator.
This patch fixes this issue by:
- no longer considering vector loads as candidates in
canVectorizeWithIfConvert. This doesn't make sense in the context of
identifying scalar loads to vectorize.
- making use of getFixedSize inside isDereferenceableAndAlignedInLoop --
this removes the dependency on the deprecated interface, and will
trigger an assertion error if the function is ever called with a
scalable type.
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D89798
OCHyams [Mon, 26 Oct 2020 10:20:50 +0000 (10:20 +0000)]
[DebugInfo][dexter] Add dexter tests for escaped locals
Recently there has been renewed interest in improving debug-info for variables
that (partially or otherwise) live on the stack in optimised code.
At the moment instcombine speculates that stack slots are probably going to be
promoted to registers, and prepares the debug-info accordingly. It runs a
function called LowerDbgDeclare which converts dbg.declares to a set of
dbg.values after loads, and before stores and calls. Sometimes the stack
location remains (e.g. for escaped locals). If any dbg.values become undef
where the stack location is still valid we end up unnecessarily reducing
variable location coverage due to our inability to track multiple locations
simultaneously. There is a flag to disable this feature
(-instcombine-lower-dbg-declare=0), which prevents this conversion at the cost
of sometimes providing incorrect location info in the face of DSE, DCE, GVN,
CSE etc.
This has been discussed fairly extensively on PR34136.
The idea of these tests is to provide examples of situations that we should
consider when designing a new system, to aid discussions and eventually help
evaluate the implementation.
Dexter isn't ideal for observing specific optimisation behaviour. Writing an
exaustive test suite would be difficult, and the resultant suite would be
fragile. However, I think having some concrete executable examples is useful
at least as a reference.
Differential Revision: https://reviews.llvm.org/D89543
Zequan Wu [Tue, 20 Oct 2020 18:15:42 +0000 (11:15 -0700)]
[lldb][PDB] Add ObjectFile PDB plugin
To allow loading PDB file with `target symbols add` command.
Differential Revision: https://reviews.llvm.org/D89812
Evgeny Leviant [Mon, 26 Oct 2020 17:22:41 +0000 (20:22 +0300)]
[ARM][SchedModels] Convert IsLdstsoScaledNotOptimalPred to MCSchedPredicate
Differential revision: https://reviews.llvm.org/D90150
Nicolas Vasilache [Mon, 26 Oct 2020 13:36:17 +0000 (13:36 +0000)]
[mlir][Linalg] Add basic support for TileAndFuse on Linalg on tensors.
This revision allows the fusion of the producer of input tensors in the consumer under a tiling transformation (which produces subtensors).
Many pieces are still missing (e.g. support init_tensors, better refactor LinalgStructuredOp interface support, try to merge implementations and reuse code) but this still allows getting started.
The greedy pass itself is just for testing purposes and will be extracted in a separate test pass.
Differential revision: https://reviews.llvm.org/D89491
Evgeny Leviant [Mon, 26 Oct 2020 17:16:40 +0000 (20:16 +0300)]
Fix issue in cortex-a57 sched model
Differential revision: https://reviews.llvm.org/D90152
Benjamin Kramer [Mon, 26 Oct 2020 17:11:57 +0000 (18:11 +0100)]
[AMDGPU] Avoid unused variable warning in Release builds. NFC.
SIRegisterInfo.cpp:480:19: error: unused variable 'SOffset'
Benjamin Kramer [Mon, 26 Oct 2020 17:10:56 +0000 (18:10 +0100)]
[clang][unittest] Don't hardcode the string "Assertion"
This depends on the libc implementation. Use the string from the
assertion message instead. Overly specific, but so is this entire test.
Benjamin Kramer [Mon, 26 Oct 2020 17:10:31 +0000 (18:10 +0100)]
[lld][ELF] Don't write output to the test directory. NFC.
Louis Dionne [Mon, 26 Oct 2020 16:58:15 +0000 (12:58 -0400)]
[libc++] Fix indentation of buildkite-pipeline.yml
Nico Weber [Mon, 26 Oct 2020 16:55:33 +0000 (12:55 -0400)]
Unconfuse gcc5.3 after
2e204e23911b1f / D87528
The local variable CmpResult added in that change shadowed the
type CmpResult, which confused an older gcc. Rename the variable
CmpResult to APFloatCmpResult.
Peter Waller [Mon, 19 Oct 2020 10:07:25 +0000 (10:07 +0000)]
[SVE][CodeGen][DAGCombiner] Fix TypeSize warning in redundant store elimination
The modified code in visitSTORE was missing a scalable vector check, and still
using the now deprecated implicit cast of TypeSize to uint64_t through the
overloaded operator. This patch fixes these issues.
This brings the logic in line with the comment on the context line immediately
above the added precondition.
Add a test in sve-redundant-store.ll that the warning is not triggered.
Differential Revision: https://reviews.llvm.org/D89701
Peter Waller [Mon, 26 Oct 2020 16:37:00 +0000 (16:37 +0000)]
Revert "[SVE][CodeGen][DAGCombiner] Fix TypeSize warning in redundant store elimination"
This reverts commit
4604441386dc5fcd3165f4b39f5fa2e2c600f1bc.
Reverting because it was not the intended version of the patch, which
follows this patch.
Peter Waller [Mon, 19 Oct 2020 10:07:25 +0000 (10:07 +0000)]
[SVE][CodeGen][DAGCombiner] Fix TypeSize warning in redundant store elimination
The modified code in visitSTORE was missing a scalable vector check, and still
using the now deprecated implicit cast of TypeSize to uint64_t through the
overloaded operator. This patch fixes these issues.
This brings the logic in line with the comment on the context line immediately
above the added precondition.
Add a test in Redundantstores.ll that the warning is not triggered.
Louis Dionne [Fri, 23 Oct 2020 20:27:41 +0000 (16:27 -0400)]
[libc++] Add a CI jobs to test the Standalone builds
Simon Pilgrim [Mon, 26 Oct 2020 16:11:03 +0000 (16:11 +0000)]
[InstCombine] Add bswap test pattern using truncates
AndreyChurbanov [Mon, 26 Oct 2020 16:02:21 +0000 (19:02 +0300)]
[OpenMP] changing OMP rtl to use shared memory instead of env variable
Patch by Erdner, Todd <todd.erdner@intel.com>
Differential Revision: https://reviews.llvm.org/D89898
Florian Hahn [Mon, 26 Oct 2020 15:34:29 +0000 (15:34 +0000)]
[AArch64] Add 2 cases where insertelement lowering could be improved.
Simon Pilgrim [Mon, 26 Oct 2020 15:20:14 +0000 (15:20 +0000)]
[X86] Use mtriple instead of march in MIR tests
Kazushi (Jam) Marukawa [Mon, 26 Oct 2020 10:13:14 +0000 (19:13 +0900)]
[VE] Add vector shift instructions
Add VSLL/VSLD/VSRL/VSLA/VSLAX/VSRA/VSRAX/VSFA instructionss. Add
additonal AsmParser for VSLD special operand. Also add regression
tests.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D90143
Kazushi (Jam) Marukawa [Mon, 26 Oct 2020 09:58:22 +0000 (18:58 +0900)]
[VE] Add vector logical instructions
Add VAND/VOR/VXOE/VEQV/VLDZ/VPCNT/VBRV/VSEQ instrucitons and regression
tests.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D90141
Kazushi (Jam) Marukawa [Sat, 24 Oct 2020 09:25:52 +0000 (18:25 +0900)]
[VE] Support atomic store
Support atomic store instructions and add a regression test.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D90137
Denys Petrov [Mon, 26 Oct 2020 14:59:54 +0000 (16:59 +0200)]
[analyzer] [NFC] Simplify SVal::getAsLocSymbol function using existing functions
Summary: Method of obtaining MemRegion from LocAsInteger/MemRegionVal already exists in SVal::getAsRegion function. Replace repetitive conditions in SVal::getAsLocSymbol with SVal::getAsRegion function.
Differential Revision: https://reviews.llvm.org/D89982
Paul C. Anagnostopoulos [Fri, 23 Oct 2020 17:36:57 +0000 (13:36 -0400)]
[TableGen] [tests] Change integer ranges to use new '...' punctuation
Differential Revision: https://reviews.llvm.org/D90057
Andy Yankovsky [Mon, 26 Oct 2020 14:31:35 +0000 (15:31 +0100)]
Fix SBError::SetErrorToGenericError
`SBError::SetErrorToGenericError` should call `Status::SetErrorToGenericError`,
not `Status::SetErrorToErrno`.
Reviewed By: teemperor
Differential Revision: https://reviews.llvm.org/D90151
Simon Pilgrim [Mon, 26 Oct 2020 14:26:14 +0000 (14:26 +0000)]
[InstCombine] collectBitParts - add bitreverse intrinsic support.
Kirill Bobyrev [Mon, 26 Oct 2020 14:31:29 +0000 (15:31 +0100)]
[clangd] NFC: Update FIXME comment regarding lack of c/dtor support
Both `SymbolKind` and `indexSymbolKindToSymbolKind` support constructors and
separate them into a different category from regular methods.
Reviewed By: kadircet
Differential Revision: https://reviews.llvm.org/D89935
Raphael Isemann [Mon, 26 Oct 2020 14:03:58 +0000 (15:03 +0100)]
[lldb][NFC] Make GetShellSafeArgument simpler and faster
Escaping by inserting characters in the middle of a std::string isn't cheap.
It's much more verbose than just prepending a backslash in a loop.
Simon Pilgrim [Mon, 26 Oct 2020 14:13:02 +0000 (14:13 +0000)]
[InstCombine] Add bswap test pattern using bitreverse intrinsic
This is mainly to help with future better bitreverse folding support but we can test it via bswap matching for now.
Jay Foad [Mon, 26 Oct 2020 14:03:35 +0000 (14:03 +0000)]
[AMDGPU] Make more use of printNamedBit in AMDGPUInstPrinter. NFC.
Florian Hahn [Mon, 26 Oct 2020 13:43:31 +0000 (13:43 +0000)]
[LV] Add cost-model test for AArch64 select costs.
Currently, the cost of some compare/select patterns is overestimated on
AArch64.
Kirill Bobyrev [Mon, 26 Oct 2020 13:14:12 +0000 (14:14 +0100)]
[clangd] Fix remote index build failures due to lack of proto dependency
Previous attempt (
15f6bad6d74a993e366c8fc93a9c91f213ac6bc3) introduced
add_dependencies but unfortunately it does not actually add a dependency
between RemoteIndexProto and RemoteIndexServiceProto. This is likely due
to some requirements of it that clang_add_library violates.
As a workaround, we will link RemoteIndexProto library to
RemoteIndexServiceProto which is logical because the library can not be
without linking to RemoteIndexProto anyway.
George Mitenkov [Fri, 23 Oct 2020 14:46:18 +0000 (10:46 -0400)]
[MLIR][mlir-spirv-cpu-runner] A SPIR-V cpu runner prototype
This patch introduces a SPIR-V runner. The aim is to run a gpu
kernel on a CPU via GPU -> SPIRV -> LLVM conversions. This is a first
prototype, so more features will be added in due time.
- Overview
The runner follows similar flow as the other runners in-tree. However,
having converted the kernel to SPIR-V, we encode the bind attributes of
global variables that represent kernel arguments. Then SPIR-V module is
converted to LLVM. On the host side, we emulate passing the data to device
by creating in main module globals with the same symbolic name as in kernel
module. These global variables are later linked with ones from the nested
module. We copy data from kernel arguments to globals, call the kernel
function from nested module and then copy the data back.
- Current state
At the moment, the runner is capable of running 2 modules, nested one in
another. The kernel module must contain exactly one kernel function. Also,
the runner supports rank 1 integer memref types as arguments (to be scaled).
- Enhancement of JitRunner and ExecutionEngine
To translate nested modules to LLVM IR, JitRunner and ExecutionEngine were
altered to take an optional (default to `nullptr`) function reference that
is a custom LLVM IR module builder. This allows to customize LLVM IR module
creation from MLIR modules.
Reviewed By: ftynse, mravishankar
Differential Revision: https://reviews.llvm.org/D86108
Fraser Cormack [Mon, 26 Oct 2020 12:22:55 +0000 (12:22 +0000)]
[DAGCombine] Add test case showing incorrect DAGCombine optimization
This optmization produces incorrect results when the vector element type
is not byte-sized. Related to D78568.
Andrew Ng [Wed, 21 Oct 2020 15:11:50 +0000 (16:11 +0100)]
[llvm-ar][Object] Fix detection of need for 64-bit archive symbol tables
The code to detect the requirement for 64-bit offsets in the archive
symbol table was not correctly accounting for the archive file signature
and the size of all the contents of the symbol table itself, e.g. the
symbol table's header and string table. Also was not considering the
variation in symbol table formats. This could result in the creation of
large archives with a corrupt symbol table.
Change the testing environment variable SYM64_THRESHOLD to be an
absolute value rather than a power of 2 in order to enable precise
testing of this detection code.
Differential Revision: https://reviews.llvm.org/D89891
Simon Pilgrim [Mon, 26 Oct 2020 11:51:36 +0000 (11:51 +0000)]
[clang-fuzzer] CreateAndRunJITFunc - fix use after move static analyzer warning.
We were using the unique_ptr M to determine the triple after it had been moved in the EngineBuilder constructor.
George Mitenkov [Fri, 23 Oct 2020 14:33:53 +0000 (10:33 -0400)]
[MLIR][mlir-spirv-cpu-runner] A pass to emulate a call to kernel in LLVM
This patch introduces a pass for running
`mlir-spirv-cpu-runner` - LowerHostCodeToLLVMPass.
This pass emulates `gpu.launch_func` call in LLVM dialect and lowers
the host module code to LLVM. It removes the `gpu.module`, creates a
sequence of global variables that are later linked to the varables
in the kernel module, as well as a series of copies to/from
them to emulate the memory transfer to/from the host or to/from the
device sides. It also converts the remaining Standard dialect into
LLVM dialect, emitting C wrappers.
Reviewed By: mravishankar
Differential Revision: https://reviews.llvm.org/D86112
Haojian Wu [Mon, 26 Oct 2020 11:40:00 +0000 (12:40 +0100)]
[clang] Suppress "follow-up" diagnostics on recovery call expressions.
Because of typo-correction, the AST can be transformed, and the transformed
AST is marginally useful for diagnostics purpose, the following
diagnostics usually do harm than good (easily cause confusions).
Given the following code:
```
void abcc();
void test() {
if (abc());
// diagnostic 1 (for the typo-correction): the typo is correct to `abcc()`, so the code is treate as `if (abcc())` in AST perspective;
// diagnostic 2 (for mismatch type): we perform an type-analysis on `if`, discover the type is not match
}
```
The secondary diagnostic "convertable to bool" is likely bogus to users.
The idea is to use RecoveryExpr (clang's dependent mechanism) to preserve the
recovery behavior but suppress all follow-up diagnostics.
Differential Revision: https://reviews.llvm.org/D89946
Simon Pilgrim [Mon, 26 Oct 2020 11:04:48 +0000 (11:04 +0000)]
[InstCombine] Add support for zext(and(neg(amt),width-1)) rotate shift amount patterns
Alive2: https://alive2.llvm.org/ce/z/bCvvHd
Simon Pilgrim [Mon, 26 Oct 2020 10:27:37 +0000 (10:27 +0000)]
[InstCombine] Add rotate tests where the shift amount is zero extended after masking
Dmitry Vyukov [Mon, 26 Oct 2020 11:18:54 +0000 (12:18 +0100)]
tsan: add mips64 support in lib/tsan/go/buildgo.sh
Enable mips64 support in buildgo.sh.
Author: mzh (Meng Zhuo)
Reviewed-in: https://reviews.llvm.org/D90130
Evgeny Leviant [Mon, 26 Oct 2020 11:18:15 +0000 (14:18 +0300)]
[llvm-mca] Add few memory instructions to cortex-a57 test
Djordje Todorovic [Mon, 26 Oct 2020 10:59:46 +0000 (03:59 -0700)]
[NFC][InstrRefLDV] Fix a typo
Pavel Labath [Wed, 14 Oct 2020 14:39:25 +0000 (16:39 +0200)]
[lldb] Modernize PseudoTerminal::Fork
Pavel Labath [Mon, 12 Oct 2020 13:22:48 +0000 (15:22 +0200)]
[lldb] Fix bitfield "frame var" for pointers (pr47743)
Displaying large packed bitfields did not work if one was accessing them
through a pointer, and he used the "->" notation ("[0]." notation is
fine). The reason for that is that implicit dereference in -> is plumbed
all the way down to ValueObjectChild::UpdateValue, where the process of
fetching the child value was forked for this flag. The bitfield
"sliding" code was implemented only for the branch which did not require
dereferencing.
This patch restructures the function to avoid this mistake. Processing
now happens in two stages.
- first the parent is dereferenced (if needed)
- then the child value is computed (this step includes sliding and is
common for both branches)
Differential Revision: https://reviews.llvm.org/D89236
Michał Górny [Sun, 25 Oct 2020 14:44:32 +0000 (15:44 +0100)]
[lldb] [Process/Linux] Reuse NativeRegisterContextWatchpoint_x86
Differential Revision: https://reviews.llvm.org/D90119
Michał Górny [Sat, 24 Oct 2020 21:40:17 +0000 (23:40 +0200)]
[lldb] [Process/NetBSD] Set xs_xstate_bv correctly when setting regs
Ensure that xs_xstate_bv is set correctly before calling
WriteRegisterSet(). The bit can be clear if the relevant registers
were at their initial state when they were read, and it needs to be set
in order to apply changes from the XState structure.
Differential Revision: https://reviews.llvm.org/D90105
Michał Górny [Sun, 25 Oct 2020 06:28:56 +0000 (07:28 +0100)]
[lldb] [test/Register] Use initial state for write tests
Reset registers to their 'initial' state instead of a semi-random
pattern in write tests. While the latter might have been helpful
while debugging failures (i.e. to distinguish unmodified registers
from mistakenly written zeroes), the former makes it possible to test
whether xstate_bv field is written correctly when using XSAVE.
With this change, the four relevant tests start failing on NetBSD
without D90105.
Differential Revision: https://reviews.llvm.org/D90114
Michał Górny [Sun, 25 Oct 2020 23:23:36 +0000 (00:23 +0100)]
[lldb] [Process/FreeBSDRemote] Fix #include for i386 compat
Include <x86/fpu.h> rather than <machine/fpu.h>, as the latter is not
present on i386.
Differential Revision: https://reviews.llvm.org/D90128
Tyker [Mon, 26 Oct 2020 10:47:58 +0000 (11:47 +0100)]
Jean Perier [Mon, 26 Oct 2020 10:25:40 +0000 (11:25 +0100)]
[flang] Tighten rules to resolve procedure as intrinsic procedure
2 Bug fixes:
- Do not resolve procedure as intrinsic if they appeared in an
EXTERNAL attribute statement (one path was not considering this flag)
- Emit an error if a procedure resolved to be an intrinsic function
(resp. subroutine) is used as a subroutine (resp. function).
Lowering was attempted while the evaluate::Expression for the
call was missing without any errors.
1 behavior change:
- Do not implicitly resolve subroutines (resp. functions) as intrinsics
because their name is the name of an intrinsic function (resp.
subroutine). Add justification in documentation.
Reviewed By: klausler, tskeith
Differential Revision: https://reviews.llvm.org/D90049
Tyker [Mon, 26 Oct 2020 08:58:20 +0000 (09:58 +0100)]
[Annotation] Allows annotation to carry some additional constant arguments.
This allows using annotation in a much more contexts than it currently has.
especially when annotation with template or constexpr.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D88645
Kazushi (Jam) Marukawa [Sun, 18 Oct 2020 10:26:03 +0000 (19:26 +0900)]
[VE] Add vector comparison and min/max
Add VCMP/VCPS/VCPX/VCMS/VCMX vector instructions. Also add regression
tests.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D89643
Kazushi (Jam) Marukawa [Sun, 18 Oct 2020 10:10:43 +0000 (19:10 +0900)]
[VE] Add integer arithmetic vector instructions
Add VADD/VADS/VADX/VSUB/VSBS/VSBX/VMPY/VMPS/VMPX/VMPD/VDIV/VDVS/VDVX
instructions. Also add regression tests.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D89642
Florian Hahn [Mon, 26 Oct 2020 09:01:51 +0000 (09:01 +0000)]
[AsmPrinter] Add per BB instruction mix remark.
This patch adds a remarks that provides counts for each opcode per basic block.
An snippet of the generated information can be seen below.
The current implementation uses the target specific opcode for the counts. For example, on AArch64 this means we currently get 2 entries for `add` instructions if the block contains 32 and 64 bit adds. Similarly, immediate version are treated differently.
Unfortunately there seems to be no convenient way to get only the mnemonic part of the instruction as a string AFAIK. This could be improved in the future.
```
--- !Analysis
Pass: asm-printer
Name: InstructionMix
DebugLoc: { File: arm64-instruction-mix-remarks.ll, Line: 30, Column: 30 }
Function: foo
Args:
- String: 'BasicBlock: '
- BasicBlock: else
- String: "\n"
- String: INST_MADDWrrr
- String: ': '
- INST_MADDWrrr: '2'
- String: "\n"
- String: INST_MOVZWi
- String: ': '
- INST_MOVZWi: '1'
```
Reviewed By: anemet, thegameg, paquette
Differential Revision: https://reviews.llvm.org/D89892
Sebastian Neubauer [Fri, 23 Oct 2020 09:21:03 +0000 (11:21 +0200)]
[AMDGPU] Emit new pal metadata by default
If no pal metadata is given, default to the msgpack format instead of
the legacy metadata. This makes tests better readable.
Differential Revision: https://reviews.llvm.org/D90035
Evgeny Leviant [Mon, 26 Oct 2020 09:14:55 +0000 (12:14 +0300)]
[ARM][SchedModels] Rename and generalize predicate. NFC
Kai Luo [Mon, 26 Oct 2020 08:53:14 +0000 (08:53 +0000)]
[PowerPC] Add test case for pr47830. NFC.
Kazushi (Jam) Marukawa [Fri, 23 Oct 2020 13:10:34 +0000 (22:10 +0900)]
[VE] Support atomic load
Support atomic load instruction and add a regression test.
VE uses release consitency, so need to insert fence around
atomic instructions. This patch enable AtomicExpandPass
and use emitLeadingFence and emitTrailingFence mechanism
for such purpose.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D90135
Evgeny Leviant [Mon, 26 Oct 2020 09:01:39 +0000 (12:01 +0300)]
[ARM][SchedModels] Get rid of IsLdrAm2ScaledPred
Differential revision: https://reviews.llvm.org/D90024
Evgeny Leviant [Mon, 26 Oct 2020 08:54:08 +0000 (11:54 +0300)]
[ARM][SchedModels] Convert IsLdstsoMinusRegPred to MCSchedPredicate
Differential revision: https://reviews.llvm.org/D90029