Eduardo Caldas [Mon, 7 Sep 2020 17:47:09 +0000 (17:47 +0000)]
[SyntaxTree] Fix crash on functions with default arguments.
* Do not visit `CXXDefaultArgExpr`
* To build `CallArguments` nodes, just go through non-default arguments
Differential Revision: https://reviews.llvm.org/D87249
Eduardo Caldas [Mon, 7 Sep 2020 08:40:49 +0000 (08:40 +0000)]
[SyntaxTree] Ignore implicit `CXXFunctionalCastExpr` wrapping constructor
Differential Revision: https://reviews.llvm.org/D87229
Eduardo Caldas [Thu, 27 Aug 2020 09:44:09 +0000 (09:44 +0000)]
[SyntaxTree] Ignore implicit leaf `CXXConstructExpr`
Differential Revision: https://reviews.llvm.org/D86700
Eduardo Caldas [Thu, 27 Aug 2020 09:43:14 +0000 (09:43 +0000)]
[SyntaxTree] Ignore implicit non-leaf `CXXConstructExpr`
Differential Revision: https://reviews.llvm.org/D86699
Jakub Lichman [Tue, 8 Sep 2020 09:42:25 +0000 (09:42 +0000)]
[mlir] Fix of broken build on windows caused by using uint
Sam Tebbs [Mon, 7 Sep 2020 09:39:14 +0000 (10:39 +0100)]
[ARM][LowOverheadLoops] Remove modifications to the correct element
count register
After my patch at D86087, code that now uses the mov operand rather than
the vctp operand will no longer remove modifications to the vctp operand
as they should. This patch fixes that by explicitly removing
modifications to the vctp operand rather than the register used as the
element count.
Qiu Chaofan [Tue, 8 Sep 2020 09:20:00 +0000 (17:20 +0800)]
Revert "[PowerPC] Implement instruction clustering for stores"
This reverts commit
3c0b3250230b3847a2a47dfeacfdb794c2285f02, (along
with
ea795304 and
bb39eb9e) since it breaks test with UB sanitizer.
Benjamin Kramer [Mon, 7 Sep 2020 15:39:16 +0000 (17:39 +0200)]
[mlir][VectorOps] Redo the scalar loop emission in VectoToSCF to pad instead of clipping
This replaces the select chain for edge-padding with an scf.if that
performs the memory operation when the index is in bounds and uses the
pad value when it's not. For transfer_write the same mechanism is used,
skipping the store when the index is out of bounds.
The integration test has a bunch of cases of how I believe this should
work.
Differential Revision: https://reviews.llvm.org/D87241
Jakub Lichman [Tue, 8 Sep 2020 08:31:52 +0000 (08:31 +0000)]
[mlir] Conv ops vectorization pass
In this commit a new way of convolution ops lowering is introduced.
The conv op vectorization pass lowers linalg convolution ops
into vector contractions. This lowering is possible when conv op
is first tiled by 1 along specific dimensions which transforms
it into dot product between input and kernel subview memory buffers.
This pass converts such conv op into vector contraction and does
all necessary vector transfers that make it work.
Differential Revision: https://reviews.llvm.org/D86619
Serge Guelton [Thu, 25 Jun 2020 09:57:01 +0000 (05:57 -0400)]
Provide anchor for compiler extensions
This patch is cherry-picked from
04b0a4e22e3b4549f9d241f8a9f37eebecb62a31, and
amended to prevent an undefined reference to `llvm::EnableABIBreakingChecks'
Shivanshu Goyal [Tue, 8 Sep 2020 08:17:05 +0000 (10:17 +0200)]
getClangStripDependencyFileAdjuster(): Do not remove -M args when using MSVC cl driver
MSVC's cl.exe has a few command line arguments which start with -M such
as "-MD", "-MDd", "-MT", "-MTd", "-MP".
These arguments are not dependency file generation related, and these
arguments were being removed by getClangStripDependencyFileAdjuster()
which was wrong.
Differential revision: https://reviews.llvm.org/D86999
Nicolas Vasilache [Tue, 8 Sep 2020 07:39:23 +0000 (03:39 -0400)]
[mlir][Vector] Make VectorToSCF deterministic
Differential Revision: https://reviews.llvm.org/D87273
Xing GUO [Tue, 8 Sep 2020 08:08:42 +0000 (16:08 +0800)]
[obj2yaml] Stop parsing the debug_str section when it encounters a string without the null terminator.
When obj2yaml encounters a string without the null terminator, it should
stop parsing the debug_str section. This patch addresses comments in
[D86867](https://reviews.llvm.org/D86867#inline-803291).
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D87261
Richard Barton [Thu, 3 Sep 2020 10:44:03 +0000 (11:44 +0100)]
[flang] Convert release notes to markdown
Switch ReleaseNotes from .rst to .md to match the other docs.
At the same time, fix the version number for master.
Max Kazantsev [Tue, 8 Sep 2020 07:33:47 +0000 (14:33 +0700)]
[Test] More tests where IndVars fails to eliminate a range check
Qiu Chaofan [Tue, 8 Sep 2020 07:30:16 +0000 (15:30 +0800)]
[PowerPC] Fix getMemOperandWithOffsetWidth
Commit
3c0b3250 introduced memory cluster under pwr10 target, but a
check for operands was unexpectedly removed. This adds it back to avoid
regression.
Simon Wallis [Tue, 8 Sep 2020 07:04:52 +0000 (08:04 +0100)]
[AARCH64][RegisterCoalescer] clang miscompiles zero-extension to long long
Implement AArch64 variant of shouldCoalesce() to detect a known failing case
and prevent the coalescing of a 32-bit copy into a 64-bit sign-extending load.
Do not coalesce in the following case:
COPY where source is bottom 32 bits of a 64-register,
and destination is a 32-bit subregister of a 64-bit register,
ie it causes the rest of the register to be implicitly set to zero.
A mir test has been added.
In the test case, the 32-bit copy implements a 32 to 64 bit zero extension
and relies on the upper 32 bits being zeroed.
Coalescing to the result of the 64-bit load meant overwriting
the upper 32 bits incorrectly when the loaded byte was negative.
Reviewed By: john.brawn
Differential Revision: https://reviews.llvm.org/D85956
Mikael Holmen [Tue, 8 Sep 2020 06:05:47 +0000 (08:05 +0200)]
[PowerPC] Add parentheses to silence gcc warning
Without gcc 7.4 warns with
../lib/Target/PowerPC/PPCInstrInfo.cpp:2284:25: warning: suggest parentheses around '&&' within '||' [-Wparentheses]
BaseOp1.isFI() &&
~~~~~~~~~~~~~~~^~
"Only base registers and frame indices are supported.");
~
Martin Storsjö [Tue, 8 Sep 2020 06:26:39 +0000 (09:26 +0300)]
[clang] Remove a stray semicolon, fixing pedantic GCC warnings. NFC.
Andrew Wei [Tue, 8 Sep 2020 05:14:53 +0000 (13:14 +0800)]
[LSR] Canonicalize a formula before insert it into the list
In GenerateConstantOffsetsImpl, we may generate non canonical Formula
if BaseRegs of that Formula is updated and includes a recurrent expr reg
related with current loop while its ScaledReg is not.
Patched by: mdchen
Reviewed By: qcolombet
Differential Revision: https://reviews.llvm.org/D86939
Fangrui Song [Tue, 8 Sep 2020 04:44:26 +0000 (21:44 -0700)]
[ELF] --symbol-ordering-file: optimize a loop
Johannes Doerfert [Tue, 18 Aug 2020 20:32:21 +0000 (15:32 -0500)]
[Attributor][FIX] Don't crash on internalizing linkonce_odr hidden functions
The CloneFunctionInto has implicit requirements with regards to the
linkage and visibility of the function. We now update these after we did
the CloneFunctionInto on the copy with the same linkage and visibility
as the original.
Johannes Doerfert [Fri, 4 Sep 2020 04:42:33 +0000 (23:42 -0500)]
[Attributor][NFC] Cleanup internalize test case
One run line was different and probably introduced for the manually
added function attribute & name checks. We can do this with the script
and a check prefix used for the other run lines as well.
Johannes Doerfert [Thu, 3 Sep 2020 21:13:28 +0000 (16:13 -0500)]
[Attributor][NFC] Change variable spelling
Johannes Doerfert [Sat, 5 Sep 2020 18:26:20 +0000 (13:26 -0500)]
[Attributor][NFC] Clang tidy: no else after continue
Johannes Doerfert [Thu, 3 Sep 2020 16:08:39 +0000 (11:08 -0500)]
[Attributor][NFC] Expand `auto` types (clang-fix-it)
Johannes Doerfert [Fri, 28 Aug 2020 01:34:07 +0000 (20:34 -0500)]
[Attributor][FIX] Properly return changed if the IR was modified
Deleting or replacing anything is certainly a modification. This caused
a later assertion in IPSCCP when compiling 400.perlbench with the new PM.
I'm not sure how to test this.
Max Kazantsev [Tue, 8 Sep 2020 04:14:36 +0000 (11:14 +0700)]
[Test] Auto-generated checks for some IndVarSimplify tests
Zequan Wu [Tue, 8 Sep 2020 03:55:05 +0000 (20:55 -0700)]
[Sema] fix /gr warning test case
Qiu Chaofan [Tue, 8 Sep 2020 03:03:09 +0000 (11:03 +0800)]
[PowerPC] Implement instruction clustering for stores
On Power10, it's profitable to schedule some stores with adjacent target
address together. This patch implements this feature.
Reviewed By: steven.zhang
Differential Revision: https://reviews.llvm.org/D86754
Alexander Shaposhnikov [Tue, 8 Sep 2020 01:29:48 +0000 (18:29 -0700)]
[llvm-objcopy] Consolidate and unify version tests
In this diff the tests which verify version printing functionality are refactored.
Since they are not specific to a particular format we move them into tool-version.test
and slightly unify (similarly to tool-name.test and tool-help-message.test).
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D87211
Kiran Kumar T P [Tue, 8 Sep 2020 01:22:07 +0000 (06:52 +0530)]
[flang][OpenMP] Enhance parser support for atomic construct to OpenMP 5.0
Summary:
This patch enhances parser support for atomic construct to OpenMP 5.0.
2.17.7 atomic -> ATOMIC [clause [,]] atomic-clause [[,] clause] |
ATOMIC [clause]
clause -> memory-order-clause | HINT(hint-expression)
memory-order-clause -> SEQ_CST | ACQ_REL | RELEASE | ACQUIRE | RELAXED
atomic-clause -> READ | WRITE | UPDATE | CAPTURE
The patch includes code changes and testcase modifications.
Reviewed By: DavidTruby, kiranchandramohan, sameeranjoshi
Differential Revision: https://reviews.llvm.org/D82931
Craig Topper [Tue, 8 Sep 2020 00:57:39 +0000 (17:57 -0700)]
[builtins] Inline __paritysi2 into __paritydi2 and inline __paritydi2 into __parityti2.
No point in making __parityti2 go through 2 calls to get to
__paritysi2.
Reviewed By: MaskRay, efriedma
Differential Revision: https://reviews.llvm.org/D87218
Mehdi Amini [Tue, 8 Sep 2020 00:56:10 +0000 (00:56 +0000)]
Update SVG images to be properly cropped (NFC)
Mehdi Amini [Tue, 8 Sep 2020 00:06:37 +0000 (00:06 +0000)]
Add a doc/tutorial on traversing the IR
Reviewed By: stephenneuendorffer
Differential Revision: https://reviews.llvm.org/D87221
Mehdi Amini [Mon, 7 Sep 2020 23:58:54 +0000 (23:58 +0000)]
Add documentation for getDependentDialects() in the PassManagement infra docs
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D87181
Zequan Wu [Fri, 21 Aug 2020 20:42:20 +0000 (13:42 -0700)]
[Sema][MSVC] warn at dynamic_cast when /GR- is given
Differential Revision: https://reviews.llvm.org/D86369
Florian Hahn [Mon, 7 Sep 2020 21:52:10 +0000 (22:52 +0100)]
[DSE,MemorySSA] Add an early check for read clobbers to traversal.
Depending on the benchmark, this early exit can save a substantial
amount of compile-time:
http://llvm-compile-time-tracker.com/compare.php?from=
505f2d817aa8e07ba98e5fd4a8f6ff0666f89df1&to=
eb4e441147f9b4b7a5fcbbc57428cadbe9e01f10&stat=instructions
Fangrui Song [Mon, 7 Sep 2020 21:44:53 +0000 (14:44 -0700)]
[asan][test] Use --image-base for Linux/asan_prelink_test.cpp if ld is LLD
LLD supports -Ttext but with the option there is still a PT_LOAD at address zero
and thus the Linux kernel will map it to a different address and the test will fail.
Use --image-base instead.
Roman Lebedev [Mon, 7 Sep 2020 20:54:06 +0000 (23:54 +0300)]
Reland [SimplifyCFG][LoopRotate] SimplifyCFG: disable common instruction hoisting by default, enable late in pipeline
This was reverted in
503deec2183d466dad64b763bab4e15fd8804239
because it caused gigantic increase (3x) in branch mispredictions
in certain benchmarks on certain CPU's,
see https://reviews.llvm.org/D84108#2227365.
It has since been investigated and here are the results:
https://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-
20200907/827578.html
> It's an amazingly severe regression, but it's also all due to branch
> mispredicts (about 3x without this). The code layout looks ok so there's
> probably something else to deal with. I'm not sure there's anything we can
> reasonably do so we'll just have to take the hit for now and wait for
> another code reorganization to make the branch predictor a bit more happy :)
>
> Thanks for giving us some time to investigate and feel free to recommit
> whenever you'd like.
>
> -eric
So let's just reland this.
Original commit message:
I've been looking at missed vectorizations in one codebase.
One particular thing that stands out is that some of the loops
reach vectorizer in a rather mangled form, with weird PHI's,
and some of the loops aren't even in a rotated form.
After taking a more detailed look, that happened because
the loop's headers were too big by then. It is evident that
SimplifyCFG's common code hoisting transform is at fault there,
because the pattern it handles is precisely the unrotated
loop basic block structure.
Surprizingly, `SimplifyCFGOpt::HoistThenElseCodeToIf()` is enabled
by default, and is always run, unlike it's friend, common code sinking
transform, `SinkCommonCodeFromPredecessors()`, which is not enabled
by default and is only run once very late in the pipeline.
I'm proposing to harmonize this, and disable common code hoisting
until //late// in pipeline. Definition of //late// may vary,
here currently i've picked the same one as for code sinking,
but i suppose we could enable it as soon as right after
loop rotation happens.
Experimentation shows that this does indeed unsurprizingly help,
more loops got rotated, although other issues remain elsewhere.
Now, this undoubtedly seriously shakes phase ordering.
This will undoubtedly be a mixed bag in terms of both compile- and
run- time performance, codesize. Since we no longer aggressively
hoist+deduplicate common code, we don't pay the price of said hoisting
(which wasn't big). That may allow more loops to be rotated,
so we pay that price. That, in turn, that may enable all the transforms
that require canonical (rotated) loop form, including but not limited to
vectorization, so we pay that too. And in general, no deduplication means
more [duplicate] instructions going through the optimizations. But there's still
late hoisting, some of them will be caught late.
As per benchmarks i've run {
F12360204}, this is mostly within the noise,
there are some small improvements, some small regressions.
One big regression i saw i fixed in rG8d487668d09fb0e4e54f36207f07c1480ffabbfd, but i'm sure
this will expose many more pre-existing missed optimizations, as usual :S
llvm-compile-time-tracker.com thoughts on this:
http://llvm-compile-time-tracker.com/compare.php?from=
e40315d2b4ed1e38962a8f33ff151693ed4ada63&to=
c8289c0ecbf235da9fb0e3bc052e3c0d6bff5cf9&stat=instructions
* this does regress compile-time by +0.5% geomean (unsurprizingly)
* size impact varies; for ThinLTO it's actually an improvement
The largest fallout appears to be in GVN's load partial redundancy
elimination, it spends *much* more time in
`MemoryDependenceResults::getNonLocalPointerDependency()`.
Non-local `MemoryDependenceResults` is widely-known to be, uh, costly.
There does not appear to be a proper solution to this issue,
other than silencing the compile-time performance regression
by tuning cut-off thresholds in `MemoryDependenceResults`,
at the cost of potentially regressing run-time performance.
D84609 attempts to move in that direction, but the path is unclear
and is going to take some time.
If we look at stats before/after diffs, some excerpts:
* RawSpeed (the target) {
F12360200}
* -14 (-73.68%) loops not rotated due to the header size (yay)
* -272 (-0.67%) `"Number of live out of a loop variables"` - good for vectorizer
* -3937 (-64.19%) common instructions hoisted
* +561 (+0.06%) x86 asm instructions
* -2 basic blocks
* +2418 (+0.11%) IR instructions
* vanilla test-suite + RawSpeed + darktable {
F12360201}
* -36396 (-65.29%) common instructions hoisted
* +1676 (+0.02%) x86 asm instructions
* +662 (+0.06%) basic blocks
* +4395 (+0.04%) IR instructions
It is likely to be sub-optimal for when optimizing for code size,
so one might want to change tune pipeline by enabling sinking/hoisting
when optimizing for size.
Reviewed By: mkazantsev
Differential Revision: https://reviews.llvm.org/D84108
This reverts commit
503deec2183d466dad64b763bab4e15fd8804239.
Nikita Popov [Mon, 7 Sep 2020 19:07:02 +0000 (21:07 +0200)]
[KnownBits] Avoid some copies (NFC)
These lambdas don't need copies, use const reference.
Nikita Popov [Sat, 5 Sep 2020 08:27:23 +0000 (10:27 +0200)]
[SCCP] Compute ranges for supported intrinsics
For intrinsics supported by ConstantRange, compute the result range
based on the argument ranges. We do this independently of whether
some or all of the input ranges are full, as we can often still
constrain the result in some way.
Differential Revision: https://reviews.llvm.org/D87183
Craig Topper [Mon, 7 Sep 2020 19:23:15 +0000 (12:23 -0700)]
[SelectionDAG][X86][ARM] Teach ExpandIntRes_ABS to use sra+add+xor expansion when ADDCARRY is supported.
Rather than using SELECT instructions, use SRA, UADDO/ADDCARRY and
XORs to expand ABS. This is the multi-part version of the sequence
we use in LegalizeDAG.
It's also the same as the Custom sequence uses for i64 on 32-bit
and i128 on 64-bit. So we can remove the X86 customization.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D87215
Sanjay Patel [Mon, 7 Sep 2020 19:47:57 +0000 (15:47 -0400)]
[InstCombine] improve fold of pointer differences
This was supposed to be an NFC cleanup, but there's
a real logic difference (did not drop 'nsw') visible
in some tests in addition to an efficiency improvement.
This is because in the case where we have 2 GEPs,
the code was *always* swapping the operands and
negating the result. But if we have 2 GEPs, we
should *never* need swapping/negation AFAICT.
This is part of improving flags propagation noticed
with PR47430.
Sanjay Patel [Mon, 7 Sep 2020 19:26:43 +0000 (15:26 -0400)]
[InstCombine] add ptr difference tests; NFC
Craig Topper [Mon, 7 Sep 2020 17:59:57 +0000 (10:59 -0700)]
[X86] Use the same sequence for i128 ISD::ABS on 64-bit targets as we use for i64 on 32-bit targets.
Differential Revision: https://reviews.llvm.org/D87214
Craig Topper [Mon, 7 Sep 2020 17:41:05 +0000 (10:41 -0700)]
[X86] Pre-commit new test case for D87214. NFC
Sanjay Patel [Mon, 7 Sep 2020 18:11:06 +0000 (14:11 -0400)]
[DAGCombiner] allow more store merging for non-i8 truncated ops
This is a follow-up suggested in D86420 - if we have a pair of stores
in inverted order for the target endian, we can rotate the source
bits into place.
The "be_i64_to_i16_order" test shows a limitation of the current
function (which might be avoided if we integrate this function with
the other cases in mergeConsecutiveStores). In the earlier
"be_i64_to_i16" test, we skip the first 2 stores because we do not
match the full set as consecutive or rotate-able, but then we reach
the last 2 stores and see that they are an inverted pair of 16-bit
stores. The "be_i64_to_i16_order" test alters the program order of
the stores, so we miss matching the sub-pattern.
Differential Revision: https://reviews.llvm.org/D87112
Eric Astor [Mon, 7 Sep 2020 18:00:05 +0000 (14:00 -0400)]
[ms] [llvm-ml] Allow use of locally-defined variables in expressions
MASM allows variables defined by equate statements to be used in expressions.
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D86946
Eric Astor [Mon, 7 Sep 2020 17:58:55 +0000 (13:58 -0400)]
[ms] [llvm-ml] Fix STRUCT field alignment
MASM aligns fields to the _minimum_ of the STRUCT alignment value and the size of the next field.
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D86945
Eric Astor [Mon, 7 Sep 2020 17:57:06 +0000 (13:57 -0400)]
[ms] [llvm-ml] Add support for bitwise named operators (AND, NOT, OR) in MASM
Add support for expressions of the form '1 or 2', etc.
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D86944
Simon Pilgrim [Mon, 7 Sep 2020 17:35:06 +0000 (18:35 +0100)]
VPlan.h - remove unnecessary forward declarations. NFCI.
Already defined in includes.
Simon Pilgrim [Mon, 7 Sep 2020 17:15:26 +0000 (18:15 +0100)]
MipsISelLowering.h - remove CCState/CCValAssign forward declarations. NFCI.
These are already defined in the CallingConvLower.h include.
Simon Pilgrim [Mon, 7 Sep 2020 16:50:58 +0000 (17:50 +0100)]
BTFDebug.h - reduce MachineInstr.h include to forward declaration. NFCI.
Simon Pilgrim [Mon, 7 Sep 2020 16:09:42 +0000 (17:09 +0100)]
LeonPasses.h - remove unnecessary includes. NFCI.
Reduce to forward declarations and move includes to LeonPasses.cpp where necessary.
Simon Pilgrim [Mon, 7 Sep 2020 15:56:57 +0000 (16:56 +0100)]
LeonPasses.h - remove orphan function declarations. NFCI.
The implementations no longer exist.
Sanjay Patel [Mon, 7 Sep 2020 16:37:59 +0000 (12:37 -0400)]
[InstCombine] improve folds for icmp with multiply operands (PR47432)
Check for no overflow along with an odd constant before
we lose information by converting to bitwise logic.
https://rise4fun.com/Alive/2Xl
Pre: C1 != 0
%mx = mul nsw i8 %x, C1
%my = mul nsw i8 %y, C1
%r = icmp eq i8 %mx, %my
=>
%r = icmp eq i8 %x, %y
Name: nuw ne
Pre: C1 != 0
%mx = mul nuw i8 %x, C1
%my = mul nuw i8 %y, C1
%r = icmp ne i8 %mx, %my
=>
%r = icmp ne i8 %x, %y
Name: odd ne
Pre: C1 % 2 != 0
%mx = mul i8 %x, C1
%my = mul i8 %y, C1
%r = icmp ne i8 %mx, %my
=>
%r = icmp ne i8 %x, %y
Sanjay Patel [Mon, 7 Sep 2020 15:40:59 +0000 (11:40 -0400)]
[InstCombine] move/add tests for icmp with mul operands; NFC
alex-t [Mon, 7 Sep 2020 15:57:27 +0000 (18:57 +0300)]
[AMDGPU] SILowerControlFlow::optimizeEndCF should remove empty basic block
optimizeEndCF removes EXEC restoring instruction case this instruction is the only one except the branch to the single successor and that successor contains EXEC mask restoring instruction that was lowered from END_CF belonging to IF_ELSE.
As a result of such optimization we get the basic block with the only one instruction that is a branch to the single successor.
In case the control flow can reach such an empty block from S_CBRANCH_EXEZ/EXECNZ it might happen that spill/reload instructions that were inserted later by register allocator are placed under exec == 0 condition and never execute.
Removing empty block solves the problem.
This change require further work to re-implement LIS updates. Recently, LIS is always nullptr in this pass. To enable it we need another patch to fix many places across the codegen.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D86634
Momchil Velikov [Mon, 7 Sep 2020 15:16:52 +0000 (16:16 +0100)]
Reduce the number of memory allocations when displaying
a warning about clobbering reserved registers (NFC).
Also address some minor inefficiencies and style issues.
Differential Revision: https://reviews.llvm.org/D86088
Gabor Marton [Mon, 7 Sep 2020 15:15:15 +0000 (17:15 +0200)]
[analyzer][StdLibraryFunctionsChecker] Have proper weak dependencies
We want the generice StdLibraryFunctionsChecker to report only if there
are no specific checkers that would handle the argument constraint for a
function.
Note, the assumptions are still evaluated, even if the arguement
constraint checker is set to not report. This means that the assumptions
made in the generic StdLibraryFunctionsChecker should be an
over-approximation of the assumptions made in the specific checkers. But
most importantly, the assumptions should not contradict.
Differential Revision: https://reviews.llvm.org/D87240
Richard Barton [Mon, 7 Sep 2020 15:33:55 +0000 (16:33 +0100)]
[flang] Spelling and format edits to README.txt. NFC.
Gabor Marton [Thu, 23 Jul 2020 14:57:16 +0000 (16:57 +0200)]
[analyzer][StdLibraryFunctionsChecker] Add POSIX pthread handling functions
Differential Revision: https://reviews.llvm.org/D84415
Richard Barton [Mon, 7 Sep 2020 15:31:12 +0000 (16:31 +0100)]
[flang] Fix link to old repo location in doxygen mainpage. NFC.
Simon Pilgrim [Mon, 7 Sep 2020 15:39:42 +0000 (16:39 +0100)]
AntiDepBreaker.h - remove unnecessary ScheduleDAG.h include. NFCI.
Simon Pilgrim [Mon, 7 Sep 2020 15:17:31 +0000 (16:17 +0100)]
[Sparc] Add reduced funnel shift test case for PR47303
Simon Pilgrim [Mon, 7 Sep 2020 15:11:40 +0000 (16:11 +0100)]
[X86][SSE] Don't use LowerVSETCCWithSUBUS for unsigned compare with +ve operands (PR47448)
We already simplify the unsigned comparisons if we've found the operands are non-negative, but we were still calling LowerVSETCCWithSUBUS which resulted in the PR47448 regressions.
Simon Pilgrim [Mon, 7 Sep 2020 14:53:15 +0000 (15:53 +0100)]
[X86][SSE] Add test cases for PR47448
Simon Pilgrim [Mon, 7 Sep 2020 14:31:54 +0000 (15:31 +0100)]
[X86] Replace UpgradeX86AddSubSatIntrinsics with UpgradeX86BinaryIntrinsics generic helper. NFCI.
Feed the Intrinsic::ID value directly instead of via the IsSigned/IsAddition bool flags.
Sanjay Patel [Mon, 7 Sep 2020 14:26:42 +0000 (10:26 -0400)]
[InstCombine] erase instructions leading up to unreachable
Normal dead code elimination ignores assume intrinsics, so we fail to
delete assumes that are not meaningful (and potentially worse if they
cause conflicts with other assumptions).
The motivating example in https://llvm.org/PR47416 suggests that we
might have problems upstream from here (difference between C and C++),
but this should be a cheap way to make sure we remove more dead code.
Differential Revision: https://reviews.llvm.org/D87149
Frederik Gossen [Mon, 7 Sep 2020 13:58:01 +0000 (13:58 +0000)]
[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings.
Merge the two lowering passes because they are not useful by themselves. The new
pass lowers to `std` and `scf` is considered an auxiliary dialect.
See also
https://llvm.discourse.group/t/conversions-with-multiple-target-dialects/1541/12
Differential Revision: https://reviews.llvm.org/D86779
Sjoerd Meijer [Mon, 7 Sep 2020 13:51:39 +0000 (14:51 +0100)]
Follow up of rG5f1cad4d296a, slightly reduced test case. NFC.
Simon Pilgrim [Mon, 7 Sep 2020 14:07:26 +0000 (15:07 +0100)]
[X86] Auto upgrade SSE/AVX PABS intrinsics to generic Intrinsic::abs
Minor followup to D87101, we were expanding this to a neg+icmp+select pattern like we were in CGBuiltin
Simon Pilgrim [Mon, 7 Sep 2020 13:16:38 +0000 (14:16 +0100)]
[X86][SSE] Use llvm.abs.* vector intrinsics instead of old (deprecated) SSE/AVX intrinsics for combine tests
This also allows us to extend testing to SSE2+ targets
Alex Zinenko [Fri, 4 Sep 2020 08:00:52 +0000 (10:00 +0200)]
[mlir] Take ValueRange instead of ArrayRef<Value> in StructuredIndexed
This was likely overlooked when ValueRange was first introduced. There is no
reason why StructuredIndexed needs specifically an ArrayRef so use ValueRange
for better type compatibility with the rest of the APIs.
Reviewed By: nicolasvasilache, mehdi_amini
Differential Revision: https://reviews.llvm.org/D87127
Esme-Yi [Mon, 7 Sep 2020 13:14:00 +0000 (13:14 +0000)]
[NFC][PowerPC] Add tests in constants-i64.ll.
Georgii Rymar [Mon, 7 Sep 2020 12:52:51 +0000 (15:52 +0300)]
[llvm-readobj] - Remove code duplication when printing dynamic relocations. NFCI.
LLVM style code can be simplified to avoid the duplication of logic
related to printing dynamic relocations.
Differential revision: https://reviews.llvm.org/D87089
Daniel Muñoz [Mon, 7 Sep 2020 13:00:31 +0000 (16:00 +0300)]
[KillTheDoctor/CMake] Add missing keyword PRIVATE in target_link_libraries
Add PRIVATE keyword in target_link_libraries to prevent CMake Error on Windows.
While trying to compile llvm/clang on Windows, the following CMake error occurred. The reason is a missing PUBLIC/PRIVATE/INTERFACE keyword in target_link_libraries.
`
CMake Error at utils/KillTheDoctor/CMakeLists.txt:5 (target_link_libraries):
The keyword signature for target_link_libraries has already been used with
the target "KillTheDoctor". All uses of target_link_libraries with a
target must be either all-keyword or all-plain.
The uses of the keyword signature are here:
* cmake/modules/AddLLVM.cmake:771 (target_link_libraries)
`
Reviewed By: tambre
Differential Revision: https://reviews.llvm.org/D87203
Simon Pilgrim [Mon, 7 Sep 2020 12:53:35 +0000 (13:53 +0100)]
[X86][SSE] Move llvm.x86.ssse3.pabs.*.128 intrinsics to ssse3-intrinsics-x86-upgrade.ll
These have been auto upgraded for some time so this is just a tidyup.
Simon Pilgrim [Mon, 7 Sep 2020 12:44:35 +0000 (13:44 +0100)]
[X86] Update SSE/AVX ABS intrinsics to emit llvm.abs.* (PR46851)
We're now getting close to having the necessary analysis/combines etc. for the new generic llvm.abs.* intrinsics.
This patch updates the SSE/AVX ABS vector intrinsics to emit the generic equivalents instead of the icmp+sub+select code pattern.
Differential Revision: https://reviews.llvm.org/D87101
LLVM GN Syncbot [Mon, 7 Sep 2020 12:51:23 +0000 (12:51 +0000)]
[gn build] Port
23f700c785a
Raphael Isemann [Mon, 7 Sep 2020 12:50:13 +0000 (14:50 +0200)]
Revert "[clang] Prevent that Decl::dump on a CXXRecordDecl deserialises further declarations."
This reverts commit
0478720157f6413fad7595b8eff9c70d2d99b637. This probably
doesn't work when forcing deserialising while dumping (which the ASTDumper
optionally supports).
David Truby [Mon, 7 Sep 2020 12:37:05 +0000 (13:37 +0100)]
Revert "[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings."
This reverts commit
15acdd75439b402e993ebe0dbf8eb02e9b88bbdc.
Georgii Rymar [Mon, 7 Sep 2020 12:30:38 +0000 (15:30 +0300)]
[llvm-readobj/elf] - Generalize the code for printing dynamic relocations. NFCI.
Currently we have 2 large `printDynamicRelocations` methods that
have a very similar code for GNU/LLVM styles.
This patch removes the duplication and renames them to `printDynamicReloc`
for consistency.
Differential revision: https://reviews.llvm.org/D87087
Simon Pilgrim [Mon, 7 Sep 2020 12:20:34 +0000 (13:20 +0100)]
MachineStableHash.h - remove MachineInstr.h include. NFC.
Use forward declarations and move the include to MachineStableHash.cpp
Simon Pilgrim [Mon, 7 Sep 2020 12:19:00 +0000 (13:19 +0100)]
[X86] Replace EmitX86AddSubSatExpr with EmitX86BinaryIntrinsic generic helper. NFCI.
Feed the Intrinsic::ID value directly instead of via the IsSigned/IsAddition bool flags.
Simon Wallis [Mon, 7 Sep 2020 12:21:27 +0000 (13:21 +0100)]
[SelectionDAG] memcpy expansion of const volatile struct ignores const zero
In getMemcpyLoadsAndStores(), a memcpy where the source is a zero constant is expanded to a MemOp::Set instead of a MemOp::Copy, even when the memcpy is volatile.
This is incorrect.
The fix is to add a check for volatile, and expand to MemOp::Copy in the volatile case.
Reviewed By: chill
Differential Revision: https://reviews.llvm.org/D87134
Sanjay Patel [Mon, 7 Sep 2020 11:03:48 +0000 (07:03 -0400)]
[InstCombine] add test with more unreachable insts; NFC
Goes with D87149
Sanjay Patel [Mon, 7 Sep 2020 10:53:40 +0000 (06:53 -0400)]
[InstCombine] give a name to an intermediate value for easier tracking; NFC
As noted in PR47430, we probably want to conditionally include 'nsw'
here anyway, so we are going to need to fill out the optional args.
Nicolas Vasilache [Mon, 7 Sep 2020 10:05:57 +0000 (06:05 -0400)]
[MLIR] Fix Win test due to partial order of CHECK directives
Differential Revision: https://reviews.llvm.org/D87230
Frederik Gossen [Mon, 7 Sep 2020 12:09:43 +0000 (12:09 +0000)]
[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings.
Merge the two lowering passes because they are not useful by themselves. The new
pass lowers to `std` and `scf` is considered an auxiliary dialect.
See also
https://llvm.discourse.group/t/conversions-with-multiple-target-dialects/1541/12
Differential Revision: https://reviews.llvm.org/D86779
Simon Pilgrim [Mon, 7 Sep 2020 12:10:55 +0000 (13:10 +0100)]
LegalizeTypes.h - remove orphan SplitVSETCC declaration. NFCI.
The implementation no longer exists
Georgii Rymar [Fri, 4 Sep 2020 12:25:36 +0000 (15:25 +0300)]
[llvm-readobj/elf] - Introduce Relocation<ELFT> helper.
It removes templating for Elf_Rel[a] handling that we
introduced earlier and introduces a helper class instead.
It was briefly discussed in D87087, which showed,
why having templates is probably not ideal for the generalization
of dumpers code.
Differential revision: https://reviews.llvm.org/D87141
Simon Pilgrim [Mon, 7 Sep 2020 11:56:27 +0000 (12:56 +0100)]
X86AvoidStoreForwardingBlocks.cpp - use unsigned for Opcode values. NFCI.
Fixes clang-tidy cppcoreguidelines-narrowing-conversions warnings.
Simon Pilgrim [Mon, 7 Sep 2020 11:50:32 +0000 (12:50 +0100)]
[X86][AVX] Use lowerShuffleWithPERMV in shuffle combining to support non-VLX targets
lowerShuffleWithPERMV allows us to use the ZMM variants for 128/256-bit variable shuffles on non-VLX AVX512 targets.
This is another step towards shuffle combining through between vector widths - we still end up with an annoying regression (combine_vpermilvar_vperm2f128_zero_8f32) but we're going in the right direction....
Xing GUO [Mon, 7 Sep 2020 11:44:46 +0000 (19:44 +0800)]
[obj2yaml] Add support for dumping the .debug_str section.
This patch adds support for dumping the .debug_str section to obj2yaml.
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D86867
Frederik Gossen [Mon, 7 Sep 2020 11:41:27 +0000 (11:41 +0000)]
[MLIR][Standard] Add `dynamic_tensor_from_elements` operation
With `dynamic_tensor_from_elements` tensor values of dynamic size can be
created. The body of the operation essentially maps the index space to tensor
elements.
Declare SCF operations in the `scf` namespace to avoid name clash with the new
`std.yield` operation. Resolve ambiguities between `linalg/shape/std/scf.yield`
operations.
Differential Revision: https://reviews.llvm.org/D86276
Sam Parker [Mon, 7 Sep 2020 10:54:05 +0000 (11:54 +0100)]
[SCEV] Refactor isHighCostExpansionHelper
To enable the cost of constants, the helper function has been
reorganised:
- A struct has been introduced to hold SCEV operand information so
that we know the user of the operand, as well as the operand index.
The Worklist now uses instead instead of a bare SCEV.
- The costing of each SCEV, and collection of its operands, is now
performed in a helper function.
Differential Revision: https://reviews.llvm.org/D86050
LLVM GN Syncbot [Mon, 7 Sep 2020 10:32:22 +0000 (10:32 +0000)]
[gn build] Port
0478720157f
Raphael Isemann [Mon, 7 Sep 2020 09:23:39 +0000 (11:23 +0200)]
[clang] Prevent that Decl::dump on a CXXRecordDecl deserialises further declarations.
Decl::dump is primarily used for debugging to visualise the current state of a
declaration. Usually Decl::dump just displays the current state of the Decl and
doesn't actually change any of its state, however since commit
457226e02a6e8533eaaa864a3fd7c8eeccd2bf58 the method actually started loading
additional declarations from the ExternalASTSource. This causes that calling
Decl::dump during a debugging session now actually does permanent changes to the
AST and will cause the debugged program run to deviate from the original run.
The change that caused this behaviour is the addition of
`hasConstexprDestructor` (which is called from the TextNodeDumper) which
performs a lookup into the current CXXRecordDecl to find the destructor. All
other similar methods just return their respective bit in the DefinitionData
(which obviously doesn't have such side effects).
This just changes the node printer to emit "unknown_constexpr" in case a
CXXRecordDecl is dumped that could potentially call into the ExternalASTSource
instead of the usually empty string/"constexpr". For CXXRecordDecls that can
safely be dumped the old behaviour is preserved
Reviewed By: bruno
Differential Revision: https://reviews.llvm.org/D80878