Simon Glass [Wed, 7 Sep 2022 02:27:15 +0000 (20:27 -0600)]
dm: core: Avoid creating a name property when unflattening
The current implementation creates a 'name' value for every node. This
is not needed for the latest device tree format, which includes a name in
the node header.
Adjust the code to point the name at the node header instead.
Also simplify ofnode_get_name(), now that we can rely on it to set the
name correctly. Update the comment to make it clear what name the root
node has.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:14 +0000 (20:27 -0600)]
dm: core: Rename ofnode_get_property_by_prop()
The current name is quite unwieldy. Change it to use an ofprop_ prefix
and shorten it. Fix the return-value comment while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:13 +0000 (20:27 -0600)]
dm: core: Rename ofnode_get_first/next_property()
Drop the 'get' in these names since it does not fit with the rest of
the API.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:12 +0000 (20:27 -0600)]
dm: core: Reduce code size with dev_of_offset()
Update the function to mark it with the const attribute. Also avoid
calling it multiple times in the devfdt_get_addr_index() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:11 +0000 (20:27 -0600)]
sandbox: test: Provide an easy way to use the other FDT
Add a test flag which indicates that the 'other' FDT should be set up
ready for use. Handle this by copying in the FDT, unflattening it for
livetree tests. Free the structures when the tests have run.
We cannot use the other FDT unless we are using live tree or
OFNODE_MULTI_TREE is enabled, since only one tree is supported by the
ofnode interface in that case. Add this condition into
ut_run_test_live_flat() and update the comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:10 +0000 (20:27 -0600)]
sandbox: Support setting up the other FDT for testing
Provide a way to copy over the 'other' FDT when running tests. This loads
it and allocates memory for the copy, if not done already, then does the
copy.
Avoid using U-Boot's malloc() pool for these copies, at least for now,
since they are part of the test system.
Tidy up the cpu.c header files while here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:09 +0000 (20:27 -0600)]
sandbox: Support loading the other FDT
We need an 'other' FDT which is different from the control FDT, so we can
check that the ofnode tests correctly handle them both.
Add this to the build along with a way to read it into the sandbox state.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:08 +0000 (20:27 -0600)]
sandbox: Add a function to load a relative file path
At present this implementation is specific to loading the test FDT. We
plan to load others, so create a generic function to handle this.
The path is now limited to 256 characters, to simplify the code.
When there is an empty argv[0] (which should not happen), the function now
just uses the path as is, with no prefix.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:07 +0000 (20:27 -0600)]
test: Drop the UT_TESTF_LIVE_OR_FLAT flag
This was a workaround for a rare situation. Now that it will be more
common and we have a proper fix, drop the flag. We can run both types of
tests in the same sandbox executable, even if the flat device tree is
modified.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:06 +0000 (20:27 -0600)]
test: Detect a change in the device tree
If the device tree changes during a test and we cannot restore it, mark
it as such so that future tests which need the live tree are skipped.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:05 +0000 (20:27 -0600)]
test: Make a copy of the device tree before running a test
When the flat device tree changes it can mess up the live tree since that
uses the flat tree for its strings. This affects only a few sandbox tests
which modify the device tree, but the number will grow as ofnode support
for writing improves.
While the control FDT is not intended to change while U-Boot is running,
some tests do so. For example, the ofnode interface only supports
modifying properties in the control FDT, so tests must use that.
To solve this problem, keep a copy of the FDT and restore it as needed
when the test is finished. The copy only happens on sandbox (except SPL
builds), to reduce memory usage and because these tests are not useful on
other boards. For other boards, a checksum is taken to ensure that nothing
changes.
It would be possible to always checksum the FDT on sandbox and only
restore it if needed, but this is slightly slower than restoring it every
time, at least with crc8.
Move the code which checks for success to the very end, for clarity.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:04 +0000 (20:27 -0600)]
dm: core: Drop the const from ofnode
Now that we support writing to ofnodes, the const is not accurate. Drop
it to avoid undesirable casting.
Also drop the ofnode_to_npw() which is now the same as ofnode_to_np().
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:03 +0000 (20:27 -0600)]
dm: core: Support writing a property to an empty node
At present this does not work with livetree. Fix it and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:02 +0000 (20:27 -0600)]
dm: core: Allow adding ofnode subnodes
Add this feature to the ofnode interface, supporting both livetree and
flattree. If the node exists it is returned, along with a -EEXIST error.
Update the functions it calls to handle this too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:01 +0000 (20:27 -0600)]
dm: core: Document the livetree structures properly
Clarify the data structure so it is easier for people to understand,
particularly the corner cases.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:27:00 +0000 (20:27 -0600)]
test: Support testing malloc() failures
It is helpful to test that out-of-memory checks work correctly in code
that calls malloc().
Add a simple way to force failure after a given number of malloc() calls.
Fix a header guard to avoid a build error on sandbox_vpl.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Simon Glass [Wed, 7 Sep 2022 02:26:59 +0000 (20:26 -0600)]
test: Fix missing livetree test runs
At present the live tree tests are not run on sandbox. This bug is in two
parts, with a duplicate flag value and incorrect logic in the test runner.
This was not noticed because the bug was fixed in a later commit and does
not cause test failures.
Fix this.
Fixes:
7b1dfc9fd7e ("dm: core: Prepare for updating the device tree with ofnode")
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:26:58 +0000 (20:26 -0600)]
event: Pass the images to EVT_FT_FIXUP
Pass the boot images along as well, in case the fixups need to look at
them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:26:57 +0000 (20:26 -0600)]
dm: core: Pass a root node to of_find_node_by_phandle()
This function currently assumes that the control FDT is used. Update it
to allow a root node to be passed, so it can work with any tree.
Also add a comment to ofnode_get_by_phandle() so that its purpose is
clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:26:56 +0000 (20:26 -0600)]
event: Allow multiple spy declarations for each event
At present only one spy is allowed per event. Update the naming to allow
more than one, since some need this flexibility, e.g. the EVT_FT_FIXUP
event.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:26:55 +0000 (20:26 -0600)]
event: Fix a typo in the EVENT help
Fix the help message.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:26:54 +0000 (20:26 -0600)]
sandbox: power: Update PMIC driver to use log
Use the log functions instead of pr_...() so we can avoid using __func__.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Simon Glass [Wed, 7 Sep 2022 02:26:53 +0000 (20:26 -0600)]
log: update the comment for log_msg_ret()
Add some advice on string size here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:26:52 +0000 (20:26 -0600)]
treewide: Drop image_header_t typedef
This is not needed and we should avoid typedefs. Use the struct instead
and rename it to indicate that it really is a legacy struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:26:51 +0000 (20:26 -0600)]
treewide: Drop image_info_t typedef
This is not needed and we should avoid typedefs. Use the struct instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:26:50 +0000 (20:26 -0600)]
treewide: Drop bootm_headers_t typedef
This is not needed and we should avoid typedefs. Use the struct instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 7 Sep 2022 02:26:49 +0000 (20:26 -0600)]
image: Fix BOOTM_STATE values
Tidy up the code style for these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 27 Sep 2022 12:53:51 +0000 (08:53 -0400)]
Merge tag 'u-boot-stm32-
20220927' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
- Increase SYS_MALLOC_F_LEN for STM32 MCU's board
- SPL fixes for STM32F7 MCUs
- Device tree alignement with kernelv6.0-rc4 for MCU's board
- Device tree alignement with kernelv6.0-rc3 for MPU's board
- Update DDR node for STM32MP15
- Cleanup config file for STM32MP1
- Update for cmd_stm32key command
- Fix compatible string to add partitions for STM32MP1
- Update for stm32programmer tool
Patrice Chotard [Mon, 26 Sep 2022 15:59:36 +0000 (17:59 +0200)]
configs: increase SYS_MALLOC_F_LEN for STM32 MCU's board
Some STM32 MCU's board need their SYS_MALLOC_F_LEN value enlarged
to avoid the "alloc space exhausted" error message during their boot
process.
Use the default SYS_MALLOC_F_LEN value which is set to 0x2000 in
Kconfig.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tom Rini [Mon, 26 Sep 2022 15:28:14 +0000 (11:28 -0400)]
Merge tag 'xilinx-for-v2023.01-rc1-v2' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2023.01-rc1 (round 2)
xilinx:
- Add support for new Versal NET SOC
zynqmp:
- Use mdio bus for ethernet phy description
- Wire ethernet phy reset via i2c-gpio
versal:
- Config cleanup
Tom Rini [Mon, 26 Sep 2022 15:27:30 +0000 (11:27 -0400)]
Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv into next
Patrice Chotard [Tue, 20 Sep 2022 16:04:36 +0000 (18:04 +0200)]
configs: stm32f746-disco: Remove CONFIG_SYS_UBOOT_START flag
By pressing "c" key during SPL execution, we force U-boot execution
instead of a kernel XIP image.
This fixes a hard fault when booting stm32f746-disco in SPL with "c"
key pressed during SPL execution.
U-Boot SPL 2022.10-rc5-00009-g40d02baa91 (Sep 20 2022 - 17:21:21 +0200)
Trying to boot from XIP
Hard fault
pc :
080083fc lr :
08000d1b xPSR :
21000000
r12 :
2004f108 r3 :
080083fd r2 :
00000028
r1 :
2004f0c8 r0 :
2004f0e4
Resetting CPU ...
This is due to SYS_UBOOT_START flag set to 0x080083FD which is not correct.
If unset, SYS_UBOOT_START is set by default to CONFIG_SYS_TEXT_BASE
which match with our requirement.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
Patrice Chotard [Tue, 20 Sep 2022 16:04:35 +0000 (18:04 +0200)]
configs: stm32f769-disco: Fix internal flash size
arch-stm32f7/stm32.h file is shared between STM32F746 and STM32F769
MCUs. But STM32F769 embeds 2MB of internal flash instead of 1MB for
STM32F746. The flash layout is quite similar between the 2 SoCs :
STM32F746 STM32F769
4 * 32KB sectors 4 * 32KB sectors
1 * 128KB sector 1 * 128KB sector
3 * 256KB sectors 7 * 256KB sectors
Update sect_sz_kb[] structure and SYS_MAX_FLASH_SECT accordingly.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
Patrice Chotard [Tue, 20 Sep 2022 16:04:34 +0000 (18:04 +0200)]
configs: stm32746g-eval: Fix CONFIG_SYS_SPL_ARGS_ADDR
STM32F746 embeds 1 MB of internal flash [0x08000000-0x080fffff],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
Patrice Chotard [Tue, 20 Sep 2022 16:04:33 +0000 (18:04 +0200)]
configs: stm32f746-disco: Fix CONFIG_SYS_SPL_ARGS_ADDR
STM32F746 embeds 1 MB of internal flash [0x08000000-0x080fffff],
fix CONFIG_SYS_SPL_ARGS_ADDR accordingly
It solves hard fault when jumping from SPL to U-Boot.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
Patrice Chotard [Tue, 20 Sep 2022 16:04:32 +0000 (18:04 +0200)]
configs: stm32746g-eval: Fix SPL boot
Commit '
b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes '
b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
Patrice Chotard [Tue, 20 Sep 2022 16:04:31 +0000 (18:04 +0200)]
configs: stm32f769-disco: Fix SPL boot
Commit '
b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes '
b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
Patrice Chotard [Tue, 20 Sep 2022 16:04:30 +0000 (18:04 +0200)]
configs: stm32f746-disco: Fix SPL boot
Commit '
b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR.
As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it
increases SPL size over the initial 0x8000 limit.
Increase the SPL size to 0x9000 to fix SPL boot.
Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future.
Fixes '
b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")'
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Waldemar Brodkorb <wbx@openadk.org>
Patrice Chotard [Fri, 23 Sep 2022 11:20:33 +0000 (13:20 +0200)]
ARM: dts: stm32: DT sync with kernel v6.0-rc4 for MCU's boards
Device tree alignment with kernel v6.0-rc4.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Michal Simek [Mon, 19 Sep 2022 12:21:10 +0000 (14:21 +0200)]
arm64: versal-net: Add support for mini configuration
Versal NET mini configuration is designed for running memory test. Current
output is on DCC but changing serial0 alias to pl011 will move console to
serial port.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/aec3f41a4cc48c45b8f07dd6e423d5838dbcc9d7.1663589964.git.michal.simek@amd.com
Michal Simek [Mon, 19 Sep 2022 12:21:09 +0000 (14:21 +0200)]
arm64: versal-net: Add defconfig for Versal NET
Use one defconfig for supporting multiple different platforms. DTB
reselection is enabled to choose DT based on SOC detection.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/82cc7c1ca8850270cc2ebc992d835a37aa3d236f.1663589964.git.michal.simek@amd.com
Jay Buddhabhatti [Mon, 19 Sep 2022 12:21:08 +0000 (14:21 +0200)]
reset: zynqmp: Enable reset driver for Versal NET
Enable zynqmp reset driver for Versal NET.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c8c26618f87d8451c6ffa9487809a24718bff6a7.1663589964.git.michal.simek@amd.com
Jay Buddhabhatti [Mon, 19 Sep 2022 12:21:07 +0000 (14:21 +0200)]
mailbox: zynqmp: Enable ipi mailbox driver for Versal NET
Enable mailbox configs for Versal NET.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b3a9a6a58b74d17e2ec5f60617fa42062fbab951.1663589964.git.michal.simek@amd.com
Jay Buddhabhatti [Mon, 19 Sep 2022 12:21:06 +0000 (14:21 +0200)]
firmware: zynqmp: Add Versal NET compatible string
Add compatible string for Versal NET.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ec73f786e1c89094752ff3693f6f0fb4536c85c5.1663589964.git.michal.simek@amd.com
Jay Buddhabhatti [Mon, 19 Sep 2022 12:21:05 +0000 (14:21 +0200)]
clk: versal: Enable clock driver for Versal NET
Add support for Versal NET compatible string in clock driver.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20a35d0c1ffcc222fbe93dd406cdd0aff92f5223.1663589964.git.michal.simek@amd.com
Michal Simek [Mon, 19 Sep 2022 12:21:04 +0000 (14:21 +0200)]
spi: zynqmp_gqspi: Add support for Versal NET
Add support for Versal NET platform.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f374e9a81f2d85de1240029f3ba5f6423cfa0680.1663589964.git.michal.simek@amd.com
Michal Simek [Mon, 19 Sep 2022 12:21:03 +0000 (14:21 +0200)]
spi: cadence_qspi: Add support for Versal NET platform
Trivial changes to support cadence ospi driver for Versal NET platform.
Also avoid ospi flash reset for now.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0789141f432189aab69bc496fe33e0218d1d7510.1663589964.git.michal.simek@amd.com
Michal Simek [Mon, 19 Sep 2022 12:21:02 +0000 (14:21 +0200)]
arm64: versal-net: Add support for Versal NET platform
Versal NET platform is based on Versal chip which is reusing a lot of IPs.
For more information about new IPs please take a look at DT which describe
currently supported devices.
The patch is adding architecture and board support with soc detection
algorithm. Generic setting should be very similar to Versal but it will
likely diverge in longer run.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/320206853dc370ce290a4e7b6d0bb26b05206021.1663589964.git.michal.simek@amd.com
Rick Chen [Wed, 21 Sep 2022 06:34:55 +0000 (14:34 +0800)]
riscv: ae350: Disable AVAILABLE_HARTS
Disable AVAILABLE_HARTS mechanism to make sure that all harts
can boot to Kernel shell successfully.
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Rick Chen [Wed, 21 Sep 2022 06:34:54 +0000 (14:34 +0800)]
riscv: Introduce AVAILABLE_HARTS
In SMP all harts will register themself in available_hart
during start up. Then main hart will send IPI to other harts
according to this variables. But this mechanism may not
guarantee that all other harts can jump to next stage.
When main hart is sending IPI to other hart according to
available_harts, but other harts maybe still not finish the
registration. Then the SMP booting will miss some harts finally.
So let it become an option and it will be enabled by default.
Please refer to the discussion:
https://www.mail-archive.com/u-boot@lists.denx.de/msg449997.html
Signed-off-by: Rick Chen <rick@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Nikita Shubin [Fri, 2 Sep 2022 08:47:39 +0000 (11:47 +0300)]
spl: introduce SPL_XIP to config
U-Boot and SPL don't necessary share the same location, so we might end
with U-Boot SPL in read-only memory (XIP) and U-Boot in read-write memory.
In case of non XIP boot mode, we rely on such variables as "hart_lottery"
and "available_harts_lock" which we use as atomics.
The problem is that CONFIG_XIP also propagate to main U-Boot, not only SPL,
so we need CONFIG_SPL_XIP to distinguish SPL XIP from other XIP modes.
This adds an option special for SPL to behave it in XIP manner and we don't
use hart_lottery and available_harts_lock, during start proccess.
Signed-off-by: Nikita Shubin <n.shubin@yadro.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tom Rini [Sun, 25 Sep 2022 21:20:11 +0000 (17:20 -0400)]
Merge tag 'dm-next-25sep22' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next
sandbox SCSI conversion to driver model
final patch for blk improvements
Simon Glass [Wed, 21 Sep 2022 14:21:47 +0000 (16:21 +0200)]
sandbox: Add a test for SCSI
Add a simple uclass test for SCSI. It reads the partition table from a
disk image and checks that it looks correct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:46 +0000 (16:21 +0200)]
sandbox: Convert to use driver model for SCSI
At present sandbox is producing a warning about SCSI migration. Drop the
legacy code and replace it with a new implementation.
Also drop the SATA command, which does not work with driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:45 +0000 (16:21 +0200)]
sandbox: scsi: Move request-handling code to scsi_emul
Move this code into the emulator file so it can be used by multiple
drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:44 +0000 (16:21 +0200)]
sandbox: Enable SCSI for all builds
This will be needed to run unit tests, once the SCSI code is used for USB
as well. Enable it for all sandbox builds.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:43 +0000 (16:21 +0200)]
sandbox: scsi: Move structs to header file
Move these to the SCSI header file so we can access them from multiple
emulators.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:42 +0000 (16:21 +0200)]
sandbox: scsi: Remove setup calls from handle_read()
Move the device-specific code out into the top-level function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:41 +0000 (16:21 +0200)]
sandbox: scsi: Move reply setup out of helper
Move this code out of the helper function so we can (later) add it as part
of the shared emulation code. Set a default value of 0 for buff_used since
that is what we use when there is an error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:40 +0000 (16:21 +0200)]
sandbox: scsi: Move file size into shared struct
Move this information into struct scsi_emul_info so we can use it in
common code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:39 +0000 (16:21 +0200)]
sandbox: scsi: Move block size into shared struct
Move this information into struct scsi_emul_info so we can use it in
common code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:38 +0000 (16:21 +0200)]
scsi: Move vendor/product info into the shared struct
Move this information into struct scsi_emul_info so we can use it in
common code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:37 +0000 (16:21 +0200)]
sandbox: Move buffer to scsi_emul_info
Move the buffer into this struct so it can be shared between different
implementations.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:36 +0000 (16:21 +0200)]
scsi: Move core emulation state into a new struct
In preparation for sharing the emulation code between two drivers, move
some of the fields into a new struct. Use a separate header file so it
can be used by various drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:35 +0000 (16:21 +0200)]
scsi: Move cmd_phase enum to the header
This can be used by common files, so move it to the SCSI header and rename
it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:34 +0000 (16:21 +0200)]
sandbox: usb: Rename transfer_len in protocol struct
This has the same name as a field in our local private struct, which is
confusing. Change the name to xfer_len instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 21 Sep 2022 14:21:33 +0000 (16:21 +0200)]
scsi: Tidy up comments for struct scsi_cmd
These comments are bit of a mess. Tidy them up to match the correct coding
style.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 17 Sep 2022 15:00:09 +0000 (09:00 -0600)]
blk: Rename if_type to uclass_id
Use the word 'uclass' instead of 'if_type' to complete the conversion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Fri, 2 Sep 2022 00:32:25 +0000 (02:32 +0200)]
sandbox: unblock signal before calling execv()
The following faulty behavior was observed. The sandbox configured with
CONFIG_SANDBOX_CRASH_RESET=y was invoked with
./u-boot -T -S
After executing `exception undefined' the sandbox reboots.
When executing `exception undefined' the sandbox exits with SIGSEGV.
The expected behavior is that the sandbox should reboot again.
If we are relaunching the sandbox in a signal handler, we have to unblock
the respective signal before calling execv(). See signal(7) man-page.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sat, 24 Sep 2022 17:58:49 +0000 (13:58 -0400)]
Merge branch '2022-09-24-add-console-flush' into next
To quote the author:
On certain places it is required to flush output print buffers to ensure
that text strings were sent to console or serial devices. For example when
printing message that U-Boot is going to boot kernel or when U-Boot is
going to change baudrate of terminal device.
Some console devices, like UART, have putc/puts functions which just put
characters into HW transmit queue and do not wait until all data are
transmitted. Doing some sensitive operations (like changing baudrate or
starting kernel which resets UART HW) cause that U-Boot messages are lost.
Therefore introduce a new flush() function, implement it for all serial
devices via pending(false) callback and use this new flush() function on
sensitive places after which output device may go into reset state.
This change fixes printing of U-Boot messages:
"## Starting application at ..."
"## Switch baudrate to ..."
In addition, take a patch from Heinrich to rename some EFI test
functions in order to not conflict with this series.
Pali Rohár [Mon, 5 Sep 2022 09:31:21 +0000 (11:31 +0200)]
boot: Call flush() before booting
In a lot of cases kernel resets UART HW. To ensure that U-Boot messages
printed before booting the kernel are not lost, call new U-Boot console
flush() function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Mon, 5 Sep 2022 09:31:20 +0000 (11:31 +0200)]
serial: Call flush() before changing baudrate
Changing baudrate is a sensitive operation. To ensure that U-Boot messages
printed before changing baudrate are not lost, call new U-Boot console
flush() function.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Mon, 5 Sep 2022 09:31:19 +0000 (11:31 +0200)]
serial: Implement serial_flush() function for console flush() fallback
Like in all other console functions, implement also serial_flush() function
as a fallback int console flush() function.
Flush support is available only when config option CONSOLE_FLUSH_SUPPORT is
enabled. So when it is disabled then provides just empty static inline
function serial_flush().
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Mon, 5 Sep 2022 09:31:18 +0000 (11:31 +0200)]
serial: Implement flush callback
UART drivers have putc/puts functions which just put characters into HW
transmit queue and do not wait until all data are transmitted.
Implement flush callback via serial driver's pending(false) callback which
waits until HW transmit all characters from the queue.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Mon, 5 Sep 2022 09:31:17 +0000 (11:31 +0200)]
console: Implement flush() function
On certain places it is required to flush output print buffers to ensure
that text strings were sent to console or serial devices. For example when
printing message that U-Boot is going to boot kernel or when U-Boot is
going to change baudrate of terminal device.
Therefore introduce a new flush() and fflush() functions into console code.
These functions will call .flush callback of associated stdio_dev device.
As this function may increase U-Boot side, allow to compile U-Boot without
this function. For this purpose there is a new config CONSOLE_FLUSH_SUPPORT
which is enabled by default and can be disabled. It is a good idea to have
this option enabled for all boards which have enough space for it.
When option is disabled when U-Boot defines just empty static inline
function fflush() to avoid ifdefs in other code.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Mon, 5 Sep 2022 09:31:16 +0000 (11:31 +0200)]
sandbox: Add function os_flush()
It flushes stdout.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Thu, 22 Sep 2022 13:26:43 +0000 (15:26 +0200)]
efi_selftest: prefix test functions with efi_st_
An upcoming patch set creates a global function flush(). To make debugging
easier we should not use the same name for a static function.
Rename static functions in the LoadImage() unit test adding an efi_st_
prefix.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tom Rini [Fri, 23 Sep 2022 22:42:53 +0000 (18:42 -0400)]
Merge branch '2022-09-23-4gb-ddr-in-32bit-ppc' into next
To quote the author, for the first 9 patches:
This patch series fixes U-Boot code to correctly handle RAM size larger
than 2 GB and then fixes fsl ddr driver to do not crash U-Boot when 4 GB
DDR module is detected when U-Boot operates in 32-bit mode (as opposite
of the 36-bit mode).
With this patch series it is possible to boot 32-bit U-Boot with 4 GB
SODIMM DDR3 module without crashes. U-Boot will still use just
CONFIG_MAX_MEM_MAPPED amount of RAM, but it is better than crashing due
to the truncating of 4GB value to 32-bit number (which is zero).
I tested this patch series on powerpc P2020 based board but only with
U-Boot v2022.04 because U-Boot master branch is still broken on P2020.
And then the final two patches here are (in my mind at least) related
clean-ups.
Pali Rohár [Sun, 18 Sep 2022 11:23:27 +0000 (13:23 +0200)]
board_f: show_dram_config: Print also real DRAM size
32-bit U-Boot builds cannot use more than around 2 GB of DDR memory. But on
some platforms/boards it is possible to connect also 4 GB SODIMM DDR memory.
U-Boot currently prints only effective size of RAM which can use, which may
be misleading as somebody would expect that this line prints total size of
connected DDR modules. So change show_dram_config code to prints both real
and effective DRAM size if they are different. If they are same then print
just one number like before. It is possible that effective size is just few
bytes smaller than the real size, so print both numbers only in case
function print_size() prints formats them differently.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Mon, 12 Sep 2022 19:02:27 +0000 (21:02 +0200)]
display_options: print_size: Fix order overflow
Function print_size() round size to the nearst value with one decimal
fraction number. But in special cases also unit order may overflow.
For example value
1073689396 is printed as "1024 MiB" and value
1073741824
as "1 GiB".
Fix this issue by detecting order overflow and increasing unit order.
With this change also value
1073689396 is printed as "1 GiB".
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Sun, 11 Sep 2022 09:29:16 +0000 (11:29 +0200)]
powerpc/mpc85xx: Fix re-align of unmapped DDR memory message for non-SPL builds
During init_dram() is called also setup_ddr_tlbs_phys() function which may
print message about unmapped DDR memory. So in this case print also
re-aligning filler after unmapped DDR memory message.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:46 +0000 (17:32 +0200)]
powerpc/mpc85xx: Explain TLB unmapped memory message
Currently U-Boot SPL prints just generic message "2 GiB left unmapped".
Change it to more detailed "2 GiB of DDR memory left unmapped in U-Boot".
This is just U-Boot configuration and operating system may map more (or
also less) memory.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:45 +0000 (17:32 +0200)]
ddr: fsl: Fix re-align of verbose DRAM information for non-SPL builds
During init_dram() is called also compute_lowest_common_dimm_parameters()
function which prints multi-line detailed output. So print also re-aligning
filler after "Detected ?DIMM" line to have "DRAM: " output aligned.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:44 +0000 (17:32 +0200)]
ddr: fsl: Allow to detect 4 GB DDR modules in 32-bit mode
U-Boot core code already handles the case when RAM size is bigger than
CONFIG_MAX_MEM_MAPPED. So there is no need to do duplicate check in fsl ddr
driver for CONFIG_MAX_MEM_MAPPED. Instead simplify code to just check if
RAM size can be representable in phys_size_t type. And avoid printing
warning if phys_size_t is just 1 byte smaller than RAM size, which is the
typical situation with 4 GB DDR module.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:43 +0000 (17:32 +0200)]
ddr: fsl: Fix fsl_ddr_sdram_size() for 4GB modules with 32-bit phys_size_t
Function fsl_ddr_compute() always return size in unsigned long long type,
but function fsl_ddr_sdram_size() returns size in phys_size_t type.
When 36-bit addressing mode is not enabled then phys_size_t type is only
32-bit and thus it cannot store value 4GB (0x100000000). Function
fsl_ddr_sdram_size() in this case returns truncated value 0x0.
Fix this issue by returning the highest representable value, which is
0xffffffff (4GB - 1 byte).
This change fixes crashing of proper U-Boot because it detected 4 GB module
as RAM with zero size.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:42 +0000 (17:32 +0200)]
ddr: fsl: Fix checking for maximal mappable memory
Check needs to be done against CONFIG_MAX_MEM_MAPPED macro and not fixed
size 4GB (as CONFIG_MAX_MEM_MAPPED can be lower and for example for e500
cores it is just 2GB). Also fix printf re-align, which should be applied
only for non-SPL builds, during init_dram() call.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:41 +0000 (17:32 +0200)]
board_f: Fix printing gd->ram_size and gd->ram_top
Members gd->ram_size and gd->ram_top are of type phys_addr_t which does not
have to fit into ulong type. So cast them into unsigned long long.
Fixes:
37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:40 +0000 (17:32 +0200)]
board_f: Fix types for board_get_usable_ram_top()
Commit
37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
changed type of ram_top member from ulong to phys_addr_t but did not
changed types in board_get_usable_ram_top() function which returns value
for ram_top.
So change ulong to phys_addr_t type also in board_get_usable_ram_top()
signature and implementations.
Fixes:
37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:39 +0000 (17:32 +0200)]
common/memsize.c: Fix get_effective_memsize() to check for overflow
Ensure that top of RAM can be represented by phys_size_t type. If RAM is
too large or RAM base address is too upper then limit RAM size to prevent
address space overflow.
Signed-off-by: Pali Rohár <pali@kernel.org>
Pali Rohár [Fri, 9 Sep 2022 15:32:38 +0000 (17:32 +0200)]
common/memsize.c: Fix get_effective_memsize() to always check for CONFIG_MAX_MEM_MAPPED
CONFIG_MAX_MEM_MAPPED when defined specifies upper memory mapped limit.
So check for it always, and not only when CONFIG_VERY_BIG_RAM is defined.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tom Rini [Fri, 23 Sep 2022 19:09:44 +0000 (15:09 -0400)]
Merge branch '2022-09-23-add-mediatek-mt7986-support' into next
To quote the author:
This patch series add support for MediaTek MT7981/MT7986 SoCs with their
reference boards and related drivers.
This patch series add basic boot support on eMMC/SD/SPI-NOR/SPI-NAND for
these boards. The clock, pinctrl drivers and the SoC initializaton code
are also included.
Product spec for MT7986:
https://www.mediatek.com/products/home-networking/mediatek-filogic-830
Weijie Gao [Fri, 9 Sep 2022 12:00:27 +0000 (20:00 +0800)]
MAINTAINERS: update maintainer for MediaTek ARM platform
Add new files for MediaTek ARM platform
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:25 +0000 (20:00 +0800)]
tools: mtk_image: add support for nand headers used by newer chips
This patch adds more nand headers in two new types:
1. HSM header, used for spi-nand thru SNFI interface
2. SPIM header, used for spi-nand thru spi-mem interface
The original nand header is renamed to AP header.
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:21 +0000 (20:00 +0800)]
tools: mtk_image: split the code of generating NAND header into a new file
The predefined NAND headers take too much spaces in the mtk_image.c.
Moving them into a new file can significantly improve the readability of
both mtk_image.c and the new mtk_nand_headers.c.
This is a preparation for adding more NAND headers.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:18 +0000 (20:00 +0800)]
tools: mtk_image: split gfh header verification into a new function
The verification code of gfh header for NAND and non-NAND are identical.
It's better to define a individual function to reduce redundancy.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:16 +0000 (20:00 +0800)]
cpu: add basic cpu driver for MediaTek ARM chips
Add basic CPU driver used to retrieve CPU model information.
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Weijie Gao [Fri, 9 Sep 2022 12:00:12 +0000 (20:00 +0800)]
clk: mediatek: add clock driver support for MediaTek MT7981 SoC
This patch adds clock driver support for MediaTek MT7981 SoC
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:09 +0000 (20:00 +0800)]
clk: mediatek: add clock driver support for MediaTek MT7986 SoC
This patch adds clock driver support for MediaTek MT7986 SoC
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:07 +0000 (20:00 +0800)]
clk: mediatek: add CLK_XTAL support for clock driver
This adds the CLK_XTAL macro/flag to allow modeling clocks which are
directly connected to the xtal clock.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Fri, 9 Sep 2022 12:00:04 +0000 (20:00 +0800)]
clk: mediatek: add infrasys clock mux support
This patch adds infrasys clock mux support for mediatek clock drivers.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>