Alexander Richardson [Mon, 20 Nov 2017 15:37:19 +0000 (15:37 +0000)]
[ELF][MIPS] Fix crash in LLD when linking code that needs PIC thunks
Summary:
The bug triggers when the following conditions are met:
- A thunk is created in a given input section S
- A linker script is specified
- There is at least one matcher in the linker script .text section output
that does not match any of the sections in the input files, before the matcher
that matches section S.
The issue was found when linking the FreeBSD kernel for MIPS when built
with -fPIC. Patch by Alfredo Mazzinghi.
Reviewers: ruiu, psmith, atanasyan
Reviewed By: ruiu
Subscribers: peter.smith, emaste, sdardis, krytarowski, llvm-commits
Differential Revision: https://reviews.llvm.org/D40174
llvm-svn: 318653
Jonas Paulsson [Mon, 20 Nov 2017 14:54:03 +0000 (14:54 +0000)]
[SystemZ] Bugfix for handling of subregisters in getRegAllocationHints().
The 32 bit subreg indices of GR128 registers must also be checked for in
getRC32().
Review: Ulrich Weigand.
llvm-svn: 318652
Tony Jiang [Mon, 20 Nov 2017 14:38:30 +0000 (14:38 +0000)]
[PPC] Heuristic to choose between a X-Form VSX ld/st vs a X-Form FP ld/st.
The VSX versions have the advantage of a full 64-register target whereas the FP
ones have the advantage of lower latency and higher throughput. So what we’re
after is using the faster instructions in low register pressure situations and
using the larger register file in high register pressure situations.
The heuristic chooses between the following 7 pairs of instructions.
PPC::LXSSPX vs PPC::LFSX
PPC::LXSDX vs PPC::LFDX
PPC::STXSSPX vs PPC::STFSX
PPC::STXSDX vs PPC::STFDX
PPC::LXSIWAX vs PPC::LFIWAX
PPC::LXSIWZX vs PPC::LFIWZX
PPC::STXSIWX vs PPC::STFIWX
Differential Revision: https://reviews.llvm.org/D38486
llvm-svn: 318651
Sander de Smalen [Mon, 20 Nov 2017 14:36:40 +0000 (14:36 +0000)]
[AArch64][TableGen] Skip tied result operands for InstAlias
Summary:
This patch fixes an issue so that the right alias is printed when the instruction has tied operands. It checks the number of operands in the resulting instruction as opposed to the alias, and then skips over tied operands that should not be printed in the alias.
This allows to generate the preferred assembly syntax for the AArch64 'ins' instruction, which should always be displayed as 'mov' according to the ARM Architecture Reference Manual. Several unit tests have changed as a result, but only to reflect the preferred disassembly. Some other InstAlias patterns (movk/bic/orr) needed a slight adjustment to stop them becoming the default and breaking other unit tests.
Please note that the patch is mostly the same as https://reviews.llvm.org/D29219 which was reverted because of an issue found when running TableGen with the Address Sanitizer. That issue has been addressed in this iteration of the patch.
Reviewers: rengolin, stoklund, huntergr, SjoerdMeijer, rovka
Reviewed By: rengolin, SjoerdMeijer
Subscribers: fhahn, aemerson, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D40030
llvm-svn: 318650
Valery Pykhtin [Mon, 20 Nov 2017 14:35:53 +0000 (14:35 +0000)]
AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experimental)
Differential revision: https://reviews.llvm.org/D39897
llvm-svn: 318649
Peter Smith [Mon, 20 Nov 2017 13:53:55 +0000 (13:53 +0000)]
[ARM] For assembler files recognize -Xassembler or -Wa, -mthumb
Attempt to fix warning picked up by buildbot.
llvm-svn: 318648
Peter Smith [Mon, 20 Nov 2017 13:43:55 +0000 (13:43 +0000)]
[ARM] For assembler files recognize -Xassembler or -Wa, -mthumb
The Unified Arm Assembler Language is designed so that the majority of
assembler files can be assembled for both Arm and Thumb with the choice
made as a compilation option.
The way this is done in gcc is to pass -mthumb to the assembler with either
-Wa,-mthumb or -Xassembler -mthumb. This change adds support for these
options to clang. There is no assembler equivalent of -mno-thumb, -marm or
-mno-arm so we don't need to recognize these.
Ideally we would do all of the processing in
CollectArgsForIntegratedAssembler(). Unfortunately we need to change the
triple and at that point it is too late. Instead we look for the option
earlier in ComputeLLVMTriple().
Fixes PR34519
Differential Revision: https://reviews.llvm.org/D40127
llvm-svn: 318647
Kamil Rytarowski [Mon, 20 Nov 2017 12:21:11 +0000 (12:21 +0000)]
Handle NetBSD specific indirection of libpthread functions
Summary:
Correct handling of three libpthread(3) functions on NetBSD:
- pthread_mutex_lock(3),
- pthread_mutex_unlock(3),
- pthread_setcancelstate(3).
Code out of the libpthread(3) context uses the libc symbols:
- __libc_mutex_lock,
- __libc_mutex_unlock,
- __libc_thr_setcancelstate.
The threading library (libpthread(3)) defines strong aliases:
- __strong_alias(__libc_mutex_lock,pthread_mutex_lock)
- __strong_alias(__libc_mutex_unlock,pthread_mutex_unlock)
- __strong_alias(__libc_thr_setcancelstate,pthread_setcancelstate)
This caused that these functions were invisible to sanitizers on NetBSD.
Intercept the libc-specific ones and add them as NetBSD-specific aliases
for the common pthread(3) ones.
NetBSD needs to intercept both functions, as the regularly named ones
are used internally in libpthread(3).
Sponsored by <The NetBSD Foundation>
Reviewers: joerg, dvyukov, vitalybuka
Reviewed By: dvyukov
Subscribers: llvm-commits, kubamracek, #sanitizers
Tags: #sanitizers
Differential Revision: https://reviews.llvm.org/D40241
llvm-svn: 318646
Gil Rapaport [Mon, 20 Nov 2017 12:01:47 +0000 (12:01 +0000)]
[LV] Model masking in VPlan, introducing VPInstructions
This patch adds a new abstraction layer to VPlan and leverages it to model the planned
instructions that manipulate masks (AND, OR, NOT), introduced during predication.
The new VPValue and VPUser classes model how data flows into, through and out
of a VPlan, forming the vertices of a planned Def-Use graph. The new
VPInstruction class is a generic single-instruction Recipe that models a
planned instruction along with its opcode, operands and users. See
VectorizationPlan.rst for more details.
Differential Revision: https://reviews.llvm.org/D38676
llvm-svn: 318645
Ivan A. Kosarev [Mon, 20 Nov 2017 11:16:16 +0000 (11:16 +0000)]
[Driver] Add a cc1 flag for the new TBAA metadata format
This patch starts a series of changes to add support for the new
TBAA metadata format proposed in this llvm-dev thread:
http://lists.llvm.org/pipermail/llvm-dev/2017-November/118748.html
Differential Revision: https://reviews.llvm.org/D39955
llvm-svn: 318644
Diana Picus [Mon, 20 Nov 2017 11:05:31 +0000 (11:05 +0000)]
[ARM GlobalISel] Add test for RSBri. NFC
Add instruction selector test for RSBri, which is derived from
AsI1_rbin_irs, and make sure it doesn't get mistaken for SUBri, which is
derived from the very similar AsI1_bin_irs pattern.
llvm-svn: 318643
Diana Picus [Mon, 20 Nov 2017 10:35:35 +0000 (10:35 +0000)]
[ARM GlobalISel] Clean up binary operator tests. NFC
Remove some of the instruction selector tests for binary operators (and,
or, xor). These are all derived from the same kind of TableGen pattern,
AsI1_bin_irs, so there's no point in testing all of them.
llvm-svn: 318642
Mohammed Agabaria [Mon, 20 Nov 2017 08:18:12 +0000 (08:18 +0000)]
[LV][X86] Support of AVX2 Gathers code generation and update the LV with this
This patch depends on: https://reviews.llvm.org/D35348
Support of pattern selection of masked gathers of AVX2 (X86\AVX2 code gen)
Update LoopVectorize to generate gathers for AVX2 processors.
Reviewers: delena, zvi, RKSimon, craig.topper, aaboud, igorb
Reviewed By: delena, RKSimon
Differential Revision: https://reviews.llvm.org/D35772
llvm-svn: 318641
Craig Topper [Mon, 20 Nov 2017 08:15:04 +0000 (08:15 +0000)]
[X86] Regenerate a test with broadcast comments. NFC
llvm-svn: 318640
Max Kazantsev [Mon, 20 Nov 2017 06:07:57 +0000 (06:07 +0000)]
[IRCE] Smart range intersection
In rL316552, we ban intersection of unsigned latch range with signed range check and vice
versa, unless the entire range check iteration space is known positive. It was a correct
functional fix that saved us from dealing with ambiguous values, but it also appeared
to be a very restrictive limitation. In particular, in the following case:
loop:
%iv = phi i32 [ 0, %preheader ], [ %iv.next, %latch]
%iv.offset = add i32 %iv, 10
%rc = icmp slt i32 %iv.offset, %len
br i1 %rc, label %latch, label %deopt
latch:
%iv.next = add i32 %iv, 11
%cond = icmp i32 ult %iv.next, 100
br it %cond, label %loop, label %exit
Here, the unsigned iteration range is `[0, 100)`, and the safe range for range
check is `[-10, %len - 10)`. For unsigned iteration spaces, we use unsigned
min/max functions for range intersection. Given this, we wanted to avoid dealing
with `-10` because it is interpreted as a very big unsigned value. Semantically, range
check's safe range goes through unsigned border, so in fact it is two disjoint
ranges in IV's iteration space. Intersection of such ranges is not trivial, so we prohibited
this case saying that we are not allowed to intersect such ranges.
What semantics of this safe range actually means is that we can start from `-10` and go
up increasing the `%iv` by one until we reach `%len - 10` (for simplicity let's assume that
`%len - 10` is a reasonably big positive value).
In particular, this safe iteration space includes `0, 1, 2, ..., %len - 11`. So if we were able to return
safe iteration space `[0, %len - 10)`, we could safely intersect it with IV's iteration space. All
values in this range are non-negative, so using signed/unsigned min/max for them is unambiguous.
In this patch, we alter the algorithm of safe range calculation so that it returnes a subset of the
original safe space which is represented by one continuous range that does not go through wrap.
In order to reach this, we use modified SCEV substraction function. It can be imagined as a function
that substracts by `1` (or `-1`) as long as the further substraction does not cause a wrap in IV iteration
space. This allows us to perform IRCE in many situations when we deal with IV space and range check
of different types (in terms of signed/unsigned).
We apply this approach for both matching and not matching types of IV iteration space and the
range check. One implication of this is that now IRCE became smarter in detection of empty safe
ranges. For example, in this case:
loop:
%iv = phi i32 [ %begin, %preheader ], [ %iv.next, %latch]
%iv.offset = sub i32 %iv, 10
%rc = icmp ult i32 %iv.offset, %len
br i1 %rc, label %latch, label %deopt
latch:
%iv.next = add i32 %iv, 11
%cond = icmp i32 ult %iv.next, 100
br it %cond, label %loop, label %exit
If `%len` was less than 10 but SCEV failed to trivially prove that `%begin - 10 >u %len- 10`,
we could end up executing entire loop in safe preloop while the main loop was still generated,
but never executed. Now, cutting the ranges so that if both `begin - 10` and `%len - 10` overflow,
we have a trivially empty range of `[0, 0)`. This in some cases prevents us from meaningless optimization.
Differential Revision: https://reviews.llvm.org/D39954
llvm-svn: 318639
Serguei Katkov [Mon, 20 Nov 2017 05:42:36 +0000 (05:42 +0000)]
[CGP] Fix the crash caused by enable of complex addr mode
We must collect all AddModes even if they are the same.
This is due to Original value is different but we need all original
values collected as they are used as anchors in common phi finding.
Reviewers: john.brawn, reames
Reviewed By: john.brawn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40166
llvm-svn: 318638
Peter Collingbourne [Mon, 20 Nov 2017 05:31:37 +0000 (05:31 +0000)]
COFF: Fix invalid comdat sections in test cases.
The comdat sections in these test cases do not comply with the COFF
specification, and link.exe rejects them. I plan to make a change to
how we handle comdat sections which would also cause us to reject them.
llvm-svn: 318637
Peter Collingbourne [Mon, 20 Nov 2017 05:31:23 +0000 (05:31 +0000)]
COFF: Change SparseChunks to be of type std::vector<SectionChunk *>. NFC.
llvm-svn: 318636
Peter Collingbourne [Mon, 20 Nov 2017 05:31:09 +0000 (05:31 +0000)]
COFF: Remove unused fields. NFC.
llvm-svn: 318635
Craig Topper [Sun, 19 Nov 2017 23:49:19 +0000 (23:49 +0000)]
[X86] clzero check in getHostCPUFeatures should use getX86CpuIDAndInfo not getX86CpuIDAndInfoEx.
This leaf doesn't take an additional argument.
llvm-svn: 318634
Craig Topper [Sun, 19 Nov 2017 23:30:22 +0000 (23:30 +0000)]
[X86] Reorder and reformat the feature bit checks in getHostCPUFeatues to keep the bits in order per register and encourage future additions to be in order too.
llvm-svn: 318633
Philip Pfaffe [Sun, 19 Nov 2017 22:13:34 +0000 (22:13 +0000)]
Port ScopInfo to the isl cpp bindings
Summary:
Most changes are mechanical, but in one place I changed the program semantics
by fixing a likely bug:
In `Scop::hasFeasibleRuntimeContext()`, I'm now explicitely handling the
error-case. Before, when the call to `addNonEmptyDomainConstraints()`
returned a null set, this (probably) accidentally worked because
isl_bool_error converts to true. I'm checking for nullptr now.
Reviewers: grosser, Meinersbur, bollu
Reviewed By: Meinersbur
Subscribers: nemanjai, kbarton, pollydev, llvm-commits
Differential Revision: https://reviews.llvm.org/D39971
llvm-svn: 318632
Jan Kratochvil [Sun, 19 Nov 2017 19:04:24 +0000 (19:04 +0000)]
Remove 2 unused methods DWARFDebugInfo::Find and their FindCallbackString
Differential revision: https://reviews.llvm.org/D40216
llvm-svn: 318631
Sanjay Patel [Sun, 19 Nov 2017 17:31:37 +0000 (17:31 +0000)]
[x86] add sqrt tests for partially-inline-libcalls (PR31455)
llvm-svn: 318630
Sanjay Patel [Sun, 19 Nov 2017 16:42:27 +0000 (16:42 +0000)]
[LibCallSimplifier] allow splat vectors for pow(x, 0.5) -> sqrt() transforms
llvm-svn: 318629
Sanjay Patel [Sun, 19 Nov 2017 16:13:14 +0000 (16:13 +0000)]
[LibCallSimplifier] partly fix pow(x, 0.5) -> sqrt() transforms
As the first test shows, we could transform an llvm intrinsic which never sets errno
into a libcall which could set errno (even though it's marked readnone?), so that's
not ideal.
It's possible that we can also transform a libcall which could set errno to an
intrinsic given the fast-math-flags constraint, but that's deferred to determine
exactly which set of FMF are needed.
Differential Revision: https://reviews.llvm.org/D40150
llvm-svn: 318628
Sanjay Patel [Sun, 19 Nov 2017 15:34:27 +0000 (15:34 +0000)]
[InstSimplify] fold and/or of fcmp ord/uno when operand is known nnan
The 'ord' and 'uno' predicates have a logic operation for NAN built into their definitions:
FCMP_ORD = 7, ///< 0 1 1 1 True if ordered (no nans)
FCMP_UNO = 8, ///< 1 0 0 0 True if unordered: isnan(X) | isnan(Y)
So we can simplify patterns like this:
(fcmp ord (known NNAN), X) && (fcmp ord X, Y) --> fcmp ord X, Y
(fcmp uno (known NNAN), X) || (fcmp uno X, Y) --> fcmp uno X, Y
It might be better to split this into (X uno 0) | (Y uno 0) as a canonicalization, but that
would be another patch.
Differential Revision: https://reviews.llvm.org/D40130
llvm-svn: 318627
Jan Kratochvil [Sun, 19 Nov 2017 14:35:07 +0000 (14:35 +0000)]
Add comments to DWARFCompileUnit length fields/methods
Differential revision: https://reviews.llvm.org/D40211
llvm-svn: 318626
Eric Fiselier [Sun, 19 Nov 2017 09:46:34 +0000 (09:46 +0000)]
Attempt to fix template depth test failures on older Clang versions
llvm-svn: 318625
Craig Topper [Sun, 19 Nov 2017 06:24:26 +0000 (06:24 +0000)]
[X86] Add test cases for rndscaless/sd intrinsics.
Also fix the memop in the ins for these instructions. Not sure what effect this has.
llvm-svn: 318624
Craig Topper [Sun, 19 Nov 2017 05:42:54 +0000 (05:42 +0000)]
[X86] Improve load folding of scalar rcp28 and rsqrt28 instructions using sse_load_f32/f64.
llvm-svn: 318623
Eric Fiselier [Sun, 19 Nov 2017 04:57:22 +0000 (04:57 +0000)]
Fix min/max usage in variant
llvm-svn: 318622
Eric Fiselier [Sun, 19 Nov 2017 04:19:44 +0000 (04:19 +0000)]
[libc++] Shrink variant's index type when possible
Summary:
Currently `std::variant` always uses an unsigned int to store the variant index. However this isn't nessesary and causes `std::variant` to be larger than it needs to be in most cases.
This patch changes the index type to be `unsigned char` when possible, and `unsigned short` or `unsigned int` otherwise, depending on the size (Although it's questionable if it's even possible to create a variant with 65535 elements.
Unfortunately this change is an ABI break, and as such is only enabled in ABI v2.
Reviewers: mpark
Reviewed By: mpark
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D40210
llvm-svn: 318621
Craig Topper [Sun, 19 Nov 2017 04:12:35 +0000 (04:12 +0000)]
[X86] Make sure 'knm' is accepted by -target-cpu
llvm-svn: 318620
Craig Topper [Sun, 19 Nov 2017 04:12:33 +0000 (04:12 +0000)]
[X86] Make sure 'knm' and 'cannonlake' are accepted by builtin_cpu_is
llvm-svn: 318619
Eric Fiselier [Sun, 19 Nov 2017 03:50:35 +0000 (03:50 +0000)]
Fix nodiscard test when modules are enabled
llvm-svn: 318618
Craig Topper [Sun, 19 Nov 2017 02:55:15 +0000 (02:55 +0000)]
[X86] Add icelake CPU support for -march.
llvm-svn: 318617
Craig Topper [Sun, 19 Nov 2017 02:55:14 +0000 (02:55 +0000)]
[X86] Set __corei7__ preprocessor defines for skylake server and cannonlake.
This is the resolution we came to in D38824.
llvm-svn: 318616
Alexei Starovoitov [Sun, 19 Nov 2017 02:41:53 +0000 (02:41 +0000)]
[bpf] remove unused variable
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 318615
Alexei Starovoitov [Sun, 19 Nov 2017 01:35:00 +0000 (01:35 +0000)]
[bpf] allow direct and indirect calls
kernel verifier is becoming smarter and soon will support
direct and indirect function calls.
Remove obsolete error from BPF backend.
Make call to use PCRel_4 fixup.
'bpf to bpf' calls are distinguished from 'bpf to kernel' calls
by insn->src_reg == BPF_PSEUDO_CALL == 1 which is used as relocation
indicator similar to ld_imm64->src_reg == BPF_PSEUDO_MAP_FD == 1
The actual 'call' instruction remains the same for both
'bpf to kernel' and 'bpf to bpf' calls.
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
llvm-svn: 318614
Craig Topper [Sun, 19 Nov 2017 01:25:30 +0000 (01:25 +0000)]
[X86] Switch cannonlake to use the SkylakeServer scheduling model instead of Haswell.
Cannonlake comes after skylake and supports avx512 so this is probably a closer model for now.
llvm-svn: 318613
Craig Topper [Sun, 19 Nov 2017 01:12:00 +0000 (01:12 +0000)]
[X86] Add skeleton support for icelake CPU.
There are several patches out for review right now to implement Icelake features. This adds a CPU to collect them under.
llvm-svn: 318612
Craig Topper [Sun, 19 Nov 2017 01:11:58 +0000 (01:11 +0000)]
[X86] Fix 80 column violation and remove trailing whitespace. NFC
llvm-svn: 318611
Craig Topper [Sun, 19 Nov 2017 00:46:21 +0000 (00:46 +0000)]
[X86] Add cpu detection for cannonlake.
This uses the same encoding for cannonlake in the proposed gcc patches here. https://gcc.gnu.org/ml/gcc-patches/2017-11/msg00551.html
llvm-svn: 318610
Saleem Abdulrasool [Sun, 19 Nov 2017 00:45:33 +0000 (00:45 +0000)]
Driver: remove `SupportsObjCGC` (NFC)
This option is not used in the frontend. Remove the method.
llvm-svn: 318609
Martell Malone [Sun, 19 Nov 2017 00:08:12 +0000 (00:08 +0000)]
[Driver] add initial support for alpine linux
set -pie as default for musl linux targets
add detection of alpine linux
append appropriate compile flags for alpine
Reviewers: rnk
Differential Revision: https://reviews.llvm.org/D39588
llvm-svn: 318608
Eric Fiselier [Sun, 19 Nov 2017 00:00:49 +0000 (00:00 +0000)]
[LIT] Fix testing out-of-tree Clang builds
Summary:
Currently, LIT configures the LLVM binary path before the Clang binary path. However this breaks testing out-of-tree Clang builds (where the LLVM binary path includes a copy of Clang).
This patch reverses the order of the paths when looking for Clang, putting the Clang binary directory first.
Reviewers: zturner, beanz, chapuni, modocache, EricWF
Reviewed By: EricWF
Subscribers: mgorny, cfe-commits, llvm-commits
Differential Revision: https://reviews.llvm.org/D40217
llvm-svn: 318607
Simon Pilgrim [Sat, 18 Nov 2017 23:23:25 +0000 (23:23 +0000)]
[MC][X86] Add test case from PR19251
llvm-svn: 318605
Simon Pilgrim [Sat, 18 Nov 2017 23:06:42 +0000 (23:06 +0000)]
[MC][X86] Add teet case from PR32807
llvm-svn: 318603
Eric Fiselier [Sat, 18 Nov 2017 22:42:26 +0000 (22:42 +0000)]
Fix use of config.h in public headers.
The CodeGenCoverage.h header is installed, but it references
the build-only header "llvm/Config/config.h". This breaks use
of the CodeGenCoverage.h header once it is installed, because config.h isn't
available.
This patch fixes the error by moving the config.h include from
the CodeGenCoverage.h header (where it's not needed), to the
CodeGenCoverage.cpp source file.
llvm-svn: 318602
Jonas Hahnfeld [Sat, 18 Nov 2017 21:00:46 +0000 (21:00 +0000)]
[OpenMP] Show error if VLAs are not supported
Some target devices (e.g. Nvidia GPUs) don't support dynamic stack
allocation and hence no VLAs. Print errors with description instead
of failing in the backend or generating code that doesn't work.
This patch handles explicit uses of VLAs (local variable in target
or declare target region) or implicitly generated (private) VLAs
for reductions on VLAs or on array sections with non-constant size.
Differential Revision: https://reviews.llvm.org/D39505
llvm-svn: 318601
Jonas Toth [Sat, 18 Nov 2017 19:48:33 +0000 (19:48 +0000)]
[clang-tidy] Add new hicpp-multiway-paths-covered check for missing branches
Summary:
This check searches for missing `else` branches in `if-else if`-chains and
missing `default` labels in `switch` statements, that use integers as condition.
It is very similar to -Wswitch, but concentrates on integers only, since enums are
already covered.
The option to warn for missing `else` branches is deactivated by default, since it is
very noise on larger code bases.
Running it on LLVM:
{
F5354858} for default configuration
{
F5354866} just for llvm/lib/Analysis/ScalarEvolution.cpp, the else-path checker is very noisy!
Reviewers: alexfh, aaron.ballman, hokein
Reviewed By: aaron.ballman
Subscribers: lebedev.ri, Eugene.Zelenko, cfe-commits, mgorny, JDevlieghere, xazax.hun
Tags: #clang-tools-extra
Differential Revision: https://reviews.llvm.org/D37808
llvm-svn: 318600
Simon Pilgrim [Sat, 18 Nov 2017 19:47:59 +0000 (19:47 +0000)]
[X86][AVX512VL] Add AVX512VL tests to the vselect packss tests.
PR34553 has gone, adding tests to ensure it doesn't come back.
vselect_packss_v16i64 still has some awful codegen on AVX512 targets....
llvm-svn: 318599
Sanjay Patel [Sat, 18 Nov 2017 19:31:57 +0000 (19:31 +0000)]
[CodeGen] change const-ness of complex calls
After clarification about the C standard, POSIX, and implementations:
The C standard allows errno-setting, and it's (unfortunately for optimization) even
more clearly stated in the newer additions to the standards.
We can leave these functions as always constant ('c') because they don't
actually do any math and therefore won't set errno:
cimag ( http://en.cppreference.com/w/c/numeric/complex/cimag )
creal ( http://en.cppreference.com/w/c/numeric/complex/creal )
cproj ( http://en.cppreference.com/w/c/numeric/complex/cproj )
conj (http://en.cppreference.com/w/c/numeric/complex/conj )
Differential Revision: https://reviews.llvm.org/D39611
llvm-svn: 318598
Craig Topper [Sat, 18 Nov 2017 19:25:35 +0000 (19:25 +0000)]
[X86] Add another gather test with v8i8 sign extended indices.
This requires the indices to be legalized and sign extended.
llvm-svn: 318597
Craig Topper [Sat, 18 Nov 2017 19:05:12 +0000 (19:05 +0000)]
[X86] Simplify the gather/scatter isel predicates.
We don't need a dyn_cast, the predicate already specified the base node. We only need to check the type of the index, the base ptr is guaranteed to be scalar.
llvm-svn: 318596
Craig Topper [Sat, 18 Nov 2017 18:49:16 +0000 (18:49 +0000)]
[X86] Qualify a few places with ExperimentalVectorWideningLegalization.
I'm playing around with this flag and these places cause errors if not qualified.
llvm-svn: 318595
Simon Pilgrim [Sat, 18 Nov 2017 18:33:07 +0000 (18:33 +0000)]
[X86] Add todo comment for TRUNC(SUB(X,C)) -> SUB(TRUNC(X),C')
As discussed on PR35295, but it causes regressions in combineSubToSubus which need to be addressed first
llvm-svn: 318594
Florian Hahn [Sat, 18 Nov 2017 18:14:13 +0000 (18:14 +0000)]
[CallSiteSplitting] Remove some indirection (NFC).
Summary:
With this patch I tried to reduce the complexity of the code sightly, by
removing some indirection. Please let me know what you think.
Reviewers: junbuml, mcrosier, davidxl
Reviewed By: junbuml
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40037
llvm-svn: 318593
Sanjay Patel [Sat, 18 Nov 2017 16:25:38 +0000 (16:25 +0000)]
[x86] add tests for unnecessary shuffling; NFC
llvm-svn: 318592
Martin Storsjo [Sat, 18 Nov 2017 06:23:48 +0000 (06:23 +0000)]
[X86] Output cfi directives for saved XMM registers even if no GPRs are saved
This makes sure that functions that only clobber xmm registers
(on win64) also get the right cfi directives, if dwarf exceptions
are enabled.
Differential Revision: https://reviews.llvm.org/D40191
llvm-svn: 318591
Craig Topper [Sat, 18 Nov 2017 05:09:55 +0000 (05:09 +0000)]
[X86] Fix typo in variable name. NFC
llvm-svn: 318590
Quentin Colombet [Sat, 18 Nov 2017 04:28:59 +0000 (04:28 +0000)]
[AArch64] Map G_LOAD on FPR when the definition goes to a copy to FPR
We used to detect loads feeding fp instructions, but we were
failing to take into account cases where this happens through copies.
For instance, loads can fed copies coming from the ABI lowering
of floating point arguments/results.
llvm-svn: 318589
Quentin Colombet [Sat, 18 Nov 2017 04:28:58 +0000 (04:28 +0000)]
[AArch64] Map G_STORE on FPR when the source comes from a FPR copy
We used to detect that stores were fed by fp instructions, but we were
failing to take into account cases where this happens through copies.
For instance, stores can be fed by copies coming from the ABI lowering
of floating point arguments.
llvm-svn: 318588
Quentin Colombet [Sat, 18 Nov 2017 04:28:58 +0000 (04:28 +0000)]
[RegisterBankInfo] Relax the assert of having matching type sizes on default mappings
Instead of asserting that the type sizes are exactly equal, we check
that the new size is big enough to contain the original type.
We have to relax this constrain because, right now, we sometimes
specify that things that are smaller than a storage type are legal
instead of widening everything to the size of a storage type.
E.g., we say that G_AND s16 is legal and we map that on GPR32.
This is something we may revisit in the future (either by changing
the legalization process or keeping track separately of the storage
size and the size of the type), but let us reflect the reality of
the situation for now.
llvm-svn: 318587
Quentin Colombet [Sat, 18 Nov 2017 04:28:56 +0000 (04:28 +0000)]
[AArch64][RegisterBankInfo] Teach instruction mapping about gpr32 -> fpr16 cross copies
Turns out this copies can actually occur because of the way we lower the
ABI for half.
llvm-svn: 318586
Rafael Espindola [Sat, 18 Nov 2017 02:12:53 +0000 (02:12 +0000)]
Reorder static functions. NFC.
llvm-svn: 318584
Rafael Espindola [Sat, 18 Nov 2017 02:05:59 +0000 (02:05 +0000)]
Split realPathFromHandle in two.
By having an UTF-16 version we avoid some code duplication in calling
GetFinalPathNameByHandleW.
llvm-svn: 318583
Eugene Zelenko [Sat, 18 Nov 2017 01:47:41 +0000 (01:47 +0000)]
[AST] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 318582
Walter Lee [Sat, 18 Nov 2017 01:13:18 +0000 (01:13 +0000)]
[asan] Add a full redzone after every stack variable
We were not doing that for large shadow granularity. Also add more
stack frame layout tests for large shadow granularity.
Differential Revision: https://reviews.llvm.org/D39475
llvm-svn: 318581
Davide Italiano [Sat, 18 Nov 2017 00:54:31 +0000 (00:54 +0000)]
[ABI] Remove dead code that was copy-pasted all around. NFCI.
llvm-svn: 318580
Davide Italiano [Sat, 18 Nov 2017 00:52:29 +0000 (00:52 +0000)]
[Module] Throw away some more commented code. NFCI.
llvm-svn: 318579
Hans Wennborg [Sat, 18 Nov 2017 00:49:18 +0000 (00:49 +0000)]
Fix some -Wunused-variable warnings
llvm-svn: 318578
Davide Italiano [Sat, 18 Nov 2017 00:35:27 +0000 (00:35 +0000)]
[ABI/SysV] Remove more dead code. NFCI.
llvm-svn: 318577
Davide Italiano [Sat, 18 Nov 2017 00:34:09 +0000 (00:34 +0000)]
[Core] Garbage collect dead code untouched in years. NFCI.
This sketching can be resurrected if anybody needs it, although
I doubt is relevant these days.
llvm-svn: 318576
Evgeniy Stepanov [Sat, 18 Nov 2017 00:22:34 +0000 (00:22 +0000)]
Revert "[asan] Use dynamic shadow on 32-bit Android" and 3 more.
Revert the following commits:
r318369 [asan] Fallback to non-ifunc dynamic shadow on android<22.
r318235 [asan] Prevent rematerialization of &__asan_shadow.
r317948 [sanitizer] Remove unnecessary attribute hidden.
r317943 [asan] Use dynamic shadow on 32-bit Android.
MemoryRangeIsAvailable() reads /proc/$PID/maps into an mmap-ed buffer
that may overlap with the address range that we plan to use for the
dynamic shadow mapping. This is causing random startup crashes.
llvm-svn: 318575
Daniel Sanders [Sat, 18 Nov 2017 00:16:44 +0000 (00:16 +0000)]
[globalisel][tablegen] Generalize pointer-type inference by introducing ptypeN. NFC
ptypeN is functionally the same as typeN except that it informs the
SelectionDAG importer that an operand should be treated as a pointer even
if it was written as iN. This is important for patterns that use iN instead
of iPTR to represent pointers. E.g.:
(set GPR64:$dst, (load GPR64:$addr))
Previously, this was handled as a hardcoded special case for the appropriate
operands to G_LOAD and G_STORE.
llvm-svn: 318574
Evgeniy Stepanov [Fri, 17 Nov 2017 23:52:34 +0000 (23:52 +0000)]
[asan] Fix asan_device_setup on KitKat.
"ln" from toybox does not understand -f (force) flag.
llvm-svn: 318573
Reid Kleckner [Fri, 17 Nov 2017 23:52:33 +0000 (23:52 +0000)]
[lit] Try to improve Ctrl-C behavior on Windows
This functionality was broken during a refactor a while back because
'pool' is no longer in scope.
llvm-svn: 318572
Petr Hosek [Fri, 17 Nov 2017 23:51:53 +0000 (23:51 +0000)]
[CMake][runtimes] Don't passthrough prefixes for non-default targets
The passthrough is useful for setting up the options for the default
build, but we already have a different mechanism to pass CMake flags
to builds for builtins and runtimes targets so this is not really
needed there. Furthermore, when the flags are set for the default
build, with the prefix passthrough set we have to explicitly override
all options in other targets which can be cumbersome.
Differential Revision: https://reviews.llvm.org/D39988
llvm-svn: 318571
Eugene Zelenko [Fri, 17 Nov 2017 23:43:46 +0000 (23:43 +0000)]
[AST] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 318570
Petr Hosek [Fri, 17 Nov 2017 23:29:46 +0000 (23:29 +0000)]
[libunwind][CMake] Provide option to disable instalation of the library
This is useful in cases where we only build static library and
libunwind.a is combined with libc++abi.a into a single archive in which
case we don't want to have libunwind.a installed separately. The same
option is already provided by libcxx CMake build.
This change also adds the install-unwind target for consistency with the
libcxxabi and libcxx CMake build.
Differential Revision: https://reviews.llvm.org/D40195
llvm-svn: 318569
Petr Hosek [Fri, 17 Nov 2017 23:25:09 +0000 (23:25 +0000)]
[libcxxabi][CMake] Provide option to disable installing of the library
This is useful in cases where we only build static library and
libc++abi.a is combined with libc++.a into a single archive in which
case we don't want to have libc++abi.a installed separately. The same
option is already provided by libcxx CMake build.
Differential Revision: https://reviews.llvm.org/D40194
llvm-svn: 318568
Anna Zaks [Fri, 17 Nov 2017 23:19:04 +0000 (23:19 +0000)]
Change code owner for Clang Static Analyzer to Devin Coughlin.
Differential Revision: https://reviews.llvm.org/D39964
llvm-svn: 318567
Zachary Turner [Fri, 17 Nov 2017 22:51:43 +0000 (22:51 +0000)]
Fix an issue with llvm lit tool substitutions.
When using an installed clang with an in-tree llvm, we were not
searching in the right paths for the tools.
llvm-svn: 318564
Petr Hosek [Fri, 17 Nov 2017 22:49:39 +0000 (22:49 +0000)]
[CMake][libcxxabi] Support merging objects when statically linking unwinder
When using LLVM unwinder and static unwinder option is set, merge
libunwind and libc++abi objects into a single archive. libc++ already
supports merging libc++abi.a and libc++.a into a single archive; with
this change, it is possible to also include libunwind.a in the same
archive which is useful when doing static link and using libc++ as
a default C++ library and compiler-rt as a default runtime library.
Differential Revision: https://reviews.llvm.org/D39949
llvm-svn: 318563
Michal Gorny [Fri, 17 Nov 2017 22:21:23 +0000 (22:21 +0000)]
[cmake] Use llvm-lit directory when provided for stand-alone build
After the recent lit test changes, clang attempts to run its tests
via llvm-lit by default. However, the llvm-lit binary is not present
when performing stand-alone build resulting in a failure out of the box.
To solve that, add the llvm-lit directory to CMake when performing
a stand-alone build and LLVM sources are provided. This includes
the CMake rules generating the llvm-lit binary and effectively makes
it possible for clang to use it.
Differential Revision: https://reviews.llvm.org/D40142
llvm-svn: 318562
Zhaoshi Zheng [Fri, 17 Nov 2017 22:05:19 +0000 (22:05 +0000)]
[NFC] Make r318597 compatible with clang-format
llvm-svn: 318561
Zhen Cao [Fri, 17 Nov 2017 21:59:43 +0000 (21:59 +0000)]
[MC] Fix regression tests on Windows when git “core.autocrlf” is set to true.
Differential Revision: https://reviews.llvm.org/D39737
This is the second attempt to commit this. The test was broken on Linux in the first attempt.
llvm-svn: 318560
Reid Kleckner [Fri, 17 Nov 2017 21:55:23 +0000 (21:55 +0000)]
Fix coverage test on Windows bot
llvm-svn: 318559
Rafael Espindola [Fri, 17 Nov 2017 21:40:38 +0000 (21:40 +0000)]
Don't use llvm/Config/config.h.
It is private to llvm. Instead use llvm/Config/llvm-config.h and check
LLVM_ON_UNIX. That is the same guard that clang uses before including
unistd.h.
llvm-svn: 318558
Matt Arsenault [Fri, 17 Nov 2017 21:35:32 +0000 (21:35 +0000)]
AMDGPU: Move hazard avoidance out of waitcnt pass.
This is mostly moving VMEM clause breaking into
the hazard recognizer. Also move another hazard
currently handled in the waitcnt pass.
Also stops breaking clauses unless xnack is enabled.
llvm-svn: 318557
Reid Kleckner [Fri, 17 Nov 2017 21:33:28 +0000 (21:33 +0000)]
Loosen -Wempty-body warning
Do not show it when `if` or `else` come from macros.
E.g.,
#define USED(A) if (A); else
#define SOME_IF(A) if (A)
void test() {
// No warnings are shown in those cases now.
USED(0);
SOME_IF(0);
}
Patch by Ilya Biryukov!
Differential Revision: https://reviews.llvm.org/D40185
llvm-svn: 318556
Vedant Kumar [Fri, 17 Nov 2017 21:18:32 +0000 (21:18 +0000)]
[llvm-profdata] Don't treat non-fatal merge errors as fatal
This fixes an issue seen on the coverage bot:
http://lab.llvm.org:8080/green/view/Experimental/job/clang-stage2-coverage-R/1930
Profile merging shouldn't fail if a single counter mismatch is detected.
llvm-svn: 318555
Alexander Shaposhnikov [Fri, 17 Nov 2017 20:50:54 +0000 (20:50 +0000)]
[lldb] Ensure that dwo/dwp are not double-indexed
DWO/DWP should not be indexed directly.
Instead, the corresponding base file should be used.
This diff adds an assert to DWARFCompileUnit::Index
and adjusts the methods
SymbolFileDWARF::FindCompleteObjCDefinitionTypeForDIE,
SymbolFileDWARF::GetObjCMethodDIEOffsets accordingly.
Differential revision: https://reviews.llvm.org/D39825
llvm-svn: 318554
Jonas Hahnfeld [Fri, 17 Nov 2017 20:46:55 +0000 (20:46 +0000)]
llvm-demangle-fuzzer: Link in Support
The refactoring in r318407 transiently includes abi-breaking.h
which defines EnableABIBreakingChecks. This breaks my Debug
build because this fuzzer did not link in Support with the symbol.
Differential Revision: https://reviews.llvm.org/D40190
llvm-svn: 318553
Alex Lorenz [Fri, 17 Nov 2017 20:44:25 +0000 (20:44 +0000)]
[ObjC][ARC] Honor noescape attribute for -Warc-retain-cycles
rdar://
35409566
Differential Revision: https://reviews.llvm.org/D40141
llvm-svn: 318552
Jun Bum Lim [Fri, 17 Nov 2017 20:38:25 +0000 (20:38 +0000)]
[LICM] Fix PR35342
Summary: This change fix PR35342 by replacing only the current use with undef in unreachable blocks.
Reviewers: efriedma, mcrosier, igor-laevsky
Reviewed By: efriedma
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40184
llvm-svn: 318551
Rafael Espindola [Fri, 17 Nov 2017 20:06:41 +0000 (20:06 +0000)]
Use TempFile in the implementation of LockFileManager.
This move some of the complexity over to the lower level TempFile.
It also makes it a bit more explicit where errors are ignored since we
now have a call to consumeError.
llvm-svn: 318550
Chandler Carruth [Fri, 17 Nov 2017 19:58:36 +0000 (19:58 +0000)]
[PM/Unswitch] Teach SimpleLoopUnswitch to do non-trivial unswitching,
making it no longer even remotely simple.
The pass will now be more of a "full loop unswitching" pass rather than
anything substantively simpler than any other approach. I plan to rename
it accordingly once the dust settles.
The key ideas of the new loop unswitcher are carried over for
non-trivial unswitching:
1) Fully unswitch a branch or switch instruction from inside of a loop to
outside of it.
2) Update the CFG and IR. This avoids needing to "remember" the
unswitched branches as well as avoiding excessively cloning and
reliance on complex parts of simplify-cfg to cleanup the cfg.
3) Update the analyses (where we can) rather than just blowing them away
or relying on something else updating them.
Sadly, #3 is somewhat compromised here as the dominator tree updates
were too complex for me to want to reason about. I will need to make
another attempt to do this now that we have a nice dynamic update API
for dominators. However, we do adhere to #3 w.r.t. LoopInfo.
This approach also adds an important principls specific to non-trivial
unswitching: not *all* of the loop will be duplicated when unswitching.
This fact allows us to compute the cost in terms of how much *duplicate*
code is inserted rather than just on raw size. Unswitching conditions
which essentialy partition loops will work regardless of the total loop
size.
Some remaining issues that I will be addressing in subsequent commits:
- Handling unstructured control flow.
- Unswitching 'switch' cases instead of just branches.
- Moving to the dynamic update API for dominators.
Some high-level, interesting limitationsV that folks might want to push
on as follow-ups but that I don't have any immediate plans around:
- We could be much more clever about not cloning things that will be
deleted. In fact, we should be able to delete *nothing* and do
a minimal number of clones.
- There are many more interesting selection criteria for which branch to
unswitch that we might want to look at. One that I'm interested in
particularly are a set of conditions which all exit the loop and which
can be merged into a single unswitched test of them.
Differential revision: https://reviews.llvm.org/D34200
llvm-svn: 318549