Marek Olšák [Mon, 18 Oct 2021 03:10:31 +0000 (23:10 -0400)]
glthread: don't sync for glIsEnabled with a few enums
viewperf benefits
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13403>
Marek Olšák [Fri, 22 Oct 2021 20:59:17 +0000 (16:59 -0400)]
glthread: don't execute display lists if they have no effect
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13403>
Mike Blumenkrantz [Fri, 22 Oct 2021 18:04:45 +0000 (14:04 -0400)]
nir/lower_samplers_as_deref: rewrite more image intrinsics
"I think we want to lower them."
-Jason "And I do know how the pass works" Ekstrand
fixes #5540
cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13489>
Mike Blumenkrantz [Tue, 26 Oct 2021 18:03:56 +0000 (14:03 -0400)]
zink: more accurately update samplemask for fs shader keys
the fs samplemask needs to be updated on framebuffer rebind and on
fs bind to ensure that the key gets updated in time for the pipeline
change
fixes #5559
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13531>
Mike Blumenkrantz [Fri, 22 Oct 2021 17:47:16 +0000 (13:47 -0400)]
zink: fix gl_SampleMaskIn spirv generation
the uint[1] -> uint dance is only relevant on the first load, so move
the variable type shuffling inside the create block to avoid breaking successive
loads
fixes #5543
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13488>
Dave Airlie [Tue, 26 Oct 2021 02:36:20 +0000 (12:36 +1000)]
radv: fence->user_ptr and ctx->fence_map are now totally unused.
Garbage collect them.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13525>
Alyssa Rosenzweig [Wed, 20 Oct 2021 12:36:22 +0000 (08:36 -0400)]
mesa: Require MRT support for GL3/ES3
OpenGL 3.0 requires the driver can draw to 8 simultaneous render
targets. Similarly, OpenGL ES 3.0 requires the driver can draw to 4
simultaneous render targets. Fix the version computation logic to take
this into account.
On Mali T720, we support ~all features of OpenGL ES 3.1 except we only
support a single render target. Mali T720 should advertise OpenGL 2.1
and OpenGL ES 2.0 only. With the previous logic, it incorrectly
advertised OpenGL ES 3.1.
v2: Lie about the minimum for GL 3.0 to make freedreno a3xx happy. Add
Emma's reviewed-by.
v3: Update the Mali T720 CI expectations. There are tests that pass on
GLES3 but not GLES2. Unclear if these are dEQP bugs or Mesa bugs, lima
hits the same issues. Add them to the known fails
Note to mesa-stable maintainers: this downgrades the OpenGL version
advertised on Mali T720. As such, this patch should apply to the
unreleased 21.3 (Eric) but should NOT be backported to any released Mesa
versions (21.2 or older should NOT have this patch). This is a bit of a
compromise; Emma agreed with this plan on IRC.
Reported-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net> [v2]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> [v2]
Cc: 21.3 mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13455>
Michael Tang [Fri, 22 Oct 2021 23:03:11 +0000 (16:03 -0700)]
microsoft/compiler: Use memcpy instead of a union to write dxil_features
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13496>
Alyssa Rosenzweig [Sat, 23 Oct 2021 01:12:59 +0000 (21:12 -0400)]
nir/lower_blend: Use correct clamp for SNORM
nir_lower_blend was written against the OpenGL ES 3.2 specification,
which does not support blending SNORM render targets. The ES spec
says that non-floating point buffers get clamped to [0, 1] before
blending. The story is not so simple: SNORM buffers are blendable in
OpenGL and must clamped to [-1, 1] rather than [0, 1]. Handle this case.
NIR does have the fsat_signed_mali instruction to clamp to [-1, 1], but
it is only implemented in Panfrost, and this pass is in common code.
Open code it instead. Panfrost optimizes the open coded version, so this
is good enough.
Fixes SNORM subtests of Piglit arb_texture_view-rendering-formats.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13499>
Alyssa Rosenzweig [Sun, 24 Oct 2021 23:15:26 +0000 (19:15 -0400)]
panvk: Pass through alpha_zero_nop/one_store flags
When constructing the Internal Blend Descriptor for fixed-function
blending, set the alpha_zero_nop/one_store flags based on the given
equation.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13508>
Alyssa Rosenzweig [Sun, 24 Oct 2021 23:14:42 +0000 (19:14 -0400)]
panfrost: Pass through alpha_zero_nop/one_store
Compute whether these flags can be set when constructing the blend CSO
and pass them in the appropriate place in the Internal Blend Descriptor.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13508>
Alyssa Rosenzweig [Sun, 24 Oct 2021 23:13:16 +0000 (19:13 -0400)]
panfrost: Test alpha_zero_nop/one_store predicates
For each blend mode in our blending unit tests, add whether we can set
the alpha_zero_nop and alpha_one_store flags and check against the
predicates.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13508>
Alyssa Rosenzweig [Sun, 24 Oct 2021 23:05:46 +0000 (19:05 -0400)]
panfrost: Add alpha_zero_nop/one_store predicate
Some Mali GPUs can avoid storing to the tilebuffer if src alpha = 0, and
can replace blending with a store if src alpha = 1. This saves power in
the common case of alpha blending. Add predicates to check if these
optimizations are valid for a given blend equation.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13508>
Alyssa Rosenzweig [Sun, 24 Oct 2021 23:33:37 +0000 (19:33 -0400)]
panfrost: Rename depth bias fields
Make it clear that the distinction is the facingness of the primitives
the depth bias applies to.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13509>
Sagar Ghuge [Thu, 21 Oct 2021 19:54:01 +0000 (12:54 -0700)]
iris: Drop hint if primitive id is required or not
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13474>
Sagar Ghuge [Thu, 21 Oct 2021 19:48:47 +0000 (12:48 -0700)]
anv: Drop hint if primitive id is required or not
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13474>
Sagar Ghuge [Fri, 22 Oct 2021 16:51:42 +0000 (09:51 -0700)]
intel/compiler: Track primitive id in domain/evaluation shader
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Suggeted-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13474>
Sagar Ghuge [Thu, 21 Oct 2021 19:45:08 +0000 (12:45 -0700)]
intel/genxml: Add new Primitive ID Not Required bit field to 3DSTATE_DS
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13474>
Mike Blumenkrantz [Mon, 25 Oct 2021 18:11:50 +0000 (14:11 -0400)]
zink: don't add dynamic vertex pipeline states if no attribs are used
adding the states requires that vertex attribs be bound, but it's illegal
to bind 0 attribs
cc: mesa-stable
fixes #5558
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13519>
Caio Marcelo de Oliveira Filho [Fri, 8 Oct 2021 03:18:39 +0000 (20:18 -0700)]
intel/compiler: Don't use SIMD larger than needed for workgroup
Unless we are combining multiple workgroups in the same HW thread,
there's no advantage of using SIMD16 when SIMD8 already fits the
entire workgroup.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13249>
Caio Marcelo de Oliveira Filho [Mon, 11 Oct 2021 14:49:40 +0000 (07:49 -0700)]
intel/compiler: Use SIMD selection helpers for variable workgroup size
Variable workgroup size works by compiling as much SIMD variants as
possible and then selecting the right one during dispatch (when the
actual workgroup size is passed to us).
Instead of replicating the logic in a separate function, reuse the
same logic for regular SIMD selection. And move function for that
together with the remaining simd selection functions.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13249>
Caio Marcelo de Oliveira Filho [Thu, 7 Oct 2021 07:23:07 +0000 (00:23 -0700)]
intel/compiler: Use SIMD selection helpers for CS
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13249>
Caio Marcelo de Oliveira Filho [Thu, 7 Oct 2021 05:37:42 +0000 (22:37 -0700)]
intel/compiler: Add helpers to select SIMD for compute shaders
Clean up the logic and move it to functions that work with prog_data
attributes to select the right SIMD. This shouldn't change any
behavior compared to the original.
Having it extracted will allow reuse by Task/Mesh and make it easier
to write tests.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13249>
Mike Blumenkrantz [Tue, 26 Oct 2021 15:05:31 +0000 (11:05 -0400)]
zink: stop exporting PIPE_SHADER_CAP_FP16_DERIVATIVES
spirv doesn't support this
fixes #5561
cc: mesa-stable
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13530>
Michael Tang [Fri, 8 Oct 2021 21:19:04 +0000 (14:19 -0700)]
microsoft/spirv_to_dxil: turn sysvals into input varyings
Fixes:
b47090c5b33 ("spirv: Always declare FragCoord as a sysval")
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13276>
Lionel Landwerlin [Tue, 26 Oct 2021 11:27:18 +0000 (14:27 +0300)]
anv: fix push constant lowering with bindless shaders
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
9fa1cdfe7ffd ("intel/rt: Implement push constants as global memory reads")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13529>
Mike Blumenkrantz [Fri, 22 Oct 2021 18:35:53 +0000 (14:35 -0400)]
zink: add notes about binding points which aren't counted in util funcs
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13490>
Mike Blumenkrantz [Fri, 22 Oct 2021 18:33:29 +0000 (14:33 -0400)]
zink: don't check rebind count outside of buffer/image rebind function
zink_resource_has_binds() only checks descriptor binds, and this doesn't
include streamout or fb bindings, so call these functions from the specific
rebind points to ensure those cases are also checked
fixes #5541
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13490>
Mike Blumenkrantz [Fri, 22 Oct 2021 18:32:40 +0000 (14:32 -0400)]
zink: only reset zink_resource::so_valid on buffer rebind
otherwise this is going to randomly modify some image properties
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13490>
Mike Blumenkrantz [Fri, 22 Oct 2021 18:24:48 +0000 (14:24 -0400)]
zink: don't break early when applying fb clears
a resource can be bound to multiple fb attachments, each with
its own clear, so ensure that all of these are applied
fixes #5542
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13491>
Mike Blumenkrantz [Fri, 22 Oct 2021 17:24:40 +0000 (13:24 -0400)]
zink: detect prim type more accurately for tess/gs lines
u_reduced_prim() can't determine the output primitive when vs isn't the
last vertex stage, so store this from the appropriate shader info and use
it when it's available
fixes #5547
cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13487>
Mike Blumenkrantz [Mon, 18 Oct 2021 16:05:51 +0000 (12:05 -0400)]
zink: split out descriptor pool sizing into separate struct
this migrates existing uses of zink_descriptor_layout_key to use
zink_descriptor_pool_key instead, which ends up being more helpful overall
since it puts all the pool-related data into a single struct
this also has a(n incredibly small) benefit of removing VkDescriptorPoolSize[6]
from every program data struct and deduplicating it into the descriptor
pool key set
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13483>
Mike Blumenkrantz [Mon, 18 Oct 2021 15:48:33 +0000 (11:48 -0400)]
zink: reduce hashed region of zink_descriptor_layout_key
only the first 3 members of VkDescriptorSetLayoutBinding are useful here
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13483>
Mike Blumenkrantz [Mon, 18 Oct 2021 15:33:38 +0000 (11:33 -0400)]
zink: eliminate a hole in zink_descriptor_layout_key
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13483>
Mike Blumenkrantz [Mon, 18 Oct 2021 15:24:13 +0000 (11:24 -0400)]
zink: rename zink_descriptor_layout_key::num_descriptors -> num_bindings
this was always misnamed and thus misleading
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13483>
Jose Fonseca [Mon, 25 Oct 2021 09:58:25 +0000 (10:58 +0100)]
d3d10umd: Update for set_sampler_views take_ownership parameter.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11973>
Jose Fonseca [Mon, 19 Jul 2021 13:39:45 +0000 (14:39 +0100)]
d3d10umd: Fix MSVC build.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11973>
Jose Fonseca [Mon, 19 Jul 2021 13:35:48 +0000 (14:35 +0100)]
d3d10umd: Update for transfer interface changes.
Update for
eb74f977693221eb1419f4827f549d48251f22da.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11973>
Jose Fonseca [Mon, 19 Jul 2021 13:34:06 +0000 (14:34 +0100)]
d3d10umd: Rename Dxgi.h to DxgiFns.h.
To avoid clashing with the WinSDK's dxgi.h header, which we'll need later.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11973>
Lionel Landwerlin [Wed, 20 Oct 2021 08:08:34 +0000 (11:08 +0300)]
vulkan/wsi/wayland: don't expose surface formats not fully supported
Depending on whether an application creates a swapchain with
VK_COMPOSITE_ALPHA_PRE_MULTIPLIED_BIT_KHR or not, we might use 2
different formats with the compositor.
This change makes sure that we support all the underlying formats
before exposing the corresponding VkFormat to the application.
v2: Don't forget get_formats2() (Ivan)
v3: Replace formats with availability boolean (Simon)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
151b65b21190 ("vulkan/wsi/wayland: generalize modifier handling")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5522
Reviewed-by: Ivan Briano <ivan.briano@intel.com> (v2)
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13453>
Derek Foreman [Mon, 25 Oct 2021 20:58:13 +0000 (15:58 -0500)]
panfrost: support PIPE_RESOURCE_PARAM_NPLANES query
While panfrost doesn't support multi-planar formats directly, we might
still import multi-planar BOs through GBM (for example, when doing direct
scanout in weston).
We can support PIPE_RESOURCE_PARAM_NPLANES by simply counting the
planes we have.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13039>
Derek Foreman [Mon, 25 Oct 2021 20:53:21 +0000 (15:53 -0500)]
panfrost: Support planar formats for scanout
While panfrost doesn't directly support planar formats, we can get here
from GBM. This happens, for example, when weston is trying to use a BO
for direct scanout.
Walk the list of planes to find the right one.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13039>
Samuel Pitoiset [Wed, 6 Oct 2021 09:53:47 +0000 (11:53 +0200)]
radv: lower the viewport index to zero when the VGT stage doesn't export it
This is allowed and the fragment shader should read zero.
No fossils db changes.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13222>
Ilia Mirkin [Mon, 25 Oct 2021 00:06:20 +0000 (20:06 -0400)]
meson: build freedreno tools when other parts of freedreno not enabled
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13510>
Ilia Mirkin [Mon, 25 Oct 2021 00:05:40 +0000 (20:05 -0400)]
freedreno: support lua54
This is the default version in gentoo, and it apparently uses the lua54
variant rather than lua.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13510>
Rob Clark [Mon, 25 Oct 2021 22:59:23 +0000 (15:59 -0700)]
freedreno/drm: Move suballoc_bo to device
Having it in msm_pipe isn't saving any locking. But it does mean that
cleanup_fences() can drop the last pipe reference, which in turn drops
the last suballoc_bo reference, which can cause recursion back into the
bo cache.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5562
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13521>
Rob Clark [Mon, 25 Oct 2021 17:13:25 +0000 (10:13 -0700)]
freedreno/drm: Add some asserts
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13521>
Marek Olšák [Wed, 20 Oct 2021 02:45:47 +0000 (22:45 -0400)]
mesa: add a no_error path to _mesa_handle_bind_buffer_gen
It only helps when it's inlined, which is true for glBindBuffer.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13513>
Marek Olšák [Mon, 25 Oct 2021 00:39:11 +0000 (20:39 -0400)]
mesa: remove redundant flagging USAGE_ARRAY_BUFFER
We do that in gl*Pointer, glBindVertexBuffer, etc.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13513>
Marek Olšák [Wed, 20 Oct 2021 03:48:51 +0000 (23:48 -0400)]
mesa: move setting USAGE_PIXEL_PACK_BUFFER out of BindBuffer to reduce overhead
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13513>
Marek Olšák [Wed, 20 Oct 2021 03:30:07 +0000 (23:30 -0400)]
mesa: remove USAGE_ELEMENT_ARRAY_BUFFER because it's unused and adding overhead
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13513>
Boris Brezillon [Mon, 25 Oct 2021 16:37:21 +0000 (18:37 +0200)]
vulkan: Fix entrypoint generation when compiling for x86 with MSVC
When compiling for x86 with MSVC, Vulkan API entry points follow the
__stdcall convention (VKAPI_CALL maps to __stdcall), which uses the
following name mangling:
_<function_name>@<arguments_size>
Fix the vk_entrypoint_stub()/alternatename definitions accordingly.
Fixes:
6d44b21d4fd ("vulkan: Fix weak symbol emulation when compiling with MSVC")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13516>
Danylo Piliaiev [Wed, 20 Oct 2021 14:36:27 +0000 (17:36 +0300)]
nir/serialize: Make more space for intrinsic_op allowing 1024 ops
We are close to the limit of 512 intrinsics, make more space to
be able to support up to 1024 intrinsics.
Take one bit from packed_const_indices, they shouldn't suffer in
a common case.
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13456>
Samuel Pitoiset [Mon, 25 Oct 2021 11:58:20 +0000 (13:58 +0200)]
aco: only load streamout buffers if streamout is enabled
The streamout_config SGPR is used to determine if streamout is enabled.
This fixes a GPU hang with various transform feedback tests:
- dEQP-GLES3.functional.transform_feedback.*
- KHR-GL46.transform_feedback.api_errors_test
- KHR-GL46.draw_indirect.basic-draw*-xfbPaused
- KHR-GL46.geometry_shader.api.draw_calls_while_tf_is_paused
Cc: 21.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13514>
Samuel Pitoiset [Wed, 13 Oct 2021 16:53:13 +0000 (18:53 +0200)]
radv: report error messages when the driver can't be initialized
Not only with RADV_DEBUG=startup.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13343>
Samuel Pitoiset [Wed, 20 Oct 2021 07:23:26 +0000 (09:23 +0200)]
radv: fix build errors with Android
Fixes:
49c3a88fadd ("radv: implement VK_KHR_format_feature_flags2")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5518
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13450>
Samuel Pitoiset [Wed, 20 Oct 2021 07:49:27 +0000 (09:49 +0200)]
radv: remove old RADV_TRACE_FILE warning
It has been replaced by RADV_DEBUG=hang a year ago.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13452>
Alyssa Rosenzweig [Tue, 5 Oct 2021 22:52:13 +0000 (18:52 -0400)]
panfrost: Remove duplicated #if
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13208>
Alyssa Rosenzweig [Tue, 5 Oct 2021 20:17:02 +0000 (16:17 -0400)]
panfrost: Remove ancient TODO
This was implemented ages ago.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13208>
Alyssa Rosenzweig [Tue, 5 Oct 2021 20:18:22 +0000 (16:18 -0400)]
panfrost: Enable AFBC on v7
The bugs blocking this have been resolved, so flip on AFBC again and get
moar fps.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13205>
Alyssa Rosenzweig [Sat, 16 Oct 2021 23:44:53 +0000 (19:44 -0400)]
panfrost: Decompress for incompatible AFBC formats
AFBC is keyed to the format. Depending on the hardware, we'll get an
Invalid Data Fault or a GPU timeout if we attempt to sample from an
AFBC-compressed RGBA8 texture as R32F (for example).
Fixes Piglit ./bin/arb_texture_view-rendering-formats_gles3 with AFBC.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13205>
Alyssa Rosenzweig [Sat, 16 Oct 2021 23:45:27 +0000 (19:45 -0400)]
panfrost: Add internal afbc_formats
We need to know the internal (physical) formats used for AFBC of a given
logical format, in order to check format compatibility and determine if
we need to decompress AFBC for conformance.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13205>
Alyssa Rosenzweig [Tue, 5 Oct 2021 23:20:03 +0000 (19:20 -0400)]
panfrost: Workaround ISSUE_TSIX_2033
According to mali_kbase, all Bifrost and Valhall GPUs are affected by
issue TSIX_2033. This hardware bug breaks the INTERSECT frame shader
mode when forcing clean_tile_writes. What does that mean?
The hardware considers a tile "clean" if it has been cleared but not
drawn to. Setting clean_tile_write forces the hardware to write back
such "clean" tiles to main memory.
Bifrost hardware supports frame shaders, which insert a rectangle into
every tile according to a configured rule. Frame shaders are used in
Panfrost to implement tile reloads (i.e. LOAD_OP_LOAD). Two modes are
relevant to the current discussion: ALWAYS, which always inserts a frame
shader, and INTERSECT, which tries to only insert where there is
geometry. Normally, we use INTERSECT for tile reloads as it is more
efficient than ALWAYS-- it allows us to skip reloads of tiles that are
discarded and never written back to memory.
From a software perspective, Panfrost's current logic is correct: if we
clear, we set clean_tile_writes, else we use an INTERSECT frame shader.
There is no software interaction between the two.
Unfortunately, there is a hardware interaction. The hardware forces
clean_tile_writes in certain circumstances when AFBC is used.
Ordinarily, this is a hardware implementation detail and invisible to
software. Unfortunately, this implicit clean tile write is enough to
trigger the hardware bug when using INTERSECT. As such, we need to
detect this case and use ALWAYS instead of INTERSECT for correct
results.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13205>
Alyssa Rosenzweig [Sat, 16 Oct 2021 20:14:00 +0000 (16:14 -0400)]
panfrost: Fix gl_FragColor lowering
The gl_FragColor lowering in the fragment shader depends on the number
of render targets, which can change every set_framebuffer_state.
set_framebuffer_state thus needs to force a rebind of the fragment
shader.
Fixes a regression in Piglit fbo-drawbuffers-none gl_FragColor -auto
-fbo from enabling AFBC on Mali G52.
Fixes:
28ac4d1e005 ("panfrost: Call nir_lower_fragcolor based on key")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13498>
Alyssa Rosenzweig [Tue, 5 Oct 2021 20:09:27 +0000 (16:09 -0400)]
panfrost: Remove unused MIDGARD_NO_AFBC quirk
This is not Midgard-specific and is handled outside of the quirks
infrastructure now.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13497>
Alyssa Rosenzweig [Tue, 5 Oct 2021 20:05:56 +0000 (16:05 -0400)]
panfrost,panvk: Use dev->has_afbc instead of quirks
This uses the new property for AFBC we've added. The AFBC quirk is
applied only to v4, and we only set dev->has_afbc on v5+ so this is not
a regression. It now respects the hardware-specific AFBC disable.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13497>
Alyssa Rosenzweig [Tue, 5 Oct 2021 20:01:00 +0000 (16:01 -0400)]
panfrost: Detect implementations support AFBC
AFBC is an optional feature on Bifrost. If it is missing, a bit will be
set in the poorly named AFBC_FEATURES register. Check this so we can act
appropriately.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13497>
Emma Anholt [Thu, 21 Oct 2021 20:06:38 +0000 (13:06 -0700)]
turnip: Drop the assertion about the temporary bit in sync fd imports.
Khronos's conclusion was that you only need the bit when you want
temporary and there's a choice between temporary and permanent.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13473>
Emma Anholt [Tue, 19 Oct 2021 22:36:09 +0000 (15:36 -0700)]
gallium/u_blitter: Read MSAA z/s from sampler's .x instead of .y or .z.
u_format defines depth formats as having depth in .x, mesa/st samples for
depth or stencil in .x (not making use of any other channels).
util_make_fs_blit_zs() looks for depth or stencil in .x. The MSAA path
was the exception looking for it in .z or .y, which was causing drivers to
need to splat their values out to the other channels. This should be
better on hardware that can emit shorter messages for sampling just the
first channels.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13446>
Paulo Zanoni [Tue, 19 Oct 2021 20:13:48 +0000 (13:13 -0700)]
iris: also dump bo's imported and exported flags
My original patch also aligned the columns for better printing, but
Ken's recent suballocation series incorporated those changes. My
original patch was also printing the EXEC_OBJECT_ASYNC flag, but this
is not possible anymore as we don't have the validation list here. But
it's fine since EXEC_OBJECT_ASYNC is conditional on
iris_bo_is_external(), which is true for either exported or imported.
Example output:
BO list (length 13):
[ 0]: 8 ( 8) command buffer @ 0xfffffffefffdd000 (system 65536B) 2 refs
[ 1]: 1 ( 1) workaround @ 0xfffffffefffff000 (system 4096B) 3 refs
[ 2]: 14 ( 14) dynamic state @ 0x00000002fffef000 (system 65536B) 2 refs write
[ 3]: 0 ( 10) miptree @ 0xfffffffeffc00000 (system 471104B) 4 refs write
[ 4]: 15 ( 15) shader kernels @ 0x00000000ffff7000 (system 16384B) 2 refs
[ 5]: 0 ( 13) buffer @ 0xfffffffefe700000 (system
1048576B) 2 refs
[ 6]: 4 ( 4) surface state @ 0x00000001fffef000 (system 65536B) 2 refs
[ 7]: 3 ( 3) binder @ 0x0000000100000000 (system 65536B) 2 refs
[ 8]: 18 ( 18) miptree @ 0xfffffffeffebd000 (system 524288B) 2 refs write exported
[ 9]: 11 ( 11) buffer @ 0xfffffffefe800000 (system
20971520B) 2 refs
[10]: 0 ( 13) buffer @ 0xfffffffefe600000 (system
1048576B) 2 refs
[11]: 12 ( 12) shader kernels @ 0x00000000ffffb000 (system 16384B) 2 refs
[12]: 5 ( 5) buffer @ 0xfffffffeffffe000 (system 4096B) 2 refs write
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12654>
Marek Olšák [Thu, 21 Oct 2021 19:40:20 +0000 (15:40 -0400)]
st/mesa: don't crash when draw indirect buffer has no storage
Fixes:
22f6624ed318e8 - gallium: separate indirect stuff from pipe_draw_info
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13471>
Matt Turner [Wed, 8 Sep 2021 00:32:38 +0000 (17:32 -0700)]
tu: Expose required VK_FORMAT_FEATURE bits for planar YUV formats
Specifically this enables these VK_FORMAT_FEATURE bits:
VK_FORMAT_FEATURE_TRANSFER_SRC_BIT
VK_FORMAT_FEATURE_TRANSFER_DST_BIT
VK_FORMAT_FEATURE_SAMPLED_IMAGE_YCBCR_CONVERSION_LINEAR_FILTER_BIT
VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_MINMAX_BIT
VK_FORMAT_FEATURE_SAMPLED_IMAGE_FILTER_LINEAR_BIT
VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT
VK_FORMAT_FEATURE_MIDPOINT_CHROMA_SAMPLES_BIT
VK_FORMAT_FEATURE_COSITED_CHROMA_SAMPLES_BIT
Fixes the following tests:
dEQP-VK.api.info.format_properties.g8_b8_r8_3plane_420_unorm
dEQP-VK.api.info.format_properties.g8_b8r8_2plane_420_unorm
dEQP-VK.api.info.image_format_properties.2d.optimal.g8_b8_r8_3plane_420_unorm
dEQP-VK.api.info.image_format_properties.2d.optimal.g8_b8r8_2plane_420_unorm
Additionally allows 339 tests in dEQP-VK.ycbcr.* to go from Skip to
Pass.
[ Connor: Fake support for 3-plane formats, fixup modifiers path ]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
Jonathan Marek [Sun, 20 Sep 2020 00:24:07 +0000 (20:24 -0400)]
turnip: enable UBWC for NV12
Use the special format for accessing the Y plane of UBWC-enabled NV12, and
enable UBWC for NV12.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
Connor Abbott [Tue, 19 Oct 2021 15:52:22 +0000 (17:52 +0200)]
tu: Emit GRAS_LRZ_MRT_BUF_INFO_0
The blob seems to always emit this, even though it seems to only be used
when rendering to the special planar formats (which we only do in the
blit path). Based on the LRZ prefix it might used in other cases though.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
Connor Abbott [Tue, 19 Oct 2021 15:36:50 +0000 (17:36 +0200)]
freedreno/a6xx: Rename GRAS_2D_BLIT_INFO
It's not actually used for 2d blits, it's supposed to mirror
RB_MRT_BUF_INFO[0].COLOR_FORMAT and seems to be used only when rendering
to the special planar formats, although the blob name seems to suggest
it's connected to LRZ.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
Jonathan Marek [Sat, 19 Sep 2020 19:56:40 +0000 (15:56 -0400)]
freedreno/layout: Fix the UBWC block size for the Y plane
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
Matt Turner [Wed, 1 Sep 2021 23:03:39 +0000 (16:03 -0700)]
util/format: Add PIPE_FORMAT_Y8_UNORM as an "other" layout format
freedreno has a different layout for tiled Y8 planes from normal R8
textures, so we need to be able to talk about them separately.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6792>
Iago Toral Quiroga [Fri, 22 Oct 2021 09:29:44 +0000 (11:29 +0200)]
v3dv: refactor TFU jobs
We had an implementation for image copies and another for buffer to
image copies. Refactor the code so we have a single implementation
of this.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13481>
Tapani Pälli [Thu, 21 Oct 2021 08:02:34 +0000 (11:02 +0300)]
iris: clear bos_written when resetting a batch
This fixes dEQP-EGL.functional.sharing.gles2.multithread.* tests that
are hitting: "iris: Failed to submit batchbuffer: Invalid argument"
error.
v2: clear on reset rather than clear 'on-the-fly' (Kenneth Graunke)
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5537
Fixes:
e4c3d3efc7a ("iris: Defer construction of the validation (exec_object2) list")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13464>
Samuel Pitoiset [Fri, 15 Oct 2021 12:27:38 +0000 (14:27 +0200)]
radv: re-emit prolog inputs when the nontrivial divisors state changed
If the application first uses nontrivial divisors, the driver emits
the vertex shader VA to the upload BO rather than directly via the
user SGPRs locations. But, if the vertex input dynamic state changes,
the driver might select a different VS prolog that no longer needs
nontrivial divisors.
In this case, the driver needs to re-emit the prolog inputs because
otherwise the VS prolog will jump to the PC that is emitted via the
user SGPR locations, and the previous one was somewhere in the
upload BO...
This fixes a GPU hang with Bioshock and Zink.
Fixes:
d9c7a175424 ("radv: enable VK_EXT_vertex_input_dynamic_state")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13377>
Samuel Pitoiset [Fri, 8 Oct 2021 14:14:15 +0000 (16:14 +0200)]
radv,aco: decouple shader_info/options from radv_shader_args
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13287>
Kenneth Graunke [Thu, 21 Oct 2021 23:38:56 +0000 (16:38 -0700)]
crocus: Replace devinfo->ver[x10] checks with GFX_VER[x10]
These files are compiled per-generation, so we can just use the #define
instead of the actual field dereference to allow the compiler to dead
code eliminate whole paths.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13475>
Iago Toral Quiroga [Thu, 21 Oct 2021 09:35:28 +0000 (11:35 +0200)]
broadcom/compiler: fix assert that current instruction must be in current block
This was not considering the possibility that the driver has called
nir_before_block() or nir_after_block() to update the cursor, in which
case the cursor link points to the instruction list header and not
to an actual instruction.
Fixes incorrect debug-assert crash in:
dEQP-VK.graphicsfuzz.cov-increment-vector-component-with-matrix-copy
Fixes:
265515fa62 ("broadcom/compiler: check instruction belongs to current block")
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13467>
Kenneth Graunke [Thu, 7 Oct 2021 19:38:03 +0000 (12:38 -0700)]
intel: Drop Tigerlake revision 0 workarounds
Tigerlake revision 0 is an early stepping that should not be used in
production anywhere, so this code was only used for hardware bringup.
We can drop the unnecessary workarounds. This also keeps them from
triggering on early steppings of other Gfx12 parts.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13266>
Marek Olšák [Tue, 19 Oct 2021 02:25:25 +0000 (22:25 -0400)]
mesa: discard draws with count=0 to decrease overhead
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13445>
Nanley Chery [Tue, 20 Jul 2021 18:46:51 +0000 (11:46 -0700)]
iris: Refactor the assignment to possible_usages
* Make the outer if-ladder dependent on the has_* variables.
* Make the possible_usages assignments happen at the same nesting level.
* Move the combined HIZ/MCS assert closer to relevant if-else blocks.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11960>
Nanley Chery [Mon, 19 Jul 2021 17:16:56 +0000 (10:16 -0700)]
iris: Set DISABLE_AUX_BIT for AUX_USAGE_NONE modifiers
This avoids unnecessary surface padding on TGL+.
Also, drop some of the logic to handle modifiers in
iris_resource_configure_aux as the bit now causes it to be handled
implicitly.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11960>
Nanley Chery [Tue, 7 Sep 2021 15:08:32 +0000 (08:08 -0700)]
iris: Disable the MC_CCS modifier with norbc
We generally try to disable CCS whenever the norbc debug flag is set.
Also, this enables simplifying iris_resource_configure_aux later on.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11960>
Nanley Chery [Wed, 25 Aug 2021 17:34:20 +0000 (10:34 -0700)]
iris: Convert some mod_info checks to asserts
Depth and multisample images aren't supported with modifiers. So,
instead of checking for the absence of modifiers before adding HiZ or
MCS, simply assert that they aren't present at a more convenient time.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11960>
Rob Clark [Sun, 10 Oct 2021 16:33:46 +0000 (09:33 -0700)]
freedreno/ir3: Fix validation of subgroup macros
They don't need to enforce that src types are all the same.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
Rob Clark [Sun, 5 Sep 2021 19:35:06 +0000 (12:35 -0700)]
freedreno/ir3: Get req_local_mem from pipe_compute_state
mesa/st initializes req_local_mem to shader->info.shared_size. But for
clover the shared size doesn't come from the shader.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
Rob Clark [Sun, 29 Aug 2021 15:39:39 +0000 (08:39 -0700)]
freedreno/ir3: Add ihadd/uhadd
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
Rob Clark [Sat, 16 Oct 2021 17:30:44 +0000 (10:30 -0700)]
freedreno/ir3: Add wide load/store lowering
Lower load/store for vectors wider than 4.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
Rob Clark [Tue, 24 Aug 2021 00:18:55 +0000 (17:18 -0700)]
freedreno/ir3: Fix reg size validation
8b types also live in half-regs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
Rob Clark [Tue, 24 Aug 2021 00:18:53 +0000 (17:18 -0700)]
freedreno/ir3: Fix load/store_global_ir3 type
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
Rob Clark [Tue, 24 Aug 2021 00:18:50 +0000 (17:18 -0700)]
freedreno/ir3: 8bit fixes
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
Rob Clark [Thu, 9 Sep 2021 17:38:48 +0000 (10:38 -0700)]
freedreno/ir3: 16b bools
A create_immed_for_instr() type thing could be useful to make the immed
type match other src(s) for instruction..
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
Rob Clark [Sat, 9 Oct 2021 18:16:29 +0000 (11:16 -0700)]
freedreno/ir3: Deal with zero-source instructions
Needed by the next patch, which starts treating bools as 16bit exposing
a bug that was previously accidentially hidden for instructions like
ELECT_MACRO. Needed for next patch.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
Rob Clark [Sun, 22 Aug 2021 17:31:44 +0000 (10:31 -0700)]
freedreno: Fix set_global_binding
The gallium interface is a bit awkward, but pointer sizes are actually
64b despite what the API suggests.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>
Rob Clark [Sun, 22 Aug 2021 15:27:54 +0000 (08:27 -0700)]
freedreno/ir3: Move lower_idiv_options
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13300>