Tom Rini [Mon, 14 Dec 2020 20:11:05 +0000 (15:11 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Fix wrong amoswap t1 usage in startup.
- Reset the board after crash.
- Enable distro booting from an attached SCSI disk for QEMU.
- Support the optional header fields in efi header.
Leo Yu-Chi Liang [Mon, 16 Nov 2020 09:07:41 +0000 (17:07 +0800)]
riscv: Complete efi header for RV32/64
This patch depends on Atish's patch.
(https://patchwork.ozlabs.org/project/uboot/patch/
20201013192331.3236458-1-atish.patra@wdc.com/)
Add fields to complete Optional Header "Data Directories" specified in the document.
(https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Cc: alankao@andestech.com
Cc: atish.patra@wdc.com
Cc: xypron.glpk@gmx.de
Cc: bmeng.cn@gmail.com
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Leo Yu-Chi Liang [Thu, 12 Nov 2020 02:09:52 +0000 (10:09 +0800)]
riscv: Fix efi header size for RV32
This patch depends on Atish's patch.
(https://patchwork.ozlabs.org/project/uboot/patch/
20201013192331.3236458-1-atish.patra@wdc.com/)
Modify the size of the Optional Header "Windows-Specific Fields" to fit with the specification.
(https://docs.microsoft.com/en-us/windows/win32/debug/pe-format)
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Cc: rick@andestech.com
Cc: alankao@andestech.com
Cc: atish.patra@wdc.com
Cc: xypron.glpk@gmx.de
Cc: bmeng.cn@gmail.com
Atish Patra [Tue, 13 Oct 2020 19:23:31 +0000 (12:23 -0700)]
riscv: Fix efi header for RV32
RV32 should use PE32 format instead of PE32+ as the efi header format.
This requires following changes
1. A different header magic value
2. An additional parameter known as BaseOfData. Currently, it is set to
zero in absence of any usage.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Heinrich Schuchardt [Tue, 1 Dec 2020 16:30:26 +0000 (17:30 +0100)]
riscv: qemu: enable distro boot from scsi
Booting via distro boot fails for:
qemu-system-riscv64
-drive if=none,file=sct-riscv64.img,format=raw,id=mydisk \
-device ich9-ahci,id=ahci -device ide-hd,drive=mydisk,bus=ahci.0
Enable distro booting from an attached SCSI disk.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Heinrich Schuchardt [Wed, 2 Dec 2020 13:36:26 +0000 (14:36 +0100)]
riscv: reset after crash
If an exception occurs on ARM or x86, we call panic() which will try to
reset the board. Do the same on RISC-V.
To avoid -Werror=format-zero-length move a '\n' to the string passed to
panic. We don't need a message here as depending on CONFIG_PANIC_HANG we
will either see
### ERROR ### Please RESET the board ###
or
resetting ...
as next message.
Reviewed-by: Rick Chen <rick@andestech.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Brad Kim [Fri, 13 Nov 2020 11:47:51 +0000 (20:47 +0900)]
riscv: fix the wrong swap value register
Not s2 register, t1 register is correct
Fortunately, it works because t1 register has a garbage value
Signed-off-by: Brad Kim <brad.kim@semifive.com>
Reviewed-by: Lukas Auer <lukas@auer.io>
Reviewed-by: Leo Liang <ycliang@andestech.com>
Tom Rini [Fri, 11 Dec 2020 20:55:17 +0000 (15:55 -0500)]
Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
Second set of u-boot-atmel fixes for 2021.01 cycle
This set includes very important fixes for: MMC booting on several
boards, drive strength on sam9x60ek mmc lines, compile issues for
timer.c old driver, removal of unwanted access to sam9x60 bit for
oscillator bypass mode, and eeproms read on sama5d2_icp.
Eugen Hristev [Mon, 7 Dec 2020 07:30:59 +0000 (09:30 +0200)]
ARM: dts: at91: sama5d2_icp: fix i2c eeprom compatible
The correct compatible for this eeproms is microchip,
24aa02e48
The previous compatible string was working up to U-boot 2020.04.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Tom Rini [Fri, 11 Dec 2020 14:35:03 +0000 (09:35 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Add lx2162 soc, lx2162qds support.
- Bug-fixes related ls102x-usb, ifc, bootcmd, secure-boot header,
- rgmii, vid, fdt, env variable, pci for Layerscape products
Hui Song [Fri, 4 Dec 2020 15:56:19 +0000 (21:26 +0530)]
configs: lx2162aqds: Enable gpio driver in defconfig
make lx2162aqds platform to enable gpio driver.
Signed-off-by: Hui Song <hui.song_1@nxp.com>
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Aleksandar Gerasimovski [Thu, 26 Nov 2020 10:52:41 +0000 (10:52 +0000)]
arm: ls102xa: select USB PHY erratum's only if USB is enabled
The USB support is not by default enabled on all designs, so it does not
make seance to have USB specific erratum's enabled on such a designs.
On our internal Hitachi-Powergrids design not using the USB controller
there is a crash when accessing those specific memory locations selected
by the erratum flags.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Aleksandar Gerasimovski [Thu, 26 Nov 2020 10:45:16 +0000 (10:45 +0000)]
drivers: ifc: add define for IFC_CSPRn TE bit
To drive TE pin high is supported IFC configuration that can be used on
some designs.
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Chris Packham [Thu, 3 Dec 2020 03:24:29 +0000 (16:24 +1300)]
powerpc: mpc85xx: Allow boards to override CONFIG_USB_MAX_CONTROLLER_COUNT
If the board isn't strapped to enable USB1 then attempting to access it
will result in a hang. Avoid this by allowing boards to define
CONFIG_USB_MAX_CONTROLLER_COUNT.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Alban Bedel [Tue, 17 Nov 2020 15:20:04 +0000 (16:20 +0100)]
armv8: fsl-layerscape: Fix automatic setting of bootmcd with TF-A
When booting from TF-A there is a logic that attempt to detect if the
default environment is used, if this is the case it then set the
`bootcmd` and `mcinitcmd` depending of the device we booted from.
This detection logic is dubious as it access internals of the env
implementation and it doesn't always work correctly.
First of all it detect any valid environment as not being the
default, so after running `env default -a && saveenv` the board
doesn't boot anymore as `bootcmd` is then empty.
But it also fails in some other ways, for example it always detect a
default environment when redundant env is enabled on MMC, so in that
case `bootcmd` is overwritten on every boot.
Instead of increasing the complexity of the detection just check if
`bootcmd` and `mcinitcmd` are set in the environment and set them if
they are not.
Signed-off-by: Alban Bedel <alban.bedel@aerq.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Thu, 5 Nov 2020 11:28:12 +0000 (19:28 +0800)]
net: pfe_eth: read PFE ESBC header flash with spi_flash_read API
Read PFE ESBC header flash with spi_flash_read API
- logs as follows,
Net: SF: Detected s25fs512s with page size 256 Bytes, erase size 256
KiB, total 64 MiB
"Synchronous Abort" handler, esr 0x96000210
elr:
000000008206db44 lr :
0000000082004ea0 (reloc)
elr:
00000000b7ba6b44 lr :
00000000b7b3dea0
x0 :
00000000b79407e8 x1 :
0000000040640000
x2 :
0000000000000050 x3 :
0000000000000000
x4 :
000000000000000a x5 :
0000000000000050
x6 :
0000000000000366 x7 :
00000000b7942308
x8 :
00000000b76407c0 x9 :
0000000000000008
x10:
0000000000000044 x11:
00000000b7634d1c
x12:
000000000000004f x13:
0000000000000044
x14:
00000000b7634d98 x15:
00000000b76407c0
x16:
0000000000000000 x17:
0000000000000000
x18:
00000000b7636dd8 x19:
0000000000000000
x20:
00000000b79407d0 x21:
00000000b79407e8
x22:
0000000040640000 x23:
00000000b7634e58
x24:
0000000000000000 x25:
0000000003800000
x26:
00000000b7bdd000 x27:
0000000000000000
x28:
0000000000000000 x29:
00000000b7634d10
Code:
d2800003 eb03005f 54000101 d65f03c0 (
f8636826)
Resetting CPU ...
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Manish Tomar [Thu, 5 Nov 2020 08:38:56 +0000 (14:08 +0530)]
lx2160a: Fix address for secure boot headers
Update kernel_size_sd variable with correct value for lx2160a.
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Manish Tomar [Thu, 5 Nov 2020 08:38:55 +0000 (14:08 +0530)]
ls1043a: Fix address for secure boot headers
Update kernelheader_addr and kernelheader_addr variables with
correct values for ls1043a.
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Priyanka Singh [Mon, 2 Nov 2020 06:08:41 +0000 (11:38 +0530)]
layerscape: fdt.c: Check for NULL return value from fdt_getprop()
Check for NULL return value from fdt_getprop() in
fdt_fixup_remove_jr()
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
[Fixed checkpatch errors/warnings]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Wed, 4 Nov 2020 13:09:17 +0000 (15:09 +0200)]
board: freescale: powerpc: add support for all RGMII modes
Make sure all RGMII internal delay modes are covered.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Madalin Bucur [Wed, 4 Nov 2020 13:09:16 +0000 (15:09 +0200)]
armv8: ls1043/ls1046aqds: add support for all RGMII modes
Make sure all RGMII internal delay modes are covered.
Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Priyanka Singh [Tue, 27 Oct 2020 10:20:14 +0000 (15:50 +0530)]
board: freescale: vid.c: Initialize variable 'i2caddress'
Initialize variable 'i2caddress' in adjust_vdd() to zero
Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Mon, 26 Oct 2020 08:52:36 +0000 (16:52 +0800)]
include/configs: ls1012aqds: add default environment variable
This adds default environment variable for ls1012aqds
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Biwen Li [Mon, 26 Oct 2020 07:14:05 +0000 (15:14 +0800)]
board/freescale/common: fix a bug that failed to read/write eeprom on ls1021atsn
Fix a bug that failed to read/write eeprom on ls1021atsn
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Hou Zhiqiang [Mon, 26 Oct 2020 03:57:42 +0000 (11:57 +0800)]
pci: layerscape: fix a dead loop issue
Fixes: commit
8ec619f8fd84 ("pci: layerscape: Fixup PCIe EP
mode DT nodes for LX2160A rev2")
This added the PCIe EP nodes fixup of LX2160A, but it
didn't update the condition value when there isn't a
property 'apio-wins'.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[Fixed checkpatch error]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Yangbo Lu [Tue, 13 Oct 2020 06:17:35 +0000 (14:17 +0800)]
configs: lx2162aqds: enable eMMC HS400 mode support
Enable eMMC HS400 mode support on LX2162AQDS.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Yangbo Lu [Fri, 4 Dec 2020 15:01:26 +0000 (20:31 +0530)]
configs: lx2162aqds: enable CONFIG_BOARD_EARLY_INIT_R
Enable CONFIG_BOARD_EARLY_INIT_R for SDHC adapter card
identification and configuration.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Ruchika Gupta [Mon, 28 Sep 2020 12:51:54 +0000 (18:21 +0530)]
configs: lx2162a: Enable OPTEE support
Enable support to compile OPTEE driver, access AVB TA
and RPMB API's access via RPC from OPTEE for lx2162
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Meenakshi Aggarwal [Fri, 4 Dec 2020 14:47:28 +0000 (20:17 +0530)]
armv8: lx2162aqds: Add support for LX2162AQDS platform
This patch add base support for LX2162AQDS board.
LX2162AQDS board supports LX2162A family SoCs.
This patch add basic support of platform.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: hui.song <hui.song_1@nxp.com>
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Vikas Singh <vikas.singh@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Meenakshi Aggarwal [Thu, 29 Oct 2020 13:46:16 +0000 (19:16 +0530)]
armv8: lx2162a: Add Soc changes to support LX2162A
LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.
LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Fixed whitespace errors]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Meenakshi Aggarwal [Thu, 29 Oct 2020 13:46:15 +0000 (19:16 +0530)]
drivers/net/phy: Add CORTINA_NO_FW_UPLOAD to Kconfig
Move CORTINA_NO_FW_UPLOAD to Kconfig file so that it can
be controlled via defconfig files.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Mon, 28 Sep 2020 10:56:14 +0000 (16:26 +0530)]
pci: ls_pcie_g4: Add size check for config resource
resource "config" is required to have minimum 4KB space
to access all config space of PCI Express EP.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Mon, 28 Sep 2020 10:56:13 +0000 (16:26 +0530)]
pci: layerscape: Add size check for config resource
resource "config" is required to have minimum 8KB space
as per hardware documentation.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Mon, 28 Sep 2020 10:56:12 +0000 (16:26 +0530)]
arm: dts: ls1028a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Mon, 28 Sep 2020 10:56:11 +0000 (16:26 +0530)]
arm: dts: ls1043a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Mon, 28 Sep 2020 10:56:10 +0000 (16:26 +0530)]
arm: dts: ls1012a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Mon, 28 Sep 2020 10:56:09 +0000 (16:26 +0530)]
arm: dts: ls1088a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Mon, 28 Sep 2020 10:56:08 +0000 (16:26 +0530)]
arm: dts: ls2080a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Mon, 28 Sep 2020 10:56:07 +0000 (16:26 +0530)]
arm: dts: ls1046a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Fri, 4 Dec 2020 14:41:53 +0000 (20:11 +0530)]
arm: dts: lx2160a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Mon, 28 Sep 2020 10:56:05 +0000 (16:26 +0530)]
pci: ls_pcie_g4: Print pcie controller number starting from 1
Print pcie controller number starting from 1
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Wasim Khan [Mon, 28 Sep 2020 10:56:04 +0000 (16:26 +0530)]
pci: layerscape: Update print of pcie controller
Print pcie controller number starting from 1
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Trimmed subject]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Mon, 28 Sep 2020 10:56:03 +0000 (16:26 +0530)]
configs: lx2160a: Enable CONFIG_PCIE_LAYERSCAPE_GEN4
LX2160A-Rev1 uses PCIe layerscape Gen4 controller.
Enable CONFIG_PCIE_LAYERSCAPE_GEN4 for lx2160a.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Tom Rini [Wed, 9 Dec 2020 16:36:41 +0000 (11:36 -0500)]
Merge tag 'u-boot-stm32-
20201209' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
- Enable internal pull-ups for SDMMC1 on DHCOM SoM
Marek Vasut [Tue, 1 Dec 2020 10:29:20 +0000 (11:29 +0100)]
ARM: dts: stm32: Add USB OTG ID pin on DH AV96
Add USB OTG ID pin mux and switch the USB OTG port
from peripheral to OTG mode.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Tue, 1 Dec 2020 10:29:19 +0000 (11:29 +0100)]
ARM: dts: stm32: Enable SDMMC3 on DH DRC02
The DH DRC02 board has an on-board microSD slot,
add DT properties to enable the slot.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Tue, 1 Dec 2020 10:29:18 +0000 (11:29 +0100)]
ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock
The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Marek Vasut [Tue, 1 Dec 2020 10:29:17 +0000 (11:29 +0100)]
ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
The default state of SD bus and clock line is logical HI. SD card IO is
open-drain and pulls the bus lines LO. Always enable the SD bus pull ups
to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus
voltage level shifter, the pull ups are built into the level shifter,
however that has no negative impact.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Patrice Chotard [Wed, 2 Dec 2020 17:47:31 +0000 (18:47 +0100)]
.mailmap: map Patrick Delaunay and my email address
Add our new email address dedicated for upstream activities.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrice Chotard [Wed, 2 Dec 2020 17:47:30 +0000 (18:47 +0100)]
treewide: Update email address Patrick Delaunay and Patrice Chotard
Update Patrick and my email address with the one dedicated to
upstream activities.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrice Chotard [Wed, 2 Dec 2020 17:47:29 +0000 (18:47 +0100)]
MAINTAINERS: Update ARM STI and ARM STM STM32MP Arch maintainers emails
Update Patrick and my email address with the one dedicated to
upstream activities.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Manuel Reis [Wed, 25 Nov 2020 10:16:20 +0000 (10:16 +0000)]
add check for ignored CONFIG_ENV_EXT4_DEVICE_AND_PART definition
Check whether user has explicitly defined device and partition where
environment file will be located before using 'auto' i.e. bootable
partition
Voids the need to set such partition as bootable to work with the
'dev:auto' tuple
Signed-off-by: Manuel Reis <mluis.reis@gmail.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Michael Opdenacker <michael.opdenacker@bootlin.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tom Rini [Tue, 8 Dec 2020 14:53:03 +0000 (09:53 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-imx
Tom Rini [Mon, 7 Dec 2020 16:46:12 +0000 (11:46 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
threshold configuration (Joshua)
Tom Rini [Fri, 30 Oct 2020 01:22:03 +0000 (21:22 -0400)]
configs: migrate CONFIG_IMX_THERMAL to defconfigs
Done via moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Baruch Siach [Wed, 28 Oct 2020 07:38:52 +0000 (09:38 +0200)]
imx8mp_evk: README instruction fixes
Use the full name of firmware self extracting file to make it run.
Also, don't use sudo when not needed.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Oliver Graute [Fri, 20 Nov 2020 14:05:51 +0000 (15:05 +0100)]
doc: board: imx8qm-rom7720-a1.rst: convert readme to reST
Convert README to reStructuredText format.
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Claudiu Beznea [Wed, 2 Dec 2020 11:39:33 +0000 (13:39 +0200)]
clk: at91: sam9x60: remove the parsing of atmel, main-osc-bypass
Remove the parsing of atmel,main-osc-bypass DT property as the SAM9X60
have no support for crystal oscillator bypass. Setting this bit might
affect the device functionality.
Fixes:
a64862284f65 ("clk: at91: sam9x60: add support compatible with CCF")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Pali Rohár [Wed, 25 Nov 2020 18:20:10 +0000 (19:20 +0100)]
arm: mvebu: Espressobin: Detect presence of emmc at runtime
Try to initialize emmc in board_late_init() and if it fails then we know
that emmc device is not connected.
This allows to use in U-Boot just one DTS file for all Espressobin variants
and also to correctly set fdtfile env variable for Linux kernel.
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Reviewed-by: Andre Heider <a.heider@gmail.com>
Pali Rohár [Wed, 25 Nov 2020 18:20:09 +0000 (19:20 +0100)]
arm: mvebu: Espressobin: Add support for emmc into dts file
To simplify setup, configuration and compilation of u-boot, define emmc
node for all Espressobin boards. Espressobin boards without populated emmc
works correctly, just detection and initialization of emmc obviously fails.
Code for emmc is extracted from commit
f1a43c84a960 ("arm64: dts: a3720:
add support for espressobin with populated emmc").
Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
Pali Rohár [Wed, 25 Nov 2020 18:20:08 +0000 (19:20 +0100)]
Revert "arm64: dts: a3720: add support for espressobin with populated emmc"
This reverts commit
f1a43c84a960265309fa8365759de271a70c5a7e.
Pali Rohár [Wed, 25 Nov 2020 18:20:07 +0000 (19:20 +0100)]
Revert "arm64: dts: armada-3720-espressobin: split common parts to .dtsi"
This reverts commit
03bb6a9b1ed7085794c5f167307273d15c99d3f0.
Joshua Scott [Sun, 8 Nov 2020 21:14:08 +0000 (10:14 +1300)]
arm: mvebu: a38x: Configurable USB2 high-speed impedance threshold
Hardware testing of a board using the Armada 385 has shown that an
impedance threshold setting of 0x7 performs better in an eye-diagram
test than with Marvell's recommended value 0x6.
As other boards may still perform better with Marvell's reccomended value,
a configuration option is added with a default value of 0x6.
Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
Luka Kovacic [Thu, 29 Oct 2020 21:30:30 +0000 (22:30 +0100)]
arm: mvebu: puzzle-m801: Add a maintainer
Add Luka Perkov to Puzzle-M801 BOARD MAINTAINERS.
Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
Igor Opaniuk [Thu, 22 Oct 2020 08:21:43 +0000 (11:21 +0300)]
colibri-imx8x: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory
layout.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Igor Opaniuk [Thu, 22 Oct 2020 08:21:42 +0000 (11:21 +0300)]
apalis-imx8x: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory
layout.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Igor Opaniuk [Thu, 22 Oct 2020 08:21:41 +0000 (11:21 +0300)]
apalis-imx8: add implementation for board_mem_get_layout
Add implementation of board_mem_get_layout for overriding the memory
layout.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Marcel Ziswiler [Thu, 22 Oct 2020 08:21:40 +0000 (11:21 +0300)]
imx8: allow overriding memory layout
Introduce weak function board_mem_get_layout() which allows overriding
the memory layout from board code in runtime, useful for handling
different SKU versions.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Thu, 22 Oct 2020 08:21:39 +0000 (11:21 +0300)]
doc: board: apalis-imx8x: add documentation
This documents the u-boot build and deployment procedure.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Thu, 22 Oct 2020 08:21:38 +0000 (11:21 +0300)]
board: toradex: add apalis-imx8x 2gb wb it v1.1a module support
This commit adds initial support for the Toradex Apalis iMX8X 2GB WB
IT V1.1A System on Module support [1].
Boot log:
U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300)
CPU: NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
DRAM: 2 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In: serial@
5a070000
Out: serial@
5a070000
Err: serial@
5a070000
Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A,
Serial#
06617018
Net: eth0: ethernet@
5b040000 [PRIME]
Hit any key to stop autoboot: 0
Functionality wise the following is known to be working:
- eMMC and MMC/SD card
- Ethernet (*)
- GPIOs
- I2C
Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.
* With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1)
ETH PHY encounters bring up problems after reset, this will be fixed
soon on SCU FW side.
[1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Thu, 22 Oct 2020 08:21:37 +0000 (11:21 +0300)]
ARM: dts: fsl-imx8qxp-apalis: add initial device tree
Introduce initial hierarchy of device trees for Apalis iMX8X
System on Module.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Tim Harvey [Fri, 25 Sep 2020 15:08:35 +0000 (08:08 -0700)]
imx8m: fix cache setup for dynamic sdram size
the mem_map structure containing the size of SDRAM is used in various
cache functions in cache_v8.c thus we need to update it with the
sdram size the board is configured with as well. Without this
the cache functions do not get setup properly and can hang
in the case where a board reports more SDRAM than defined in
PHYS_SDRAM_SIZE.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Marcel Ziswiler [Wed, 28 Oct 2020 09:58:16 +0000 (11:58 +0200)]
verdin-imx8mm: automatic ram size detection
Implement board_phys_sdram_size() to automatically detect Verdin iMX8M
Mini DualLite 1GB vs. Verdin iMX8M Mini Quad 2GB.
Note: This only works if we keep using similar RAM chips!
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Marcel Ziswiler [Wed, 28 Oct 2020 09:58:15 +0000 (11:58 +0200)]
toradex: tdx-cfg-clock: fix i.mx 8m mini interactive
Now with them first Verdin iMX8M Mini DualLite modules in for bring-up
we got clarity how is_cpu_type() actually behaves.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Max Krummenacher [Wed, 28 Oct 2020 09:58:14 +0000 (11:58 +0200)]
verdin-imx8mm: spl: enable pca9450 i2c level translator
Enable PCA9450 i2c level translator, as this is used for the
on module ADC.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Max Krummenacher [Wed, 28 Oct 2020 09:58:13 +0000 (11:58 +0200)]
verdin-imx8mm: implement hardware version detection
And select the correct devicetree accordingly by setting the variant
environment variable.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Max Krummenacher [Wed, 28 Oct 2020 09:58:12 +0000 (11:58 +0200)]
verdin-imx8mm: spl: switch to pca9450 pmic
V1.1A HW switched the PMIC from BD71837 to PCA9450.
- Disable combined DVS in PCA9450_BUCK123_DVS.
- Increase DDR Voltage to 0.95V as we use a 1.5GHz RAM.
- Configure WDOG_B behaviour.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Max Krummenacher [Wed, 28 Oct 2020 09:58:11 +0000 (11:58 +0200)]
ARM: dts: imx8mm-verdin: follow changed pmic
The used PMIC has been changed from RHOM BD71837 to NXP PCA9450A.
Adjust the device tree accordingly.
Remove the old ADC node as the ADC has been changed and has no longer
a separate power rail.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Wed, 28 Oct 2020 09:58:10 +0000 (11:58 +0200)]
power: pmic: add SPL_DM_PMIC_PCA9450 symbol to Kconfig
Add SPL_DM_PMIC_PCA9450 symbol to Kconfig.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Max Krummenacher [Wed, 28 Oct 2020 09:58:09 +0000 (11:58 +0200)]
pca9450a: fix i2c address
The I2C address is 0x25, not 0x35. This according to the datasheet and
tests with a PCA9450A.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Marcel Ziswiler [Wed, 28 Oct 2020 09:58:08 +0000 (11:58 +0200)]
toradex: tdx-cfg-clock: add new i.mx 8m mini/plus skus
Add new i.MX 8M Mini/Plus SKUs to ConfigBlock handling:
0058: Verdin iMX8M Plus Quad 4GB Wi-Fi / BT IT
0059: Verdin iMX8M Mini Quad 2GB IT
0060: Verdin iMX8M Mini DualLite 1GB WB IT
0061: Verdin iMX8M Plus Quad 2GB
Rename existing SKU (use correct one):
Verdin iMX8M Nano SoloLite 1GB -> Verdin iMX8M Nano Quad 1GB Wi-Fi
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Haibo Chen [Tue, 3 Nov 2020 09:18:35 +0000 (17:18 +0800)]
mmc: fsl_esdhc_imx: optimize the timing setting
For imx usdhc/esdhc, once set the DDR_EN, enable the DDR mode, the
card clock will be divied by 2 automatically by the host. So need
to first config the DDR_EN correctly, then update the card clock.
This will make sure the actual card clock is as our expected.
IC also suggest config the DDR_EN firstly, then config the clock
divider.
For HS400/HS400ES mode, need to config the strobe dll, this need
to based on the correct target clock rate, so need to do this after
clock rate is update.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Oliver Graute [Wed, 4 Nov 2020 11:02:23 +0000 (12:02 +0100)]
imx: imx8qm_rom7720_a1: add missing DTS to the MAINTAINERS
add the dts file to the MAINTAINERS entry
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Ian Ray [Wed, 4 Nov 2020 16:18:43 +0000 (17:18 +0100)]
board: ge: bx50v3: check b850v3 power management watchdog
Set `bootcause' from b850v3 power management watchdog status.
Boot cause "REVERT" is no longer used, remove it.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Ian Ray [Wed, 4 Nov 2020 16:18:42 +0000 (17:18 +0100)]
board: ge: reduce VPD EEPROM partition size
Reduce vital product data size to match the latest specification.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Sebastian Reichel [Wed, 4 Nov 2020 16:18:41 +0000 (17:18 +0100)]
board: ge: bx50v3: reduce magic numbers
Use VPD product ID instead of confidx, so that we can easily reuse the
product ID defines and avoid some magic numbers.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Sebastian Reichel [Wed, 4 Nov 2020 16:18:40 +0000 (17:18 +0100)]
board: ge: bx50v3: drop unused pinmux defines
Remove pinmux defines, that are no longer used after
converting the code to devicetree.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Ian Ray [Wed, 4 Nov 2020 16:18:39 +0000 (17:18 +0100)]
board: ge: bx50v3: correct CONFIG_CMD_NFS
Fix typo in NFS command configuration check.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Sebastian Reichel [Wed, 4 Nov 2020 16:18:38 +0000 (17:18 +0100)]
board: ge: common: vpd: fix name
Commit
f692b479f02d changed the VPD partition name from "vpd" to
"vpd@0". Fix the VPD reader code to use the new name, so that
the VPD code keeps working.
Fixes:
f692b479f02d ("i2c: eeprom: Use reg property instead of offset and size")
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Haibo Chen [Thu, 5 Nov 2020 06:57:13 +0000 (14:57 +0800)]
mmc: fsl_esdhc_imx: add wait_dat0() support
Add wait_dat0() support, upper layer will use this callback.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Oliver Graute [Fri, 6 Nov 2020 08:09:29 +0000 (09:09 +0100)]
imx: ahab: fix implicit declaration warning
Fix the following warning:
arch/arm/mach-imx/imx8/ahab.c:105:3: warning: implicit declaration of function ‘flush_dcache_range’ [-Wimplicit-function-declaration]
flush_dcache_range(s, e);
^~~~~~~~~~~~~~~~~~
Include cpu_func.h header which declares the flush_dcache_range()
function.
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Oliver Graute [Fri, 6 Nov 2020 08:09:30 +0000 (09:09 +0100)]
imx: ahab: fix compiler warnings in debug
arch/arm/mach-imx/imx8/ahab.c: In function ‘authenticate_os_container’:
arch/arm/mach-imx/imx8/ahab.c:96:9: warning: format ‘%x’ expects argument of type
‘unsigned int’, but argument 9 has type ‘ulong {aka long unsigned int}’ [-Wformat=]
debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n",
Fix those by using "%lu" specified.
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Oliver Graute [Fri, 6 Nov 2020 08:09:31 +0000 (09:09 +0100)]
imx: ahab: Fix compiler warnings in printf
arch/arm/mach-imx/imx8/ahab.c:110:63: warning: format ‘%x’ expects
argument of type ‘unsigned int’, but argument 2 has type ‘u64 {aka long
long unsigned int}’ [-Wformat=]
Fix those by using %llx
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
Oliver Graute [Thu, 12 Nov 2020 10:51:04 +0000 (11:51 +0100)]
imx: clk: added IPG Clock for I2C on imx8qm
This patch fixes this clk issue on I2C on imx8qm
=> i2c bus
Bus 3: i2c@
5a830000
=> i2c dev 3
Setting bus to 3
Failed to enable ipg clk
Failure changing bus number (-524)
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Heiko Schocher [Mon, 30 Nov 2020 19:46:05 +0000 (20:46 +0100)]
imx: aristainetos: enable U-Boot Environment variables protection
enable Environment protection with:
CONFIG_ENV_APPEND=y
CONFIG_ENV_WRITEABLE_LIST=y
CONFIG_ENV_ACCESS_IGNORE_FORCE
and add board specific env_get_location()
function.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Mon, 30 Nov 2020 19:46:04 +0000 (20:46 +0100)]
arm: dts: aristainetos: sync with changes in linux
sync with comaptible changes in linux from
Krzysztof Kozlowski.
https://patchwork.kernel.org/project/linux-arm-kernel/patch/
20200930190143.27032-12-krzk@kernel.org/
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Mon, 30 Nov 2020 19:46:03 +0000 (20:46 +0100)]
imx6: add support for aristainetos2c_cslb board variant
add support for aristainetos2c_cslb board variant.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Mon, 30 Nov 2020 19:46:02 +0000 (20:46 +0100)]
imx6: remove not longer supported aristainetos boards
Removed aristainetos2, 2b, 2b-csl. This boards have been
recalled and destroyed.
Adapt board code to remove stuff not needed anymore.
Fix checkpatch warning, remove fdt_high and initrd_high
from default environment.
Signed-off-by: Heiko Schocher <hs@denx.de>
zu remove
Tom Rini [Sat, 5 Dec 2020 20:41:18 +0000 (15:41 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-tegra
- Assorted updates
Patrick Delaunay [Thu, 18 Jun 2020 07:41:34 +0000 (09:41 +0200)]
configs: cei-tk1-som: remove CONFIG_ARMV7_PSCI in include file
Activate ARCH_SUPPORT_PSCI as other TEGRA124 target and remove
CONFIG_ARMV7_PSCI and CONFIG_ARMV7_PSCI_NR_CPUS in configs file as they
are migrated in Kconfig.
Select CONFIG_ARMV7_PSCI_0_1 (the first PSCI version),
because CONFIG_ARMV7_PSCI_0_2 and CONFIG_ARMV7_PSCI_1_0
are not activated in this product.
Hi,
This patch depend on the previous serie [1].
I don't test this patch on real hardware but
after this patch the size of the binary don't change.
In .config we have:
CONFIG_ARCH_SUPPORT_PSCI=y
CONFIG_ARMV7_PSCI=y
# CONFIG_ARMV7_PSCI_1_0 is not set
# CONFIG_ARMV7_PSCI_0_2 is not set
CONFIG_ARMV7_PSCI_0_1=y
CONFIG_ARMV7_PSCI_NR_CPUS=4
In u-boot.cfg, this patch only add the 2 lines
#define CONFIG_ARCH_SUPPORT_PSCI 1
#define CONFIG_ARMV7_PSCI_0_1 1
[1] "Convert CONFIG_ARMV7_PSCI_1_0 and CONFIG_ARMV7_PSCI_0_2 to Kconfig"
http://patchwork.ozlabs.org/project/uboot/list/?series=184029
Regards
Patrick
END
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Peter Chubb <peter.chubb@data61.csiro.au>
Signed-off-by: Tom Warren <twarren@nvidia.com>
projects / platform / kernel / u-boot.git / log