Arnd Bergmann [Wed, 30 Nov 2016 21:59:48 +0000 (22:59 +0100)]
Merge tag 'qcom-dts-for-4.10-2' of git://git./linux/kernel/git/agross/linux into next/dt
Pull "Qualcomm Device Tree Changes for v4.10 - Part 2" from Andy Gross:
* Add SDHC xo clk
* tag 'qcom-dts-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: Add xo to sdhc clock node on qcom platforms
Arnd Bergmann [Wed, 30 Nov 2016 21:30:32 +0000 (22:30 +0100)]
Merge tag 'samsung-dt-4.10-2' of git://git./linux/kernel/git/krzk/linux into next/dt
Pull "Samsung DeviceTree second update for v4.10" from Krzysztof Kozłowski:
1. Cleanups in MSHC nodes.
2. Enable ADC on Odroid boards.
3. Fix interrupt flags on recently added DMA sound nodes in Exynos5410.
* tag 'samsung-dt-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Remove the cd-gpios property for eMMC of Odroid XU3/4
ARM: dts: exynos: Specify snps, dwmac in compatible string for gmac
ARM: dts: exynos: Fix invalid GIC interrupt flags in audio block of Exynos5410
ARM: dts: exynos: Add ADCs on 4412 and 5422 based odroid boards.
ARM: dts: exynos: Replace "clock-freq-min-max" with "max-frequency"
Arnd Bergmann [Wed, 30 Nov 2016 16:53:03 +0000 (17:53 +0100)]
Merge tag 'arm-soc/for-4.10/devicetree' of github.com/Broadcom/stblinux into next/dt
Pull "Broadcom devicetree changes for 4.10" from Florian Fainelli:
This pull request contains Broadcom ARM-based SoC Device Tree changes for 4.10,
please pull the following:
- Rafal adds support for the Netgear R8500 routers, adds basic support
for the Tenda AC9 router which uses the new BCM53573 SoC (single core Cortex
A7). He also enables the UART on the Netgear R8000 and restructures the
include files a bit for the BCM47094 SoC, finally he adds USB 3.0 PHY nodes
which enables USB 3.0 on BCM5301X devices that support it. Finally he adds
support for the TP-LINK Archer C9 V1 router.
- Kamal adds support for the QSPI controller on the Northstar Plus SoCs and updates
the bcm958625k reference board to have it enabled
- Dan adds support for the Luxul XAP-1510 (using a BCM4708) and XWR-3100 (using
a BCM47094)
- Scott fixes the pinctrl names in the Cygnus DTS files
- Jonathan enables the Broadcom iProc mailbox controller for Broadcom Cygnus/iProc
SoCs, he adds interrupt support for the GPIO CRMU hardware block and finally adds
the node for the OTP controller found on Cygnus SoCs
- Dhananjay enables the GPIO B controller on Norstarh Plus SoCs
- Eric defines standard pinctrl groups in the BCM2835 GPIO node
- Gerd adds definitions for the pinctrl groups and updates the PWM, I2C and SDHCI nodes
to use their appropriate pinctrl functions
- Linus adds names for the Raspberry Pi GPIO lines based on the datasheet
- Martin adds the DT binding and nodes for the Raspberry Pi firmware thermal block
- Stefan fixes a few typos with respect to the BCM2835 mailbox binding example and
Device Tree nodes he also fixes the Raspberry Pi GPIO lines names and finally
adds names for the Raspberry Zero GPIO lines
* tag 'arm-soc/for-4.10/devicetree' of http://github.com/Broadcom/stblinux: (29 commits)
ARM: bcm2835: Add names for the RPi Zero GPIO lines
ARM: bcm2835: Fix names for the Raspberry Pi GPIO lines
ARM: dts: enable GPIO-b for Broadcom NSP
ARM: BCM5301X: Add DT for TP-LINK Archer C9 V1
ARM: dts: Add node for Broadcom OTP controller driver
ARM: dts: Enable interrupt support for cygnus crmu gpio driver
ARM: dts: Enable Broadcom iProc mailbox controller
ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
dt: bindings: add thermal device driver for bcm2835
ARM: dts: bcm283x: fix typo in mailbox address
DT: binding: bcm2835-mbox: fix address typo in example
ARM: dts: cygnus: fix naming of pinctrl node
ARM: BCM53573: Specify PMU and its ILP clock in the DT
ARM: BCM5301X: Add DT for Luxul XWR-3100
ARM: BCM5301X: Add DT for Luxul XAP-1510
ARM: BCM5301X: Specify USB 3.0 PHY in DT
ARM: BCM5301X: Enable UART on Netgear R8000
ARM: BCM5301X: Add separated DTS include file for BCM47094
ARM: dts: NSP: Add QSPI nodes to NSPI and bcm958625k DTSes
...
Arnd Bergmann [Wed, 30 Nov 2016 15:57:12 +0000 (16:57 +0100)]
Merge tag 'socfpga_dts_for_v4.10_part_3' of git://git./linux/kernel/git/dinguyen/linux into next/dt
Merge "SoCFPGA DTS update for v4.10, part 3" from Dinh Nguyen:
- Fine tune L2 cache configuration
* tag 'socfpga_dts_for_v4.10_part_3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: dts: socfpga: fine-tune L2 cache configuration
Arnd Bergmann [Wed, 30 Nov 2016 15:44:12 +0000 (16:44 +0100)]
Merge tag 'renesas-dt2-for-v4.10' of git://git./linux/kernel/git/horms/renesas into next/dt
Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.10" from Simon Horman:
Enhancements:
* Add device nodes for PRR
* Add r8a7745 SoC and sk-rzg1e board
* Add r8a7743 SoC and sk-rzg1m board
* Enable SDR-104 and I2C demuxer on alt, koelsch and lager boards
Corrections:
* Use SYSC "always-on" PM Domain for sound on r8a7794 SoC
* Correct hsusb parent clock on r8a7794 SoC
* Correct PFC names for DU on alt board
* tag 'renesas-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits)
ARM: dts: r8a7794: Add device node for PRR
ARM: dts: r8a7793: Add device node for PRR
ARM: dts: r8a7792: Add device node for PRR
ARM: dts: r8a7791: Add device node for PRR
ARM: dts: r8a7790: Add device node for PRR
ARM: dts: r8a7779: Add device node for PRR
ARM: dts: r8a73a4: Add device node for PRR
ARM: dts: sk-rzg1e: add Ether support
ARM: dts: sk-rzg1e: initial device tree
ARM: dts: r8a7745: add IRQC support
ARM: dts: r8a7745: add Ether support
ARM: dts: r8a7745: add [H]SCIF{|A|B} support
ARM: dts: r8a7745: add SYS-DMAC support
ARM: dts: r8a7745: initial SoC device tree
ARM: dts: sk-rzg1m: add Ether support
ARM: dts: sk-rzg1m: initial device tree
ARM: dts: r8a7743: add IRQC support
ARM: dts: r8a7743: add Ether support
ARM: dts: r8a7743: add [H]SCIF{A|B} support
ARM: dts: r8a7743: add SYS-DMAC support
...
Arnd Bergmann [Wed, 30 Nov 2016 15:43:10 +0000 (16:43 +0100)]
Merge tag 'rzg-clock-defs-tag1' of git://git./linux/kernel/git/geert/renesas-drivers into next/dt
Pull "Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions" from Geert Uytterhoeven:
Shared by clock drivers, and DTS files.
* tag 'rzg-clock-defs-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: Add r8a7745 CPG Core Clock Definitions
clk: renesas: Add r8a7743 CPG Core Clock Definitions
Arnd Bergmann [Wed, 30 Nov 2016 14:21:19 +0000 (15:21 +0100)]
Merge tag 'davinci-for-v4.10/dt-3' of git://git./linux/kernel/git/nsekhar/linux-davinci into next/dt
Pull "DaVinci DT updates for v4.10 (part 3)" from Sekhar Nori:
Some fixes for device-tree patches already queued.
- Fix SD card detect polarity
- Prevent Ethernet from picking a random mac address
- Fix error messages on platforms which dont use
bus master and emif priority settings.
* tag 'davinci-for-v4.10/dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850: enable memctrl and mstpri nodes per board
ARM: dts: da850-lcdk: Add ethernet0 alias to DT
ARM: dts: da850-lcdk: fix mmc card detect polarity
Arnd Bergmann [Wed, 30 Nov 2016 14:18:48 +0000 (15:18 +0100)]
Merge tag 'davinci-for-v4.10/dt-2' of git://git./linux/kernel/git/nsekhar/linux-davinci into next/dt
Pull "DaVinci DT updates for v4.10 (part 2)" from Sekhar Nori:
Adds device tree nodes enabling DDR controller
and bus master priority settings needed for
stable LCDC operation on DA850.
Also adds support for MUSB device on DA850
providing USB OTG support.
* tag 'davinci-for-v4.10/dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: dts: da850-lcdk: Enable the usb otg device node
ARM: dts: da850: Add the usb otg device node
ARM: dts: da850: add the mstpri and ddrctl nodes
Bartosz Golaszewski [Thu, 24 Nov 2016 09:31:24 +0000 (10:31 +0100)]
ARM: dts: da850: enable memctrl and mstpri nodes per board
Currently the memory controller and master priorities drivers are
enabled in da850.dtsi. For boards for which there are no settings
defined, this makes these drivers emit error messages.
Disable the nodes in da850.dtsi and only enable them for da850-lcdk -
the only board that currently needs them.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Fabien Parent [Thu, 24 Nov 2016 14:35:45 +0000 (15:35 +0100)]
ARM: dts: da850-lcdk: Add ethernet0 alias to DT
In order to avoid Linux generating a random mac address on every boot,
add an ethernet0 alias that will allow u-boot to patch the dtb with
the MAC address programmed into the EEPROM.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Arnd Bergmann [Fri, 25 Nov 2016 23:52:10 +0000 (00:52 +0100)]
Merge tag 'sunxi-dt-for-4.10-bis' of https://git./linux/kernel/git/mripard/linux into next/dt
Pull "Allwinner DT additions for 4.10, bis" from Maxime Ripard:
The usual bunch of DT additions, but most notably:
- A31 DRM driver
- A31 audio codec
- WiFi for the A80-Based boards and the CHIP
- Support for the NextThing Co CHIP Pro (the first board with NAND
enabled)
- New board: NanoPi M1
* tag 'sunxi-dt-for-4.10-bis' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (41 commits)
ARM: dts: sun6i: hummingbird-a31: Enable display output through VGA bridge
ARM: dts: sun5i: Add touchscreen node to reference-design-tablet.dtsi
ARM: sunxi: Add the missing clocks to the pinctrl nodes
ARM: dts: sun7i: bananapi-m1-plus: Enable USB OTG
ARM: dts: sun7i: bananapi-m1-plus: Add PMIC regulators
ARM: dts: sun7i: bananapi-m1-plus: Enable USB PHY for USB host support
ARM: sun8i: sina33: Enable USB gadget
ARM: dts: sun8i: reference-design-tablet: ldo_io1 is vcc-touchscreen
ARM: dts: sun8i: replace enable-sdio-wakeup with wakeup-source for BananaPi M1+
ARM: gr8: evb: Add i2s codec
ARM: dts: sun6i: sina31s: Enable internal audio codec
ARM: dts: sun6i: hummingbird: Enable internal audio codec
ARM: dts: sun6i: Add audio codec device node
ARM: gr8: evb: Enable SPDIF
ARM: dts: sun8i: Add SPI controller node in H3
ARM: dts: sun8i: Add SPI pinctrl node in H3
ARM: dts: sun8i: Add dts file for NanoPi M1 SBC
ARM: dts: sun8i: Use the common file in NanoPi NEO SBC
ARM: dts: sun8i: Add common dtsi file for NanoPi SBCs
ARM: dts: sun9i: cubieboard4: Enable AP6330 WiFi
...
Arnd Bergmann [Fri, 25 Nov 2016 23:45:02 +0000 (00:45 +0100)]
Merge tag 'mvebu-dt-4.10-1' of git://git.infradead.org/linux-mvebu into next/dt
Pull "mvebu dt for 4.10 (part 1)" from Gregory CLEMENT:
Add missing pinmux declaration for netgear NASes
Fix i2c compatible string for netgear NASes
Fix on a wrong comment about PLL frequency
Fix spelling mistake of the manufacturer's name of the Topkick
Add dt support for the orion5x ls-chl Linkstation device
First step of fixing DTC warning for Armada 370, 375 and XP
* tag 'mvebu-dt-4.10-1' of git://git.infradead.org/linux-mvebu: (30 commits)
ARM: dts: armada-375: Fixup ethernet child DT warning
ARM: dts: armada-375: Fixup memory DT warning
ARM: dts: armada-375: Remove skeleton.dtsi
ARM: dts: armada-375: Fixup pinctrl DT warnings
ARM: dts: armada-375: Fixup pcie DT warnings
ARM: dts: armada-375: Fixup mdio DT warning
ARM: dts: armada-375: Use the node labels
ARM: dts: armada-375: Add node labels
ARM: dts: armada-370-xp: Fixup regulator DT warning
ARM: dts: armada-370-xp: Remove button address and fixup names
ARM: dts: armada-370-xp: Remove address from dsa unit name
ARM: dts: armada-370-xp: Fixup memory DT warning
ARM: dts: armada-370-xp: Fixup l2-cache DT warning
ARM: dts: armada-370-xp: Remove skeleton.dtsi
ARM: dts: armada-370: Fixup pcie DT warnings
ARM: dts: armada-xp: Fixup pcie DT warnings
ARM: dts: armada-370-xp: Fixup mdio DT warning
ARM: dts: armada-370-xp: Use the node labels
ARM: dts: armada-370-xp: add node labels
ARM: dts: armada-370-xp: move the cpurst node in the common file
...
Arnd Bergmann [Fri, 25 Nov 2016 23:27:56 +0000 (00:27 +0100)]
Merge tag 'qcom-dts-for-4.10-1' of git://git./linux/kernel/git/agross/linux into next/dt
Pull "Qualcomm Device Tree Changes for v4.10 - v2" from Andy Gross:
* Add EBI2 support to MSM8660
* Add SMSC ethernet support to APQ8060
* Add support for display, pstore, iommu, and hdmi to APQ8064
* Add SDHCI node to MSM8974 Hammerhead
* Add WP8548 MangOH board support (MDM9615)
* tag 'qcom-dts-for-4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: add SMSC ethernet on the APQ8060 Dragonboard
ARM: dts: add EBI2 to the Qualcomm MSM8660 DTSI
arm: dts: qcom: apq8064-nexus7: Add pstore support to nexus7
arm: dts: qcom: apq8064-nexus7: Add DSI and panel nodes
arm: dts: qcom: apq8064: Add dsi, gpu and iommu nodes
arm: dts: qcom: apq8064-ifc6410: Add HDMI support
arm: dts: qcom: apq8064: Add display DT nodes
ARM: dts: qcom: msm8974-hammerhead: Add sdhci1 node
dt-bindings: arm: Add Sierra Wireless modules bindings
ARM: dts: Add WP8548 based MangOH Green board DTS
ARM: dts: Add Sierra Wireless WP8548 dtsi
dt-bindings: qcom: Add MDM9615 bindings
ARM: dts: Add MDM9615 dtsi
Arnd Bergmann [Fri, 25 Nov 2016 23:25:04 +0000 (00:25 +0100)]
Merge tag 'pxa-dt-4.10' of https://github.com/rjarzmik/linux into next/dt
Pull "This device-tree pxa update brings" from Robert Jarzmik:
- pxa25x support
- cpu operating points in preparation for cpufreq-dt
- small fixes
* tag 'pxa-dt-4.10' of https://github.com/rjarzmik/linux:
ARM: dts: pxa: add pxa27x cpu operating points
ARM: dts: pxa: add pxa25x cpu operating points
ARM: dts: pxa: fix gpio0 and gpio1 interrupts
ARM: dts: pxa: fix no. of gpio cells in the pxa gpio binding documentation
ARM: dts: pxa: add pxa25x .dtsi file
Niklas Cassel [Fri, 14 Oct 2016 13:09:13 +0000 (15:09 +0200)]
ARM: dts: artpec: add pcie support
Add PCIe support to the ARTPEC-6 SoC. This uses the existing
pcie-artpec6 driver.
So, all that is needed is device tree entries in the DTS.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Jesper Nilsson <jespern@axis.com>
Arnd Bergmann [Fri, 25 Nov 2016 22:59:15 +0000 (23:59 +0100)]
Merge tag 'oxnas-arm-soc-dt-for-4.10' of https://github.com/OXNAS/linux into next/dt
Pull "ARM: OXNAS SoC DT updates for 4.10" from Neil Armstrong:
- Add DTSI for Oxford Semiconductor OX820
- Add DTS for Cloud Engines PogoPlug v3 board
- Fix MAINTAINERS Oxnas entry for dts files
from http://lkml.kernel.org/r/
20161102141850.25164-1-narmstrong@baylibre.com
* tag 'oxnas-arm-soc-dt-for-4.10' of https://github.com/OXNAS/linux:
MAINTAINERS: oxnas: Add new files definitions
ARM: dts: Add support for OX820 and Pogoplug V3
Ritesh Harjani [Mon, 21 Nov 2016 06:37:14 +0000 (12:07 +0530)]
ARM: dts: Add xo to sdhc clock node on qcom platforms
Add xo entry to sdhc clock node on all qcom platforms.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Andy Gross [Thu, 24 Nov 2016 06:24:40 +0000 (00:24 -0600)]
Merge tag 'qcom-dts-for-4.10-1' into dts-for-4.10-2
Qualcomm Device Tree Changes for v4.10 - v2
* Add EBI2 support to MSM8660
* Add SMSC ethernet support to APQ8060
* Add support for display, pstore, iommu, and hdmi to APQ8064
* Add SDHCI node to MSM8974 Hammerhead
* Add WP8548 MangOH board support (MDM9615)
Geert Uytterhoeven [Mon, 14 Nov 2016 18:37:15 +0000 (19:37 +0100)]
ARM: dts: r8a7794: Add device node for PRR
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 14 Nov 2016 18:37:14 +0000 (19:37 +0100)]
ARM: dts: r8a7793: Add device node for PRR
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 14 Nov 2016 18:37:13 +0000 (19:37 +0100)]
ARM: dts: r8a7792: Add device node for PRR
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 14 Nov 2016 18:37:12 +0000 (19:37 +0100)]
ARM: dts: r8a7791: Add device node for PRR
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 14 Nov 2016 18:37:11 +0000 (19:37 +0100)]
ARM: dts: r8a7790: Add device node for PRR
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 14 Nov 2016 18:37:10 +0000 (19:37 +0100)]
ARM: dts: r8a7779: Add device node for PRR
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 14 Nov 2016 18:37:09 +0000 (19:37 +0100)]
ARM: dts: r8a73a4: Add device node for PRR
Add a device node for the Product Register, which provides SoC product
and revision information.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Fri, 4 Nov 2016 22:05:28 +0000 (01:05 +0300)]
ARM: dts: sk-rzg1e: add Ether support
Define the SK-RZG1E board dependent part of the Ether device node.
Enable DHCP and NFS root for the kernel booting.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Fri, 4 Nov 2016 22:04:32 +0000 (01:04 +0300)]
ARM: dts: sk-rzg1e: initial device tree
Add the initial device tree for the R8A7745 SoC based SK-RZG1E board.
The board has 1 debug serial port (SCIF2); include support for it,
so that the serial console can work.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Fri, 4 Nov 2016 21:59:37 +0000 (00:59 +0300)]
ARM: dts: r8a7745: add IRQC support
Describe the IRQC interrupt controller in the R8A7745 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Fri, 4 Nov 2016 21:57:01 +0000 (14:57 -0700)]
ARM: dts: r8a7745: add Ether support
Define the generic R8A7745 part of the Ether device node.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Fri, 4 Nov 2016 21:55:52 +0000 (00:55 +0300)]
ARM: dts: r8a7745: add [H]SCIF{|A|B} support
Describe [H]SCIF{|A|B} ports in the R8A7745 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: consistently use tabs for indentation]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Fri, 4 Nov 2016 21:54:51 +0000 (00:54 +0300)]
ARM: dts: r8a7745: add SYS-DMAC support
Describe SYS-DMAC0/1 in the R8A7745 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Fri, 4 Nov 2016 21:53:38 +0000 (00:53 +0300)]
ARM: dts: r8a7745: initial SoC device tree
The initial R8A7745 SoC device tree including CPU0, GIC, timer, SYSC, RST,
CPG, and the required clock descriptions.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Mon, 31 Oct 2016 20:00:03 +0000 (23:00 +0300)]
ARM: dts: sk-rzg1m: add Ether support
Define the SK-RZG1M board dependent part of the Ether device node.
Enable DHCP and NFS root for the kernel booting.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Mon, 31 Oct 2016 19:59:03 +0000 (22:59 +0300)]
ARM: dts: sk-rzg1m: initial device tree
Add the initial device tree for the R8A7743 SoC based SK-RZG1M board.
The board has one debug serial port (SCIF0); include support for it, so
that the serial console can work.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Mon, 31 Oct 2016 19:58:12 +0000 (22:58 +0300)]
ARM: dts: r8a7743: add IRQC support
Describe the IRQC interrupt controller in the R8A7743 device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Mon, 31 Oct 2016 19:56:36 +0000 (22:56 +0300)]
ARM: dts: r8a7743: add Ether support
Define the generic R8A7743 part of the Ether device node.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Mon, 31 Oct 2016 19:55:39 +0000 (22:55 +0300)]
ARM: dts: r8a7743: add [H]SCIF{A|B} support
Describe [H]SCIF{|A|B} ports in the R8A7743 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: consistently use tabs for indentation]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Mon, 31 Oct 2016 19:54:50 +0000 (22:54 +0300)]
ARM: dts: r8a7743: add SYS-DMAC support
Describe SYS-DMAC0/1 in the R8A7743 device tree.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Sergei Shtylyov [Mon, 31 Oct 2016 19:54:01 +0000 (22:54 +0300)]
ARM: dts: r8a7743: initial SoC device tree
The initial R8A7743 SoC device tree including CPU0, GIC, timer, SYSC, RST,
CPG, and the required clock descriptions.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Thu, 3 Nov 2016 15:07:25 +0000 (16:07 +0100)]
ARM: dts: alt: Enable UHS-I SDR-104
And the sd-uhs-sdr104 property to SDHI0.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Simon Horman [Thu, 3 Nov 2016 15:07:24 +0000 (16:07 +0100)]
ARM: dts: koelsch: Enable UHS-I SDR-104
And the sd-uhs-sdr104 property to SDHI0.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Simon Horman [Thu, 3 Nov 2016 15:07:23 +0000 (16:07 +0100)]
ARM: dts: lager: Enable UHS-I SDR-104
Add the sd-uhs-sdr104 property to SDHI0.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Simon Horman [Sun, 6 Nov 2016 20:20:30 +0000 (21:20 +0100)]
ARM: dts: alt: use demuxer for I2C4
Make it possible to fallback to GPIO for I2C4 on the EXIO-B connector.
This is based on reference work for the I2C0 core of the lager/r8a7790
by Wolfram Sang.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[wsa: rebased and fixed aliases]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Simon Horman [Sun, 6 Nov 2016 20:20:23 +0000 (21:20 +0100)]
ARM: dts: koelsch: use demuxer for I2C1
Make it possible to fallback to GPIO for I2C1 on the EXIO-C connector.
This is based on reference work for the I2C0 core of the lager/r8a7790
by Wolfram Sang.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[wsa: rebased and fixed aliases]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Simon Horman [Sun, 6 Nov 2016 20:20:20 +0000 (21:20 +0100)]
ARM: dts: lager: use demuxer for IIC1/I2C1
Make it possible to select which I2C1 IP core you want to run on the
EXIO-A connector.
This is based on reference work for the I2C0 core of the lager board
by Wolfram Sang.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[wsa: rebased and fixed aliases]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Simon Horman [Sun, 6 Nov 2016 20:20:19 +0000 (21:20 +0100)]
ARM: dts: lager: rename and reindex i2cexio
The rename from i2cexio to i2cexio0 is in preparation for adding
i2cexio1 which will use the demuxer for IIC1/I2C1.
The reindexing from i2c8 to i2c10 is to allow space for grouping of
additional GPIO buses to be added by follow-up patches to support demuxing
of other i2c buses.
Also note that fallback to GPIO is not provided by the hardware for IIC0/I2C0.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[wsa: rebased, fixed alias and removed typo in commit message]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Geert Uytterhoeven [Mon, 7 Nov 2016 19:10:04 +0000 (20:10 +0100)]
ARM: dts: r8a7794: Use SYSC "always-on" PM Domain for sound
Hook up the Audio-DMAC and sound device nodes to the SYSC "always-on" PM
Domain, for a more consistent device-power-area description in DT.
Cfr. commit
0761ff2ad0c581f3 ("ARM: dts: r8a7794: Add SYSC PM Domains").
Fixes:
320d6c5a08a4abd3 ("ARM: dts: r8a7794: add sound support")
Fixes:
298e4ee3d213a076 ("ARM: dts: r8a7794: add Audio-DMAC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Geert Uytterhoeven [Mon, 7 Nov 2016 19:07:07 +0000 (20:07 +0100)]
ARM: dts: r8a7794: Correct hsusb parent clock
The parent clock of the HSUSB clock is the HP clock, not the MP clock.
Fixes:
c7bab9f929e51761 ("ARM: shmobile: r8a7794: Add USB clocks to device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Jacopo Mondi [Thu, 3 Nov 2016 19:34:46 +0000 (20:34 +0100)]
ARM: dts: alt: Fix PFC names for DU
Update the PFC pin groups and function names of DU interface for
r8a7794 ALT board.
The currently specified pin groups and function names prevented PFC and
DU interfaces from being correctly configured:
sh-pfc
e6060000.pin-controller: function 'du' not supported
sh-pfc
e6060000.pin-controller: invalid function du in map table
sh-pfc
e6060000.pin-controller: function 'du' not supported
sh-pfc
e6060000.pin-controller: invalid function du in map table
sh-pfc
e6060000.pin-controller: function 'du' not supported
sh-pfc
e6060000.pin-controller: invalid function du in map table
sh-pfc
e6060000.pin-controller: function 'du' not supported
sh-pfc
e6060000.pin-controller: invalid function du in map table
rcar-du: probe of
feb00000.display failed with error -22
Signed-off-by: Jacopo Mondi <jacopo@jmondi.org>
Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Wed, 23 Nov 2016 19:51:44 +0000 (20:51 +0100)]
Merge tag 'rzg-clock-defs-tag1'; commit '
538321bd9718'; commit '
97ca8402997c' into dt-for-v4.10
Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions
Shared by clock drivers, and DTS files.
Jaehoon Chung [Mon, 21 Nov 2016 07:10:32 +0000 (16:10 +0900)]
ARM: dts: exynos: Remove the cd-gpios property for eMMC of Odroid XU3/4
Odroid XU3/4 didn't need to use the cd-gpios for detecting card.
Because host controller has the CDETECT register through SDx_CDN line.
Host controller can know whether card is inserted or not with this
register.
When I have checked the Odroid XU3/4, they are using CDETECT register
(not using exteranl cd-gpio).
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Niklas Cassel [Wed, 23 Nov 2016 14:24:51 +0000 (15:24 +0100)]
ARM: dts: exynos: Specify snps, dwmac in compatible string for gmac
devicetree binding for stmmac states:
- compatible: Should be "snps,dwmac-<ip_version>", "snps,dwmac"
For backwards compatibility: "st,spear600-gmac" is also supported.
No functional change intended.
Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Sergei Shtylyov [Fri, 4 Nov 2016 21:44:43 +0000 (00:44 +0300)]
ARM: shmobile: r8a7745: add power domain index macros
Add macros usable by the device tree sources to reference R8A7745 SYSC power
domains by index.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Chen-Yu Tsai [Wed, 16 Nov 2016 15:42:32 +0000 (23:42 +0800)]
ARM: dts: sun6i: hummingbird-a31: Enable display output through VGA bridge
The Hummingbird A31 board has a VGA DAC which converts RGB output
from the LCD interface to VGA analog signals.
Add nodes for the VGA DAC, its power supply, and enable this part
of the display pipeline.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Hans de Goede [Wed, 16 Nov 2016 13:15:08 +0000 (14:15 +0100)]
ARM: dts: sun5i: Add touchscreen node to reference-design-tablet.dtsi
Just like on sun8i all sun5i tablets use the same interrupt and power
gpios for their touchscreens. I've checked all known a13 fex files and
only the UTOO P66 uses a different gpio for the interrupt.
Add a touchscreen node to sun5i-reference-design-tablet.dtsi, which
fills in the necessary gpios to avoid duplication in the tablet dts files,
just like we do in sun8i-reference-design-tablet.dtsi.
This will make future patches adding touchscreen nodes to a13 tablets
simpler.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Wed, 19 Oct 2016 09:15:27 +0000 (11:15 +0200)]
ARM: sunxi: Add the missing clocks to the pinctrl nodes
The pin controllers also use the two oscillators for debouncing. Add them
to the DTs.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Chen-Yu Tsai [Tue, 15 Nov 2016 13:51:06 +0000 (21:51 +0800)]
ARM: dts: sun7i: bananapi-m1-plus: Enable USB OTG
The Bananapi M1+ supports USB OTG, with the PMIC doing VBUS sensing.
Enable the USB OTG related functions.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Tue, 15 Nov 2016 13:51:05 +0000 (21:51 +0800)]
ARM: dts: sun7i: bananapi-m1-plus: Add PMIC regulators
The Bananapi M1+, like other Allwinner A20 based boards, uses the
AXP209 PMIC to supply its power.
Add the AXP209 regulators.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Tue, 15 Nov 2016 13:51:04 +0000 (21:51 +0800)]
ARM: dts: sun7i: bananapi-m1-plus: Enable USB PHY for USB host support
The 2 USB host ports are directly tied to the 2 USB hosts in the SoC.
The 2 host pairs were already enabled, but the USB PHY wasn't.
VBUS on the 2 ports are always on.
Enable the USB PHY.
Fixes:
04c85ecad32a ("ARM: dts: sun7i: Add dts file for Bananapi M1 Plus
board")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Fri, 4 Nov 2016 14:44:39 +0000 (15:44 +0100)]
ARM: sun8i: sina33: Enable USB gadget
The micro-USB on the SinA33 has a somewhat interesting design in the sense
that it has a micro USB connector, but the VBUS is (supposed to be)
controlled through an (unpopulated) jumper.
Obviously, that doesn't work really well, and only the peripheral mode
really works. Still enable it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Hans de Goede [Sun, 13 Nov 2016 19:22:03 +0000 (20:22 +0100)]
ARM: dts: sun8i: reference-design-tablet: ldo_io1 is vcc-touchscreen
On some Q8 and other tablets ldo_io1 is used as vcc-touchscreen,
config at as such in sun8i-reference-design-tablet.dtsi.
Note that it will only be enabled when it us actually referenced by
a foo-supply property in the touchscreen node, so for tablets which
do not use ldo_io1 as vcc-touchscreen, it will be disabled.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Sudeep Holla [Mon, 14 Nov 2016 15:44:10 +0000 (15:44 +0000)]
ARM: dts: sun8i: replace enable-sdio-wakeup with wakeup-source for BananaPi M1+
Though the mmc core driver will continue to support the legacy
"enable-sdio-wakeup" property to enable SDIO as the wakeup source,
"wakeup-source" is the new standard binding.
This patch replaces the legacy "enable-sdio-wakeup" with the unified
"wakeup-source" property in order to avoid any further copy-paste
duplication.
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Mon, 29 Aug 2016 19:59:46 +0000 (21:59 +0200)]
ARM: gr8: evb: Add i2s codec
The GR8-EVB comes with a wm8978 codec connected to the i2s bus.
Add a card in order to have it working
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Mon, 7 Nov 2016 10:07:03 +0000 (18:07 +0800)]
ARM: dts: sun6i: sina31s: Enable internal audio codec
The SinA31s routes the SoC's LINEOUT pins to a line out jack, and MIC1
to a microphone jack, with MBIAS providing phantom power.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Mon, 7 Nov 2016 10:07:02 +0000 (18:07 +0800)]
ARM: dts: sun6i: hummingbird: Enable internal audio codec
The Hummingbird A31 has headset and line in audio jacks and an onboard
mic routed to the pins for the SoC's internal codec. The line out pins
are routed to an onboard speaker amp, whose output is available on a
pin header.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Mon, 7 Nov 2016 10:07:01 +0000 (18:07 +0800)]
ARM: dts: sun6i: Add audio codec device node
The A31 SoC includes the Allwinner audio codec, capable of 24-bit
playback up to 192 kHz and 24-bit capture up to 48 kHz.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Thu, 3 Nov 2016 12:41:41 +0000 (13:41 +0100)]
ARM: gr8: evb: Enable SPDIF
The GR8-EVB has a SPDIF out connector. Enable it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Milo Kim [Fri, 28 Oct 2016 06:54:10 +0000 (15:54 +0900)]
ARM: dts: sun8i: Add SPI controller node in H3
H3 SPI subsystem is almost same as A31 SPI except buffer size, so those
DT properties are reusable.
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Milo Kim [Fri, 28 Oct 2016 06:54:09 +0000 (15:54 +0900)]
ARM: dts: sun8i: Add SPI pinctrl node in H3
H3 supports two SPI controllers. Four pins (MOSI, MISO, SCLK, SS) are
configured through the pinctrl subsystem.
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Milo Kim [Fri, 28 Oct 2016 06:59:03 +0000 (15:59 +0900)]
ARM: dts: sun8i: Add dts file for NanoPi M1 SBC
NanoPi M1 is the Allwinner H3 based board.
This patch enables UART for debug console, LEDs, GPIO key switch, 3 USB
host ports, a micro SD slot and related power and pin controls by using
NanoPi common dtsi file.
Cc: James Pettigrew <james@innovum.com.au>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Milo Kim [Fri, 28 Oct 2016 06:59:02 +0000 (15:59 +0900)]
ARM: dts: sun8i: Use the common file in NanoPi NEO SBC
NanoPi common dtsi supports all components of NEO SBC, so just include it.
Cc: James Pettigrew <james@innovum.com.au>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Milo Kim [Fri, 28 Oct 2016 06:59:01 +0000 (15:59 +0900)]
ARM: dts: sun8i: Add common dtsi file for NanoPi SBCs
This patch provides a common file for NanoPi M1 and Neo SBC.
Those have common features below.
* UART0
* 2 LEDs
* USB host (EHCI3, OHCI3) and PHY
* MicroSD
* GPIO key switch
Cc: James Pettigrew <james@innovum.com.au>
Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Fri, 28 Oct 2016 10:11:54 +0000 (18:11 +0800)]
ARM: dts: sun9i: cubieboard4: Enable AP6330 WiFi
The board has a Ampak AP6330 WiFi/BT/FM module. Inside it is a Broadcom
BCM4330 WiFi/BT/FM combo IC. The WiFi portion is connected to mmc1, with
the enabling pin connected to PL2. The AC100 RTC provides a low power
clock signal.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Fri, 28 Oct 2016 10:11:53 +0000 (18:11 +0800)]
ARM: dts: sun9i: a80-optimus: Enable AP6330 WiFi
The board has a Ampak AP6330 WiFi/BT/FM module. Inside it is a Broadcom
BCM4330 WiFi/BT/FM combo IC. The WiFi portion is connected to mmc1, with
the enabling pin connected to PL2. The AC100 RTC provides a low power
clock signal.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Fri, 28 Oct 2016 10:11:52 +0000 (18:11 +0800)]
ARM: dts: sun9i: Add mmc1 pinmux setting
On the A80, mmc1 is available on pingroup G. Designs mostly use this
to connect to an SDIO WiFi chip.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Fri, 14 Oct 2016 15:39:10 +0000 (17:39 +0200)]
ARM: sun5i: chip: Add optional buses
The I2C1 and SPI2 buses are exposed on the CHIP headers, and are not
explicitly dedicated to anything.
Add them to the DTS with the muxing already set, but keep them disabled.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Maxime Ripard [Fri, 26 Feb 2016 01:15:30 +0000 (17:15 -0800)]
ARM: sun5i: Add RGB 565 LCD pins
Some boards use the LCD in RGB565. Enable the pin muxing option.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Maxime Ripard [Mon, 18 Jul 2016 18:51:30 +0000 (20:51 +0200)]
ARM: sun5i: Add SPI2 pins
All the sun5i have the SPI2 pins exposed on the PE bank. Add them to the
DT.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Maxime Ripard [Fri, 14 Oct 2016 14:32:26 +0000 (16:32 +0200)]
ARM: sun5i: Rename A10s pins
The SPI2 pins on the sun5i PB bank are only available on the A10s. Rename
the A10s only bank so that it doesn't confuse people on the other SoCs
whose indexing would start at b.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Antoine Tenart [Thu, 1 Oct 2015 14:39:43 +0000 (16:39 +0200)]
ARM: sun5i: chip: add a node for the w1 gpio controller
The CHIP uses a 1-Wire bus to discover the DIPs. Enable the bus in the DT.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Wed, 22 Jul 2015 14:51:33 +0000 (16:51 +0200)]
ARM: sun5i: chip: Enable Wi-Fi SDIO chip
The WiFi chip is powered through a GPIO and two regulators in parallel.
Since that case is not supported yet, just set them as always on before we
rework the regulator framework to deal with those.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Maxime Ripard [Thu, 1 Sep 2016 16:27:21 +0000 (18:27 +0200)]
ARM: gr8: Add CHIP Pro support
The CHIP Pro is a small embeddable board. It features a GR8, an AXP209
PMIC, a 512MB SLC NAND and a WiFi/BT chip.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Maxime Ripard [Thu, 20 Oct 2016 07:01:41 +0000 (09:01 +0200)]
ARM: gr8: Add UART3 pins
The UART3 pins were missing from the DTSI. Add them.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Maxime Ripard [Thu, 20 Oct 2016 07:01:41 +0000 (09:01 +0200)]
ARM: gr8: Add UART2 pins
The UART2 pins were missing from the DTSI. Add them.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Maxime Ripard [Thu, 20 Oct 2016 06:49:59 +0000 (08:49 +0200)]
ARM: gr8: Add missing pwm channel 1 pin
The PWM controller has two different channels, but only the first pin was
exposed in the DTSI. Add the other one.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Maxime Ripard [Thu, 20 Oct 2016 07:18:54 +0000 (09:18 +0200)]
ARM: gr8: Fix typo in the i2s mclk pin group
There was a dumb copy and paste mistake here, fix it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Maxime Ripard [Thu, 20 Oct 2016 06:47:40 +0000 (08:47 +0200)]
ARM: gr8: Add the UART3
The GR8 has access to the UART3 controller, which was missing in the
DTSI. Add it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Chen-Yu Tsai [Thu, 20 Oct 2016 03:43:43 +0000 (11:43 +0800)]
ARM: dts: sun6i: Add A31 LCD0 RGB888 pins
The LCD0 controller on the A31 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Chen-Yu Tsai [Thu, 20 Oct 2016 03:43:42 +0000 (11:43 +0800)]
ARM: dts: sun6i: Add device nodes for first display pipeline
The A31 has 2 parallel display pipelines, which can be intermixed.
However the driver currently only supports one of them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Emmanuel Vadot [Sat, 15 Oct 2016 15:23:40 +0000 (17:23 +0200)]
ARM: dts: sunxi: Add cpu-supply for Olimex A20 EVB
sun7i-a20-olimex-som-evb.dts doesn't contain cpu-supply needed for
voltage-scaling with cpufreq-dt so define it.
The default voltages are defined in sun7i-a20.dtsi.
Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Thu, 12 May 2016 08:23:41 +0000 (10:23 +0200)]
ARM: sun5i: a13-olinuxino: Enable VGA bridge
Now that we have support for the VGA bridges using our DRM driver, enable
the display engine for the Olimex A13-Olinuxino.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Chen-Yu Tsai [Thu, 6 Oct 2016 16:06:26 +0000 (00:06 +0800)]
ARM: dts: sun6i: Sort pinmux setting nodes
The pinmux setting nodes for the A31 were added out of alphabetical
order. Sort them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Maxime Ripard [Tue, 22 Nov 2016 14:06:04 +0000 (15:06 +0100)]
ARM: gr8: Rename the DTSI and relevant DTS
Reviews have found that sun5i was a better prefix after all for the GR8.
Rename the relevant device trees before it's too late.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Axel Haslam [Mon, 21 Nov 2016 15:41:55 +0000 (16:41 +0100)]
ARM: dts: da850-lcdk: fix mmc card detect polarity
The polarity of the card detect pin is inverted.
Change it to reflect the right polarity for the board
which is ACTIVE_LOW.
Signed-off-by: Axel Haslam <ahaslam@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Florian Fainelli [Tue, 22 Nov 2016 05:03:18 +0000 (21:03 -0800)]
Merge tag 'bcm2835-dt-next-2016-11-18' into devicetree/next
This pull request brings in DT changes for BCM2835: pinctrl setup
cleanups, GPIO line naming, and the node for the new thermal driver.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Marek Vasut [Mon, 21 Nov 2016 15:23:31 +0000 (09:23 -0600)]
ARM: dts: socfpga: fine-tune L2 cache configuration
Enable double-linefill and increase prefetch offset, which gives
considerable read performance boost. The following numbers were
obtained using lmbench 3.0 bw_mem tool, for easier comparison, the
numbers are pasted in two columns. The test machine has Cyclone V
SoC running at 800MHz MPU clock and 512MiB 333MHz 16bit DDR3 DRAM.
Without patch | With patch
$ for i in rd wr rdwr cp fwr frd fcp bzero bcopy ; do echo $i ; bw_mem 64M $i ; done
rd | rd
64.00 526.46 | 64.00 1151.06
wr | wr
64.00 329.95 | 64.00 346.14
rdwr | rdwr
64.00 342.07 | 64.00 367.24
cp | cp
64.00 239.79 | 64.00 322.47
fwr | fwr
64.00 1027.90 | 64.00 1025.38
frd | frd
64.00 322.36 | 64.00 641.89
fcp | fcp
64.00 256.99 | 64.00 408.41
bzero | bzero
64.00 1028.43 | 64.00 1025.07
bcopy | bcopy
64.00 294.73 | 64.00 357.19
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Alexandre Bailon [Wed, 16 Nov 2016 11:07:36 +0000 (12:07 +0100)]
ARM: dts: da850-lcdk: Enable the usb otg device node
This enables the usb otg controller for the lcdk board.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Alexandre Bailon [Wed, 16 Nov 2016 11:07:35 +0000 (12:07 +0100)]
ARM: dts: da850: Add the usb otg device node
This adds the device tree node for the usb otg
controller present in the da850 family of SoC's.
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Gregory CLEMENT [Wed, 9 Nov 2016 23:58:18 +0000 (00:58 +0100)]
ARM: dts: armada-375: Fixup ethernet child DT warning
Child of mvpp2 ethernet do not have a reg property so the unit name
should not contain an address: remove them.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Gregory CLEMENT [Wed, 9 Nov 2016 23:51:54 +0000 (00:51 +0100)]
ARM: dts: armada-375: Fixup memory DT warning
memory has a reg property so the unit name should contain an address.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
projects / platform / kernel / linux-rpi.git / log