platform/upstream/llvm.git
6 years ago[NFC] Add assert to detect LCSSA breaches early
Max Kazantsev [Tue, 4 Sep 2018 06:34:40 +0000 (06:34 +0000)]
[NFC] Add assert to detect LCSSA breaches early

llvm-svn: 341347

6 years ago[PassTiming] reporting time-passes separately for multiple pass instances of the...
Fedor Sergeev [Tue, 4 Sep 2018 06:12:28 +0000 (06:12 +0000)]
[PassTiming] reporting time-passes separately for multiple pass instances of the same pass

Summary:
Refactoring done by rL340872 accidentally appeared to be non-NFC, changing the way how
multiple instances of the same pass are handled - aggregation of results by PassName
forced data for multiple instances to be merged together and reported as one line.

Getting back to creating/reporting timers per pass instance.
Reporting was a bit enhanced by counting pass instances and adding #<num> suffix
to the pass description. Note that it is instances that are being counted,
not invocations of them.

time-passes test updated to account for multiple passes being run.

Reviewers: paquette, jhenderson, MatzeB, skatkov

Reviewed By: skatkov

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51535

llvm-svn: 341346

6 years ago[IndVars] Fix usage of SCEVExpander to not mess with SCEVConstant. PR38674
Max Kazantsev [Tue, 4 Sep 2018 05:01:35 +0000 (05:01 +0000)]
[IndVars] Fix usage of SCEVExpander to not mess with SCEVConstant. PR38674

This patch removes the function `expandSCEVIfNeeded` which behaves not as
it was intended. This function tries to make a lookup for exact existing expansion
and only goes to normal expansion via `expandCodeFor` if this lookup hasn't found
anything. As a result of this, if some instruction above the loop has a `SCEVConstant`
SCEV, this logic will return this instruction when asked for this `SCEVConstant` rather
than return a constant value. This is both non-profitable and in some cases leads to
breach of LCSSA form (as in PR38674).

Whether or not it is possible to break LCSSA with this algorithm and with some
non-constant SCEVs is still in question, this is still being investigated. I wasn't
able to construct such a test so far, so maybe this situation is impossible. If it is,
it will go as a separate fix.

Rather than do it, it is always correct to just invoke `expandCodeFor` unconditionally:
it behaves smarter about insertion points, and as side effect of this it will choose a
constant value for SCEVConstants. For other SCEVs it may end up finding a better insertion
point. So it should not be worse in any case.

NOTE: So far the only known case for which this transform may break LCSSA is mapping
of SCEVConstant to an instruction. However there is a suspicion that the entire algorithm
can compromise LCSSA form for other cases as well (yet not proved).

Differential Revision: https://reviews.llvm.org/D51286
Reviewed By: etherzhhb

llvm-svn: 341345

6 years ago[NFC][llvm-objcopy] clang-formating Object.cpp
Puyan Lotfi [Tue, 4 Sep 2018 01:58:32 +0000 (01:58 +0000)]
[NFC][llvm-objcopy] clang-formating Object.cpp

llvm-svn: 341344

6 years ago[NFC][llvm-objcopy] Fixing a ubi-san problem with unaligned memory writes.
Puyan Lotfi [Tue, 4 Sep 2018 01:57:30 +0000 (01:57 +0000)]
[NFC][llvm-objcopy] Fixing a ubi-san problem with unaligned memory writes.

llvm-svn: 341343

6 years ago[llvm-objcopy] Dwarf .debug section compression support (zlib, zlib-gnu).
Puyan Lotfi [Mon, 3 Sep 2018 22:25:56 +0000 (22:25 +0000)]
[llvm-objcopy] Dwarf .debug section compression support (zlib, zlib-gnu).

  Usage:

  llvm-objcopy --compress-debug-sections=zlib foo.o
  llvm-objcopy --compress-debug-sections=zlib-gnu foo.o

  In both cases the debug section contents is compressed with zlib. In the GNU
  style case the header is the "ZLIB" magic string followed by the uint64 big-
  endian decompressed size. In the non-GNU mode the header is the
  Elf(32|64)_Chdr.

  Decompression support is coming soon.

  Differential Revision: https://reviews.llvm.org/D49678

llvm-svn: 341342

6 years ago[AArch64][x86] add tests for pow(x, 0.25); NFC
Sanjay Patel [Mon, 3 Sep 2018 22:11:47 +0000 (22:11 +0000)]
[AArch64][x86] add tests for pow(x, 0.25); NFC

Folds for this were proposed in D49306, but we
decided the transform is better suited for the backend.

llvm-svn: 341341

6 years ago[NFC] Fixed enum constant in boolean context error
David Bolvansky [Mon, 3 Sep 2018 22:09:08 +0000 (22:09 +0000)]
[NFC] Fixed enum constant in boolean context error

Summary:
/home/xbolva00/LLVM/llvm/tools/lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp:656:59: warning: enum constant in boolean context [-Wint-in-bool-context]
     if (mh.magic == llvm::MachO::MH_CIGAM || llvm::MachO::MH_MAGIC)
                                                           ^~~~~~~~
/home/xbolva00/LLVM/llvm/tools/lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp:658:62: warning: enum constant in boolean context [-Wint-in-bool-context]
     if (mh.magic == llvm::MachO::MH_CIGAM_64 || llvm::MachO::MH_MAGIC_64)

Reviewers: JDevlieghere, teemperor

Reviewed By: teemperor

Subscribers: abidh, lldb-commits

Differential Revision: https://reviews.llvm.org/D51600

llvm-svn: 341340

6 years ago[NFC] Use llvm_unreachable instead of lldb::assert
David Bolvansky [Mon, 3 Sep 2018 22:08:30 +0000 (22:08 +0000)]
[NFC] Use llvm_unreachable instead of lldb::assert

Summary: Fixes implicit fall through warnings

Reviewers: JDevlieghere, teemperor

Reviewed By: teemperor

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D51601

llvm-svn: 341339

6 years ago[mips] Disable the selection of mixed microMIPS/MIPS code
Simon Atanasyan [Mon, 3 Sep 2018 20:48:55 +0000 (20:48 +0000)]
[mips] Disable the selection of mixed microMIPS/MIPS code

This patch modifies hasStandardEncoding() / inMicroMipsMode() /
inMips16Mode() methods of the MipsSubtarget class so only one can be
true at any one time. That prevents the selection of microMIPS and MIPS
instructions and patterns that are defined in TableGen files at the same
time. A few new patterns and instruction definitions hae been added to
keep test cases passed.

Differential revision: https://reviews.llvm.org/D51483

llvm-svn: 341338

6 years ago[clangd] Fix index-twice regression from r341242
Sam McCall [Mon, 3 Sep 2018 20:26:26 +0000 (20:26 +0000)]
[clangd] Fix index-twice regression from r341242

llvm-svn: 341337

6 years ago[InstCombine] simplify xor/not folds; NFCI
Sanjay Patel [Mon, 3 Sep 2018 18:40:56 +0000 (18:40 +0000)]
[InstCombine] simplify xor/not folds; NFCI

llvm-svn: 341336

6 years ago[InstCombine] allow add+not --> sub for arbitrary vector constants.
Sanjay Patel [Mon, 3 Sep 2018 18:21:59 +0000 (18:21 +0000)]
[InstCombine] allow add+not --> sub for arbitrary vector constants.

llvm-svn: 341335

6 years ago[ClangUserExpression][NFC] Removed unused code
David Bolvansky [Mon, 3 Sep 2018 18:21:21 +0000 (18:21 +0000)]
[ClangUserExpression][NFC] Removed unused code

llvm-svn: 341334

6 years agoRevert r341329 due to MSAN error
Brian Gesiak [Mon, 3 Sep 2018 18:13:46 +0000 (18:13 +0000)]
Revert r341329 due to MSAN error

Pushing https://reviews.llvm.org/rL341329 revealed an MSAN error. Revert it
so that we can fix the error.

llvm-svn: 341333

6 years ago[InstCombine] consolidate tests for ~(X+C); NFC
Sanjay Patel [Mon, 3 Sep 2018 18:04:21 +0000 (18:04 +0000)]
[InstCombine] consolidate tests for ~(X+C); NFC

llvm-svn: 341332

6 years agoRevert [Hexagon] Add support for getRegisterByName.
Sid Manning [Mon, 3 Sep 2018 17:59:10 +0000 (17:59 +0000)]
Revert [Hexagon] Add support for getRegisterByName.

Support required to build the Hexagon Linux kernel.

llvm-svn: 341331

6 years ago[SLC] Support expanding pow(x, n+0.5) to x * x * ... * sqrt(x)
Florian Hahn [Mon, 3 Sep 2018 17:37:39 +0000 (17:37 +0000)]
[SLC] Support expanding pow(x, n+0.5) to x * x * ... * sqrt(x)

Reviewers: evandro, efriedma, spatel

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D51435

llvm-svn: 341330

6 years agoRe-push "[Option] Fix PR37006 prefix choice in findNearest"
Brian Gesiak [Mon, 3 Sep 2018 17:30:57 +0000 (17:30 +0000)]
Re-push "[Option] Fix PR37006 prefix choice in findNearest"

Summary:
Original changeset (https://reviews.llvm.org/D46776) by @modocache. It was
reverted after the PS4 bot failed.

The issue has been determined to be with the way the PS4 SDK handles this
particular option. https://reviews.llvm.org/D50410 removes this test, so we
can push this again.

Patch by Arnaud Coomans!

Reviewers: cfe-commits, modocache

Reviewed By: modocache

Differential Revision: https://reviews.llvm.org/D50515

llvm-svn: 341329

6 years ago[libomptarget][NVPTX] Fix __kmpc_spmd_kernel_deinit
Jonas Hahnfeld [Mon, 3 Sep 2018 17:24:23 +0000 (17:24 +0000)]
[libomptarget][NVPTX] Fix __kmpc_spmd_kernel_deinit

If the runtime is uninitialized the master thread must Enqueue the
state object, and ALL threads must return immediately.
Found post-commit of https://reviews.llvm.org/D51222.

llvm-svn: 341328

6 years agoRemoving -debug-info-macros from option suggestions test
Brian Gesiak [Mon, 3 Sep 2018 16:55:02 +0000 (16:55 +0000)]
Removing -debug-info-macros from option suggestions test

Summary:
https://reviews.llvm.org/D46776 added better support for prefixes for the
"did you mean ...?" command line option suggestions. One of the tests was
checking against the `-debug-info-macro` option, which was failing on the
PS4 build bot. Tests would succeed against the `--help` and `--version`
options.

From https://llvm.org/devmtg/2013-11/slides/Robinson-PS4Toolchain.pdf, it
looks like the PS4 SDK forces optimizations and *could be* disabling the
`-debug-info-macro` altogether.

This diff removes `-debug-info-macro` altogether.

Patch by Arnaud Coomans!

Test Plan: untested since we do not have access to a PS4 with the SDK.

Reviewers: cfe-commits, modocache

Reviewed By: modocache

Differential Revision: https://reviews.llvm.org/D50410

llvm-svn: 341327

6 years ago[X86] Remove wrong ReadAdvance from multiclass sse_fp_unop_s.
Andrea Di Biagio [Mon, 3 Sep 2018 16:47:34 +0000 (16:47 +0000)]
[X86] Remove wrong ReadAdvance from multiclass sse_fp_unop_s.

A ReadAdvance was incorrectly added to the SchedReadWrite list associated with
the following SSE instructions:

sqrtss
sqrtsd
rsqrtss
rcpss

As a consequence, a wrong operand latency was computed for the register operand
used as the base address of the folded load operand.

This patch removes the wrong ReadAdvance, and updates the llvm-mca test cases.
There is still a problem with correctly modeling partial register writes on XMM
registers This other problem is currently tracked here:
https://bugs.llvm.org/show_bug.cgi?id=38813

Differential Revision: https://reviews.llvm.org/D51542

llvm-svn: 341326

6 years ago[clangd] Some nitpicking around the new split (preamble/main) dynamic index
Sam McCall [Mon, 3 Sep 2018 16:37:59 +0000 (16:37 +0000)]
[clangd] Some nitpicking around the new split (preamble/main) dynamic index

Summary:
- DynamicIndex doesn't implement ParsingCallbacks, to make its role clearer.
  ParsingCallbacks is a separate object owned by the receiving TUScheduler.
  (I tried to get rid of the "index-like-object that doesn't implement index"
  but it was too messy).
- Clarified(?) docs around DynamicIndex - fewer details up front, more details
  inside.
- Exposed dynamic index from ClangdServer for memory monitoring and more
  direct testing of its contents (actual tests not added here, wanted to get
  this out for review)
- Removed a redundant and sligthly confusing filename param in a callback

Reviewers: ilya-biryukov

Subscribers: javed.absar, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D51221

llvm-svn: 341325

6 years agoAdd header guards to some headers that are missing them
Argyrios Kyrtzidis [Mon, 3 Sep 2018 16:26:36 +0000 (16:26 +0000)]
Add header guards to some headers that are missing them

llvm-svn: 341324

6 years agoAdd header guards to some headers that are missing them
Argyrios Kyrtzidis [Mon, 3 Sep 2018 16:22:05 +0000 (16:22 +0000)]
Add header guards to some headers that are missing them

Also adjust some of dsymutil's headers to put the header guards at the top,
otherwise the compiler will not recognize them as header guards.

llvm-svn: 341323

6 years ago[clangd] Avoid crashes in override completions
Ilya Biryukov [Mon, 3 Sep 2018 15:25:27 +0000 (15:25 +0000)]
[clangd] Avoid crashes in override completions

Summary: NamedDecl::getName cannot be called on non-identifier names.

Reviewers: kadircet, ioeric, hokein, sammccall

Reviewed By: ioeric

Subscribers: MaskRay, jkorous, arphaman, cfe-commits

Differential Revision: https://reviews.llvm.org/D51598

llvm-svn: 341322

6 years ago[clangd] Fix ambiguous make_unique with c++17. NFC
Sam McCall [Mon, 3 Sep 2018 15:23:01 +0000 (15:23 +0000)]
[clangd] Fix ambiguous make_unique with c++17. NFC

llvm-svn: 341321

6 years ago[PseudoTerminal][NFC] Use llvm errno helpers
David Bolvansky [Mon, 3 Sep 2018 14:59:57 +0000 (14:59 +0000)]
[PseudoTerminal][NFC] Use llvm errno helpers

Summary:
LLVM provide (str)errno helpers, so convert code to use it.

Also fixes warning:
/home/xbolva00/LLVM/llvm/tools/lldb/source/Host/common/PseudoTerminal.cpp:248:25: warning: ignoring return value of ‘char* strerror_r(int, char*, size_t)’, declared with attribute warn_unused_result [-Wunused-result]
             ::strerror_r(errno, error_str, error_len);

Reviewers: JDevlieghere

Reviewed By: JDevlieghere

Subscribers: abidh, lldb-commits

Differential Revision: https://reviews.llvm.org/D51591

llvm-svn: 341320

6 years ago[clangd] Handle errors before checking for cancelltion
Ilya Biryukov [Mon, 3 Sep 2018 14:39:34 +0000 (14:39 +0000)]
[clangd] Handle errors before checking for cancelltion

To avoid hitting assertions in llvm::Expected destructor.

llvm-svn: 341319

6 years ago[clangd] Factor out the data-swapping functionality from MemIndex/DexIndex.
Sam McCall [Mon, 3 Sep 2018 14:37:43 +0000 (14:37 +0000)]
[clangd] Factor out the data-swapping functionality from MemIndex/DexIndex.

Summary:
This is now handled by a wrapper class SwapIndex, so MemIndex/DexIndex can be
immutable and focus on their job.

Old and busted:
 I have a MemIndex, which holds a shared_ptr<vector<Symbol*>>, which keeps the
 symbol slab alive. I update by calling build(shared_ptr<vector<Symbol*>>).

New hotness: I have a SwapIndex, which holds a unique_ptr<SymbolIndex>, which
 holds a MemIndex, which holds a shared_ptr<void>, which keeps backing
 data alive.
 I update by building a new MemIndex and calling SwapIndex::reset().

Reviewers: kbobyrev, ioeric

Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, mgrang, arphaman, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D51422

llvm-svn: 341318

6 years agoDAG: Handle extract_vector_elt in isKnownNeverNaN
Matt Arsenault [Mon, 3 Sep 2018 14:01:03 +0000 (14:01 +0000)]
DAG: Handle extract_vector_elt in isKnownNeverNaN

llvm-svn: 341317

6 years ago[ASTImporter] Merge ExprBits
Gabor Marton [Mon, 3 Sep 2018 13:10:53 +0000 (13:10 +0000)]
[ASTImporter] Merge ExprBits

Summary:
Some `Expr` classes set up default values for the `ExprBits` of `Stmt`.  These
default values are then overwritten by the parser sometimes.  One example is
`InitListExpr` which sets the value kind to be an rvalue in the ctor.  However,
this bit may change after the `InitListExpr` is created.  There may be other
expressions similar to `InitListExpr` in this sense, thus the safest solution
is to copy the expression bits.

The lack of copying `ExprBits` causes an assertion in the analyzer engine in a
specific case: Since the value kind is not imported, the analyzer engine
believes that the given InitListExpr is an rvalue, thus it creates a
nonloc::CompoundVal instead of creating memory region (as in case of an lvalue
reference).

Reviewers: a_sidorin, r.stahl, xazax.hun, a.sidorin

Subscribers: rnkovacs, dkrupp, cfe-commits

Differential Revision: https://reviews.llvm.org/D51533

llvm-svn: 341316

6 years ago[Symtab][NFC] Added llvm_unreachable to supress compiler warning
David Bolvansky [Mon, 3 Sep 2018 12:57:54 +0000 (12:57 +0000)]
[Symtab][NFC] Added llvm_unreachable to supress compiler warning

Reviewers: JDevlieghere

Reviewed By: JDevlieghere

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D51587

llvm-svn: 341315

6 years ago[Index] Update tests allowing double4 type to be "invalid"
Alexey Sotkin [Mon, 3 Sep 2018 12:43:26 +0000 (12:43 +0000)]
[Index] Update tests allowing double4 type to be "invalid"

Fixes test failure after r341309

llvm-svn: 341314

6 years agoRename a few unittests/.../Foo.cpp files to FooTest.cpp
Nico Weber [Mon, 3 Sep 2018 12:43:26 +0000 (12:43 +0000)]
Rename a few unittests/.../Foo.cpp files to FooTest.cpp

The convention for unit test sources is that they're called FooTest.cpp.

No behavior change.
https://reviews.llvm.org/D51579

llvm-svn: 341313

6 years ago[Aarch64] Fix linker emulation for Aarch64 big endian
Peter Smith [Mon, 3 Sep 2018 12:36:32 +0000 (12:36 +0000)]
[Aarch64] Fix linker emulation for Aarch64 big endian

This patch fixes target linker emulation for aarch64 big endian.
aarch64_be_linux is not recognized by gnu ld. The equivalent emulation
mode supported by gnu ld is aarch64linuxb.

Patch by: Bharathi Seshadri

Reviewed by: Peter Smith

Differential Revision: https://reviews.llvm.org/D42930

llvm-svn: 341312

6 years ago[DebugInfo] Have the verifier accept missing linkage names.
Jonas Devlieghere [Mon, 3 Sep 2018 12:12:17 +0000 (12:12 +0000)]
[DebugInfo] Have the verifier accept missing linkage names.

According to the standard, for the .debug_names (the "dwarf accelerator
tables"):

> If a subprogram or inlined subroutine is included, and has a
> DW_AT_linkage_name attribute, there will be an additional index entry
> for the linkage name.

For Swift we generate DW_structure_types with a linkage name and the
verifier was incorrectly rejecting this. This patch fixes that by only
considering the linkage name in those particular cases. The test is the
"reduced" debug info of the failing swift test on swift.org.

Differential revision: https://reviews.llvm.org/D51420

llvm-svn: 341311

6 years ago[AArch64] Simplify code in LowerGlobalAddress. NFCI.
Martin Storsjo [Mon, 3 Sep 2018 11:59:23 +0000 (11:59 +0000)]
[AArch64] Simplify code in LowerGlobalAddress. NFCI.

When initial support for dllimport was added for aarch64 in
SVN r316555, ClassifyGlobalReference didn't set the MO_DLLIMPORT
flag - that was only completed in SVN r323810. Reuse the return
value from ClassifyGlobalReference for this purpose as well.

llvm-svn: 341310

6 years ago[OpenCL] Traverse vector types for ocl extensions support
Alexey Sotkin [Mon, 3 Sep 2018 11:43:22 +0000 (11:43 +0000)]
[OpenCL] Traverse vector types for ocl extensions support

Summary:
Given the following kernel:
__kernel void foo() {
  double d;
  double4 dd;
}

and cl_khr_fp64 is disabled, the compilation would fail due to
the presence of 'double d', but when removed, it passes.

The expectation is that extended vector types of unsupported types
will also be unsupported.

The patch adds the check for this scenario.

Patch by: Ofir Cohen

Reviewers: bader, Anastasia, AlexeySotkin, yaxunl

Reviewed By: Anastasia

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D51296

llvm-svn: 341309

6 years ago[Sparc] allow tls_add/tls_call syntax in assembler parser
Daniel Cederman [Mon, 3 Sep 2018 10:38:12 +0000 (10:38 +0000)]
[Sparc] allow tls_add/tls_call syntax in assembler parser

Summary: Removing unneeded isCodeGenOnly from tls-specific
instructions - TLS_ADD/TLS_LD/TLS_LDX/TLS_CALL.

Author: fedor.sergeev

Reviewers: jyknight, fedor.sergeev

Reviewed By: jyknight

Subscribers: dcederman, brad, llvm-commits

Differential Revision: https://reviews.llvm.org/D36463

llvm-svn: 341308

6 years ago[asan] Clean up some confusing code in
Dan Liew [Mon, 3 Sep 2018 10:33:32 +0000 (10:33 +0000)]
[asan] Clean up some confusing code in
`test/asan/TestCases/Darwin/segv_read_write.c`

* The `fd` arg passed to `mmap()` should be `-1`. It is not defined
what passing `0` does on Darwin.

* The comment about the shadow memory doesn't make any sense to me,
so I'm removing it.

Differential Revision: https://reviews.llvm.org/D44579

llvm-svn: 341307

6 years ago[UBSan] Add CMake and lit support for configuring and running UBSan
Dan Liew [Mon, 3 Sep 2018 10:30:10 +0000 (10:30 +0000)]
[UBSan] Add CMake and lit support for configuring and running UBSan
tests for ios, watchos, tvos, and their simulator counterparts.

This commit does not make the tests actually pass. This will be handled
in later commits.

rdar://problem/41126835

Differential Revision: https://reviews.llvm.org/D51270

llvm-svn: 341306

6 years agoFix issue introduced by r341301 that broke buildbot.
Sander de Smalen [Mon, 3 Sep 2018 10:23:34 +0000 (10:23 +0000)]
Fix issue introduced by r341301 that broke buildbot.

A condition in isSpillInstruction() updates a small vector rather
than the 'FI' by-ref parameter, which was used in a subsequent
call to 'isSpillSlotObjectIndex()'. This patch fixes the condition
to check the FIs in the vector instead.

llvm-svn: 341305

6 years ago[clangd] Support multiple #include headers in one symbol.
Eric Liu [Mon, 3 Sep 2018 10:18:21 +0000 (10:18 +0000)]
[clangd] Support multiple #include headers in one symbol.

Summary:
Currently, a symbol can have only one #include header attached, which
might not work well if the symbol can be imported via different #includes depending
on where it's used. This patch stores multiple #include headers (with # references)
for each symbol, so that CodeCompletion can decide which include to insert.

In this patch, code completion simply picks the most popular include as the default inserted header. We also return all possible includes and their edits in the `CodeCompletion` results.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: mgrang, ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D51291

llvm-svn: 341304

6 years agoRemove unnecessary semicolon to silence -Wpedantic warning. NFCI.
Simon Pilgrim [Mon, 3 Sep 2018 10:17:25 +0000 (10:17 +0000)]
Remove unnecessary semicolon to silence -Wpedantic warning. NFCI.

llvm-svn: 341303

6 years agoTest commit.
Carlos Alberto Enciso [Mon, 3 Sep 2018 09:41:43 +0000 (09:41 +0000)]
Test commit.

Revert change done in r341297. NFC.

Differential Revision: https://reviews.llvm.org/D51583

llvm-svn: 341302

6 years agoExtend hasStoreToStackSlot with list of FI accesses.
Sander de Smalen [Mon, 3 Sep 2018 09:15:58 +0000 (09:15 +0000)]
Extend hasStoreToStackSlot with list of FI accesses.

For instructions that spill/fill to and from multiple frame-indices
in a single instruction, hasStoreToStackSlot and hasLoadFromStackSlot
should return an array of accesses, rather than just the first encounter
of such an access.

This better describes FI accesses for AArch64 (paired) LDP/STP
instructions.

Reviewers: t.p.northover, gberry, thegameg, rengolin, javed.absar, MatzeB

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D51537

llvm-svn: 341301

6 years agoGive a better error message when trying to run the iossim tests and `SANITIZER_IOSSIM...
Dan Liew [Mon, 3 Sep 2018 08:40:19 +0000 (08:40 +0000)]
Give a better error message when trying to run the iossim tests and `SANITIZER_IOSSIM_TEST_DEVICE_IDENTIFIER` is not set in the environment.

Summary: Give a better error message when trying to run the iossim tests and `SANITIZER_IOSSIM_TEST_DEVICE_IDENTIFIER` is not set in the environment.

Reviewers: kubamracek, george.karpenkov

Subscribers: #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D51272

llvm-svn: 341300

6 years ago[UBSan] Propagate `UBSAN_OPTIONS` environment variable when running ios simulator...
Dan Liew [Mon, 3 Sep 2018 08:37:42 +0000 (08:37 +0000)]
[UBSan] Propagate `UBSAN_OPTIONS` environment variable when running ios simulator tests.

rdar://problem/41126835

Reviewers: kubamracek, vsk, george.karpenkov

Subscribers: #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D51273

llvm-svn: 341299

6 years ago[UBSan] Add missing `%run` prefixes to Pointer tests.
Dan Liew [Mon, 3 Sep 2018 08:33:24 +0000 (08:33 +0000)]
[UBSan] Add missing `%run` prefixes to Pointer tests.

Summary: rdar://problem/41126835

Reviewers: vsk, kubamracek

Subscribers: #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D51271

llvm-svn: 341298

6 years agoTest commit - adding a new line.
Carlos Alberto Enciso [Mon, 3 Sep 2018 08:26:37 +0000 (08:26 +0000)]
Test commit - adding a new line.

llvm-svn: 341297

6 years ago[DWARF] Fix dwarf5-index-is-used.cpp
Aleksandr Urakov [Mon, 3 Sep 2018 07:16:06 +0000 (07:16 +0000)]
[DWARF] Fix dwarf5-index-is-used.cpp

Summary:
`dwarf5-index-is-used.cpp` have been failing after rL340206, because `clang`
have stopped to emit pubnames by default after that change. Current patch adds
`-gpubnames` option to the `clang` command line in the test to emit pubnames.

Reviewers: labath, dblaikie

Reviewed By: labath

Subscribers: clayborg, probinson, teemperor, lldb-commits, aprantl, JDevlieghere, abidh, stella.stamenova

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D51208

llvm-svn: 341296

6 years ago[MC] - ConstantPools.cpp: Style consistency, remove redundant braces. NFC.
Kristina Brooks [Mon, 3 Sep 2018 03:48:39 +0000 (03:48 +0000)]
[MC] - ConstantPools.cpp: Style consistency, remove redundant braces. NFC.

Remove braces around two, single statement "if" blocks in line with rest
of the file and the general LLVM code style. NFC, testing commit access.

llvm-svn: 341294

6 years ago[PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8
QingShan Zhang [Mon, 3 Sep 2018 03:14:29 +0000 (03:14 +0000)]
[PowerPC] Add Itineraries of IIC_IntRotateDI for P7/P8
When doing some instruction scheduling work, we noticed some missing itineraries.
Before we switch to machine scheduler, those missing itineraries might not have impact to actually scheduling,
because we can still get same latency due to default values.

With machine scheduler, however, itineraries will have impact to scheduling.
eg: NumMicroOps will default to be 0 if there is NO itineraries for specific instruction class.
And most of the instruction class with itineraries will have NumMicroOps default to 1.

This will has impact on the count of RetiredMOps, affects the Pending/Available Queue,
then causing different scheduling or suboptimal scheduling further.

Patch by jsji (Jinsong Ji)
Differential Revision: https://reviews.llvm.org/D51506

llvm-svn: 341293

6 years ago[InstCombine] allow not+sub fold for arbitrary vector constants
Sanjay Patel [Sun, 2 Sep 2018 19:31:45 +0000 (19:31 +0000)]
[InstCombine] allow not+sub fold for arbitrary vector constants

The fold was implemented for the general case but use-limitation,
but the later constant version which didn't check uses was only
matching splat constants.

llvm-svn: 341292

6 years ago[InstCombine] move/add tests for not+sub; NFC
Sanjay Patel [Sun, 2 Sep 2018 19:18:13 +0000 (19:18 +0000)]
[InstCombine] move/add tests for not+sub; NFC

llvm-svn: 341291

6 years agoRevert "[DebugInfo] Fix bug in LiveDebugVariables."
Hsiangkai Wang [Sun, 2 Sep 2018 16:35:42 +0000 (16:35 +0000)]
Revert "[DebugInfo] Fix bug in LiveDebugVariables."

This reverts commit 8f548ff2a1819e1bc051e8218584f1a3d2cf178a.

buildbot failure in LLVM on clang-ppc64be-linux
http://lab.llvm.org:8011/builders/clang-ppc64le-linux/builds/19765

llvm-svn: 341290

6 years ago[DebugInfo] Fix bug in LiveDebugVariables.
Hsiangkai Wang [Sun, 2 Sep 2018 15:57:22 +0000 (15:57 +0000)]
[DebugInfo] Fix bug in LiveDebugVariables.

In lib/CodeGen/LiveDebugVariables.cpp, it uses std::prev(MBBI) to
get DebugValue's SlotIndex. However, the previous instruction may be
also a debug instruction. It could not use a debug instruction to query
SlotIndex in mi2iMap.

Scan all debug instructions and use the first debug instruction to query
SlotIndex for following debug instructions. Only handle DBG_VALUE in
handleDebugValue().

Differential Revision: https://reviews.llvm.org/D50621

llvm-svn: 341289

6 years ago[Reassociate] swap binop operands to increase factoring potential
Sanjay Patel [Sun, 2 Sep 2018 14:22:54 +0000 (14:22 +0000)]
[Reassociate] swap binop operands to increase factoring potential

If we have a pair of binops feeding another pair of binops, rearrange the operands so
the matching pair are together because that allows easy factorization folds to happen
in instcombine:
((X << S) & Y) & (Z << S) --> ((X << S) & (Z << S)) & Y (reassociation)

--> ((X & Z) << S) & Y (factorize shift from 'and' ops optimization)

This is part of solving PR37098:
https://bugs.llvm.org/show_bug.cgi?id=37098

Note that there's an instcombine version of this patch attached there, but we're trying
to make instcombine have less responsibility to improve compile-time efficiency.

For reasons I still don't completely understand, reassociate does this kind of transform
sometimes, but misses everything in my motivating cases.

This patch on its own is gluing an independent cleanup chunk to the end of the existing
RewriteExprTree() loop. We can build on it and do something stronger to better order the
full expression tree like D40049. That might be an alternative to the proposal to add a
separate reassociation pass like D41574.

Differential Revision: https://reviews.llvm.org/D45842

llvm-svn: 341288

6 years ago[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern
Roman Lebedev [Sun, 2 Sep 2018 13:56:22 +0000 (13:56 +0000)]
[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern

Summary:
A follow-up for D49266 / rL337166 + D49497 / rL338044.

This is still the same pattern to check for the [lack of]
signed truncation, but in this case the constants and the predicate
are negated.

https://rise4fun.com/Alive/BDV
https://rise4fun.com/Alive/n7Z

Reviewers: spatel, craig.topper, RKSimon, javed.absar, efriedma, dmgreen

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51532

llvm-svn: 341287

6 years agoFix buildbot test
David Carlier [Sun, 2 Sep 2018 10:52:43 +0000 (10:52 +0000)]
Fix buildbot test

llvm-svn: 341286

6 years ago[Sanitizer] openbsd build fix
David Carlier [Sun, 2 Sep 2018 09:08:50 +0000 (09:08 +0000)]
[Sanitizer] openbsd build fix

sysctl has a different signature under OpenBSD

Reviewers: krytarowski

Reviewed By: krytarowski

Differential Revision: https://reviews.llvm.org/D51572

llvm-svn: 341285

6 years agoFix Bug 38713: clang-format mishandles a short block after "default:" in a switch...
Jonas Toth [Sun, 2 Sep 2018 09:04:51 +0000 (09:04 +0000)]
Fix Bug 38713: clang-format mishandles a short block after "default:" in a switch statement

Summary:
See https://bugs.llvm.org/show_bug.cgi?id=38713

Patch by Owen Pan!

Reviewers: djasper, klimek, sammccall

Reviewed By: sammccall

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D51294

llvm-svn: 341284

6 years agoclang-format r341282.
Lang Hames [Sun, 2 Sep 2018 01:29:29 +0000 (01:29 +0000)]
clang-format r341282.

llvm-svn: 341283

6 years ago[ORC] Tidy up JITSymbolFlags to remove the need for some explicit static_casts.
Lang Hames [Sun, 2 Sep 2018 01:28:26 +0000 (01:28 +0000)]
[ORC] Tidy up JITSymbolFlags to remove the need for some explicit static_casts.

Removes the implicit conversion to the underlying type for
JITSymbolFlags::FlagNames and replaces it with some bitwise and comparison
operators.

llvm-svn: 341282

6 years ago[llvm-mca] Fix typo in debug output. NFC.
Matt Davis [Sat, 1 Sep 2018 18:32:33 +0000 (18:32 +0000)]
[llvm-mca] Fix typo in debug output. NFC.

llvm-svn: 341281

6 years ago[InstCombine] simplify code for 'or' fold
Sanjay Patel [Sat, 1 Sep 2018 15:08:59 +0000 (15:08 +0000)]
[InstCombine] simplify code for 'or' fold

This is no-outwardly-visible-change intended, so no test.
But the code is smaller and more efficient. The check for
a 'not' op is intended to avoid the expensive value tracking
call when it should not be necessary, and it might prevent
infinite looping when we resurrect:
rL300977

llvm-svn: 341280

6 years ago[AVR] Redefine the 'LSL' instruction as an alias of 'ADD'
Dylan McKay [Sat, 1 Sep 2018 12:23:00 +0000 (12:23 +0000)]
[AVR] Redefine the 'LSL' instruction as an alias of 'ADD'

The 'LSL Rd' instruction is equivalent to 'ADD Rd, Rd'.

llvm-svn: 341278

6 years ago[AVR] Redefine the 'SBR' instruction as an alias
Dylan McKay [Sat, 1 Sep 2018 12:22:54 +0000 (12:22 +0000)]
[AVR] Redefine the 'SBR' instruction as an alias

This fixes a TableGen warning about duplicate bit patterns.

SBR
===

This is an alias of 'ORI Rd, K'.

llvm-svn: 341277

6 years ago[AVR] Define the TST instruction as an alias of AND
Dylan McKay [Sat, 1 Sep 2018 12:22:50 +0000 (12:22 +0000)]
[AVR] Define the TST instruction as an alias of AND

The 'tst Rd' instruction is equivalent to 'and Rd, Rd'.

llvm-svn: 341276

6 years ago[AVR] Define the ROL instruction as an alias of ADC
Dylan McKay [Sat, 1 Sep 2018 12:22:07 +0000 (12:22 +0000)]
[AVR] Define the ROL instruction as an alias of ADC

The 'rol Rd' instruction is equivalent to 'adc Rd'.

This caused compile warnings from tablegen because of conflicting bits
shared between each instruction.

llvm-svn: 341275

6 years agoIgnore unicode decode errors in test suite's encoded_file class
Pavel Labath [Sat, 1 Sep 2018 12:15:46 +0000 (12:15 +0000)]
Ignore unicode decode errors in test suite's encoded_file class

These happen in a couple of tests when lldb tries to pretty print a
const char * variable in the inferior which points to garbage. Instead,
we have the python replace the invalid sequences with the unicode
replacement character.

llvm-svn: 341274

6 years ago[clangd] Fix many typos. NFC
Fangrui Song [Sat, 1 Sep 2018 07:47:03 +0000 (07:47 +0000)]
[clangd] Fix many typos. NFC

llvm-svn: 341273

6 years agoAMDGPU/GlobalISel: Define instruction mapping for G_SELECT
Tom Stellard [Sat, 1 Sep 2018 02:41:19 +0000 (02:41 +0000)]
AMDGPU/GlobalISel: Define instruction mapping for G_SELECT

Reviewers: arsenm

Reviewed By: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D49737

llvm-svn: 341271

6 years agoMake HasWinCFI a plain bool instead of Optional<bool>
Sanjin Sijaric [Sat, 1 Sep 2018 00:33:43 +0000 (00:33 +0000)]
Make HasWinCFI a plain bool instead of Optional<bool>

Summary:
Reid suggested making HasWinCFI a plain bool defaulting to false in D50288.

It's needed in order to add HasWinCFI to MIRPrinter.  Otherwise, we'll get the
assertion:

HasWinCFI.hasValue() && "HasWinCFI not set yet!"'

Also, a few ARM64 Windows test cases will fail with the same assert if the ARM64
MCLayer part of EH work (D50166) goes in before the frame lowering part that
sets HasWinCFI (D50288 as of now).

Reviewers: rnk, mstorsjo, hans, javed.absar

Reviewed By: rnk

Subscribers: kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D51560

llvm-svn: 341270

6 years ago[Constant Hoisting] Hoisting Constant GEP Expressions
Zhaoshi Zheng [Sat, 1 Sep 2018 00:04:56 +0000 (00:04 +0000)]
[Constant Hoisting] Hoisting Constant GEP Expressions

Leverage existing logic in constant hoisting pass to transform constant GEP
expressions sharing the same base global variable. Multi-dimensional GEPs are
rewritten into single-dimensional GEPs.

Differential Revision: https://reviews.llvm.org/D51396

llvm-svn: 341269

6 years agoFile completion bugfix
Frederic Riss [Fri, 31 Aug 2018 23:03:28 +0000 (23:03 +0000)]
File completion bugfix

If you tried to complete somwthing like ~/., lldb would come up with a lot
of non-existent filenames by concatenating every exisitng file in the directory
with an initial '.'.

This was due to a workaround for an llvm::fs::path::filename behavior that
was not applied selectively enough.

llvm-svn: 341268

6 years agoFix typo in size remarks for module passes
Jessica Paquette [Fri, 31 Aug 2018 22:43:41 +0000 (22:43 +0000)]
Fix typo in size remarks for module passes

ModuleCount = InstrCount was incorrect. It should have been
InstrCount = ModuleCount. This was making it emit an extra, incorrect remark
for Print Module IR.

The test didn't catch this, because it didn't ensure that the only remark
output was from the desired pass. So, it was possible to have an extra remark
come through and not fail. Updated the test so that we ensure that the last
remark that's output comes from the desired pass. This is done by ensuring
that whatever is being read after the last remark is YAML output rather than
some incorrect garbage.

llvm-svn: 341267

6 years ago[AMDGPU] Split v32i32 loads
Stanislav Mekhanoshin [Fri, 31 Aug 2018 22:43:36 +0000 (22:43 +0000)]
[AMDGPU] Split v32i32 loads

Differential Revision: https://reviews.llvm.org/D51555

llvm-svn: 341266

6 years ago[X86] Add ktest intrinsics to match gcc and icc.
Craig Topper [Fri, 31 Aug 2018 22:29:56 +0000 (22:29 +0000)]
[X86] Add ktest intrinsics to match gcc and icc.

These aren't documented in the Intel Intrinsics Guide, but are supported by gcc and icc.

Includes these intrinsics:
_ktestc_mask8_u8, _ktestz_mask8_u8, _ktest_mask8_u8
_ktestc_mask16_u8, _ktestz_mask16_u8, _ktest_mask16_u8
_ktestc_mask32_u8, _ktestz_mask32_u8, _ktest_mask32_u8
_ktestc_mask64_u8, _ktestz_mask64_u8, _ktest_mask64_u8

llvm-svn: 341265

6 years ago[Hexagon] Don't access non-existent instructions
Krzysztof Parzyszek [Fri, 31 Aug 2018 22:10:04 +0000 (22:10 +0000)]
[Hexagon] Don't access non-existent instructions

llvm-svn: 341264

6 years agoRevamp test-suite documentation
Matthias Braun [Fri, 31 Aug 2018 21:47:01 +0000 (21:47 +0000)]
Revamp test-suite documentation

- Remove duplication: Both TestingGuide and TestSuiteMakefileGuide
  would give a similar overview over the test-suite.
- Present cmake/lit as the default/normal way of running the test-suite:
- Move information about the cmake/lit testsuite into the new
  TestSuiteGuide.rst file. Mark the remaining information in
  TestSuiteMakefilesGuide.rst as deprecated.
- General simplification and shorting of language.
- Remove paragraphs about tests known to fail as everything should pass
  nowadays.
- Remove paragraph about zlib requirement; it's not required anymore
  since we copied a zlib source snapshot into the test-suite.
- Remove paragraph about comparison with "native compiler". Correctness is
  always checked against reference outputs nowadays.
- Change cmake/lit quickstart section to recommend `pip` for installing
  lit and use `CMAKE_C_COMPILER` and a cache file in the example as that
  is what most people will end up doing anyway. Also a section about
  compare.py to quickstart.
- Document `Bitcode` and `MicroBenchmarks` directories.
- Add section with commonly used cmake configuration options.
- Add section about showing and comparing result files via compare.py.
- Add section about using external benchmark suites.
- Add section about using custom benchmark suites.
- Add section about profile guided optimization.
- Add section about cross-compilation and running on external devices.

Differential Revision: https://reviews.llvm.org/D51465

llvm-svn: 341260

6 years ago[X86] Add intrinsics for KTEST instructions.
Craig Topper [Fri, 31 Aug 2018 21:31:53 +0000 (21:31 +0000)]
[X86] Add intrinsics for KTEST instructions.

These intrinsics use the same implementation as PTEST intrinsics, but use vXi1 vectors.

New clang builtins will be accompanying them shortly.

llvm-svn: 341259

6 years ago[WebAssembly] clang-format (NFC)
Heejin Ahn [Fri, 31 Aug 2018 20:57:00 +0000 (20:57 +0000)]
[WebAssembly] clang-format (NFC)

Summary: This patch runs clang-format on all wasm-only files.

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, jfb, cfe-commits

Differential Revision: https://reviews.llvm.org/D51448

llvm-svn: 341254

6 years ago[NFC] Optionally pass a function to emitInstrCountChangedRemark
Jessica Paquette [Fri, 31 Aug 2018 20:54:37 +0000 (20:54 +0000)]
[NFC] Optionally pass a function to emitInstrCountChangedRemark

In basic block, loop, and function passes, we already have a function that
we can use to emit optimization remarks. We can use that instead of searching
the module for the first suitable function (that is, one that contains at
least one basic block.)

llvm-svn: 341253

6 years ago[NFC] Check if P is a pass manager on entry to emitInstrCountChangedRemark
Jessica Paquette [Fri, 31 Aug 2018 20:51:54 +0000 (20:51 +0000)]
[NFC] Check if P is a pass manager on entry to emitInstrCountChangedRemark

There's no point in finding a function to use for remark output when we're
not going to emit anything.

llvm-svn: 341252

6 years ago[X86] Add k-mask conversion and load/store instrinsics to match gcc and icc.
Craig Topper [Fri, 31 Aug 2018 20:41:06 +0000 (20:41 +0000)]
[X86] Add k-mask conversion and load/store instrinsics to match gcc and icc.

This adds:
_cvtmask8_u32, _cvtmask16_u32, _cvtmask32_u32, _cvtmask64_u64
_cvtu32_mask8, _cvtu32_mask16, _cvtu32_mask32, _cvtu64_mask64
_load_mask8, _load_mask16, _load_mask32, _load_mask64
_store_mask8, _store_mask16, _store_mask32, _store_mask64

These are currently missing from the Intel Intrinsics Guide webpage.

llvm-svn: 341251

6 years ago[NFC] Pass the instruction delta to emitInstrCountChangedRemark
Jessica Paquette [Fri, 31 Aug 2018 20:20:57 +0000 (20:20 +0000)]
[NFC] Pass the instruction delta to emitInstrCountChangedRemark

Instead of counting the size of the entire module every time we run a pass,
pass along a delta instead and use that to emit the remark.

This means we only have to use (on average) smaller IR units to calculate
instruction counts. E.g, in a BB pass, we only need to look at the delta of
the BB instead of the delta of the entire module.

6/6

(This improved compile time for size remarks on sqlite3 + O2 significantly)

llvm-svn: 341250

6 years ago[NFC] Pre-calculate SCC IR counts in size remarks.
Jessica Paquette [Fri, 31 Aug 2018 20:20:56 +0000 (20:20 +0000)]
[NFC] Pre-calculate SCC IR counts in size remarks.

Same vein as the previous commits. Pre-calculate the size of
the module and use that to decide if we're going to emit a
remark.

This one comes with a FIXME and TODO. First off, CallGraphSCC
and CallGraphNode don't have a getInstructionCount function. So,
for now, we do the same thing as in a module pass.

Second off, we're not really saving anything here yet, because
as before, I need to change emitInstrCountChangedRemark to take
in a delta. Keeping the patches small though, so that's coming up
next.

5/6

llvm-svn: 341249

6 years ago[NFC] Pre-calculate module IR counts in size remarks.
Jessica Paquette [Fri, 31 Aug 2018 20:20:55 +0000 (20:20 +0000)]
[NFC] Pre-calculate module IR counts in size remarks.

Same as the previous NFC commits in the same vein.

This one introduces a TODO. I'm going to change emitInstrCountChangedRemark
so that it takes in a delta. Since the delta isn't necessary yet, it's not
there. For now, this means that we're calculating the size of the module
twice.

Just done separately to keep the patches small.

4/6

llvm-svn: 341248

6 years ago[NFC] Pre-calculate loop IR counts in size remarks.
Jessica Paquette [Fri, 31 Aug 2018 20:20:54 +0000 (20:20 +0000)]
[NFC] Pre-calculate loop IR counts in size remarks.

Another commit reducing compile time in size remarks.

Cache the size of the module and loop, and update values based
off of deltas instead. Avoid recalculating the size of the
whole module whenever possible.

3/6

llvm-svn: 341247

6 years ago[NFC] Pre-calculate basic block IR counts in size remarks.
Jessica Paquette [Fri, 31 Aug 2018 20:20:53 +0000 (20:20 +0000)]
[NFC] Pre-calculate basic block IR counts in size remarks.

Size remarks are slow due to lots of recalculation of the module.

This is similar to the previous commit. Cache the size of the module and
update counts in basic block passes based off a less-expensive delta.

2/6

llvm-svn: 341246

6 years ago[NFC] Pre-calculate function IR counts in size remarks.
Jessica Paquette [Fri, 31 Aug 2018 20:19:41 +0000 (20:19 +0000)]
[NFC] Pre-calculate function IR counts in size remarks.

Size remarks are slow due to lots of recalculation of the module.

Pre-calculate the module size and initial function size for a remark. Use
deltas calculated using the less-expensive function IR count to update the
module counts for Function passes.

1/6

llvm-svn: 341245

6 years agolit: Use sys.executable for executing builtin commands
Tom Stellard [Fri, 31 Aug 2018 20:15:31 +0000 (20:15 +0000)]
lit: Use sys.executable for executing builtin commands

Summary:
The python executable may not exist on all systems so use sys.executable
instead.

Reviewers: ddunbar, stella.stamenova

Subscribers: delcypher, llvm-commits

Differential Revision: https://reviews.llvm.org/D51511

llvm-svn: 341244

6 years ago[XRay] Update RecordInitializer for PIDRecord
Dean Michael Berris [Fri, 31 Aug 2018 20:02:55 +0000 (20:02 +0000)]
[XRay] Update RecordInitializer for PIDRecord

Since we changed the storage for the PID in PIDRecord instances, we need
to also update the way we load the data from a DataExtractor through the
RecordInitializer.

llvm-svn: 341243

6 years ago[clangd] Implement findOccurrences interface in dynamic index.
Haojian Wu [Fri, 31 Aug 2018 19:53:37 +0000 (19:53 +0000)]
[clangd] Implement findOccurrences interface in dynamic index.

Summary:
Implement the interface in
  - FileIndex
  - MemIndex
  - MergeIndex

Depends on https://reviews.llvm.org/D50385.

Reviewers: sammccall, ilya-biryukov

Reviewed By: sammccall

Subscribers: mgrang, ilya-biryukov, ioeric, MaskRay, jkorous, arphaman, kadircet, cfe-commits

Differential Revision: https://reviews.llvm.org/D51279

llvm-svn: 341242

6 years ago[XRay] Use correct type for PID records
Dean Michael Berris [Fri, 31 Aug 2018 19:32:46 +0000 (19:32 +0000)]
[XRay] Use correct type for PID records

Previously we've been reading and writing the wrong types which only
worked in little endian implementations. This time we're writing the
same typed values the runtime is using, and reading them appropriately
as well.

llvm-svn: 341241

6 years agoTests: fix tests encoding specific hash values for 32-bit systems.
Tim Northover [Fri, 31 Aug 2018 19:24:37 +0000 (19:24 +0000)]
Tests: fix tests encoding specific hash values for 32-bit systems.

I changed the seed slightly, but forgot to run the tests on a 32-bit system, so
tests which hard-code a specific hash value started breaking.

llvm-svn: 341240

6 years ago[XRay] Use correct type for thread ID parsing
Dean Michael Berris [Fri, 31 Aug 2018 19:11:19 +0000 (19:11 +0000)]
[XRay] Use correct type for thread ID parsing

Previously we were reading only a uint16_t when we really needed to read
an int32_t from the log.

llvm-svn: 341239

6 years ago[Hexagon] Add support for getRegisterByName.
Sid Manning [Fri, 31 Aug 2018 19:08:23 +0000 (19:08 +0000)]
[Hexagon] Add support for getRegisterByName.

Support required to build the Hexagon Linux kernel.

Differential Revision: https://reviews.llvm.org/D51363

llvm-svn: 341238