Sriraman Tallam [Thu, 13 Oct 2016 20:54:39 +0000 (20:54 +0000)]
New llc option pie-copy-relocations to optimize access to extern globals.
This option indicates copy relocations support is available from the linker
when building as PIE and allows accesses to extern globals to avoid the GOT.
Differential Revision: https://reviews.llvm.org/D24849
llvm-svn: 284160
Justin Lebar [Thu, 13 Oct 2016 20:52:17 +0000 (20:52 +0000)]
Add and use isDiscardableGVALinkage function.
Reviewers: rnk
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D25571
llvm-svn: 284159
Justin Lebar [Thu, 13 Oct 2016 20:52:12 +0000 (20:52 +0000)]
[CUDA] Emit deferred diagnostics during Sema rather than during codegen.
Summary:
Emitting deferred diagnostics during codegen was a hack. It did work,
but usability was poor, both for us as compiler devs and for users. We
don't codegen if there are any sema errors, so for users this meant that
they wouldn't see deferred errors if there were any non-deferred errors.
For devs, this meant that we had to carefully split up our tests so that
when we tested deferred errors, we didn't emit any non-deferred errors.
This change moves checking for deferred errors into Sema. See the big
comment in SemaCUDA.cpp for an overview of the idea.
This checking adds overhead to compilation, because we have to maintain
a partial call graph. As a result, this change makes deferred errors a
CUDA-only concept (whereas before they were a general concept). If
anyone else wants to use this framework for something other than CUDA,
we can generalize at that time.
This patch makes the minimal set of test changes -- after this lands,
I'll go back through and do a cleanup of the tests that we no longer
have to split up.
Reviewers: rnk
Subscribers: cfe-commits, rsmith, tra
Differential Revision: https://reviews.llvm.org/D25541
llvm-svn: 284158
Nirav Dave [Thu, 13 Oct 2016 20:23:25 +0000 (20:23 +0000)]
Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled."
This reverts commit r284151 which appears to be triggering a LTO
failures on Hexagon
llvm-svn: 284157
Saleem Abdulrasool [Thu, 13 Oct 2016 20:10:22 +0000 (20:10 +0000)]
test: attempt to repair SCEI buildbots
The tests target ARM, ensure that the ARM target is registered.
llvm-svn: 284156
Eric Liu [Thu, 13 Oct 2016 19:49:19 +0000 (19:49 +0000)]
[clang-move] error out when fail to create new files.
llvm-svn: 284155
Saleem Abdulrasool [Thu, 13 Oct 2016 19:45:08 +0000 (19:45 +0000)]
CodeGen: ensure that the runtime calling convention matches
Incorrect specification of the calling convention results in UB which can cause
the code path to be eliminated. Simplify the existing code by using the
RuntimeCall constructor in `CodeGenFunction`.
llvm-svn: 284154
Quentin Colombet [Thu, 13 Oct 2016 19:27:48 +0000 (19:27 +0000)]
[RAGreedy] Empty live-ranges always succeed in last chance recoloring.
Relax the constraint for empty live-ranges while doing last chance
recoloring. Indeed, those live-ranges do not need an actual color to be
fond for the recoloring to work.
Empty live-range may happen as a result of splitting/spilling.
Unfortunately no test case for in-tree targets.
llvm-svn: 284152
Nirav Dave [Thu, 13 Oct 2016 19:20:16 +0000 (19:20 +0000)]
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
Retrying after upstream changes.
Simplify Consecutive Merge Store Candidate Search
Now that address aliasing is much less conservative, push through
simplified store merging search which only checks for parallel stores
through the chain subgraph. This is cleaner as the separation of
non-interfering loads/stores from the store-merging logic.
Whem merging stores, search up the chain through a single load, and
finds all possible stores by looking down from through a load and a
TokenFactor to all stores visited. This improves the quality of the
output SelectionDAG and generally the output CodeGen (with some
exceptions).
Additional Minor Changes:
1. Finishes removing unused AliasLoad code
2. Unifies the the chain aggregation in the merged stores across
code paths
3. Re-add the Store node to the worklist after calling
SimplifyDemandedBits.
4. Increase GatherAllAliasesMaxDepth from 6 to 18. That number is
arbitrary, but seemed sufficient to not cause regressions in
tests.
This finishes the change Matt Arsenault started in r246307 and
jyknight's original patch.
Many tests required some changes as memory operations are now
reorderable. Some tests relying on the order were changed to use
volatile memory operations
Noteworthy tests:
CodeGen/AArch64/argument-blocks.ll -
It's not entirely clear what the test_varargs_stackalign test is
supposed to be asserting, but the new code looks right.
CodeGen/AArch64/arm64-memset-inline.lli -
CodeGen/AArch64/arm64-stur.ll -
CodeGen/ARM/memset-inline.ll -
The backend now generates *worse* code due to store merging
succeeding, as we do do a 16-byte constant-zero store efficiently.
CodeGen/AArch64/merge-store.ll -
Improved, but there still seems to be an extraneous vector insert
from an element to itself?
CodeGen/PowerPC/ppc64-align-long-double.ll -
Worse code emitted in this case, due to the improved store->load
forwarding.
CodeGen/X86/dag-merge-fast-accesses.ll -
CodeGen/X86/MergeConsecutiveStores.ll -
CodeGen/X86/stores-merging.ll -
CodeGen/Mips/load-store-left-right.ll -
Restored correct merging of non-aligned stores
CodeGen/AMDGPU/promote-alloca-stored-pointer-value.ll -
Improved. Correctly merges buffer_store_dword calls
CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll -
Improved. Sidesteps loading a stored value and
merges two stores
CodeGen/X86/pr18023.ll -
This test has been removed, as it was asserting incorrect
behavior. Non-volatile stores *CAN* be moved past volatile loads,
and now are.
CodeGen/X86/vector-idiv.ll -
CodeGen/X86/vector-lzcnt-128.ll -
It's basically impossible to tell what these tests are actually
testing. But, looks like the code got better due to the memory
operations being recognized as non-aliasing.
CodeGen/X86/win32-eh.ll -
Both loads of the securitycookie are now merged.
CodeGen/AMDGPU/vgpr-spill-emergency-stack-slot-compute.ll -
This test appears to work but no longer exhibits the spill behavior.
Reviewers: arsenm, hfinkel, tstellarAMD, jyknight, nhaehnle
Subscribers: wdng, nhaehnle, nemanjai, arsenm, weimingz, niravd, RKSimon, aemerson, qcolombet, dsanders, resistor, tstellarAMD, t.p.northover, spatel
Differential Revision: https://reviews.llvm.org/D14834
llvm-svn: 284151
Arnold Schwaighofer [Thu, 13 Oct 2016 19:19:37 +0000 (19:19 +0000)]
Swift Calling Convention: Fix out of bounds access
Use iterator instead of address of element in vector
It is not valid to access one after the last element.
rdar://
28759508
llvm-svn: 284150
Kostya Serebryany [Thu, 13 Oct 2016 19:06:46 +0000 (19:06 +0000)]
[libFuzzer] add -trace_malloc= flag
llvm-svn: 284149
Eric Liu [Thu, 13 Oct 2016 19:04:19 +0000 (19:04 +0000)]
Print stack trace for clang-move tool.
llvm-svn: 284148
Eric Liu [Thu, 13 Oct 2016 18:56:14 +0000 (18:56 +0000)]
Print stack trace for clang-change-namespace tool.
llvm-svn: 284147
Quentin Colombet [Thu, 13 Oct 2016 18:46:38 +0000 (18:46 +0000)]
[AArch64][RegisterBankInfo] Switch to fully static opds mapping for G_BITCAST.
NFC.
llvm-svn: 284146
Justin Lebar [Thu, 13 Oct 2016 18:45:17 +0000 (18:45 +0000)]
[CUDA] Allow static variables in __host__ __device__ functions, so long as they're never codegen'ed for device.
Reviewers: tra, rnk
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D25150
llvm-svn: 284145
Justin Lebar [Thu, 13 Oct 2016 18:45:13 +0000 (18:45 +0000)]
[CUDA] Disallow __shared__ variables in host functions.
Reviewers: tra, rnk
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D25143
llvm-svn: 284144
Justin Lebar [Thu, 13 Oct 2016 18:45:08 +0000 (18:45 +0000)]
[CUDA] Add Sema::CUDADiagBuilder and Sema::CUDADiagIf{Device,Host}Code().
Summary:
Together these let you easily create diagnostics that
- are never emitted for host code
- are always emitted for __device__ and __global__ functions, and
- are emitted for __host__ __device__ functions iff these functions are
codegen'ed.
At the moment there are only three diagnostics that need this treatment,
but I have more to add, and it's not sustainable to write code for emitting
every such diagnostic twice, and from a special wrapper in SemaCUDA.cpp.
While we're at it, don't emit the function name in
err_cuda_device_exceptions: It's not necessary to print it, and making
this work in the new framework in the face of a null value for
dyn_cast<FunctionDecl>(CurContext) isn't worth the effort.
Reviewers: rnk
Subscribers: cfe-commits, tra
Differential Revision: https://reviews.llvm.org/D25139
llvm-svn: 284143
Manman Ren [Thu, 13 Oct 2016 18:42:14 +0000 (18:42 +0000)]
Module: emit initializers for C/ObjC after r276159.
In r276159, we started to defer emitting initializers for VarDecls, but
forgot to add the initializers for non-C++ language.
rdar://
28740482
llvm-svn: 284142
Asiri Rathnayake [Thu, 13 Oct 2016 18:40:57 +0000 (18:40 +0000)]
[libcxxabi] Fix gcc build after r284128
NFC.
llvm-svn: 284141
Teresa Johnson [Thu, 13 Oct 2016 18:05:53 +0000 (18:05 +0000)]
Pass -ffunction-sections/-fdata-sections along to gold-plugin
Summary:
These options need to be passed to the plugin in order to have
an effect on LTO/ThinLTO compiles.
Reviewers: mehdi_amini, pcc
Subscribers: jfb, dschuff, mehdi_amini, cfe-commits
Differential Revision: https://reviews.llvm.org/D24644
llvm-svn: 284140
David L Kreitzer [Thu, 13 Oct 2016 17:51:59 +0000 (17:51 +0000)]
[safestack] Move X86-targeted tests into the X86 subdirectory.
Patch by Michael LeMay
Differential revision: http://reviews.llvm.org/D25340
llvm-svn: 284139
Teresa Johnson [Thu, 13 Oct 2016 17:43:20 +0000 (17:43 +0000)]
Add interface to compute number of physical cores on host system
Summary:
For now I have only added support for x86_64 Linux, but other systems
can be added incrementally.
This is to be used for setting the default parallelism for ThinLTO
backends (instead of thread::hardware_concurrency which includes
hyperthreading and is too aggressive). I'll send this as a follow-on
patch, and it will fall back to hardware_concurrency when the new
getHostNumPhysicalCores returns -1 (when not supported for a given
host system).
I also added an interface to MemoryBuffer to force reading a file
as a stream - this is required for /proc/cpuinfo which is a special
file that looks like a normal file but appears to have 0 size.
The existing readers of this file in Host.cpp are reading the first
1024 or so bytes from it, because the necessary info is near the top.
But for the new functionality we need to be able to read the entire
file. I can go back and change the other readers to use the new
getFileAsStream as a follow-on patch since it seems much more robust.
Added a unittest.
Reviewers: mehdi_amini
Subscribers: beanz, mgorny, llvm-commits, modocache
Differential Revision: https://reviews.llvm.org/D25564
llvm-svn: 284138
Davide Italiano [Thu, 13 Oct 2016 17:42:38 +0000 (17:42 +0000)]
[ThinLTO] Update doc to include lld (now supported).
Differential Revision: https://reviews.llvm.org/D25537
llvm-svn: 284137
Reid Kleckner [Thu, 13 Oct 2016 17:33:22 +0000 (17:33 +0000)]
Truncate long names in type records
In the MS ABI, the frontend is supposed to MD5 such pathologically long
names. LLVM should still defend itself from long names, though.
Fixes part of PR29098.
llvm-svn: 284136
Vedant Kumar [Thu, 13 Oct 2016 17:22:44 +0000 (17:22 +0000)]
[unittests] Remove a redundant test fixture (NFC)
llvm-svn: 284135
Igor Breger [Thu, 13 Oct 2016 17:20:38 +0000 (17:20 +0000)]
[X86][AVX512] Fix sext v32i1 -> v32i8 lowering.
Fix PR30600.
Differential Revision: https://reviews.llvm.org/D25554
llvm-svn: 284134
Arnold Schwaighofer [Thu, 13 Oct 2016 17:17:36 +0000 (17:17 +0000)]
Add more 64bit swiftcall convention tests
llvm-svn: 284133
Kostya Serebryany [Thu, 13 Oct 2016 16:19:09 +0000 (16:19 +0000)]
[libFuzzer] reapply r283946: refactoring to speed things up, NFC. Now with a fix for gcc build
llvm-svn: 284132
Albert Gutowski [Thu, 13 Oct 2016 16:03:42 +0000 (16:03 +0000)]
Implement MS _ReturnAddress and _AddressOfReturnAddress intrinsics
Reviewers: rnk, thakis, majnemer, hans
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D25540
llvm-svn: 284131
Reid Kleckner [Thu, 13 Oct 2016 15:48:48 +0000 (15:48 +0000)]
Fix for PR30687. Avoid dereferencing MBB.end().
We don't need to return a MachineInstr* from these stack probe insertion
calls anyway. If we ever need to add it back, we can return an iterator
instead.
Based on a patch by David Kreitzer
This bug is a consequence of
r279314 | dexonsmith | 2016-08-19 13:40:12 -0700 (Fri, 19 Aug 2016) | 110 lines
We hit the "Assertion `!NodePtr->isKnownSentinel()' failed" assertion,
but only when inserting a stack probe call at the end of an MBB, which
isn't necessarily a common situation.
Differential Revision: https://reviews.llvm.org/D25566
llvm-svn: 284130
Eric Liu [Thu, 13 Oct 2016 15:07:14 +0000 (15:07 +0000)]
Do not delete leading ../ in remove_dots.
Reviewers: bkramer
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D25561
llvm-svn: 284129
Asiri Rathnayake [Thu, 13 Oct 2016 15:05:19 +0000 (15:05 +0000)]
[libcxxabi] Refactor pthread usage into a separate API
This patch refactors all pthread uses of libc++abi into a separate API. This
is the first step towards supporting an externlly-threaded libc++abi library.
I've followed the conventions already used in the libc++ library for the same
purpose.
Patch from: Saleem Abdulrasool and Asiri Rathnayake
Reviewed by: compnerd, EricWF
Differential revisions:
https://reviews.llvm.org/D18482 (original)
https://reviews.llvm.org/D24864 (final)
llvm-svn: 284128
Javed Absar [Thu, 13 Oct 2016 14:57:43 +0000 (14:57 +0000)]
[ARM]: Assign cost of scaling used in addressing mode for ARM cores
This patch assigns cost of the scaling used in addressing.
On many ARM cores, a negated register offset takes longer than a
non-negated register offset, in a register-offset addressing mode.
For instance:
LDR R0, [R1, R2 LSL #2]
LDR R0, [R1, -R2 LSL #2]
Above, (1) takes less cycles than (2).
By assigning appropriate scaling factor cost, we enable the LLVM
to make the right trade-offs in the optimization and code-selection phase.
Differential Revision: http://reviews.llvm.org/D24857
Reviewers: jmolloy, rengolin
llvm-svn: 284127
Matthew Simpson [Thu, 13 Oct 2016 14:54:31 +0000 (14:54 +0000)]
[LV] Account for predicated stores in instruction costs
This patch ensures that we scale the estimated cost of predicated stores by
block probability. This is a follow-on patch for r284123.
llvm-svn: 284126
Asiri Rathnayake [Thu, 13 Oct 2016 14:32:24 +0000 (14:32 +0000)]
[libunwind] Add missing <stdint.h> include. NFC.
This missing include seems to cause compilation failures on older MacOS
versions (< 10.9). This is because r270692 has introduced uint64_t into
config.h without including this header.
Patch from: Jeremy Huddleston Sequoia (jeremyhu@apple.com)
llvm-svn: 284125
Sanjay Patel [Thu, 13 Oct 2016 14:27:08 +0000 (14:27 +0000)]
[x86] add negate-i1 run for 32-bit target
llvm-svn: 284124
Matthew Simpson [Thu, 13 Oct 2016 14:19:48 +0000 (14:19 +0000)]
[LV] Avoid rounding errors for predicated instruction costs
This patch modifies the cost calculation of predicated instructions (div and
rem) to avoid the accumulation of rounding errors due to multiple truncating
integer divisions. The calculation for predicated stores will be addressed in a
follow-on patch since we currently don't scale the cost of predicated stores by
block probability.
Differential Revision: https://reviews.llvm.org/D25333
llvm-svn: 284123
Simon Pilgrim [Thu, 13 Oct 2016 14:04:35 +0000 (14:04 +0000)]
[DAGCombiner] Add vector support to (mul (shl X, Y), Z) -> (shl (mul X, Z), Y) style combines
llvm-svn: 284122
Sjoerd Meijer [Thu, 13 Oct 2016 13:22:01 +0000 (13:22 +0000)]
Guard flag –fdenormal-fp-math with –fno-fast-math.
This allows disabling the FP options with just one flag (-fno-fast-math).
Differential Revision: https://reviews.llvm.org/D25479
llvm-svn: 284121
Marshall Clow [Thu, 13 Oct 2016 13:21:38 +0000 (13:21 +0000)]
Add missing include in test; NFC. Thanks to Jonathan Wakely for the report.
llvm-svn: 284120
Matt Arsenault [Thu, 13 Oct 2016 13:10:00 +0000 (13:10 +0000)]
AMDGPU: Assume spilling will occur at -O0
Because everything live is spilled at the end of a
block by fast regalloc, assume this will happen and
avoid the copies of the resource descriptor.
llvm-svn: 284119
Simon Pilgrim [Thu, 13 Oct 2016 12:54:32 +0000 (12:54 +0000)]
Copy+pasts typo in comment describing combine test
Repeated the "fold (mul x, 0) -> 0" instead of "fold (mul x, 1) -> x"
llvm-svn: 284118
Simon Pilgrim [Thu, 13 Oct 2016 12:49:31 +0000 (12:49 +0000)]
[DAGCombiner] Add vector support to C2-(A+C1) -> (C2-C1)-A folding
llvm-svn: 284117
Matt Arsenault [Thu, 13 Oct 2016 12:45:16 +0000 (12:45 +0000)]
AMDGPU: Fix truncate to bool warnings
llvm-svn: 284116
Simon Dardis [Thu, 13 Oct 2016 12:12:56 +0000 (12:12 +0000)]
[mips] Add IAS support for dvp, evp
These instructions were only defined for microMIPSR6 previously. Add
definitions for MIPSR6, correct definitions for microMIPSR6, flag these
instructions as having unmodelled side effects (they disable/enable
virtual processors) and add missing disassember tests for microMIPSR6.
Reviewers: vkalintiris
Differential Review: https://reviews.llvm.org/D24291
llvm-svn: 284115
Richard Chamberlain [Thu, 13 Oct 2016 12:11:00 +0000 (12:11 +0000)]
[lldb] Improve identification of Linux core dumps. Fix for bug #30485.
Summary:
ObjectFileELF::RefineModuleDetailsFromNote() identifies Linux core dumps by searching for
library paths starting with /lib/x86_64-linux-gnu or /lib/i386-linux-gnu. This change widens the
test to allow for linux installations which have addition directories in the path.
Reviewers: ted, hhellyer, clayborg
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D25179
llvm-svn: 284114
Simon Pilgrim [Thu, 13 Oct 2016 12:05:20 +0000 (12:05 +0000)]
[DAGCombiner] Add vector support to (sub -1, x) -> (xor x, -1) canonicalization
Improves commutation potential
llvm-svn: 284113
Artem Dergachev [Thu, 13 Oct 2016 11:41:12 +0000 (11:41 +0000)]
[analyzer] Link libStaticAnalyzerCheckers to libASTMatchers.
AST matchers are useful for the analyzer's checkers.
More patches on particular checkers shall follow.
This is the first time clang binary gets linked to ASTMatchers.
The binary size increase for the clang executable would be
+0.5% in release mode, +2% in debug mode.
Differential Revision: https://reviews.llvm.org/D25429
llvm-svn: 284112
Haojian Wu [Thu, 13 Oct 2016 10:31:00 +0000 (10:31 +0000)]
[clang-move] Better support enclosing class.
Summary:
* When moving an outermost enclosing class, all its nested classes should also
be moved together.
* Add a test for not moving nested class.
Reviewers: ioeric
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D25369
llvm-svn: 284111
Alexey Bataev [Thu, 13 Oct 2016 09:52:46 +0000 (09:52 +0000)]
Fix for PR30639: CGDebugInfo Null dereference with OpenMP array
access, by Erich Keane
OpenMP creates a variable array type with a a null size-expr. The Debug
generation failed to due to this. This patch corrects the openmp
implementation, updates the tests, and adds a new one for this
condition.
Differential Revision: https://reviews.llvm.org/D25373
llvm-svn: 284110
Haojian Wu [Thu, 13 Oct 2016 08:48:42 +0000 (08:48 +0000)]
Recommit r283538 "[clang-move] Support moving multiple classes in one run."
llvm-svn: 284109
Oren Ben Simhon [Thu, 13 Oct 2016 07:53:43 +0000 (07:53 +0000)]
[X86] Basic additions to support RegCall Calling Convention.
The Register Calling Convention (RegCall) was introduced by Intel to optimize parameter transfer on function call.
This calling convention ensures that as many values as possible are passed or returned in registers.
This commit presents the basic additions to LLVM CodeGen in order to support RegCall in X86.
Differential Revision: http://reviews.llvm.org/D25022
llvm-svn: 284108
Daniel Jasper [Thu, 13 Oct 2016 06:39:44 +0000 (06:39 +0000)]
Silence unused warning in non-assert builds.
llvm-svn: 284107
Craig Topper [Thu, 13 Oct 2016 05:41:01 +0000 (05:41 +0000)]
[AVX-512] Fix v16i32 zero extending shuffle test case so it's really zero extend.
llvm-svn: 284106
Craig Topper [Thu, 13 Oct 2016 05:29:41 +0000 (05:29 +0000)]
[AVX-512] Teach shuffle lowering to recognize 512-bit zero extends.
llvm-svn: 284105
Craig Topper [Thu, 13 Oct 2016 05:29:37 +0000 (05:29 +0000)]
[AVX-512] Add tests for basic 512-bit zero extending shuffle patterns. Code will be improved in a future commit.
llvm-svn: 284104
Diana Picus [Thu, 13 Oct 2016 05:28:55 +0000 (05:28 +0000)]
Remove a FIXME that I forgot about. NFC.
Sorry about the noise.
llvm-svn: 284103
Craig Topper [Thu, 13 Oct 2016 04:14:47 +0000 (04:14 +0000)]
[X86] Simplify the lowering code for extracting and inserting subvectors.
We don't need to check if AVX is enabled. It's implied by the operation action being set to Custom.
We don't need to check both the input and output type widths. We only need to check the type that's being inserted or extracted. The other type is known to be a legal type and we can assume its a different width.
llvm-svn: 284102
Eric Fiselier [Thu, 13 Oct 2016 04:07:58 +0000 (04:07 +0000)]
Revert r282345 - Use __attribute__((internal_linkage)) when available.
llvm-svn: 284101
Vadim Macagon [Thu, 13 Oct 2016 04:07:22 +0000 (04:07 +0000)]
Fix Python binding generation build step on Windows
Summary:
If Python is installed to a location that contains spaces
(e.g. "C:\Program Files\Python3") then the build fails while attempting
to run the modify-python-lldb.py script because the path to the Python
executable is not double-quoted before being passed to the shell. The
fix consists of letting Python handle the formatting of the command
line, since subprocess.Popen() is perfectly capable of handling paths
containing spaces if it's given the command and arguments as a list
instead of a single pre-formatted string.
Reviewers: zturner, clayborg
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D25396
llvm-svn: 284100
Sebastian Pop [Thu, 13 Oct 2016 03:23:33 +0000 (03:23 +0000)]
Memory-SSA: strengthen defClobbersUseOrDef interface
As Danny pointed out, defClobbersUseOrDef should use MemoryLocOrCall to make
sure fences are properly handled.
llvm-svn: 284099
Sebastian Pop [Thu, 13 Oct 2016 01:39:10 +0000 (01:39 +0000)]
commit back "GVN-hoist: fix store past load dependence analysis (PR30216, PR30499)"
This is with an extra change to avoid calling MemoryLocation::get() on a call instruction.
Differential Revision: https://reviews.llvm.org/D25542
llvm-svn: 284098
Quentin Colombet [Thu, 13 Oct 2016 01:01:23 +0000 (01:01 +0000)]
[AArch64][RegisterBankInfo] Provide alternative mappings for 64-bit load
This allows RegBankSelect in greedy mode to get rid some of the cross
register bank copies when loads are involved in the chain of
computation.
llvm-svn: 284097
Reid Kleckner [Thu, 13 Oct 2016 00:55:24 +0000 (00:55 +0000)]
Correct PrivateLinkage for COFF
- Use storage class C_STAT for 'PrivateLinkage' The storage class for
PrivateLinkage should equal to the Internal Linkage.
- Set 'PrivateGlobalPrefix' from "L" to ".L" for MM_WinCOFF (includes
x86_64) MM_WinCOFF has empty GlobalPrefix '\0' so PrivateGlobalPrefix
"L" may conflict to the normal symbol name starting with 'L'.
Based on a patch by Han Sangjin! Manually updated test cases.
llvm-svn: 284096
Peter Collingbourne [Thu, 13 Oct 2016 00:49:21 +0000 (00:49 +0000)]
Add "opt" to the list of test dependencies.
We've started using it in the ThinLTO tests.
Also remove a repeated dependency on llvm-nm.
llvm-svn: 284095
Quentin Colombet [Thu, 13 Oct 2016 00:34:48 +0000 (00:34 +0000)]
[AArch64][RegisterBankInfo] Provide alternative mappings for G_BITCASTs.
Thanks to this patch, RegBankSelect is able to get rid of some register
bank copies as demonstrated in the test case.
llvm-svn: 284094
Reid Kleckner [Thu, 13 Oct 2016 00:18:26 +0000 (00:18 +0000)]
Revert "GVN-hoist: fix store past load dependence analysis (PR30216, PR30499)"
This CL didn't actually address the test case in PR30499, and clang
still crashes.
Also revert dependent change "Memory-SSA cleanup of clobbers interface, NFC"
Reverts r283965 and r283967.
llvm-svn: 284093
Rui Ueyama [Thu, 13 Oct 2016 00:13:15 +0000 (00:13 +0000)]
Move a utility function to Strings.cpp.
So that we can use the function from anywhere.
llvm-svn: 284092
Quentin Colombet [Thu, 13 Oct 2016 00:12:06 +0000 (00:12 +0000)]
[AArch64][RegisterBankInfo] Describe cross regbank copies statically.
NFC.
llvm-svn: 284091
Quentin Colombet [Thu, 13 Oct 2016 00:12:04 +0000 (00:12 +0000)]
[AArch64][RegisterBankInfo] Use static mapping for same bank G_BITCAST.
NFC.
llvm-svn: 284090
Quentin Colombet [Thu, 13 Oct 2016 00:12:01 +0000 (00:12 +0000)]
[AArch64][MachineLegalizer] Mark more G_BITCAST as legal.
Basically any vector types that fits in a 32-bit register is also valid
as far as copies are concerned.
llvm-svn: 284089
Quentin Colombet [Thu, 13 Oct 2016 00:11:59 +0000 (00:11 +0000)]
[AArch64][RegisterBankInfo] Bump the cost of vector loads.
This does not change anything yet, because we do not offer any
alternative mapping.
llvm-svn: 284088
Quentin Colombet [Thu, 13 Oct 2016 00:11:57 +0000 (00:11 +0000)]
[AArch64][RegisterBankInfo] Use a proper cost for cross regbank G_BITCASTs.
This does not change anything yet, because we do not offer any
alternative mapping.
llvm-svn: 284087
Quentin Colombet [Thu, 13 Oct 2016 00:11:55 +0000 (00:11 +0000)]
[AArch64][RegisterBankInfo] Provide more realistic copy costs.
llvm-svn: 284086
Albert Gutowski [Wed, 12 Oct 2016 23:58:45 +0000 (23:58 +0000)]
fix function label name in addressofreturnaddress test
llvm-svn: 284085
Devin Coughlin [Wed, 12 Oct 2016 23:57:05 +0000 (23:57 +0000)]
[analyzer] DeallocChecker: Don't warn about directly-set IBOutlet ivars on macOS
On macOS (but not iOS), if an ObjC property has no setter, the nib-loading code
for an IBOutlet is documented as directly setting the backing ivar without
retaining the value -- even if the property is 'retain'.
This resulted in false positives from the DeallocChecker for code that did not
release such ivars in -dealloc.
To avoid these false positives, treat IBOutlet ivars that back a property
without a setter as having an unknown release requirement in macOS.
rdar://problem/
28507353
llvm-svn: 284084
Albert Gutowski [Wed, 12 Oct 2016 23:52:38 +0000 (23:52 +0000)]
fix ms-intrinsics labels code to work with builds with assertions
llvm-svn: 284083
Mehdi Amini [Wed, 12 Oct 2016 23:36:11 +0000 (23:36 +0000)]
[GitHubMove Doc] Properly nest a subsection in the proposal
llvm-svn: 284082
Richard Smith [Wed, 12 Oct 2016 23:29:02 +0000 (23:29 +0000)]
Revert r284008. This is us to fail to instantiate static data members in some
cases. I'm working on reducing a testcase.
llvm-svn: 284081
Yunzhong Gao [Wed, 12 Oct 2016 23:27:27 +0000 (23:27 +0000)]
[NFC] Fixing the description for _mm_store_ps and _mm_store_ps1.
It seems that the doxygen description of these two intrinsics were swapped by
mistake.
llvm-svn: 284080
Rui Ueyama [Wed, 12 Oct 2016 23:22:59 +0000 (23:22 +0000)]
Fix variable name. NFC.
llvm-svn: 284079
Albert Gutowski [Wed, 12 Oct 2016 23:10:02 +0000 (23:10 +0000)]
fix title underline length
llvm-svn: 284078
Mehdi Amini [Wed, 12 Oct 2016 23:02:02 +0000 (23:02 +0000)]
Moving to GitHub - Unified Proposal
This document describes the proposal to move to GitHub, and
compare the two proposals through various workflow examples,
presenting the current set of commands following by the ones
involved in each of the two proposals.
It is intended to supersede the previous "submodule proposal"
document entirely, and drive the discussion at the BoF during
the next Dev Meeting.
Differential Revision: https://reviews.llvm.org/D24167
llvm-svn: 284077
Krzysztof Parzyszek [Wed, 12 Oct 2016 22:53:41 +0000 (22:53 +0000)]
Handle lane masks in LivePhysRegs when adding live-ins
Differential Revision: https://reviews.llvm.org/D25533
llvm-svn: 284076
Tim Northover [Wed, 12 Oct 2016 22:49:15 +0000 (22:49 +0000)]
GlobalISel: support G_TRUNC selection on AArch64.
Ahmed's patch again.
llvm-svn: 284075
Tim Northover [Wed, 12 Oct 2016 22:49:11 +0000 (22:49 +0000)]
GlobalISel: support int <-> float conversions on AArch64.
More of Ahmed's work.
llvm-svn: 284074
Tim Northover [Wed, 12 Oct 2016 22:49:07 +0000 (22:49 +0000)]
GlobalISel: select G_FCMP instructions on AArch64.
Another of Ahmed's patches.
llvm-svn: 284073
Tim Northover [Wed, 12 Oct 2016 22:49:04 +0000 (22:49 +0000)]
GlobalISel: support selection of G_ICMP on AArch64.
Patch from Ahmed Bougaca again.
llvm-svn: 284072
Tim Northover [Wed, 12 Oct 2016 22:49:01 +0000 (22:49 +0000)]
GlobalISel: select G_BRCOND instructions on AArch64.
llvm-svn: 284071
Tim Northover [Wed, 12 Oct 2016 22:48:36 +0000 (22:48 +0000)]
GlobalISel: mark G_BRCOND on s1 as legal.
It's going to be a TBNZ (at -O0) anyway, so the high bits don't matter.
llvm-svn: 284070
Vedant Kumar [Wed, 12 Oct 2016 22:44:50 +0000 (22:44 +0000)]
[unittests] Delete even more copy constructors (NFC)
llvm-svn: 284069
Rui Ueyama [Wed, 12 Oct 2016 22:36:31 +0000 (22:36 +0000)]
Support GNU-style ZLIB-compressed input sections.
Previously, we supported only SHF_COMPRESSED sections because it's
new and it's the ELF standard. But there are object files compressed
in the GNU style out there, so we had to support it.
Sections compressed in the GNU style start with ".zdebug_" and
contain different headers than the ELF standard's one. In this
patch, getRawCompressedData is responsible to handle it.
A tricky thing about GNU-style compressed sections is that we have
to rename them when creating output sections. ".zdebug_" prefix
implies the section is compressed. We need to rename ".zdebug_"
".debug" because our output sections are not compressed.
We do that in this patch.
llvm-svn: 284068
Reid Kleckner [Wed, 12 Oct 2016 22:33:57 +0000 (22:33 +0000)]
Make __asan_handle_no_return a no-op during initialization
Some of our existing tests hang on the new Windows bot with this stack:
770, clang_rt.asan_dynamic-i386.dll!__asan::AsanTSDGet+0x3e
771, clang_rt.asan_dynamic-i386.dll!__asan::GetCurrentThread+0x9
772, clang_rt.asan_dynamic-i386.dll!__asan_handle_no_return+0xe
773, clang_rt.asan_dynamic-i386.dll!__asan_wrap__except_handler4_common+0x12
774, ntdll.dll!wcstombs+0xb0 (No unwind info)
775, ntdll.dll!ZwWow64CallFunction64+0x2001 (No unwind info)
776, ntdll.dll!ZwWow64CallFunction64+0x1fd3 (No unwind info)
777, ntdll.dll!KiUserExceptionDispatcher+0xf (No unwind info)
778, clang_rt.asan_dynamic-i386.dll!destroy_fls+0x13
779, ntdll.dll!RtlLockHeap+0xea (No unwind info)
780, ntdll.dll!LdrShutdownProcess+0x7f (No unwind info)
781, ntdll.dll!RtlExitUserProcess+0x81 (No unwind info)
782, kernel32.dll!ExitProcess+0x13 (No unwind info)
783, clang_rt.asan_dynamic-i386.dll!__sanitizer::internal__exit+0xc
784, clang_rt.asan_dynamic-i386.dll!__sanitizer::Die+0x3d
785, clang_rt.asan_dynamic-i386.dll!__asan::AsanInitInternal+0x50b
786, clang_rt.asan_dynamic-i386.dll!__asan::Allocator::Allocate+0x1c
787, clang_rt.asan_dynamic-i386.dll!__asan::Allocator::Calloc+0x43
We hang because AsanDie tries to defend against multi-threaded death by
infinite looping if someone is already exiting. We might want to
reconsider that, but one easy way to avoid getting here is not to let
our noreturn interceptors call back into fragile parts of ASan.
llvm-svn: 284067
Vedant Kumar [Wed, 12 Oct 2016 22:27:54 +0000 (22:27 +0000)]
[unittests] Delete some copy constructors (NFC)
llvm-svn: 284066
Vedant Kumar [Wed, 12 Oct 2016 22:27:52 +0000 (22:27 +0000)]
[unittest] Pass a reference instead of making a copy (NFC)
llvm-svn: 284065
Vedant Kumar [Wed, 12 Oct 2016 22:27:49 +0000 (22:27 +0000)]
[Coverage] Delete some copy constructors (NFC)
llvm-svn: 284064
Vedant Kumar [Wed, 12 Oct 2016 22:27:45 +0000 (22:27 +0000)]
[Coverage] Factor out logic to create FunctionRecords (NFC)
llvm-svn: 284063
Albert Gutowski [Wed, 12 Oct 2016 22:22:34 +0000 (22:22 +0000)]
fix regexes for label names in ms-intrinsics test
llvm-svn: 284062
Albert Gutowski [Wed, 12 Oct 2016 22:13:19 +0000 (22:13 +0000)]
Create llvm.addressofreturnaddress intrinsic
Summary: We need a new LLVM intrinsic to implement MS _AddressOfReturnAddress builtin on 64-bit Windows.
Reviewers: majnemer, rnk
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D25293
llvm-svn: 284061
Albert Gutowski [Wed, 12 Oct 2016 22:01:05 +0000 (22:01 +0000)]
Implement MS _BitScan intrinsics
Summary: _BitScan intrinsics (and some others, for example _Interlocked and _bittest) are supposed to work on both ARM and x86. This is an attempt to isolate them, avoiding repeating their code or writing separate function for each builtin.
Reviewers: hans, thakis, rnk, majnemer
Subscribers: RKSimon, cfe-commits, aemerson
Differential Revision: https://reviews.llvm.org/D25264
llvm-svn: 284060