Dave Airlie [Thu, 30 Mar 2017 07:14:45 +0000 (08:14 +0100)]
radv: add tessellation support to shader naming
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:13:48 +0000 (08:13 +0100)]
radv: add tess ctrl stage barrier workaround for SI.
This just ports the workaround from radeonsi.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:12:27 +0000 (08:12 +0100)]
radv/ac: add support for patch inputs to unique index code.
This add support for tessellation patch inputs to the code
that finds the unique parameter index.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:10:46 +0000 (08:10 +0100)]
radv: port polaris vgt vertex reuse workaround.
This ports the VGT_VERTEX_REUSE register settings
for Polaris GPUs from radeonsi.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:09:22 +0000 (08:09 +0100)]
radv: configure tessellation distribution register.
This just takes the radeonsi values.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:08:07 +0000 (08:08 +0100)]
radv/ac: setup tessellation shader inputs.
This just configures all the register inputs for the tessellation
related stages.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:05:42 +0000 (08:05 +0100)]
radv/ac: setup tess rings on compiler side.
This just sets up the necessary pointers on the compiler
side for the rings needed for tessellation.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:02:14 +0000 (08:02 +0100)]
radv: add tessellation ring allocation support. (v2)
This patch adds support for the offchip rings for storing
tessellation factors and attribute data.
It includes the register setup for the TF ring
v2: always do tess ring size calcs (Bas)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 06:58:22 +0000 (07:58 +0100)]
radv: add support for some device specific tess information.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 06:55:23 +0000 (07:55 +0100)]
radv/ac: add tess changes to shader keys/info
This adds the tess pieces for shader keys and shader info,
it adds the necessary bits to the vertex key/info as well.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 06:53:24 +0000 (07:53 +0100)]
radv: add tess shader stage user data support.
This just adds support for tess to the shader stage conversion
and emits the per-stage descriptors/constants for tess stages.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 06:49:59 +0000 (07:49 +0100)]
radv: use defines for ring descriptor offsets.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 06:44:20 +0000 (07:44 +0100)]
radv: add helper function to denote if tess is enabled on a pipeline.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:51:42 +0000 (08:51 +0100)]
radv: handle clip dist in es outputs.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 30 Mar 2017 07:51:31 +0000 (08:51 +0100)]
radv: drop unneeded start
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Fri, 31 Mar 2017 20:56:46 +0000 (06:56 +1000)]
radv: fixup geometry clip emission since using the geom pass
Fixes:
2b35b60d: radv: move to using nir clip/cull merge pass.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Tue, 28 Mar 2017 01:38:47 +0000 (03:38 +0200)]
radeonsi/gfx9: allow CMASK fast clear with RB+
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 28 Mar 2017 17:06:31 +0000 (19:06 +0200)]
radeonsi/gfx9: don't compare src_va w/ dst_va for CP_DMA_CLEAR
src_va contains the clear value in this case.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 28 Mar 2017 14:18:45 +0000 (16:18 +0200)]
radeonsi/gfx9: fix 1D array fetches with derivs, bias, or Z compare value
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 28 Mar 2017 01:34:06 +0000 (03:34 +0200)]
radeonsi/gfx9: fix and enable single-sample CMASK fast clear
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 28 Mar 2017 08:58:02 +0000 (10:58 +0200)]
radeonsi/gfx9: fix and enable MSAA compression
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 20 Mar 2017 15:22:16 +0000 (16:22 +0100)]
radeonsi/gfx9: disable CE
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 27 Feb 2017 21:25:43 +0000 (22:25 +0100)]
radeonsi/gfx9: fix linear mipmap CPU access
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 27 Mar 2017 14:53:19 +0000 (16:53 +0200)]
radeonsi: add tests verifying that VM faults don't hang
GFX9 hangs instead of writing VM faults to dmesg.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 27 Feb 2017 22:49:19 +0000 (23:49 +0100)]
radeonsi: unify HS max_offchip_buffers workarounds
Vulkan doesn't set more than 508.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Mon, 27 Feb 2017 22:17:07 +0000 (23:17 +0100)]
radeonsi: adjust checking for SC bug workarounds
no change in behavior, just making sure that no later chips will use
the workarounds
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Fri, 31 Mar 2017 03:14:08 +0000 (21:14 -0600)]
glsl: use -O1 optimization for builtin_functions.cpp with MinGW
Some versions of MinGW-w64 such as 5.3.1 and 6.2.0 produce bad code
with -O2 or -O3 causing a random driver crash when running programs
that use GLSL. Most Mesa demos in the glsl/ directory trigger the
bug, but not the fragcoord.c test.
Use a #pragma to force -O1 for this file for later MinGW versions.
Luckily, this is basically one-time setup code. I suspect the bug
is related to the sheer size of this file.
This should let us move to newer versions of MinGW-w64 for Mesa.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Wed, 29 Mar 2017 16:50:00 +0000 (10:50 -0600)]
tnl: remove unused var to silence warning
Trivial.
Neha Bhende [Fri, 24 Mar 2017 20:53:00 +0000 (14:53 -0600)]
st/wgl: Replace variable name hdc with hDrawDC
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Thu, 16 Mar 2017 17:40:02 +0000 (11:40 -0600)]
st/wgl: add support for WGL_ARB_make_current_read
This adds the wglMakeContextCurrentARB() and wglGetCurrentReadDCARB()
functions.
Signed-off-by: Brian Paul <brianp@vmware.com>
Brian Paul [Mon, 10 Oct 2016 21:54:09 +0000 (15:54 -0600)]
stw/wgl: add null context check in wglBindTexImageARB()
To avoid dereferencing a null pointer in case wglMakeCurrent() wasn't
called. Found while debugging SWKOTOR game.
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Marek Olšák [Fri, 24 Mar 2017 02:16:41 +0000 (03:16 +0100)]
radeonsi: decompress DCC in set_sampler_view instead of create_sampler_view (v2)
v2: don't add a new decompress helper function
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 24 Mar 2017 02:02:53 +0000 (03:02 +0100)]
radeonsi: decompress DCC in set_framebuffer_state instead of create_surface (v2)
for threaded gallium, which can't use pipe_context in create_surface
v2: don't add a new decompress helper function
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Nicolai Hähnle [Thu, 30 Mar 2017 15:07:34 +0000 (17:07 +0200)]
st/glsl_to_tgsi: fix 64-bit integer bit shifts
Fix a bug that was caused by a type mismatch in the shift count between
GLSL and TGSI. I briefly considered adjusting the TGSI semantics, but
since both LLVM and AMD GCN require both arguments to be of the same type,
it makes more sense to keep TGSI as-is -- it reflects the underlying
implementation better.
I'm also sending out piglit tests that expose this error.
v2: use the right number of components for the temporary register
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 30 Mar 2017 12:11:12 +0000 (14:11 +0200)]
tgsi: fix printing of 64-bit integer immediates
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Lionel Landwerlin [Fri, 31 Mar 2017 10:05:42 +0000 (11:05 +0100)]
intel: genxml: fix out of tree builds
v2: use Emil's recommendation
change rule to closer to genxml/genX_bits.h
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Thomas Hellstrom [Thu, 30 Mar 2017 14:33:47 +0000 (16:33 +0200)]
gbm/dri: Check dri extension version before flush after unmap
The commit mentioned below required the __DRI2FlushExtension to have
version 4 or above, for GBM functionality. That broke GBM with some
classic dri drivers. Relax that requirement so that we only flush
after unmap if we have version 4 or above. Drivers that require the flush
for correct functionality should implement the desired version.
Fixes:
ba8df228 ("gbm/dri: Flush after unmap")
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tested-by: Dylan Baker <dylan@pnwbakers.com>
Nicolai Hähnle [Wed, 29 Mar 2017 18:29:37 +0000 (20:29 +0200)]
radeonsi: implement ARB_shader_group_vote
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 30 Mar 2017 06:55:22 +0000 (08:55 +0200)]
radeonsi: enable ARB_shader_clock
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 30 Mar 2017 07:24:24 +0000 (09:24 +0200)]
radeonsi: emit TGSI_OPCODE_CLOCK
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 30 Mar 2017 06:55:05 +0000 (08:55 +0200)]
st/mesa: implement ARB_shader_clock
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Ilia Mirkin [Thu, 9 Feb 2017 23:37:48 +0000 (18:37 -0500)]
tgsi: add CLOCK opcode
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Wed, 29 Mar 2017 18:44:57 +0000 (20:44 +0200)]
gallium: add PIPE_CAP_TGSI CLOCK
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Nicolai Hähnle [Thu, 30 Mar 2017 06:54:46 +0000 (08:54 +0200)]
glsl: fix clockARB builtin function
The underlying intrinsic is defined to always have a uvec2 return type.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tapani Pälli [Thu, 30 Mar 2017 10:56:25 +0000 (13:56 +0300)]
anv: change BLOCK_POOL_MEMFD_SIZE to 1GB
This allows us to run 32bit Vulkan apps on Android, ftruncate
call would fail on 2GB (max size being 2GB - 1).
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tapani Pälli [Thu, 30 Mar 2017 05:51:25 +0000 (08:51 +0300)]
android: add libmesa_genxml as dep to libmesa_isl
This is to fix following compile error with libmesa_isl:
mesa/src/intel/isl/isl.c:28:10: fatal error: 'genxml/genX_bits.h' file not found
Fixes: f0eaf38 ("genxml: New generated header genX_bits.h (v6)")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Emli Velikov <emil.velikov@collabora.com>
Timothy Arceri [Thu, 30 Mar 2017 11:21:32 +0000 (22:21 +1100)]
mesa: remove MESA_GLSL=opt
This is unused.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Emil Velikov <emli.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Thu, 30 Mar 2017 11:14:21 +0000 (22:14 +1100)]
mesa: remove MESA_GLSL=no_opts env option
This is confusing because is only applys to GL_ARB_vertex/fragment_program,
and because of that its also not very useful.
If someone requires this for debugging they can just make an ad-hoc
code change.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Thu, 30 Mar 2017 10:24:13 +0000 (21:24 +1100)]
mesa: move FLUSH_VERTICES() call to meta
There is no need for this to be in the common code.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Thu, 30 Mar 2017 10:14:43 +0000 (21:14 +1100)]
mesa/vbo: remove redundant _mesa_is_bufferobj() calls
This is already called inside the vbo_exec_vtx_{unmap,map}()
functions.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Thu, 30 Mar 2017 09:43:08 +0000 (20:43 +1100)]
mesa/glthread: add async support to ARB_gpu_shader_int64 uniform functions
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Thu, 30 Mar 2017 09:43:07 +0000 (20:43 +1100)]
mesa/glthread: add async support to ARB_gpu_shader_fp64 uniform functions
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Lionel Landwerlin [Sat, 25 Mar 2017 13:59:52 +0000 (13:59 +0000)]
aubinator: enable snb/ilk through --gen
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Lionel Landwerlin [Sat, 25 Mar 2017 02:52:33 +0000 (02:52 +0000)]
intel: genxml: compress all gen files into one
Combining all the files into a single string didn't make any
difference in the size of the aubinator binary.
With this change we now also embed gen4/4.5/5 descriptions, which
increases the aubinator size by ~16Kb.
v2 (Lionel): rebase makefiles
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Bas Nieuwenhuizen [Wed, 1 Mar 2017 08:32:19 +0000 (09:32 +0100)]
radv: Use the guard band.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Wed, 29 Mar 2017 20:58:10 +0000 (22:58 +0200)]
radv: Prepare for not using the guard band for lines & points.
Vulkan Clipping is defined in terms of vertices, the scissor based
clipping happens on pixels. There is a difference with points and
lines, as a vertex can be outside the viewport while some pixels are in.
On Vulkan thoise pixels shouldn't be drawn, while they would be with
the guardband.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Wed, 1 Mar 2017 01:14:08 +0000 (02:14 +0100)]
radv: Drop the default viewport when 0 viewports are given.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Tue, 28 Feb 2017 23:39:58 +0000 (00:39 +0100)]
radv: Set proper viewport & scissor for meta draws.
Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Lyude [Thu, 23 Mar 2017 00:51:09 +0000 (20:51 -0400)]
mesa: Fix trailing whitespace in polygon.c
Signed-off-by: Lyude <lyude@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Lyude [Thu, 23 Mar 2017 00:51:08 +0000 (20:51 -0400)]
mesa: Fix gross indenting in _mesa_PolygonMode()
Signed-off-by: Lyude <lyude@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Lyude [Thu, 23 Mar 2017 00:51:07 +0000 (20:51 -0400)]
r300: Fix indenting in r300_get_param()
Signed-off-by: Lyude <lyude@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Lyude [Thu, 23 Mar 2017 00:51:06 +0000 (20:51 -0400)]
vc4: Fix indenting in vc4_screen_get_param()
Signed-off-by: Lyude <lyude@redhat.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Kenneth Graunke [Thu, 30 Mar 2017 18:55:33 +0000 (11:55 -0700)]
intel: Add INTEL_CFLAGS to aubinator CFLAGS.
It still needs intel_aub.h. Fixes the build.
Jason Ekstrand [Thu, 9 Mar 2017 04:34:28 +0000 (20:34 -0800)]
nir: Add support for 8 and 16-bit types
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Jason Ekstrand [Tue, 14 Mar 2017 17:31:21 +0000 (10:31 -0700)]
nir/constant_expressions: Don't switch on bit size when not needed
For opcodes such as the nir_op_pack_64_2x32 for which all sources and
destinations have explicit sizes, the bit_size parameter to the evaluate
function is pointless and *should* do nothing. Previously, we were
always switching on the bit_size and asserting if it isn't one of the
sizes in the list. This generates way more code than needed and is a
bit cruel because it doesn't let us have a bit_size of zero on an ALU op
which shouldn't need a bit_size.
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Jason Ekstrand [Tue, 14 Mar 2017 17:27:38 +0000 (10:27 -0700)]
nir/constant_expressions: Pull the guts out into a helper block
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Kenneth Graunke [Tue, 21 Mar 2017 21:46:39 +0000 (14:46 -0700)]
i965: Stop using legacy dri_bufmgr_* and intel_* names.
Eric renamed these from dri_bufmgr_* and intel_bufmgr_* to drm_intel_*
in libdrm commit
4b9826408f65976a1a13387beda748b65e03ec52, circa 2008,
but we've been using the legacy names this whole time.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Emil Velikov [Fri, 17 Mar 2017 16:55:25 +0000 (16:55 +0000)]
intel: automake: move INTEL_CFLAGS as applicable
Only common/decoder.[ch] requires it [for intel_aub.h].
v2: The code was moved to from intel/tools to intel/common,
update accordingly.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Emil Velikov [Fri, 17 Mar 2017 16:55:24 +0000 (16:55 +0000)]
intel: android: remove libdrm_intel requirement
The only part which requires libdrm_intel tools/aubinator is not built
on Android.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Marek Olšák [Thu, 30 Mar 2017 17:01:02 +0000 (19:01 +0200)]
Partially revert "amd/addrlib: silence warnings" to fix builds with DEBUG
This partially reverts commit
8a74140a21fe6b0d2e8a60b065b890f797f2db51.
Marek Olšák [Tue, 28 Mar 2017 00:15:23 +0000 (02:15 +0200)]
ddebug: implement clear_texture
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 30 Mar 2017 15:21:47 +0000 (17:21 +0200)]
radeonsi: fix an unused-variable warning in a release build
Marek Olšák [Thu, 30 Mar 2017 15:11:41 +0000 (17:11 +0200)]
vdpau: fix a maybe-uninitialized warning
Marek Olšák [Thu, 30 Mar 2017 15:11:41 +0000 (17:11 +0200)]
softpipe: fix a maybe-uninitialized warning
/home/marek/dev/mesa-main/src/gallium/drivers/softpipe/sp_compute.c:178:
warning: 'grid_size' may be used uninitialized in this function
[-Wmaybe-uninitialized]
Marek Olšák [Thu, 30 Mar 2017 15:11:41 +0000 (17:11 +0200)]
gallivm: fix a maybe-uninitialized warning
/home/marek/dev/mesa-main/src/gallium/auxiliary/gallivm/lp_bld_sample_soa.c:3598:
warning: 'level' may be used uninitialized in this function [-Wmaybe-uninitialized]
out1 = lp_build_cmp(&leveli_bld, PIPE_FUNC_GREATER, level, last_level);
^
Marek Olšák [Wed, 29 Mar 2017 17:41:48 +0000 (19:41 +0200)]
gallium/radeon: s/dcc_disable/disable_dcc/
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Fri, 24 Mar 2017 11:21:20 +0000 (12:21 +0100)]
radeonsi: handle incompatible DCC formats in resource_copy_region
Required because of later commits.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Marek Olšák [Fri, 24 Mar 2017 11:31:34 +0000 (12:31 +0100)]
radeonsi: remove a workaround for inexact *8_SNORM blits
All tests pass on Fiji now. This prevents DCC disablement due to
incompatible DCC formats due to the fallback.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Marek Olšák [Fri, 24 Mar 2017 01:58:54 +0000 (02:58 +0100)]
gallium/radeon: add and use a new helper vi_dcc_enabled
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Sun, 12 Mar 2017 20:26:22 +0000 (21:26 +0100)]
gallium/radeon: formalize that r600_query_hw_add_result doesn't need a context
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Tue, 28 Mar 2017 20:19:29 +0000 (22:19 +0200)]
radeonsi: don't make a copy of pipe_index_buffer in draw_vbo
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Tue, 28 Mar 2017 20:20:56 +0000 (22:20 +0200)]
gallium/util: use const in u_index_modify helpers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Samuel Pitoiset [Wed, 29 Mar 2017 19:06:38 +0000 (21:06 +0200)]
winsys/amdgpu: remove AMDGPU_INFO_NUM_EVICTIONS
This is now exposed with libdrm_amdgpu 2.4.76.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 13 Dec 2016 17:35:35 +0000 (18:35 +0100)]
radeonsi: add Vega10 PCI IDs
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Boyuan Zhang [Thu, 16 Mar 2017 21:52:33 +0000 (17:52 -0400)]
radeon/uvd: set correct vega10 db pitch alignment
Create new function to get correct alignment based on Asics, and change
the corresponding decode message buffer and dpb buffer size calculations
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Fri, 10 Feb 2017 15:44:05 +0000 (10:44 -0500)]
radeon/vce: add vce support for firmware 53.19.4
v2: squashed with other similar commits
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Fri, 10 Feb 2017 15:41:31 +0000 (10:41 -0500)]
radeon/vce: adapt gfx9 surface to vce
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Fri, 10 Feb 2017 15:36:21 +0000 (10:36 -0500)]
winsys/surface: add height pitch for gfx9
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Leo Liu [Thu, 9 Feb 2017 15:30:21 +0000 (10:30 -0500)]
radeon/uvd: clear message buffer when reuse
As required by firmware
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Thu, 9 Feb 2017 15:25:20 +0000 (10:25 -0500)]
radeon/uvd: adapt gfx9 surface to uvd
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Thu, 9 Feb 2017 15:16:06 +0000 (10:16 -0500)]
radeon/uvd: add uvd soc15 register
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Tue, 14 Mar 2017 22:26:30 +0000 (23:26 +0100)]
radeonsi/gfx9: disable features that don't work
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 15 Oct 2016 14:07:58 +0000 (16:07 +0200)]
radeonsi/gfx9: only allow GL 3.1
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 26 Oct 2016 22:10:13 +0000 (00:10 +0200)]
radeonsi/gfx9: add linear address computations for texture transfers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 23 Nov 2016 01:41:14 +0000 (02:41 +0100)]
radeonsi/gfx9: don't generate LS and ES states
these shaders don't exist on GFX9
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 15 Oct 2016 12:38:59 +0000 (14:38 +0200)]
radeonsi/gfx9: SPI_SHADER_USER_DATA changes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 23 Nov 2016 17:42:53 +0000 (18:42 +0100)]
winsys/amdgpu: set/get BO tiling flags for GFX9
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Thu, 27 Oct 2016 15:33:42 +0000 (17:33 +0200)]
radeonsi/gfx9: handle pitch and offset overrides for texture_from_handle
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sun, 6 Nov 2016 14:46:26 +0000 (15:46 +0100)]
radeonsi/gfx9: set/validate GFX9 BO metadata
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 15 Feb 2017 23:11:58 +0000 (00:11 +0100)]
radeonsi/gfx9: add radeon_surf.gfx9.surf_offset
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>