Timothy Arceri [Fri, 3 Dec 2021 09:53:46 +0000 (20:53 +1100)]
util: add dri config option force_compat_shaders
This allows us to force all shaders to offer shader features only
provided to compatibility shaders.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14040>
Kenneth Graunke [Thu, 11 Nov 2021 08:19:25 +0000 (00:19 -0800)]
isl: Move some genxml surface state helpers into an include file
On XeHP, the XY_BLOCK_COPY_BLT command has a number of fields that
describe the layout of the surface, much like SURFACE_STATE does.
Several of them are encoded in such a similar manner that we really
would like to reuse the isl helpers for emitting those. This commit
moves them into a new isl_genX_helpers.h file which I can include
from the BLORP code. (The alternative would be to add XY_BLOCK_COPY_BLT
filling commands to isl, but that...seems more like a BLORP feature.)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14094>
Kenneth Graunke [Tue, 16 Nov 2021 00:02:34 +0000 (16:02 -0800)]
iris: Rename is_render_target to is_dest in a few blit functions
When targeting the blitter or compute engines, the destination is not
really a render target. But it's still useful to know whether we're
talking about the source or destination.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14094>
Emma Anholt [Mon, 6 Dec 2021 22:03:37 +0000 (14:03 -0800)]
r300: Fix mis-optimization turning -1 - x into 1 - x.
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14092>
Emma Anholt [Mon, 6 Dec 2021 21:58:25 +0000 (13:58 -0800)]
r300: Turn a comment about presub into an assert.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14092>
Emma Anholt [Tue, 23 Nov 2021 18:35:57 +0000 (10:35 -0800)]
r300: Add deqp expectations for RV515.
This may not be a complete set, as I haven't been able to run dEQP-GLES2
to completion (GPU hangs at some point, no particular test seems to be
guilty). But this will help me assess NIR-to-TGSI for the driver.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14092>
Timothy Arceri [Mon, 6 Dec 2021 11:24:04 +0000 (22:24 +1100)]
doc: update source tree doc to reflect recent classic/swrast deletions
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14078>
Dylan Baker [Mon, 6 Dec 2021 22:00:42 +0000 (14:00 -0800)]
fixup! gallium/swr: Remove driver source
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11264>
Dylan Baker [Mon, 6 Dec 2021 17:41:37 +0000 (09:41 -0800)]
new_features: Add OpenSWR removal
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11264>
Dylan Baker [Mon, 6 Dec 2021 17:40:37 +0000 (09:40 -0800)]
CODEOWNERS: remove OpenSWR
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11264>
Jan Zielinski [Thu, 10 Jun 2021 11:16:04 +0000 (13:16 +0200)]
gallium/swr: clean up the documentation after SWR removal from main
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11264>
Jan Zielinski [Wed, 9 Jun 2021 12:16:23 +0000 (14:16 +0200)]
gallium/swr: Remove common code and build options
This commit removes all OpenSWR references from common Mesa code
and build system.
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11264>
Jan Zielinski [Wed, 9 Jun 2021 11:19:44 +0000 (13:19 +0200)]
gallium/swr: Remove driver source
The OpenSWR will be maintained on a classic/LTS branch.
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11264>
Pierre Moreau [Tue, 28 Jul 2020 11:45:26 +0000 (13:45 +0200)]
nv50/nir: Switch to the common NIR options
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Pierre Moreau <dev@pmoreau.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14069>
Alyssa Rosenzweig [Sun, 5 Dec 2021 01:28:45 +0000 (20:28 -0500)]
pan/va: Add table parameter to LD_ATTR_IMM
..and test the instruction.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14065>
Alyssa Rosenzweig [Sun, 5 Dec 2021 01:28:10 +0000 (20:28 -0500)]
pan/va: Add sample/update modes to LD_VAR
..and test the new instructions. As usual, the semantics are the same as
bifrost, but the encoding is simpler.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14065>
Alyssa Rosenzweig [Sun, 5 Dec 2021 01:26:48 +0000 (20:26 -0500)]
pan/va: Make LD_VAR index more fine-grained
Index in bytes instead of vec4s, since varyings on Valhall are no longer
vec4 based like on previous Malis.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14065>
Alyssa Rosenzweig [Mon, 2 Aug 2021 16:31:40 +0000 (12:31 -0400)]
pan/va: Add more assembler tests
For new patterns
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14065>
Alyssa Rosenzweig [Sat, 20 Nov 2021 20:20:05 +0000 (15:20 -0500)]
pan/va: Disambiguate sign of CSEL instructions
The naming scheme is a bit simpler than Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14065>
Alyssa Rosenzweig [Sat, 4 Dec 2021 23:40:36 +0000 (18:40 -0500)]
pan/va: Improve assembler unit test output
Instead of using Python hex() to print the result, print the result in
the same format as the disassembler for easy visual comparison. This
means we don't need to reprint the expectation. This gives output like:
7c 7d 11 33 04 80 66 00 LD_ATTR_IMM.v4.f16.slot0 @r0:r1, `r60, `r61, index:0x1
7c 7d 10 33 04 80 66 00 Incorrect assembly
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14065>
Dylan Baker [Mon, 6 Dec 2021 21:32:16 +0000 (13:32 -0800)]
meson: restore dri.pc file
Which was accidentally deleted.
Fixes:
ea8fa10edd1f8976825c6aad05b904179a2deca3
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5717
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14090>
Dave Airlie [Mon, 6 Dec 2021 06:45:30 +0000 (16:45 +1000)]
mesa/externalobject: delete unused functions
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14075>
Dave Airlie [Mon, 6 Dec 2021 06:44:20 +0000 (16:44 +1000)]
mesa/barrier: remove unused barrier functions
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14075>
Dave Airlie [Mon, 6 Dec 2021 06:43:26 +0000 (16:43 +1000)]
mesa/transformfeedback: remove unused transform feedback code
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14075>
Dave Airlie [Mon, 6 Dec 2021 06:41:21 +0000 (16:41 +1000)]
mesa: remove unused buffer object code.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14075>
Dave Airlie [Mon, 6 Dec 2021 06:35:54 +0000 (16:35 +1000)]
mesa/syncobj: drop unused syncobj code.
This is all done in the state tracker now
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14075>
Dave Airlie [Mon, 6 Dec 2021 06:22:46 +0000 (16:22 +1000)]
mesa/query: remove all the mesa queryobj code.
This is all unused in favour of the state tracker code.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14075>
Dave Airlie [Mon, 6 Dec 2021 19:23:32 +0000 (05:23 +1000)]
iris/ci: comment out iris-cml-traces-performance due to hw unavailable
This job seems to be timing out, daniels said hw was having some
availability issues, so turn off for now.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14088>
Alyssa Rosenzweig [Thu, 18 Nov 2021 23:17:01 +0000 (18:17 -0500)]
panfrost: Add Valhall support to pandecode
Valhall v9 introduces a number of new data structures since Bifrost v7,
and removes a number of traditional data structures. Add decode routines
for the new Valhall data structures, and condition the old routines on
(PAN_ARCH <= 7) to remain buildable and warning-free.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14063>
Alyssa Rosenzweig [Fri, 19 Nov 2021 03:43:36 +0000 (22:43 -0500)]
panfrost: Don't shadow Mesa's fui()
Will fix a compiler error when we #include the Valhall disassembler
header from pandecode.
Fixes:
688827f3c52 ("pan/va: Add disassembler generator")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14063>
Alyssa Rosenzweig [Fri, 19 Nov 2021 03:45:01 +0000 (22:45 -0500)]
panfrost: Zero initialize disassembler stats
Keep it simple for introducing new support.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14063>
Alyssa Rosenzweig [Mon, 15 Nov 2021 23:53:57 +0000 (18:53 -0500)]
panfrost: Add XML for Valhall data structures
Fork the latest canonical XML (Bifrost v7) and adapt to the data
structures found in the earliest Valhall GPU I could get my hands on
(Valhall v9). This should minimize the churn needed for the port by
keeping the Valhall model close to the Bifrost we already supported.
It is not known what happened to v8. It appears to have been yeeted from
existence.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14063>
Alyssa Rosenzweig [Fri, 19 Nov 2021 03:41:22 +0000 (22:41 -0500)]
panfrost: Add "hex" type to GenXML
Although known fields wouldn't be given the type "hex", it is useful as
the default type for unknown fields while reverse-engineering, and as
such is used in the Valhall XML.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14063>
Alyssa Rosenzweig [Mon, 22 Nov 2021 00:03:33 +0000 (19:03 -0500)]
pan/va: Only hex dump when verbosely disassembling
Closer behaviour to Bifrost, making the entrypoints symmetric.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14063>
Alyssa Rosenzweig [Sat, 4 Dec 2021 19:23:43 +0000 (14:23 -0500)]
pan/bi: Link with Valhall disassembler
For pandecode's use.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14063>
Marek Olšák [Fri, 1 Oct 2021 19:46:48 +0000 (15:46 -0400)]
mesa: use simple_mtx_t for TexMutex (v2)
change mtx_recursive -> mtx_plain, there's no recursive locking
Let's try this again! This was originally landed as
f6abb3445b7f
("mesa: use simple_mtx_t for TexMutex") and then reverted with
781c0eafcf79 ("Revert "mesa: use simple_mtx_t for TexMutex"") because it
broke i965. Now that i965 is no longer in the tree, we can restore it.
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> (v1)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14053>
Ian Romanick [Tue, 9 Nov 2021 23:51:41 +0000 (15:51 -0800)]
nir/constant_folding: Optimize txb with bias of constant zero to tex
v2: Fail gracefully when bias_idx < 0. See comment in the code for the
rationale. See also issue #5722.
All Haswell and newer Intel GPUs had similar results. (Ice Lake shown)
total instructions in shared programs:
19757733 ->
19753431 (-0.02%)
instructions in affected programs: 277248 -> 272946 (-1.55%)
helped: 1644
HURT: 1
helped stats (abs) min: 1 max: 16 x̄: 2.62 x̃: 2
helped stats (rel) min: 0.05% max: 11.11% x̄: 2.11% x̃: 1.61%
HURT stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel) min: 0.35% max: 0.35% x̄: 0.35% x̃: 0.35%
95% mean confidence interval for instructions value: -2.72 -2.51
95% mean confidence interval for instructions %-change: -2.19% -2.03%
Instructions are helped.
total cycles in shared programs:
938517439 ->
938384079 (-0.01%)
cycles in affected programs:
19548849 ->
19415489 (-0.68%)
helped: 1358
HURT: 269
helped stats (abs) min: 1 max: 2328 x̄: 133.01 x̃: 16
helped stats (rel) min: <.01% max: 41.12% x̄: 1.40% x̃: 0.48%
HURT stats (abs) min: 1 max: 1302 x̄: 175.70 x̃: 30
HURT stats (rel) min: <.01% max: 69.03% x̄: 6.24% x̃: 1.04%
95% mean confidence interval for cycles value: -99.14 -64.79
95% mean confidence interval for cycles %-change: -0.47% 0.19%
Inconclusive result (%-change mean confidence interval includes 0).
LOST: 21
GAINED: 32
All Ivy Bridge and older Intel GPUs had similar results. (Ivy Bridge shown)
total instructions in shared programs:
15302017 ->
15301485 (<.01%)
instructions in affected programs: 22565 -> 22033 (-2.36%)
helped: 168
HURT: 0
helped stats (abs) min: 1 max: 7 x̄: 3.17 x̃: 3
helped stats (rel) min: 0.04% max: 4.39% x̄: 3.05% x̃: 3.27%
95% mean confidence interval for instructions value: -3.45 -2.89
95% mean confidence interval for instructions %-change: -3.19% -2.91%
Instructions are helped.
total cycles in shared programs:
550119761 ->
549989147 (-0.02%)
cycles in affected programs:
12834251 ->
12703637 (-1.02%)
helped: 164
HURT: 0
helped stats (abs) min: 20 max: 4547 x̄: 796.43 x̃: 294
helped stats (rel) min: 0.23% max: 53.84% x̄: 2.05% x̃: 0.37%
95% mean confidence interval for cycles value: -942.62 -650.24
95% mean confidence interval for cycles %-change: -3.17% -0.94%
Cycles are helped.
fossil-db results:
Tiger Lake, Ice Lake, and Skylake had similar results. (Ice Lake shown)
Instructions in all programs:
142073649 ->
141307526 (-0.5%)
SENDs in all programs: 6876848 -> 6876778 (-0.0%)
Loops in all programs: 38283 -> 38283 (+0.0%)
Cycles in all programs:
8410049681 ->
8402902960 (-0.1%)
Spills in all programs: 190623 -> 190599 (-0.0%)
Fills in all programs: 297780 -> 297756 (-0.0%)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> [v1]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14025>
Michel Zou [Thu, 2 Dec 2021 19:58:30 +0000 (20:58 +0100)]
llvmpipe: Fix Wpointer-to-int-cast
Fixes:
2771fd4a (gallium, windows: Use HANDLE instead of FD for external objects)
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14021>
Emma Anholt [Tue, 9 Nov 2021 23:31:10 +0000 (15:31 -0800)]
mesa/st: Remove GL_ARB_depth_clamp emulation support.
This was useful for emulating GL 3.2 in virgl on a GLES3 host renderer,
before GL_EXT_depth_clamp introduced the ability for hardware drivers to
expose the feature on GLES. Now that we have that, the desktop-GL-capable
HW that virgl cares about can expose desktop GL even on its GLES renderer
on the host without this emulation. I don't think anyone particularly
cares about hitting higher GL versions on actually-core-GLES hosts with
virgl.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13729>
Yonggang Luo [Sat, 4 Dec 2021 09:39:09 +0000 (17:39 +0800)]
win32: Fixes thread local on win32 with clang/mingw (!14062)
The mingw compiling error:
```
../../src/mapi/glapi/glapi.h:86:66: error: '_glapi_tls_Dispatch' cannot be thread local when declared 'dllimport'
_GLAPI_EXPORT extern __THREAD_INITIAL_EXEC struct _glapi_table * _glapi_tls_Dispatch;
^
../../src/mapi/glapi/glapi.h:88:51: error: '_glapi_tls_Context' cannot be thread local when declared 'dllimport'
_GLAPI_EXPORT extern __THREAD_INITIAL_EXEC void * _glapi_tls_Context;
```
Fixes:
c47fd3dc ("windows: Use TLS context/dispatch with shared-glapi")
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14062>
Jesse Natalie [Fri, 3 Dec 2021 15:56:42 +0000 (07:56 -0800)]
nir: Add an 'external' texture type for parity with samplers
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14046>
Alyssa Rosenzweig [Fri, 19 Nov 2021 03:57:16 +0000 (22:57 -0500)]
panfrost: Only build GPU indirect kernels for v7
These kernels aren't tested (and are probably broken) elsewhere. Don't
waste cycles trying to compile for other architectures. This reduces the
amount of code that needs to be ported to a new architecture.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14064>
Lionel Landwerlin [Mon, 6 Dec 2021 13:01:32 +0000 (15:01 +0200)]
docs/envvars: update after INTEL_DEBUG cleanup
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14080>
Corentin Noël [Fri, 3 Dec 2021 15:15:58 +0000 (16:15 +0100)]
virgl: Disable cache for VIRGL_BIND_SAMPLER_VIEW
this currently makes the dEQP-GLES31.functional.image_load_store.buffer.image_size.readonly_12
test fail when used simultaneously with other tests that lead to hitting the cache.
For instance the combination of:
dEQP-GLES31.functional.image_load_store.buffer.atomic.or_r32i_result
dEQP-GLES31.functional.image_load_store.buffer.atomic.or_r32i_return_value
dEQP-GLES31.functional.image_load_store.buffer.image_size.readonly_12
results in a failure of the readonly_12 test.
Deflag dEQP-GLES31.functional.image_load_store.buffer.image_size.{read,write}only_12 as flakes.
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14045>
Jakob Bornecrantz [Sun, 5 Dec 2021 17:32:20 +0000 (17:32 +0000)]
vulkan-device-select: Don't leak drmDevicePtr
ASAN found a leak:
```
Direct leak of 1440 byte(s) in 10 object(s) allocated from:
#0 0x4a9a92 in calloc (build-Monado-CMake/src/xrt/targets/service/monado-service+0x4a9a92)
#1 0x7fdf82afed06 in drmDeviceAlloc build-drm/../drm/xf86drm.c:3933:14
#2 0x7fdf82b00203 in drmProcessPciDevice build-drm/../drm/xf86drm.c:3965:11
#3 0x7fdf82b00203 in process_device build-drm/../drm/xf86drm.c:4359:16
#4 0x7fdf82b0485e in drmGetDevice2 build-drm/../drm/xf86drm.c:4528:15
#5 0x7fdf70751113 in device_select_find_xcb_pci_default ../src/vulkan/device-select-layer/device_select_x11.c:95:13
#6 0x7fdf70751113 in get_default_device ../src/vulkan/device-select-layer/device_select_layer.c:395:21
#7 0x7fdf70751113 in device_select_EnumeratePhysicalDevices ../src/vulkan/device-select-layer/device_select_layer.c:456:33
```
Cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14068>
Erik Faye-Lund [Wed, 17 Nov 2021 10:47:26 +0000 (11:47 +0100)]
docs: update trademark disclaimer
It's a *long* time since SGI was the copyright holder for the OpenGL
trademark. And we implement more APIs by now, so let's update the
disclaimer to instead redirect to the Khronos licensing page for
details.
While we're at it, soften the language on legal status as a formal
implementation, as we currently have conformant drivers for most of the
APIs by now. But refer to the Khronos website for details, as
conformance status for drivers are subject to change.
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13833>
Timothy Arceri [Sun, 5 Dec 2021 11:35:13 +0000 (22:35 +1100)]
mesa: update or remove out of date references to ir_to_mesa
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14066>
Timothy Arceri [Sun, 5 Dec 2021 02:55:59 +0000 (13:55 +1100)]
mesa: rename ir_to_mesa.{cpp,h} -> link_program.{cpp,h}
The only code now left in this file is the linking function.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14066>
Timothy Arceri [Sun, 5 Dec 2021 02:49:43 +0000 (13:49 +1100)]
mesa: tidy up ir_to_mesa.{cpp,h} includes, comments, etc
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14066>
Timothy Arceri [Sun, 5 Dec 2021 02:40:30 +0000 (13:40 +1100)]
mesa: move _mesa_ensure_and_associate_uniform_storage() to uniform_query.cpp
This is where all the other functions that handle uniform storage live.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14066>
Timothy Arceri [Sun, 5 Dec 2021 02:32:07 +0000 (13:32 +1100)]
mesa/st: move _mesa_generate_parameters_list_for_uniforms() code to st
The classic drivers that shared the code are now gone and the only user
is the tgsi linker so here we move the code to where it is used.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14066>
Timothy Arceri [Sun, 5 Dec 2021 02:21:07 +0000 (13:21 +1100)]
mesa: remove GLSL IR to Mesa IR code
The last user of this was dropped with the classic drivers.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14066>
Timothy Arceri [Sun, 5 Dec 2021 02:01:26 +0000 (13:01 +1100)]
mesa: make _mesa_associate_uniform_storage() static
The function is no longer called directly outside of this file.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14066>
Timothy Arceri [Sun, 5 Dec 2021 01:58:18 +0000 (12:58 +1100)]
mesa: remove _mesa_ir_link_shader()
The final use of this was removed when the classic drivers were
dropped.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14066>
Lionel Landwerlin [Tue, 23 Nov 2021 12:58:05 +0000 (14:58 +0200)]
genxml: protect _length defines in genX_bits.h
Those defines exist in the packing headers too and some parts of the
code (like mi_builder.h) include both.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13954>
Lionel Landwerlin [Tue, 23 Nov 2021 12:57:21 +0000 (14:57 +0200)]
genxml: fix compilation with P/I defines
Those names are a bit too common and sometimes clash variables.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13954>
Lionel Landwerlin [Sat, 4 Dec 2021 12:25:32 +0000 (14:25 +0200)]
intel/debug: reclaim 7 unused bits from classic driver
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14060>
Dave Airlie [Mon, 6 Dec 2021 06:02:02 +0000 (16:02 +1000)]
mesa/light: make _mesa_light static do_light.
This is unused outside this now.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14074>
Dave Airlie [Mon, 6 Dec 2021 05:49:49 +0000 (15:49 +1000)]
mesa/dd: remove NewSamplerObject
This was always calling directly into the mesa version now
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14074>
Dave Airlie [Mon, 6 Dec 2021 05:43:57 +0000 (15:43 +1000)]
mesa/dd: remove some fbo driver hooks.
These are assign to core mesa functions by st, so just direct call
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14074>
Dave Airlie [Mon, 6 Dec 2021 04:31:44 +0000 (14:31 +1000)]
mesa/dd: burn a bunch of legacy driver interfaces down
None of these are used anymore in the gallium world, there
are some more to get rid off but this is a good start.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14074>
Dave Airlie [Mon, 6 Dec 2021 04:35:51 +0000 (14:35 +1000)]
mesa: drop unused sw extensions init
This isn't used since swrast went away.
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14072>
Dave Airlie [Mon, 6 Dec 2021 03:33:28 +0000 (13:33 +1000)]
mtypes: drop some context pointers that are unused now
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Zoltán Böszörményi <zboszor@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14072>
Timothy Arceri [Mon, 6 Dec 2021 00:28:34 +0000 (11:28 +1100)]
mesa: remove old tnl device driver header files
The last users of these were removed when the classic drivers were
dropped.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14070>
Bas Nieuwenhuizen [Mon, 1 Nov 2021 15:36:44 +0000 (16:36 +0100)]
radv: Expose the VK_KHR_dynamic_rendering extension.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13721>
Bas Nieuwenhuizen [Mon, 8 Nov 2021 17:23:47 +0000 (18:23 +0100)]
radv: Support dynamic rendering inheritance info.
Straightforward, just converting to a renderpass as well. Note that
we now own the renderpass so I also added a bool to check if we own
it so we can destroy it after recording.
Doing the destruction at destroy & reset time, as reset can be called
during recording, and destroy all the time.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13721>
Bas Nieuwenhuizen [Mon, 8 Nov 2021 17:24:06 +0000 (18:24 +0100)]
radv: Support Begin/EndRendering.
This is just the naive implementation that create a new renderpass
and then destroys it at the end.
I do it this way because in meta operations we are still creating
temporary subpasses for a renderpass for e.g. the resolve.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13721>
Bas Nieuwenhuizen [Sun, 31 Oct 2021 12:55:58 +0000 (13:55 +0100)]
radv: Support VK_KHR_dynamic_rendering for pipeline creation.
The approach here is to include a wrapper converting the legacy
renderpass info to the new structures.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13721>
Bas Nieuwenhuizen [Sun, 7 Nov 2021 14:00:13 +0000 (15:00 +0100)]
radv: Do not use VK_FORMAT_UNDEFINED in meta passes.
Is used in VK_KHR_dynamic_rendering to indicate non-presence of
color attachments. Wasn't really valid Vulkan so we otherwise don't
need a workaround in the renderpass->dynamic rendering conversion.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13721>
Bas Nieuwenhuizen [Sun, 21 Nov 2021 01:01:46 +0000 (02:01 +0100)]
radv: Add named constants for max framebuffer width/height.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13721>
Lionel Landwerlin [Mon, 7 Jun 2021 14:06:14 +0000 (17:06 +0300)]
spirv: handle ray query intrinsics
v2: Fixup comment (Caio)
Use generated builders (Caio)
v3: Update spirv2dxil CI expectations
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
Lionel Landwerlin [Tue, 19 Oct 2021 11:14:20 +0000 (14:14 +0300)]
nir: add a ray query optimization pass
Just remove queries that are never used or proceeded with. The latter
case leading to undefined values.
v2: Don't use nir_shader_instructions_pass() to find variables (Caio)
Simplify replacement (Caio)
v3: Don't track all the queries intrinsic effects (Caio)
Rename things to represent only read queries (Caio)
Use set instead of hash_table (Caio)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
Lionel Landwerlin [Wed, 20 Oct 2021 12:51:43 +0000 (15:51 +0300)]
nir: track variables representing ray queries
v2: Fix missing ray_query variable check (Caio)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
Lionel Landwerlin [Mon, 7 Jun 2021 13:20:28 +0000 (16:20 +0300)]
nir: add intrinsics for ray queries
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
Lionel Landwerlin [Fri, 29 Oct 2021 15:04:55 +0000 (18:04 +0300)]
nir: add a new access flag to allow access in helper invocations
v2: Add nir_print support
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
Lionel Landwerlin [Wed, 10 Nov 2021 09:25:05 +0000 (11:25 +0200)]
nir/print: printout ACCESS_STREAM_CACHE_POLICY
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
Lionel Landwerlin [Thu, 28 Oct 2021 10:47:41 +0000 (13:47 +0300)]
nir/lower_io: include the variable access in the lowered intrinsic
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
Lionel Landwerlin [Wed, 27 Oct 2021 16:02:38 +0000 (19:02 +0300)]
intel/nir: preserve access value when duping intrinsic
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
6339aba775ecdc ("intel/compiler: Lower SSBO and shared loads/stores in NIR")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
Yonggang Luo [Thu, 2 Dec 2021 15:39:20 +0000 (23:39 +0800)]
vulkan: Open registry XML files as UTF-8
"C:\CI-Tools\msys64\mingw64\bin/python3.EXE" "../../src/vulkan/util/gen_enum_to_str.py" "--xml" "../../src/vulkan/registry/vk.xml" "--outdir" "C:/work/xemu/xemu-opengl/mesa/build/windows-mingw64/src/vulkan/util"
Traceback (most recent call last):
File "C:\work\xemu\xemu-opengl\mesa\src\vulkan\util\gen_enum_to_str.py", line 473, in <module>
main()
File "C:\work\xemu\xemu-opengl\mesa\src\vulkan\util\gen_enum_to_str.py", line 462, in main
f.write(template.render(
UnicodeEncodeError: 'gbk' codec can't encode character '\xa9' in position 107: illegal multibyte sequence
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14015>
Yiwei Zhang [Fri, 19 Nov 2021 07:15:48 +0000 (07:15 +0000)]
venus: move bo allocation for mappable memory to vn_MapMemory
This change defers the bo allocation for non-external mappable memory
direct allocation.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13874>
Yiwei Zhang [Fri, 19 Nov 2021 06:27:13 +0000 (06:27 +0000)]
venus: track memory type property flags in vn_device_memory
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13874>
Yiwei Zhang [Sun, 28 Nov 2021 00:04:11 +0000 (00:04 +0000)]
venus: defer roundtrip waiting to vkFreeMemory time
bo allocations for the below cases are after device memory allocation:
1. direct non-external mappable memory allocation
2. pool grow
3. exportable memory allocation
For (1) and (2), the bo is for mapping, which is a pure kernel operation
to happen later. So roundtrip waiting can be deferred until free memory.
For (3), the bo is for either fd export or mapping, which are both pure
kernel operations. So roundtrip waiting can also be deferred until free
memory.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13874>
Yiwei Zhang [Thu, 2 Dec 2021 21:46:38 +0000 (21:46 +0000)]
venus: simplify device memory pool alloc and refcount
The behavior we stick to is that the base_bo is always created for pool
memory so that to keep it alive during suballocates and frees.
This CL does the below:
1. rename pool_alloc to pool_suballocate and align the api interface
2. rename simple_alloc to pool_grow_alloc to make it pool specific
3. refactor pool_free and simple_free into a pair of pool_ref and
pool_unref to simplify that vkFreeMemory is only called after the
pool bo gets destroyed.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13874>
Yiwei Zhang [Thu, 2 Dec 2021 23:47:39 +0000 (23:47 +0000)]
venus: refactor vn_device_memory_simple_alloc
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13874>
Ilia Mirkin [Fri, 3 Dec 2021 18:23:29 +0000 (13:23 -0500)]
nv50: don't claim support for format-less stores
This is not supported, nor is there any need to support it -- ES 3.1
doesn't need it, and we're in no danger of supporting
ARB_shader_image_load_store (among other things, it requires frag
images).
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14050>
Ilia Mirkin [Fri, 3 Dec 2021 18:00:43 +0000 (13:00 -0500)]
nv50,nvc0: add new caps to list
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14050>
Marcin Ślusarz [Fri, 16 Jul 2021 13:03:20 +0000 (15:03 +0200)]
intel/compiler: Load draw_id from XP0 in Task/Mesh shaders
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Marcin Ślusarz [Mon, 12 Jul 2021 11:43:03 +0000 (13:43 +0200)]
intel/compiler: Get mesh_global_addr from the Inline Parameter for Task/Mesh
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Marcin Ślusarz [Mon, 12 Jul 2021 11:20:22 +0000 (13:20 +0200)]
intel/compiler: extract brw_nir_load_global_const out of rt code
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Caio Oliveira [Fri, 29 Oct 2021 19:56:22 +0000 (12:56 -0700)]
intel/compiler: Implement Mesh Output
Use the same URB access helpers that were added for Task Output. The
Arrayed I/O (per-primitive and per-vertex) is handled by applying the
pitch from the MUE layout into the NIR intrinsics and including the
non-arrayed offset on top of it. After that, the index src can be
used directly for lowering.
Because we keep around the non-arrayed offset AND the pitch is
aligned, we can identify cases where the access is indirect but
guaranteed to be aligned, and dispatch a single message. Added a TODO
to explore that later.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Caio Oliveira [Fri, 29 Oct 2021 19:45:17 +0000 (12:45 -0700)]
intel/compiler: Implement Task Output and Mesh Input
Implement the output written by the task *workgroup* and available to
all the mesh *workgroups* dispatched from that task. We currently
ignore any layout annotations (since they are not really testable) and
produce a (packed) layout ourselves.
The URB messages are only SIMD8, so for larger SIMDs, the functions
will produce multiple messages. Making this lowering here instead of
the generic lower_simd_width() since it is not just a matter of
zip/unzip, e.g. the offset must be adjusted.
Indirect writes/reads are implemented by handling one component at a
time and using the PER_SLOT variant of the messages.
Note that VK_NV_mesh_shader allows reading outputs, so add support for
that as well.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Caio Oliveira [Fri, 29 Oct 2021 19:48:54 +0000 (12:48 -0700)]
intel/compiler: Lower Task/Mesh local_invocation_{id,index}
The Invocation index is provided by the payload, so we can skip the
usual math done to get to it.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Caio Oliveira [Fri, 29 Oct 2021 19:27:45 +0000 (12:27 -0700)]
intel/compiler: Add backend compiler basics for Task/Mesh
Task/Mesh stages are CS-like stages, and include many
builtins (e.g. workgroup ID/index) and intrinsics (e.g. workgroup
memory primitives) originally present only in CS.
This commit add two new stages (task and mesh) that 'inherit' from CS
by embedding a brw_cs_prog_data in their own prog_data structure, so
that CS functionality can be easily reused. They also currently use
the same helpers to select the SIMD variant to use -- that was
recently added for CS.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Caio Oliveira [Tue, 18 May 2021 17:37:36 +0000 (10:37 -0700)]
intel/compiler: Export brw_nir_lower_simd
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Caio Oliveira [Tue, 18 May 2021 18:05:33 +0000 (11:05 -0700)]
intel/compiler: Make MUE available when setting up FS URB access
Allows to assert its existence for per-primitive variables and will
later be useful to implement the "more than 16 attributes" case for
Mesh.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Caio Oliveira [Tue, 18 May 2021 18:06:59 +0000 (11:06 -0700)]
intel/compiler: Add structs to hold TUE/MUE
Used to specify the layout of 'Task URB Entry' and 'Mesh URB Entry'.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Caio Oliveira [Fri, 29 Oct 2021 19:10:00 +0000 (12:10 -0700)]
intel/compiler: Don't lower Mesh/Task I/O to temporaries
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Caio Oliveira [Tue, 18 May 2021 17:58:26 +0000 (10:58 -0700)]
intel/compiler: Don't stage Task/Mesh outputs in registers
Since the outputs are shared among the whole workgroup, these can't be
staged in registers as they will not be always visible for all the
invocations (to read/flush). If they ever need to be staged, we
should use SLM for that.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Caio Oliveira [Tue, 18 May 2021 17:17:43 +0000 (10:17 -0700)]
intel/compiler: Handle per-primitive inputs in FS
In Fragment Shader, regular inputs are laid out in the thread payload
in a one dword per each half-GRF, that gives room for having the two
delta dwords needed for interpolation.
Per-primitive inputs are laid out before the regular inputs, and since
there's no need to have delta information, they are packed. So
half-GRF will be fully filled with 4 dwords of input.
When num_per_primitive_inputs is zero (the default case), behavior
should be the same as before.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
Caio Oliveira [Tue, 18 May 2021 17:11:42 +0000 (10:11 -0700)]
intel/compiler: Properly lower WorkgroupId for Task/Mesh
Task/Mesh currently only support a single dimension (both in NV API
and HW), so make Y and Z be zero.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>