Christopher Di Bella [Wed, 1 Jun 2022 22:12:38 +0000 (22:12 +0000)]
[clang][tablegen] adds human documentation to `WarningOption`
Building on D126796, this commit adds the infrastructure for being able
to print out descriptions of what each warning does.
Differential Revision: https://reviews.llvm.org/D126832
Joe Nash [Thu, 9 Jun 2022 14:32:27 +0000 (10:32 -0400)]
[AMDGPU] NFC. Comment change to GFX10+ in AsmParser
Joe Nash [Mon, 6 Jun 2022 19:33:15 +0000 (15:33 -0400)]
[AMDGPU] gfx11 SRC_POPS_EXISTING_WAVE_ID is removed
Michael Jones [Wed, 1 Jun 2022 21:42:57 +0000 (14:42 -0700)]
[libc] add buffering to FILE writes
Previously all FILE objects were fully buffered, this patch adds line
buffering and unbuffered output, as well as applying them to stdout and
stderr.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D126829
Benjamin Kramer [Fri, 10 Jun 2022 16:47:40 +0000 (18:47 +0200)]
[libc][math] Add EXP_MANT_MASK when long double is double or quad
Sanjay Patel [Fri, 10 Jun 2022 14:44:13 +0000 (10:44 -0400)]
[InstCombine] add narrowing transform for low-masked binop with zext operand (2nd try)
The 1st try (
afa192cfb6049a15c55 ) was reverted because it could
cause an infinite loop with constant expressions.
A test for that and an extra condition to enable the transform
are added now. I also added code comments to better describe
the transform and the existing, related transform.
Original commit message:
https://alive2.llvm.org/ce/z/hRy3rE
As shown in D123408, we can produce this pattern when moving
casts around, and we already have a related fold for a binop
with a constant operand.
Sanjay Patel [Fri, 10 Jun 2022 14:36:41 +0000 (10:36 -0400)]
[InstCombine] add test for mask op with constant expression; NFC
This is reduced from the post-commit C example in:
afa192cfb6049a15
That was reverted with:
6fedc6a2b41e458f
This will infinite loop unless that transform or the ones
with casts that can "EvaluateInDifferentType" are limited
to ignore constant expressions.
Yusra Syeda [Fri, 10 Jun 2022 14:52:05 +0000 (10:52 -0400)]
[SystemZ][z/OS] Add llvm.read_register() intrinsic support for zOS
Differential Revision: https://reviews.llvm.org/D127412
Shao-Ce SUN [Fri, 10 Jun 2022 16:11:13 +0000 (00:11 +0800)]
[RISCV] move `isFaultFirstLoad` into `RISCVInstrInfo`
Fix build errors in D126794
```
ld.lld: error: undefined symbol: llvm::MachineInstr::getNumExplicitDefs() const
>>> referenced by RISCVBaseInfo.cpp
>>> RISCVBaseInfo.cpp.o:(llvm::isFaultFirstLoad(llvm::MachineInstr const&)) in archive lib/libLLVMRISCVDesc.a
ld.lld: error: undefined symbol: llvm::MachineInstr::findRegisterDefOperandIdx(llvm::Register, bool, bool, llvm::TargetRegisterInfo const*) const
>>> referenced by RISCVBaseInfo.cpp
>>> RISCVBaseInfo.cpp.o:(llvm::isFaultFirstLoad(llvm::MachineInstr const&)) in archive lib/libLLVMRISCVDesc.a
clang-15: error: linker command failed with exit code 1 (use -v to see invocation)
```
Reviewed By: fakepaper56, craig.topper
Differential Revision: https://reviews.llvm.org/D127477
Jay Foad [Fri, 10 Jun 2022 16:05:29 +0000 (17:05 +0100)]
[AMDGPU] Restore documentation of .amdhsa_shared_vgpr_count
This was accidentally lost in D127402.
Shao-Ce SUN [Fri, 10 Jun 2022 16:02:45 +0000 (00:02 +0800)]
Revert "[RISCV] move `isFaultFirstLoad` into `RISCVInstrInfo`"
This reverts commit
e018e493c1ac514504bbaa1d1396aec025142a31.
There are some problems with this commit,
related revision: https://reviews.llvm.org/D127477
Philip Reames [Fri, 10 Jun 2022 15:57:27 +0000 (08:57 -0700)]
[RISCV] Fix accidental deletion of test lines in 2247e4d
Apparently, update_analyze_test_checks.sh does *not* warn on conflicting CHECKs, it just silently drops those lines from the generated test. That is.. less than helpful.
Paul Robinson [Thu, 9 Jun 2022 18:17:16 +0000 (11:17 -0700)]
[PS5] Use linker scripting to find profiling data, like PS4
Craig Topper [Fri, 10 Jun 2022 15:36:31 +0000 (08:36 -0700)]
[RISCV] Mark FSIN and other math functions as Expand for scalable vectors.
This prevents them from being assumed legal by the cost model.
This matches what is done for AArch64 SVE.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D123799
Philip Reames [Fri, 10 Jun 2022 15:27:12 +0000 (08:27 -0700)]
[RISCV] Use common prefixes to reduce duplication in cost model tests
Nikita Popov [Fri, 10 Jun 2022 15:31:10 +0000 (17:31 +0200)]
[DCE] Update tests to use opaque pointers (NFC)
Andrzej Warzynski [Fri, 10 Jun 2022 15:26:13 +0000 (15:26 +0000)]
[flang][lowering] Ignore compiler directives
This patch simply replaces a `TODO` with a warning.
This is part of the upstreaming effort from the `fir-dev` branch in [1].
[1] https://github.com/flang-compiler/f18-llvm-project
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D127415
Guillaume Chatelet [Fri, 10 Jun 2022 15:20:07 +0000 (15:20 +0000)]
[NFC][Alignment] Simplify code
Adrian Prantl [Fri, 10 Jun 2022 15:16:30 +0000 (08:16 -0700)]
[LLDB][Docs] Fix formatting of example code-block
Tested by building the docs-lldb-html target and
confirming the code-block renders properly with
the fix.
Patch by Michael Buch!
Differential Revision: https://reviews.llvm.org/D127437
Nikita Popov [Fri, 10 Jun 2022 15:07:27 +0000 (17:07 +0200)]
[InstSimplify] Convert tests to opaque pointers (NFC)
The only interesting test change is in @PR31262, where the following
fold is now performed, while it previously was not:
https://alive2.llvm.org/ce/z/a5Qmr6
llvm/test/Transforms/InstSimplify/ConstProp/gep.ll has not been
updated, because there is a tradeoff between folding and inrange
preservation there that we may want to discuss.
Updates have been performed using:
https://gist.github.com/nikic/
98357b71fd67756b0f064c9517b62a34
Guillaume Chatelet [Fri, 10 Jun 2022 15:13:25 +0000 (15:13 +0000)]
[NFC] Remove deadcode
Philip Reames [Fri, 10 Jun 2022 15:07:55 +0000 (08:07 -0700)]
[RISCV] Broaden cost model coverage for fixed vectors w/i1 element type
Simon Pilgrim [Fri, 10 Jun 2022 14:49:49 +0000 (15:49 +0100)]
[DAG] SimplifyDemandedVectorElts - adding SimplifyMultipleUseDemandedVectorElts handling to ISD::CONCAT_VECTORS
Attempt to look through multiple use operands of ISD::CONCAT_VECTORS nodes
Another minor improvement for D127115
Nikita Popov [Fri, 10 Jun 2022 14:56:13 +0000 (16:56 +0200)]
[InstSimplify] Name variables/labels in test (NFC)
Run the test through -instnamer. Also drop irrelevant uwtable
attribute.
Nikita Popov [Fri, 10 Jun 2022 14:52:53 +0000 (16:52 +0200)]
[InstSimplify] Regenerate test checks (NFC)
Sam Estep [Fri, 10 Jun 2022 14:50:22 +0000 (14:50 +0000)]
[clang][dataflow] In `optional` model, match call return via hasType
Currently the unchecked-optional-access model fails on this example:
#include <memory>
#include <optional>
void foo() {
std::unique_ptr<std::optional<float>> x;
*x = std::nullopt;
}
You can verify the failure by saving the file as `foo.cpp` and running this command:
clang-tidy -checks='-*,bugprone-unchecked-optional-access' foo.cpp -- -std=c++17
The failing `assert` is in the `transferAssignment` function of the `UncheckedOptionalAccessModel.cpp` file:
assert(OptionalLoc != nullptr);
The symptom can be treated by replacing that `assert` with an early `return`:
if (OptionalLoc == nullptr)
return;
That would be better anyway since we cannot expect to always cover all possible LHS expressions, but it is out of scope for this patch and left as a followup.
Note that the failure did not occur on this very similar example:
#include <optional>
template <typename T>
struct smart_ptr {
T& operator*() &;
T* operator->();
};
void foo() {
smart_ptr<std::optional<float>> x;
*x = std::nullopt;
}
The difference is caused by the `isCallReturningOptional` matcher, which was previously checking the `functionDecl` of the `callee`. This patch changes it to instead use `hasType` directly on the call expression, fixing the failure for the `std::unique_ptr` example above.
Reviewed By: sgatev
Differential Revision: https://reviews.llvm.org/D127434
John Ericson [Sat, 8 Jan 2022 09:00:53 +0000 (09:00 +0000)]
[cmake] Don't export `LLVM_TOOLS_INSTALL_DIR` anymore
First of all, `LLVM_TOOLS_INSTALL_DIR` put there breaks our NixOS
builds, because `LLVM_TOOLS_INSTALL_DIR` defined the same as
`CMAKE_INSTALL_BINDIR` becomes an *absolute* path, and then when
downstream projects try to install there too this breaks because our
builds always install to fresh directories for isolation's sake.
Second of all, note that `LLVM_TOOLS_INSTALL_DIR` stands out against the
other specially crafted `LLVM_CONFIG_*` variables substituted in
`llvm/cmake/modules/LLVMConfig.cmake.in`.
@beanz added it in
d0e1c2a550ef348aae036d0fe78cab6f038c420c to fix a
dangling reference in `AddLLVM`, but I am suspicious of how this
variable doesn't follow the pattern.
Those other ones are carefully made to be build-time vs install-time
variables depending on which `LLVMConfig.cmake` is being generated, are
carefully made relative as appropriate, etc. etc. For my NixOS use-case
they are also fine because they are never used as downstream install
variables, only for reading not writing.
To avoid the problems I face, and restore symmetry, I deleted the
exported and arranged to have many `${project}_TOOLS_INSTALL_DIR`s.
`AddLLVM` now instead expects each project to define its own, and they
do so based on `CMAKE_INSTALL_BINDIR`. `LLVMConfig` still exports
`LLVM_TOOLS_BINARY_DIR` which is the location for the tools defined in
the usual way, matching the other remaining exported variables.
For the `AddLLVM` changes, I tried to copy the existing pattern of
internal vs non-internal or for LLVM vs for downstream function/macro
names, but it would good to confirm I did that correctly.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D117977
Joe Nash [Mon, 6 Jun 2022 19:33:15 +0000 (15:33 -0400)]
[AMDGPU] gfx11 EXECZ and VCCZ are no longer allowed to be used as
sources to SALU and VALU instructions.
Contributors:
Baptiste Saleil <baptiste.saleil@amd.com>
Patch 20/N for upstreaming of AMDGPU gfx11 architecture
Depends on D126989
Reviewed By: rampitec, foad, #amdgpu
Differential Revision: https://reviews.llvm.org/D127143
Nuno Lopes [Fri, 10 Jun 2022 14:28:57 +0000 (15:28 +0100)]
[NFC] remove 'br undef' from InstCombine test cases
This is UB and allows the compiler to give any result, so these tests weren't meaningful
InstCombine tests are now clean of 'br undef'
Simon Tatham [Fri, 10 Jun 2022 14:18:06 +0000 (15:18 +0100)]
[Clang,ARM] Add release note for D127197.
I should have put that in the original commit, but @lenary only just
reminded me that it needed to be there.
Nikita Popov [Fri, 10 Jun 2022 13:48:34 +0000 (15:48 +0200)]
[InstCombine] Add additional cost of phi tests (NFC)
These check for undesirable folds for a cast of a loop phi.
Louis Dionne [Fri, 10 Jun 2022 14:11:24 +0000 (10:11 -0400)]
[libc++][NFC] Fix indentation of some #if directives
Jay Foad [Tue, 7 Jun 2022 16:21:00 +0000 (17:21 +0100)]
[AMDGPU] Basic implementation of isExtractSubvectorCheap
Add a basic implementation of isExtractSubvectorCheap that only
considers extracts at offset 0.
Differential Revision: https://reviews.llvm.org/D127385
Ivan Kosarev [Fri, 10 Jun 2022 13:18:29 +0000 (14:18 +0100)]
[TableGen][CodeEmitterGen] Do not crash on insufficient positional instruction operands.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D126288
Hans Wennborg [Wed, 8 Jun 2022 13:08:46 +0000 (15:08 +0200)]
[SimplifyCFG] Share code to compute switch density between ShouldBuildLookupTable() and ReduceSwitchRange()
They're computing the same thing. No functionality change.
Differential revision: https://reviews.llvm.org/D127482
Guillaume Chatelet [Tue, 7 Jun 2022 09:51:32 +0000 (09:51 +0000)]
[clang] Add support for __builtin_memset_inline
In the same spirit as D73543 and in reply to https://reviews.llvm.org/D126768#3549920 this patch is adding support for `__builtin_memset_inline`.
The idea is to get support from the compiler to easily write efficient memory function implementations.
This patch could be split in two:
- one for the LLVM part adding the `llvm.memset.inline.*` intrinsics.
- and another one for the Clang part providing the instrinsic as a builtin.
Differential Revision: https://reviews.llvm.org/D126903
Nuno Lopes [Fri, 10 Jun 2022 13:06:32 +0000 (14:06 +0100)]
[NFC] Add 3 more -inseltpoison.ll test variations
Shao-Ce SUN [Fri, 10 Jun 2022 08:53:34 +0000 (16:53 +0800)]
[RISCV] move `isFaultFirstLoad` into `RISCVInstrInfo`
Fix build errors in D126794
```
ld.lld: error: undefined symbol: llvm::MachineInstr::getNumExplicitDefs() const
>>> referenced by RISCVBaseInfo.cpp
>>> RISCVBaseInfo.cpp.o:(llvm::isFaultFirstLoad(llvm::MachineInstr const&)) in archive lib/libLLVMRISCVDesc.a
ld.lld: error: undefined symbol: llvm::MachineInstr::findRegisterDefOperandIdx(llvm::Register, bool, bool, llvm::TargetRegisterInfo const*) const
>>> referenced by RISCVBaseInfo.cpp
>>> RISCVBaseInfo.cpp.o:(llvm::isFaultFirstLoad(llvm::MachineInstr const&)) in archive lib/libLLVMRISCVDesc.a
clang-15: error: linker command failed with exit code 1 (use -v to see invocation)
```
Reviewed By: fakepaper56
Differential Revision: https://reviews.llvm.org/D127477
Nico Weber [Fri, 10 Jun 2022 12:36:34 +0000 (08:36 -0400)]
Revert "[analyzer] Deprecate `-analyzer-store region` flag"
This reverts commit
d50d9946d1d7e5f20881f0bc71fbd025040b1c96.
Broke check-clang, see comments on https://reviews.llvm.org/D126067
Also revert dependent change "[analyzer] Deprecate the unused 'analyzer-opt-analyze-nested-blocks' cc1 flag"
This reverts commit
07b4a6d0461fe64e10d30029ed3d598e49ca3810.
Also revert "[analyzer] Fix buildbots after introducing a new frontend warning"
This reverts commit
90374df15ddc58d823ca42326a76f58e748f20eb.
(See https://reviews.llvm.org/rG90374df15ddc58d823ca42326a76f58e748f20eb)
Balazs Benics [Fri, 10 Jun 2022 12:47:23 +0000 (14:47 +0200)]
[analyzer] Fix buildbots after introducing a new frontend warning
It seems like I should have ran the `check-clang` target after introducing a new warning diagnostic entry.
My bad. I'll run it next time; `check-clang-analysis` was not enough.
Here is a link to the broken bot: http://45.33.8.238/linux/78236/step_7.txt
This commit should fix this.
Differential Revision: https://reviews.llvm.org/D126067
Simon Pilgrim [Fri, 10 Jun 2022 12:29:04 +0000 (13:29 +0100)]
[X86] combineMulToPMADDWD - don't bitcast the source ops before splitting to ensure we split the build vectors early
Fixes a regression on D127115 - splitting was creating extract_subvector(bitcast(build_vector())) patterns which prevented the build vectors being split before being bitcast to vXi16 types, resulting in various issues with further folding of the (now legal) build vectors
Guillaume Chatelet [Fri, 10 Jun 2022 12:36:40 +0000 (12:36 +0000)]
[NFC] Use proper getSliceAlign type in SROA
Sanjay Patel [Fri, 10 Jun 2022 12:12:02 +0000 (08:12 -0400)]
Revert "[InstCombine] add narrowing transform for low-masked binop with zext operand"
This reverts commit
afa192cfb6049a15c5542d132d500b910b802c74.
This can cause an infinite loop as shown with an example in the
post-commit thread.
Ivan Kosarev [Fri, 10 Jun 2022 09:06:45 +0000 (10:06 +0100)]
[AMDGPU][GFX9][GFX10] Support base+soffset+offset SMEM atomics.
Resolves a part of
https://github.com/llvm/llvm-project/issues/38652
Reviewed By: dp
Differential Revision: https://reviews.llvm.org/D127314
David Sherwood [Tue, 31 May 2022 14:54:49 +0000 (15:54 +0100)]
[InstCombine] Use +0.0 instead of -0.0 as the FP identity for some folds
In foldSelectIntoOp we sometimes transform a select of a fadd into a
fadd of a select, where we select between data and an identity value.
For both fadd and fsub the identity is always -0.0, but if the nsz
flag is set on the select instruction we can use +0.0 instead. Doing
so then triggers other optimisations, such as when folding the select
of masked load into a new masked load.
Differential Revision: https://reviews.llvm.org/D126774
Diana Picus [Fri, 10 Jun 2022 11:36:52 +0000 (11:36 +0000)]
[flang] Fix RUN line in test from 3e782ba
The current RUN line leaves a parse-ir-error.s file around, which might
confuse the buildbots. Direct the output into the void instead (although
it would probably be better to direct it to FileCheck).
Shivam Gupta [Fri, 10 Jun 2022 11:25:55 +0000 (16:55 +0530)]
[NFC] update clang-tools-extra README.txt
Markus Mützel [Fri, 10 Jun 2022 08:31:42 +0000 (08:31 +0000)]
[flang][runtime] Remove dependency on C++ <mutex> on Windows
The implementation of the Lock class on Windows currently uses C++
mutexes. That introduces a dependency on the C++ runtime on that
platform.
Use a Windows CriticalSection instead of a std::mutex to avoid that
dependency.
This works for me with MinGW (tested in a CLANG64 environment of MSYS2).
See also D126291.
Differential Revision: https://reviews.llvm.org/D127316
Balazs Benics [Fri, 10 Jun 2022 11:21:28 +0000 (13:21 +0200)]
[clang-tidy] Remove reference to CSA AnalysisStoreOpt field
D126215 removed the `AnalysisStoreOpt` field, so `clang-tidy` should not
refer to it.
http://45.33.8.238/linux/78232/step_4.txt
../../clang-tools-extra/clang-tidy/ClangTidy.cpp:444:22: error: no
member named 'AnalysisStoreOpt' in 'clang::AnalyzerOptions'
AnalyzerOptions->AnalysisStoreOpt = RegionStoreModel;
~~~~~~~~~~~~~~~~~^
../../clang-tools-extra/clang-tidy/ClangTidy.cpp:444:41: error: use of
undeclared identifier 'RegionStoreModel'
AnalyzerOptions->AnalysisStoreOpt = RegionStoreModel;
This one liner patch should resolve the build failure.
Differential Revision: https://reviews.llvm.org/D126215
Balazs Benics [Fri, 10 Jun 2022 11:09:37 +0000 (13:09 +0200)]
[analyzer] Deprecate the unused 'analyzer-opt-analyze-nested-blocks' cc1 flag
This flag was introduced by
https://github.com/llvm/llvm-project/commit/
6818991d7165f68fe196922d9e5c6648dd57cc47
commit
6818991d7165f68fe196922d9e5c6648dd57cc47
Author: Ted Kremenek <kremenek@apple.com>
Date: Mon Dec 7 22:06:12 2009 +0000
Add clang-cc option '-analyzer-opt-analyze-nested-blocks' to treat
block literals as an entry point for analyzer checks.
The last reference was removed by this commit:
https://github.com/llvm/llvm-project/commit/
5c32dfc5fb1cfcff8ae3671284e17daa8da3a188
commit
5c32dfc5fb1cfcff8ae3671284e17daa8da3a188
Author: Anna Zaks <ganna@apple.com>
Date: Fri Dec 21 01:19:15 2012 +0000
[analyzer] Add blocks and ObjC messages to the call graph.
This paves the road for constructing a better function dependency graph.
If we analyze a function before the functions it calls and inlines,
there is more opportunity for optimization.
Note, we add call edges to the called methods that correspond to
function definitions (declarations with bodies).
Consequently, we should remove this dead flag.
However, this arises a couple of burning questions.
- Should the `cc1` frontend still accept this flag - to keep
tools/users passing this flag directly to `cc1` (which is unsupported,
unadvertised) working.
- If we should remain backward compatible, how long?
- How can we get rid of deprecated and obsolete flags at some point?
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D126067
Alex Zinenko [Fri, 10 Jun 2022 09:57:59 +0000 (11:57 +0200)]
[mlir] add a dynamic user-after-parent-freed transform dialect check
In the transform dialect, a transform IR handle may be pointing to a payload IR
operation that is an ancestor of another payload IR operation pointed to by
another handle. If such a "parent" handle is consumed by a transformation, this
indicates that the associated operation is likely rewritten, which in turn
means that the "child" handle may now be associated with a dangling pointer or
a pointer to a different operation than originally. Add a handle invalidation
mechanism to guard against such situations by reporting errors at runtime.
Reviewed By: springerm
Differential Revision: https://reviews.llvm.org/D127480
Balazs Benics [Fri, 10 Jun 2022 11:02:26 +0000 (13:02 +0200)]
[analyzer][NFC] Remove unused RegionStoreFeatures
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D126216
Andrzej Warzynski [Wed, 1 Jun 2022 16:00:31 +0000 (16:00 +0000)]
[flang][driver] Make `flang-new -fc1` accept MLIR files
This relatively small change will allow Flang's frontend driver,
`flang-new -fc1`, to consume and parse MLIR files. Semantically (i.e.
from user's perspective) this is identical to reading LLVM IR files.
Two file extensions are associated with MLIR files: .fir and .mlir. Note
that reading MLIR files makes only sense when running one of the
code-generation actions, i.e. when using one of the following action
flags: -S, -emit-obj, -emit-llvm, -emit-llvm-bc.
The majority of tests that required `tco` to run are updated to also run
with `flang-new -fc1`. A few tests are updated to use `fir-opt` instead
of `tco` (that's the preferred choice when testing a particular MLIR
pass). basic-program.fir is not updated as that test is intended to
verify the behaviour of `tco` specifically.
Differential Revision: https://reviews.llvm.org/D126890
Balazs Benics [Fri, 10 Jun 2022 10:57:15 +0000 (12:57 +0200)]
[analyzer] Deprecate `-analyzer-store region` flag
I'm trying to remove unused options from the `Analyses.def` file, then
merge the rest of the useful options into the `AnalyzerOptions.def`.
Then make sure one can set these by an `-analyzer-config XXX=YYY` style
flag.
Then surface the `-analyzer-config` to the `clang` frontend;
After all of this, we can pursue the tablegen approach described
https://discourse.llvm.org/t/rfc-tablegen-clang-static-analyzer-engine-options-for-better-documentation/61488
In this patch, I'm proposing flag deprecations.
We should support deprecated analyzer flags for exactly one release. In
this case I'm planning to drop this flag in `clang-16`.
In the clang frontend, now we won't pass this option to the cc1
frontend, rather emit a warning diagnostic reminding the users about
this deprecated flag, which will be turned into error in clang-16.
Unfortunately, I had to remove all the tests referring to this flag,
causing a mass change. I've also added a test for checking this warning.
I've seen that `scan-build` also uses this flag, but I think we should
remove that part only after we turn this into a hard error.
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D126215
Bin Cheng [Fri, 10 Jun 2022 10:40:59 +0000 (18:40 +0800)]
[FuncSpec]Fix assertion failure when value is not added to solver
This patch improves the fix in D110529 to prevent from crashing on value
with byval attribute that is not added in SCCP solver.
Authored-by: sinan.lin@linux.alibaba.com
Reviewed By: ChuanqiXu
Differential Revision: https://reviews.llvm.org/D126355
Dmitry Preobrazhensky [Fri, 10 Jun 2022 10:37:57 +0000 (13:37 +0300)]
[AMDGPU][MC][GFX1013] Enable image_msaa_load
Differential Revision: https://reviews.llvm.org/D127198
LLVM GN Syncbot [Fri, 10 Jun 2022 10:37:02 +0000 (10:37 +0000)]
[gn build] Port
ff6d5dee713c
LLVM GN Syncbot [Fri, 10 Jun 2022 10:37:01 +0000 (10:37 +0000)]
[gn build] Port
1972d1e86a62
Andrzej Warzynski [Mon, 6 Jun 2022 17:57:33 +0000 (17:57 +0000)]
[flang][driver] Fix support for `-x`
Until now, `-x` wasn't really taken into account in Flang's compiler and
frontend drivers. `flang-new` and `flang-new -fc1` only recently gained
powers to consume inputs other than Fortran files and that's probably
why this hasn't been noticed yet.
This patch makes sure that `-x` is supported correctly and consistently
with Clang. To this end, verification is added when reading LLVM IR
files (i.e. IR modules are verified with `llvm::verifyModule`). This
way, LLVM IR parsing errors are correctly reported to Flang users. This
also aids testing.
With the new functionality, we can verify that `-x ir` breaks
compilation for e.g. Fortran files and vice-versa. Tests are updated
accordingly.
Differential Revision: https://reviews.llvm.org/D127207
Simon Tatham [Fri, 10 Jun 2022 10:25:53 +0000 (11:25 +0100)]
[ARM] Fix how size-0 bitfields affect homogeneous aggregates.
By both AAPCS32 and AAPCS64, the test for whether an aggregate
qualifies as homogeneous (either HFA or HVA) is based on the data
layout alone. So any logical member of the structure that does not
affect the data layout also should not affect homogeneity. In
particular, an empty bitfield ('int : 0') should make no difference.
In fact, clang considered it to make a difference in C but not in C++,
and justified that policy as compatible with gcc. But that's
considered a bug in gcc as well (at least for Arm targets), and it's
fixed in gcc 12.1.
This fix mimics gcc's: zero-sized bitfields are now ignored in all
languages for the Arm (32- and 64-bit) ABIs. But I've left the
previous behaviour unchanged in other ABIs, by means of adding an
ABIInfo::isZeroLengthBitfieldPermittedInHomogeneousAggregate query
method which the Arm subclasses override.
Reviewed By: lenary
Differential Revision: https://reviews.llvm.org/D127197
Nico Weber [Fri, 10 Jun 2022 10:26:31 +0000 (06:26 -0400)]
[gn build] (manually) port
6bc8163c79fd
Balazs Benics [Fri, 10 Jun 2022 10:21:17 +0000 (12:21 +0200)]
[analyzer] Print the offending function at EndAnalysis crash
I've faced crashes in the past multiple times when some
`check::EndAnalysis` callback caused some crash.
It's really anoying that it doesn't tell which function triggered this
callback.
This patch adds the well-known trace for that situation as well.
Example:
1. <eof> parser at end of file
2. While analyzing stack:
#0 Calling test11
Note that this does not have tests.
I've considered `unittests` for this purpose, by using the
`ASSERT_DEATH()` similarly how we check double eval called functions in
`ConflictingEvalCallsTest.cpp`, however, that the testsuite won't invoke
the custom handlers. Only the message of the `llvm_unreachable()` will
be printed. Consequently, it's not applicable for us testing this
feature.
I've also considered using an end-to-end LIT test for this.
For that, we would need to somehow overload the `clang_analyzer_crash()`
`ExprInspection` handler, to get triggered by other events than the
`EvalCall`. I'm not saying that we could not come up with a generic way
of causing crash in a specific checker callback, but I'm not sure if
that would worth the effort.
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D127389
David Sherwood [Wed, 8 Jun 2022 08:25:00 +0000 (09:25 +0100)]
[MVE] Fold fadd(select(..., +0.0)) into a predicated fadd
We already have patterns for matching fadd(select(..., -0.0)),
but an upcoming patch will lead to patterns using +0.0 as the
identity instead of -0.0. I'm adding support for these patterns
now to avoid any regressions for MVE.
Differential Revision: https://reviews.llvm.org/D127275
Nikolas Klauser [Fri, 10 Jun 2022 08:48:39 +0000 (10:48 +0200)]
[libc++] Granularize even more of type_traits
Reviewed By: ldionne, #libc
Spies: libcxx-commits, mgorny
Differential Revision: https://reviews.llvm.org/D126593
Nikolas Klauser [Tue, 7 Jun 2022 07:42:10 +0000 (09:42 +0200)]
[libc++] Implement ranges::replace{, _if}
Reviewed By: var-const, #libc
Spies: libcxx-commits, mgorny
Differential Revision: https://reviews.llvm.org/D126283
Nikita Popov [Sat, 10 Apr 2021 17:26:50 +0000 (19:26 +0200)]
[LoopInfo] Add getOutermostLoop() (NFC)
This is a recurring pattern, add an API function for it.
David Green [Fri, 10 Jun 2022 08:36:09 +0000 (09:36 +0100)]
[AggressiveInstcombine] Conditionally fold saturated fptosi to llvm.fptosi.sat
This adds a fold for aggressive instcombine that converts
smin(smax(fptosi(x))) into a llvm.fptosi.sat, providing that the
saturation constants are correct and the cost of the llvm.fptosi.sat is
lower.
Unfortunately, a llvm.fptosi.sat cannot always be converted back to a
smin/smax/fptosi. The llvm.fptosi.sat intrinsic is more defined that the
original, which produces poison if the original fptosi was out of range.
The llvm.fptosi.sat will saturate any value, so needs to be expanded to
a fptosi(fpmin(fpmax(x))), which can be worse for codegeneration
depending on the target.
So this change thais conditional on the backend reporting that the
llvm.fptosi.sat is cheaper that the original smin+smax+fptost. This is
a change to the way that AggressiveInstrcombine has worked in the past.
Instead of just being a canonicalization pass, that canonicalization can
be dependant on the target in certain specific cases.
Differential Revision: https://reviews.llvm.org/D125755
Michał Górny [Fri, 3 Jun 2022 18:19:53 +0000 (20:19 +0200)]
[lldb] [test] Implement getting thread ID on FreeBSD
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.llvm.org/D126982
Matthias Springer [Fri, 10 Jun 2022 08:17:07 +0000 (10:17 +0200)]
[mlir][bufferize] Avoid tensor copies when the data is not read
There are various shortcuts in `BufferizationState::getBuffer` that avoid a buffer copy when we just need an allocation (and no initialization). This change adds those shortcuts to the TensorCopyInsertion pass, so that `getBuffer` can be simplified in a subsequent change.
Differential Revision: https://reviews.llvm.org/D126821
Benjamin Kramer [Fri, 10 Jun 2022 08:22:55 +0000 (10:22 +0200)]
[bazel] Change references to driver-template.cpp.in after
6bc8163c79fd
isuckatcs [Fri, 10 Jun 2022 08:09:31 +0000 (10:09 +0200)]
[Documentation] Fixed typos in LibASTMatchers tutorial
There was one missing parenthesis and a typo in the mentioned
part of the documentation.
Differential Revision: https://reviews.llvm.org/D124738
Kirill Okhotnikov [Mon, 6 Jun 2022 10:34:53 +0000 (12:34 +0200)]
[libc][math] Improved FBits performance and readablity.
Some function added in preparation to fmod commit.
Differential Revision: https://reviews.llvm.org/D127097
Balázs Kéri [Fri, 10 Jun 2022 08:00:34 +0000 (10:00 +0200)]
[clang][ASTImporter] Fix import of function with auto return type.
Fix a case of importing a function with auto return type
that is resolved with a type template argument that is declared
inside the function.
Fixes #55500
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D127396
Kirill Okhotnikov [Mon, 6 Jun 2022 09:04:57 +0000 (11:04 +0200)]
[libc][math] Differential "diff" test for hypot/hypotf functions.
Added test handler in preparation to fmod/fmodf commit.
Differential Revision: https://reviews.llvm.org/D127091
Nikita Popov [Wed, 8 Jun 2022 09:36:52 +0000 (11:36 +0200)]
[EarlyCSE] Update tests to use opaque pointers (NFC)
Update the EarlyCSE tests to use opaque pointers.
Worth noting that this leaves some bitcast ptr to ptr instructions
in the input IR behind which are no longer necessary. This is
because these use numbered instructions, so it's hard to drop them
in an automated fashion (as it would require renumbering all other
instructions as well). I'm leaving that as a problem for another day.
The test updates have been performed using
https://gist.github.com/nikic/
98357b71fd67756b0f064c9517b62a34.
Differential Revision: https://reviews.llvm.org/D127278
Nikita Popov [Thu, 9 Jun 2022 08:24:52 +0000 (10:24 +0200)]
[cmake] Export driver template to fix standalone build
Export the driver-template.cpp.in file so that tools using
GENERATE_DRIVER work in standalone builds (currently only relevant
for clang). I've given the file an llvm- prefix, as we're now
searching for the file in CMAKE_MODULE_PATH.
Differential Revision: https://reviews.llvm.org/D127384
Nikita Popov [Mon, 30 May 2022 09:12:46 +0000 (11:12 +0200)]
[CGP] Also freeze ctlz/cttz operand when despeculating
D125887 changed the ctlz/cttz despeculation transform to insert
a freeze for the introduced branch on zero. While this does fix
the "branch on poison" issue, we may still get in trouble if we
pick a different value for the branch and for the ctz argument
(i.e. non-zero for the branch, but zero for the ctz). To avoid
this, we should use the same frozen value in both positions.
This does cause a regression in RISCV codegen by introducing an
additional sext. The DAG looks like this:
t0: ch = EntryToken
t2: i64,ch = CopyFromReg t0, Register:i64 %3
t4: i64 = AssertSext t2, ValueType:ch:i32
t23: i64 = freeze t4
t9: ch = CopyToReg t0, Register:i64 %0, t23
t16: ch = CopyToReg t0, Register:i64 %4, Constant:i64<32>
t18: ch = TokenFactor t9, t16
t25: i64 = sign_extend_inreg t23, ValueType:ch:i32
t24: i64 = setcc t25, Constant:i64<0>, seteq:ch
t28: i64 = and t24, Constant:i64<1>
t19: ch = brcond t18, t28, BasicBlock:ch<cond.end 0x8311f68>
t21: ch = br t19, BasicBlock:ch<cond.false 0x8311e80>
I don't see a really obvious way to improve this, as we can't push
the freeze past the AssertSext (which may produce poison).
Differential Revision: https://reviews.llvm.org/D126638
Jay Foad [Wed, 8 Jun 2022 15:04:29 +0000 (16:04 +0100)]
[AMDGPU] New GFX11 intrinsic llvm.amdgcn.s.sendmsg.rtn
Add new intrinsic and codegen support for the s_sendmsg_rtn_b32 and
s_sendmsg_rtn_b64 instructions.
Differential Revision: https://reviews.llvm.org/D127315
Jay Foad [Thu, 4 Nov 2021 17:24:11 +0000 (17:24 +0000)]
[AMDGPU] Update dlc usage for GFX11
In GFX10 dlc controlled L1 cache bypass. In GFX11 it has been repurposed
to control MALL NOALLOC, and glc controls L1 as well as L0 cache bypass.
Update the documentation and SIMemoryLegalizer accordingly. Set dlc for
nontemporal and volatile accesses.
Differential Revision: https://reviews.llvm.org/D127405
Tony [Mon, 22 Mar 2021 21:08:29 +0000 (21:08 +0000)]
[AMDGPU] Add GFX11 documentation to AMDGPUUsage
Update most of the document to include GFX11. Memory model changes will
come later.
Differential Revision: https://reviews.llvm.org/D127402
Valentin Clement [Fri, 10 Jun 2022 06:50:40 +0000 (08:50 +0200)]
[flang][NFC] Move Todo.h from Lower to Optimizer
Remove a backwards dependence from Optimizer -> Lower by moving Todo.h
to the optimizer and out of lowering.
This patch is part of the upstreaming effort from fir-dev branch.
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D127292
Sunho Kim [Fri, 10 Jun 2022 06:22:18 +0000 (15:22 +0900)]
[JITLink][EHFrameSupport] Remove CodeAlignmentFactor and DataAlignmentFactor validation.
Removes CodeAlignmentFactor and DataAlignmentFactor validation in EHFrameEdgeFixer. I observed some of aarch64 elf files generated by clang contains CIE record with code_alignment_factor = 4 or data_alignment_factor = -8. code_alignment_factor and data_alignment_factor are used by call fram instruction that should be correctled handled by libunwind.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127062
Adrian Kuegel [Fri, 10 Jun 2022 06:26:00 +0000 (08:26 +0200)]
Fix bazel BUILD.
Eric Schweitz [Fri, 10 Jun 2022 06:11:08 +0000 (08:11 +0200)]
Fixes assertion that arose from bad FIR being constructed.
* Fix assertion strings.
* Fixes assertion that arose from bad FIR being constructed.
With the default member-wise component assignment, the LHS and RHS may
be compatible but distinct types. This change to lowering manages both
the LHS and RHS independently rather than assume the two types are
identical. This avoids creating bogus FIR and asserting/crashing in
codegen.
Update the tests with the member-wise copy code.
This patch is part of the upstreaming effort from fir-dev branch.
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D127297
Nathan James [Fri, 10 Jun 2022 06:07:21 +0000 (07:07 +0100)]
[clang-tidy][NFC] Tweak identifier-naming options reading/writiing
Yeting Kuo [Mon, 30 May 2022 13:12:09 +0000 (21:12 +0800)]
[RISCV] Lower VLEFF/VLSEGFF SDNodes to MachineInstrs with VL outputs.
The patch is a replacement of D125199. PseudoReadVL with vtype has worry for
computing same vtypes of VLEFF/VLSEGFF in two different places, DAGToDAG and
InsertVSETVLI. VLEFF/VLSEGFF MI with VL output still could provide the vtype of
VLEFF/VLSEGFF to the users of its VL.
The patch names the new pseudo as original VLEFF/VLSEGFF name suffixed "_VL" and
expand them in RISCVInsertVSETVLI pass.
This patch also reverts commit
4537aae0d57e17c217c192d8977012ba475b130c,
"[RISCV] Make PseudoReadVL have the vtypes of the corresponding VLEFF/VLSEGFF.".
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D126794
Peter S. Housel [Sat, 4 Jun 2022 06:14:04 +0000 (23:14 -0700)]
[ORC][ORC_RT] Handle ELF .init_array with non-default priority
ELF-based platforms currently support defining multiple static
initializer table sections with differing priorities, for example
.init_array.0 or .init_array.100; the default .init_array corresponds
to a priority of 65535. When building a shared library or executable,
the system linker normally sorts these sections and combines them into
a single .init_array section. This change adds the capability to
recognize ELF static initializers with priorities other than the
default, and to properly sort them by priority, to Orc and the Orc
runtime.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127056
Peter S. Housel [Thu, 26 May 2022 00:04:01 +0000 (17:04 -0700)]
[ORC][ORC_RT] Integrate ORC platforms with LLJIT and lli
This change enables integrating orc::LLJIT with the ORCv2
platforms (MachOPlatform and ELFNixPlatform) and the compiler-rt orc
runtime. Changes include:
- Adding SPS wrapper functions for the orc runtime's dlfcn emulation
functions, allowing initialization and deinitialization to be invoked
by LLJIT.
- Changing the LLJIT code generation default to add UseInitArray so
that .init_array constructors are generated for ELF platforms.
- Integrating the ORCv2 Platforms into lli, and adding a
PlatformSupport implementation to the LLJIT instance used by lli which
implements initialization and deinitialization by calling the new
wrapper functions in the runtime.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D126492
Sunho Kim [Fri, 10 Jun 2022 04:46:31 +0000 (13:46 +0900)]
[JITLink][ELF][AArch64] Implement Procedure Linkage Table.
Implements Procedure Linkage Table (PLT) for ELF/AARCH64. The aarch64 linux calling convention also uses r16 as the intra-procedure-call scratch register same as MachO/ARM64. We can use the same stub sequence for this reason.
Also, BR regiseter doesn't touch X30 register. External function call by BL instruction (touched by CALL26 relocation) will set X30 to the original PC + 4, which is the intended behavior. External function call by B instruction (touched by JUMP26 relocation) doesn't requite to set X30, so the patch will be correct in this case too.
Reference: https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#611general-purpose-registers
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127061
owenca [Thu, 9 Jun 2022 10:37:03 +0000 (03:37 -0700)]
[clang-format][NFC] Remove unused FormatStyle members
Differential Revision: https://reviews.llvm.org/D127390
Jun Zhang [Fri, 10 Jun 2022 05:11:09 +0000 (13:11 +0800)]
Also move WeakRefReferences in CodeGenModule::moveLazyEmssionStates
I forgot this field in
b8f9459715815fa055b3e1c5f970c616797dfcfb
Signed-off-by: Jun Zhang <jun@junz.org>
Sunho Kim [Fri, 10 Jun 2022 04:34:24 +0000 (13:34 +0900)]
[ORC][AArch64] Add initial support for aarch64 in ELFNixPlatform.
Adds the aarch64 support in ELFNixPlatform. These are few simple changes, but it allows us to use the orc runtime in ELF/AARCH64 backend. It succesfully run the static initializers of stdlibc++ iostream so that "cout << Hello world" testcase starts to work.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D127060
chenglin.bi [Fri, 10 Jun 2022 03:36:39 +0000 (11:36 +0800)]
[InstCombine] Add negative vector tests for lshr+shl+and/shl+lshr+and transforms; NFC
chenglin.bi [Fri, 10 Jun 2022 03:00:30 +0000 (11:00 +0800)]
[InstCombine] Add baseline tests for lshr+shl+and transforms; NFC
lewuathe [Fri, 10 Jun 2022 02:42:01 +0000 (11:42 +0900)]
[mlir] fix typo in AttributesAndTypes doc
Sunho Kim [Fri, 10 Jun 2022 01:57:16 +0000 (10:57 +0900)]
[JITLink][ELF][AArch64] Implement R_AARCH64_JUMP26
Implements R_AARCH64_JUMP26. We can use the same generic aarch64 Branch26 edge since B instruction and BL nstruction have the same sized&offseted immediate field, and the relocation address calculation is the same.
Reference: ELF for the ARM ® 64-bit Architecture Tabel 4-10, ARM Architecture Reference Manual ® ARMv8, for ARMv8-A architecture profile C6.2.24, C6.2.31
Reviewed By: sgraenitz
Differential Revision: https://reviews.llvm.org/D127059
chenglin.bi [Fri, 10 Jun 2022 01:36:58 +0000 (09:36 +0800)]
[InstCombine] Optimize shl+lshr+and conversion pattern
if `C1` and `C3` are pow2 and `Log2(C3)+C2 < BitWidth`:
((C1 << X) >> C2) & C3 -> X == (Log2(C3)+C2-Log2(C1)) ? C3 : 0;
https://alive2.llvm.org/ce/z/Pus5bd
Fix issue https://github.com/llvm/llvm-project/issues/55739
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D126617
Sunho Kim [Thu, 9 Jun 2022 23:41:33 +0000 (08:41 +0900)]
[JITLink][AArch64] Fix overflow range of Page21 fixup edge.
Allowed range for Page21 relocation is -2^32 <= X < 2^32 in both ELF and MachO.
https://github.com/llvm/llvm-project/blob/
09c2b7c35af8c4bad39f03e9f60df8bd07323028/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h#L210 (MachO)
ELF for the ARM ® 64-bit Architecture (AArch64) Table 4-9 (ELF)
Reviewed By: sgraenitz
Differential Revision: https://reviews.llvm.org/D126387
Kirill Okhotnikov [Fri, 10 Jun 2022 01:14:10 +0000 (03:14 +0200)]
[libc][math] Separated builtin function in special FPUtils header.
A small refactoring of builtin functions in preparation to adding fmod/fmodf function.
Reviewed By: lntue
Differential Revision: https://reviews.llvm.org/D127088
Sam Clegg [Wed, 8 Jun 2022 18:48:38 +0000 (11:48 -0700)]
[lld][WebAssembly] Revert moving of data relocations to start function
Back in https://reviews.llvm.org/D117412 we moved the application of
data reloctions to the wasm start function.
However, because the dynamic linker doesn't know the final addresses
at module instantiation time, this proved to be too early and the
relocations could be applied with the wrong values.
Fixes: https://github.com/emscripten-core/emscripten/issues/17150
Differential Revision: https://reviews.llvm.org/D127333