Martin Storsjo [Wed, 9 May 2018 09:11:01 +0000 (09:11 +0000)]
Revert "[Driver] Use -fuse-line-directives by default in MSVC mode"
This reverts commit SVN r331666.
It was afterwards pointed out in https://reviews.llvm.org/D46520
that #line directives lose information about what parts come from a
system header. That means the result of -E usually won't compile,
since Windows headers are typically full of warnings and
default-error warnings.
llvm-svn: 331858
Krasimir Georgiev [Wed, 9 May 2018 09:02:11 +0000 (09:02 +0000)]
[clang-format] Respect BreakBeforeClosingBrace while calculating length
Summary:
This patch makes `getLengthToMatchingParen` respect the `BreakBeforeClosingBrace`
ParenState for matching scope closers. In order to distinguish between paren states
introduced by real vs. fake parens, I've added the token opening the ParensState
to that struct.
Reviewers: djasper
Reviewed By: djasper
Subscribers: klimek, cfe-commits
Differential Revision: https://reviews.llvm.org/D46519
llvm-svn: 331857
Simon Atanasyan [Wed, 9 May 2018 08:42:30 +0000 (08:42 +0000)]
[driver] Add mips_Features_Group to Options to improve documentation sorting
Move all of the MIPS-only options into a new m_mips_Features_Group.
Nearly all other targets have most target-specific options grouped,
but MIPS does not.
The primary benefits are that the options will be listed together (and
thus identifiable as MIPS-specific even if they have no help string) in
the ClangCommandLineReference, and that Options.td is a bit more organized.
A secondary benefit is that a custom version of clang can more easily
hide/disable groups of options for unsupported targets.
Patch by Vince Del Vecchio
Differential Revision: https://reviews.llvm.org/D46450
llvm-svn: 331856
Pavel Labath [Wed, 9 May 2018 08:21:25 +0000 (08:21 +0000)]
[DWARF] Align non-accelerated function fullname searching with the apple-tables path
Summary:
Before this patch the two paths were doing very different things
- the apple path searched the .apple_names section, which contained
mangled names, as well as basenames of all functions. It returned any
name it found.
- the non-accelerated path looked in the "full name" index we built
ourselves, which contained mangled as well as demangled names of all
functions (but no basenames). Then however, if it did not find a match
it did an extra search in the basename index, with some special
handling for anonymous namespaces.
This aligns the two paths by changing the non-accelerated path to return
the same results as in the apple-tables one. In pratice, this means we
will search in both the "basename", "method" and "fullname" indexes (in
the manual indexes these are separate indexes. This means the function
will return some slightly inappropriate results (e.g. bar::baz::foo when
one asks for a "full name" foo), but this can be handled by additional
filtering, independently indexing method. I've also stopped inserting
demangled names into the "fullname" index, as that is inconsistent with
the apple path.
Reviewers: clayborg, JDevlieghere
Subscribers: lldb-commits
Differential Revision: https://reviews.llvm.org/D46576
llvm-svn: 331855
Hans Wennborg [Wed, 9 May 2018 08:20:14 +0000 (08:20 +0000)]
Add a test for r331746.
Thanks to pcc for creating the test file!
llvm-svn: 331854
Shiva Chen [Wed, 9 May 2018 07:09:28 +0000 (07:09 +0000)]
[DebugInfo] Fix test failed due to debug-label-mi.ll and debug-label-opt.ll
Make these two test cases more generic for other architectures.
Please refer to '[DebugInfo] Convert intrinsic llvm.dbg.label to
MachineInstr.'
Patch by Hsiangkai Wang
llvm-svn: 331853
Bjorn Pettersson [Wed, 9 May 2018 06:52:12 +0000 (06:52 +0000)]
[MergedLoadStoreMotion] Fix a debug invariant bug in mergeStores
Summary:
MergedLoadStoreMotion::mergeStores is using some heuristics
to limit the amount of stores that it tries to sink (see
MagicCompileTimeControl in MergedLoadStoreMotion.cpp). The
heuristic involves counting the number of instructions in
one of the basic blocks that is part of the transformation.
We now ignore dbg intrinsics when counting instruction for
the MagicCompileTimeControl heuristic. This to make sure that
the amount of stores that are sunk doesn't depend on the amount
of debug information (if -g is used or not).
Reviewers: Gerolf, davide, majnemer
Reviewed By: davide
Subscribers: dberlin, bjope, aprantl, JDevlieghere, llvm-commits
Differential Revision: https://reviews.llvm.org/D46600
llvm-svn: 331852
Simon Atanasyan [Wed, 9 May 2018 06:51:58 +0000 (06:51 +0000)]
[ELF][MIPS] Add test case to cover LA25 r6 thunks generation. NFC
llvm-svn: 331851
Robert Widmann [Wed, 9 May 2018 06:45:28 +0000 (06:45 +0000)]
[LLVM-C] Correct types in Go bindings
Summary: Fixes a test failure introduced in rL331114.
Reviewers: whitequark
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46631
llvm-svn: 331850
David Bolvansky [Wed, 9 May 2018 06:34:20 +0000 (06:34 +0000)]
[InstCombine] snprintf optimizations
Reviewers: spatel, efriedma, majnemer, rja
Reviewed By: rja
Subscribers: rja, llvm-commits
Differential Revision: https://reviews.llvm.org/D46285
llvm-svn: 331849
Shiva Chen [Wed, 9 May 2018 06:22:39 +0000 (06:22 +0000)]
[DebugInfo] Fix test failed due to new DISubprogram attributes.
Please refer to '[DebugInfo] Add DILabel metadata and intrinsic
llvm.dbg.label'. I have renamed the 'variables' attributes to
'retainedNodes' to include local variables and local labels for the
function.
Patch by Hsiangkai Wang.
llvm-svn: 331848
Craig Topper [Wed, 9 May 2018 06:07:20 +0000 (06:07 +0000)]
[X86] Combine (vXi1 (bitcast (-1)))) and (vXi1 (bitcast (0))) to all ones or all zeros vXi1 vector.
llvm-svn: 331847
Daniel Sanders [Wed, 9 May 2018 05:00:17 +0000 (05:00 +0000)]
Revert r331816 and r331820 - [globalisel] Add a combiner helpers for extending loads and use them in a pre-legalize combiner for AArch64
Reverting this to see if the clang-cmake-aarch64-global-isel and
clang-cmake-aarch64-quick bots are failing because of this commit.
We know it wasn't r331819.
llvm-svn: 331846
JF Bastien [Wed, 9 May 2018 03:51:12 +0000 (03:51 +0000)]
_Atomic of empty struct shouldn't assert
Summary:
An _Atomic of an empty struct is pretty silly. In general we just widen empty
structs to hold a byte's worth of storage, and we represent size and alignment
as 0 internally and let LLVM figure out what to do. For _Atomic it's a bit
different: the memory model mandates concrete effects occur when atomic
operations occur, so in most cases actual instructions need to get emitted. It's
really not worth trying to optimize empty struct atomics by figuring out e.g.
that a fence would do, even though sane compilers should do optimize atomics.
Further, wg21.link/p0528 will fix C++20 atomics with padding bits so that
cmpxchg on them works, which means that we'll likely need to do the zero-init
song and dance for empty atomic structs anyways (and I think we shouldn't
special-case this behavior to C++20 because prior standards are just broken).
This patch therefore makes a minor change to r176658 "Promote atomic type sizes
up to a power of two": if the width of the atomic's value type is 0, just use 1
byte for width and leave alignment as-is (since it should never be zero, and
over-aligned zero-width structs are weird but fine).
This fixes an assertion:
(NumBits >= MIN_INT_BITS && "bitwidth too small"), function get, file ../lib/IR/Type.cpp, line 241.
It seems like this has run into other assertions before (namely the unreachable
Kind check in ImpCastExprToType), but I haven't reproduced that issue with
tip-of-tree.
<rdar://problem/
39678063>
Reviewers: arphaman, rjmccall
Subscribers: aheejin, cfe-commits
Differential Revision: https://reviews.llvm.org/D46613
llvm-svn: 331845
Shiva Chen [Wed, 9 May 2018 02:42:00 +0000 (02:42 +0000)]
[DebugInfo] Examine all uses of isDebugValue() for debug instructions.
Because we create a new kind of debug instruction, DBG_LABEL, we need to
check all passes which use isDebugValue() to check MachineInstr is debug
instruction or not. When expelling debug instructions, we should expel
both DBG_VALUE and DBG_LABEL. So, I create a new function,
isDebugInstr(), in MachineInstr to check whether the MachineInstr is
debug instruction or not.
This patch has no new test case. I have run regression test and there is
no difference in regression test.
Differential Revision: https://reviews.llvm.org/D45342
Patch by Hsiangkai Wang.
llvm-svn: 331844
Shiva Chen [Wed, 9 May 2018 02:41:56 +0000 (02:41 +0000)]
[DebugInfo] Generate debug information for labels.
Generate DILabel metadata and call llvm.dbg.label after label
statement to associate the metadata with the label.
Differential Revision: https://reviews.llvm.org/D45045
Patch by Hsiangkai Wang.
llvm-svn: 331843
Shiva Chen [Wed, 9 May 2018 02:41:08 +0000 (02:41 +0000)]
[DebugInfo] Convert intrinsic llvm.dbg.label to MachineInstr.
In order to convert LLVM IR to MachineInstr, we need a new TargetOpcode,
DBG_LABEL, to ‘lower’ intrinsic llvm.dbg.label. The patch
creates this new TargetOpcode and convert intrinsic llvm.dbg.label to
MachineInstr through SelectionDAG.
In SelectionDAG, debug information is stored in SDDbgInfo. We create a
new data member of SDDbgInfo for labels and use the new data member,
SDDbgLabel, to create DBG_LABEL MachineInstr.
The new DBG_LABEL MachineInstr uses label metadata from LLVM IR as its
parameter. So, the backend could get metadata information of labels from
DBG_LABEL MachineInstr.
Differential Revision: https://reviews.llvm.org/D45341
Patch by Hsiangkai Wang.
llvm-svn: 331842
Shiva Chen [Wed, 9 May 2018 02:40:45 +0000 (02:40 +0000)]
[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.
In order to set breakpoints on labels and list source code around
labels, we need collect debug information for labels, i.e., label
name, the function label belong, line number in the file, and the
address label located. In order to keep these information in LLVM
IR and to allow backend to generate debug information correctly.
We create a new kind of metadata for labels, DILabel. The format
of DILabel is
!DILabel(scope: !1, name: "foo", file: !2, line: 3)
We hope to keep debug information as much as possible even the
code is optimized. So, we create a new kind of intrinsic for label
metadata to avoid the metadata is eliminated with basic block.
The intrinsic will keep existing if we keep it from optimized out.
The format of the intrinsic is
llvm.dbg.label(metadata !1)
It has only one argument, that is the DILabel metadata. The
intrinsic will follow the label immediately. Backend could get the
label metadata through the intrinsic's parameter.
We also create DIBuilder API for labels to be used by Frontend.
Frontend could use createLabel() to allocate DILabel objects, and use
insertLabel() to insert llvm.dbg.label intrinsic in LLVM IR.
Differential Revision: https://reviews.llvm.org/D45024
Patch by Hsiangkai Wang.
llvm-svn: 331841
Sean Fertile [Wed, 9 May 2018 02:07:53 +0000 (02:07 +0000)]
[PPC64] Add lazy symbol resolution stubs.
Adds support for .glink resolver stubs from the example implementation in the V2
ABI (Section 4.2.5.3. Procedure Linkage Table). The stubs are written to the
PltSection, and the sections are renamed to match the PPC64 ABI:
.got.plt --> .plt Type = SHT_NOBITS
.plt --> .glink
And adds the DT_PPC64_GLINK dynamic tag to the dynamic section when the plt is
not empty.
Differential Revision: https://reviews.llvm.org/D45642
llvm-svn: 331840
Roman Tereshin [Wed, 9 May 2018 01:43:12 +0000 (01:43 +0000)]
Revert r331819 [GlobalISel][Legalizer] More concise and faster widenScalar, NFC
Reverting this to see if the clang-cmake-aarch64-global-isel and
clang-cmake-aarch64-quick bots are failing because of this commit
llvm-svn: 331839
Lang Hames [Wed, 9 May 2018 01:38:13 +0000 (01:38 +0000)]
[RuntimeDyld][MachO] Properly handle thumb to thumb calls within a section.
Previously thumb bits were only checked for external relocations (thumb to arm
code and vice-versa). This patch adds detection for thumb callees in the same
section asthe (also thumb) caller.
The MachO/Thumb test case is updated to cover this, and redundant checks
(handled by the MachO/ARM test) are removed.
llvm-svn: 331838
Nico Weber [Wed, 9 May 2018 01:15:38 +0000 (01:15 +0000)]
Make CMakeLists.txt formatting more consistent with the rest of LLVM.
llvm-svn: 331837
Nico Weber [Wed, 9 May 2018 01:15:06 +0000 (01:15 +0000)]
fix path to llvm-cfi-verify unittests in docs
llvm-svn: 331836
Nico Weber [Wed, 9 May 2018 01:07:02 +0000 (01:07 +0000)]
Make llvm-cfi-verify CMakeLists.txt formatting more consistent with the rest of LLVM.
llvm-svn: 331835
Adrian Prantl [Wed, 9 May 2018 01:00:01 +0000 (01:00 +0000)]
Remove \brief commands from doxygen comments.
This is similar to the LLVM change https://reviews.llvm.org/D46290.
We've been running doxygen with the autobrief option for a couple of
years now. This makes the \brief markers into our comments
redundant. Since they are a visual distraction and we don't want to
encourage more \brief markers in new code either, this patch removes
them all.
Patch produced by
for i in $(git grep -l '\@brief'); do perl -pi -e 's/\@brief //g' $i & done
for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done
Differential Revision: https://reviews.llvm.org/D46320
llvm-svn: 331834
Petr Hosek [Wed, 9 May 2018 00:58:12 +0000 (00:58 +0000)]
Set CMAKE_BUILD_WITH_INSTALL_RPATH for Fuchsia runtimes
This doesn't make any difference since we don't use RPATH/RUNPATH
on Fuchsia but it avoids the CMake error when re-linking libraries
while building with Ninja.
Differntial Revision: https://reviews.llvm.org/D46610
llvm-svn: 331833
Heejin Ahn [Wed, 9 May 2018 00:53:50 +0000 (00:53 +0000)]
Support a funclet operand bundle in LowerInvoke
Summary:
The current LowerInvoke pass cannot handle invoke instructions with a
funclet bundle operand. The order of operands for an invoke instruction
is {call arguments, callee, funclet operand (if any), normal dest,
unwind dest}. The current code assumes there is no funclet operand and
incorrectly includes a funclet operand into call arguments.
Reviewers: rnk
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46242
llvm-svn: 331832
Vitaly Buka [Wed, 9 May 2018 00:44:26 +0000 (00:44 +0000)]
[sanitizer] Remove unneeded blank lines
llvm-svn: 331831
Nico Weber [Wed, 9 May 2018 00:42:17 +0000 (00:42 +0000)]
Inline contents of LLVM_XRAY_TOOLS variable into its only use.
No behavior change.
https://reviews.llvm.org/D46402
llvm-svn: 331830
Vitaly Buka [Wed, 9 May 2018 00:41:53 +0000 (00:41 +0000)]
[sanitizer] Update .clang-format in compiler-rt
Historically style is Google, but we never used AllowShortIfStatementsOnASingleLine.
llvm-svn: 331829
Sriraman Tallam [Wed, 9 May 2018 00:20:45 +0000 (00:20 +0000)]
Fix test by adding -triple=x86_64-unknown-linux
llvm-svn: 331828
Petr Hosek [Wed, 9 May 2018 00:07:42 +0000 (00:07 +0000)]
[CMake] Use CMAKE_OBJCOPY and CMAKE_STRIP to externalize debug info
Don't hardcode objcopy and strip names, rather use CMAKE_OBJCOPY and
CMAKE_STRIP variables which allows users to override the tools used
such as using llvm-objcopy and llvm-strip instead of binutils versions.
Differential Revision: https://reviews.llvm.org/D46611
llvm-svn: 331827
Petr Hosek [Wed, 9 May 2018 00:05:28 +0000 (00:05 +0000)]
[CMake] Include llvm-strip in Fuchsia toolchain distribution
Now that llvm-strip is available, include it in the Fuchsia toolchain.
Differential Revision: https://reviews.llvm.org/D46612
llvm-svn: 331826
Matt Morehouse [Tue, 8 May 2018 23:45:05 +0000 (23:45 +0000)]
[libFuzzer] Guard symbolization with try-lock.
Summary:
When out-of-memory or timeout occurs, threads can be stopped during
symbolization, thereby causing a deadlock when the OOM/TO handlers
attempt symbolization. We avoid this deadlock by skipping symbolization
if another thread is symbolizing.
Reviewers: kcc
Reviewed By: kcc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46605
llvm-svn: 331825
Davide Italiano [Tue, 8 May 2018 23:28:15 +0000 (23:28 +0000)]
[SimplifyCFG] Fix a crash when folding PHIs.
We enter MergeBlockIntoPredecessor with a block looking like this:
for.inc.us-lcssa: ; preds = %cond.end
%k.1.lcssa.ph = phi i32 [ %conv15, %cond.end ]
%t.3.lcssa.ph = phi i32 [ %k.1.lcssa.ph, %cond.end ]
br label %for.inc, !dbg !66
[note the first arg of the PHI being a PHI].
FoldSingleEntryPHINodes gets rid of both PHIs (calling, eraseFromParent).
But right before we call the function, we push into IncomingValues the
only argument of the PHIs, and shortly after we try to iterate over
something which has been invalidated before :(
The fix its not trying to remove PHIs which have an incoming value
coming from the same BB we're looking at.
Fixes PR37300 and rdar://problem/
39910460
Differential Revision: https://reviews.llvm.org/D46568
llvm-svn: 331824
Sriraman Tallam [Tue, 8 May 2018 23:19:50 +0000 (23:19 +0000)]
New option -z keep-text-section-prefix to keep text sections with prefixes separate.
Separate output sections for selected text section prefixes to enable TLB optimizations and for readablilty.
Differential Revision: https://reviews.llvm.org/D45841
llvm-svn: 331823
Roman Lebedev [Tue, 8 May 2018 23:15:58 +0000 (23:15 +0000)]
Partially revert r331456: [clang-tidy] Remove AnalyzeTemporaryDtors option.
That broke every single .clang-tidy config out there
which happened to specify AnalyzeTemporaryDtors option:
YAML:5:24: error: unknown key 'AnalyzeTemporaryDtors'
AnalyzeTemporaryDtors: false
^~~~~
Error parsing <...>/.clang-tidy: Invalid argument
More so, that error isn't actually a error, the
clang-tidy does not exit with $? != 0, it continues
with the default config.
Surely this breakage isn't the intended behavior.
But if it is, feel free to revert this commit.
llvm-svn: 331822
Peter Collingbourne [Tue, 8 May 2018 22:59:05 +0000 (22:59 +0000)]
MC: Remove dead code. NFCI.
We should never emit an SHT_DYNSYM into an object file.
llvm-svn: 331821
Daniel Sanders [Tue, 8 May 2018 22:58:35 +0000 (22:58 +0000)]
[globalisel] Correct r331816 to check the opcode before calling getOperand().
Fix a silly mistake in my pre-commit changes for r331816. It should check what
opcode the insn is before extracting the operands.
NFC at the moment since the caller already checked the opcode.
llvm-svn: 331820
Roman Tereshin [Tue, 8 May 2018 22:53:09 +0000 (22:53 +0000)]
[GlobalISel][Legalizer] More concise and faster widenScalar, NFC
Refactoring LegalizerHelper::widenScalar member function reducing its
size by approximately a factor of 2 and (hopefuly) making it more
straightforward and regular by introducing widenScalarSrc and
widenScalarDst helper methods.
The new widenScalar* methods mutate the instructions in place instead
of recreating them from scratch and removing the originals. The
compile time implications of this were measured on sqlite3
amalgamation, targeting AArch64 in -O0:
LegalizerHelper::widenScalar: > 25% faster
Legalizer::runOnMachineFunction: ~ 4.0 - 4.5% faster
Also adding MachineOperand::setCImm and refactoring out
MachineIRBuilder::recordInsertion methods to make the change possible.
Reviewers: aditya_nandakumar, bogner, javed.absar, t.p.northover, ab, dsanders, arsenm
Reviewed By: aditya_nandakumar
Subscribers: wdng, rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D46414
llvm-svn: 331819
Volodymyr Sapsai [Tue, 8 May 2018 22:50:35 +0000 (22:50 +0000)]
Revert "Emit an error when mixing <stdatomic.h> and <atomic>"
It reverts commit r331379 because turned out `__ALLOW_STDC_ATOMICS_IN_CXX__`
doesn't work well in practice.
llvm-svn: 331818
Rumeet Dhindsa [Tue, 8 May 2018 22:37:57 +0000 (22:37 +0000)]
Add support for LTO plugin option obj-path
Differential Revision: https://reviews.llvm.org/D46598
llvm-svn: 331817
Daniel Sanders [Tue, 8 May 2018 22:26:39 +0000 (22:26 +0000)]
[globalisel] Add a combiner helpers for extending loads and use them in a pre-legalize combiner for AArch64
Summary: Depends on D45541
Reviewers: ab, aditya_nandakumar, bogner, rtereshin, volkan, rovka, javed.absar, aemerson
Reviewed By: aemerson
Subscribers: aemerson, rengolin, mgorny, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D45543
llvm-svn: 331816
Craig Topper [Tue, 8 May 2018 22:01:43 +0000 (22:01 +0000)]
[X86] Mark builtins 'const' where possible
I attempted to go through all the builtins and marked them const if they didn't touch memory or other hidden state.
I don't know how to test this or if it really matters.
Differential Revision: https://reviews.llvm.org/D46349
llvm-svn: 331814
Jessica Paquette [Tue, 8 May 2018 22:00:57 +0000 (22:00 +0000)]
Revert "[X86][CET] Shadow stack fix for setjmp/longjmp"
This reverts commit
30962eca38ef02666ebcdded72a94f2cd0292d68.
This commit has been causing test asan failures on a build bot.
http://green.lab.llvm.org/green/job/clang-stage1-configure-RA/45108/
Original commit: https://reviews.llvm.org/D46181
llvm-svn: 331813
Erich Keane [Tue, 8 May 2018 21:26:21 +0000 (21:26 +0000)]
Fix float->int conversion warnings when near barriers.
As Eli brought up here: https://reviews.llvm.org/D46535
I'd previously messed up this fix by missing conversions
that are just slightly outside the range. This patch fixes
this by no longer ignoring the return value of
convertToInteger. Additionally, one of the error messages
wasn't very sensical (mentioning out of range value, when it
really was not), so it was cleaned up as well.
llvm-svn: 331812
Yaxun Liu [Tue, 8 May 2018 21:02:12 +0000 (21:02 +0000)]
[HIP] Add hip offload kind
There are quite differences in HIP action builder and action job creation,
which justifies to define a separate offload kind.
Differential Revision: https://reviews.llvm.org/D46471
llvm-svn: 331811
Jessica Paquette [Tue, 8 May 2018 20:58:32 +0000 (20:58 +0000)]
Add a mno-outline flag to disable the MachineOutliner
Since we're working on turning the MachineOutliner by default under -Oz for
AArch64, it makes sense to have an -mno-outline flag available. This currently
doesn't do much (it basically just undoes -moutline).
When the MachineOutliner is on by default under AArch64, this flag should
set -mllvm -enable-machine-outliner=never.
llvm-svn: 331810
Martin Storsjo [Tue, 8 May 2018 20:56:04 +0000 (20:56 +0000)]
[AsmPrinter] Allow emitting codeview for any windows target
Before SVN r244158, codeview debug info was emitted always
emitted for msvc if debug info was enabled, but that commit
added a module flag.
Since it's still restricted by the flag, we can allow it
for any target if the user requests it, not only msvc (and
windows-itanium, added in SVN r287567).
Add a test for emitting it for a mingw target.
Differential Revision: https://reviews.llvm.org/D46303
llvm-svn: 331809
Martin Storsjo [Tue, 8 May 2018 20:55:58 +0000 (20:55 +0000)]
[llvm-rc] Add support for all missing dialog controls
Differential Revision: https://reviews.llvm.org/D46507
llvm-svn: 331808
Martin Storsjo [Tue, 8 May 2018 20:55:23 +0000 (20:55 +0000)]
[Driver] Don't add -dwarf-column-info when using -gcodeview on non-msvc targets
-dwarf-column-info is omitted if -gcodeview is specified for msvc
targets at the moment, but since -gcodeview is an option that can be
specified for any target, there's little reason to restrict this
handling to msvc targets.
This allows getting proper codeview debug info by passing -gcodeview
for e.g. MinGW targets as well.
Differential Revision: https://reviews.llvm.org/D46287
llvm-svn: 331807
Jessica Paquette [Tue, 8 May 2018 20:53:19 +0000 (20:53 +0000)]
Change -foutline to -moutline
Nitpicky, but the MachineOutliner is a machine-level pass, and so we should
reflect that by using "m" instead of "n".
Figured we should get this in before people get used to the letter f. :)
llvm-svn: 331806
Simon Pilgrim [Tue, 8 May 2018 20:24:45 +0000 (20:24 +0000)]
Fix Wdocumentation warning. NFCI.
llvm-svn: 331805
Rumeet Dhindsa [Tue, 8 May 2018 20:12:07 +0000 (20:12 +0000)]
Update ThinLTO Indexing logic
Instead of writing empty index for file, this patch tracks the state of files in ObjectToIndexFileState. If the files are not indexed , only then we emit the empty files
Differential Revision: https://reviews.llvm.org/D46480
llvm-svn: 331803
Stephane Sezer [Tue, 8 May 2018 19:46:29 +0000 (19:46 +0000)]
Add missing newlines to cl::extrahelp uses
llvm-svn: 331802
Max Moroz [Tue, 8 May 2018 19:26:51 +0000 (19:26 +0000)]
[Coverage] Take filenames into account when loading function records.
Summary:
Don't skip functions with the same name but from different files.
That change makes it possible to generate code coverage reports from
different binaries compiled from different sources even if there are functions
with non-unique names. Without that change, code coverage for such functions is
missing except of the first function processed.
Reviewers: vsk, morehouse
Reviewed By: vsk
Subscribers: llvm-commits, kcc
Differential Revision: https://reviews.llvm.org/D46478
llvm-svn: 331801
Daniel Neilson [Tue, 8 May 2018 19:08:12 +0000 (19:08 +0000)]
Changing constants in a test (NFC)
Summary:
Changing the lengths of the atomic memory intrinsics in a test to make sure
that they don't get lowered into loads/stores if/when expansion of these
occurs in selectiondag.
llvm-svn: 331800
Hideki Saito [Tue, 8 May 2018 18:57:34 +0000 (18:57 +0000)]
[LV] Fix for PR37248, Broadcast codegen incorrectly assumed vector loop body is single basic block
Summary:
Broadcast code generation emitted instructions in pre-header, while the instruction they are dependent on in the vector loop body.
This resulted in an IL verification error ---- value used before defined.
Reviewers: rengolin, fhahn, hfinkel
Reviewed By: rengolin, fhahn
Subscribers: dcaballe, Ka-Ka, llvm-commits
Differential Revision: https://reviews.llvm.org/D46302
llvm-svn: 331799
Tim Renouf [Tue, 8 May 2018 18:53:04 +0000 (18:53 +0000)]
[AMDGPU] Provide machine -> name mapping
Summary:
AMDGPU stores a numerical code for the particular GPU variant in EFlags
in the ELF file. This commit provides a mapping from that number into
the machine name for use by objdump-type tools.
Change-Id: Id37fc0bebad443bd89c0080985ce298c4e7e9319
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D46587
llvm-svn: 331798
Lei Huang [Tue, 8 May 2018 18:52:06 +0000 (18:52 +0000)]
[Power9]Legalize and emit code for truncate and convert QP to HW and Byte
Legalize and emit code for truncate and convert float128 to (un)signed short
and (un)signed char.
Differential Revision: https://reviews.llvm.org/D46194
llvm-svn: 331797
Matt Arsenault [Tue, 8 May 2018 18:43:44 +0000 (18:43 +0000)]
AMDGPU: Fix broken check lines in test
llvm-svn: 331796
Matt Arsenault [Tue, 8 May 2018 18:43:34 +0000 (18:43 +0000)]
AMDGPU: Don't use undef in a test
llvm-svn: 331795
Stephane Sezer [Tue, 8 May 2018 18:43:27 +0000 (18:43 +0000)]
[docs] Fix a typo in KaleidoscopeJIT tutorial
Summary: Just a missing end quote.
Reviewers: lhames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46136
llvm-svn: 331794
Matt Arsenault [Tue, 8 May 2018 18:43:25 +0000 (18:43 +0000)]
AMDGPU: Fix broken dynamic vector indexing for packed types
The intention of this was to multiply by 16, not shift by 16.
llvm-svn: 331793
Matt Arsenault [Tue, 8 May 2018 18:43:05 +0000 (18:43 +0000)]
DAG: Use correct shift width type
llvm-svn: 331792
Vitaly Buka [Tue, 8 May 2018 18:35:11 +0000 (18:35 +0000)]
[sanitizer] Read file to InternalMmapVectorNoCtor
llvm-svn: 331791
Lei Huang [Tue, 8 May 2018 18:34:00 +0000 (18:34 +0000)]
[Power9]Legalize and emit code for truncate and convert Quad-Precision to Word
Legalize and emit code for:
* xscvqpswz : VSX Scalar truncate & Convert Quad-Precision to Signed Word
* xscvqpuwz : VSX Scalar truncate & Convert Quad-Precision to Unsigned Word
Differential Revision: https://reviews.llvm.org/D45635
llvm-svn: 331790
Vitaly Buka [Tue, 8 May 2018 18:32:53 +0000 (18:32 +0000)]
[sanitizer] Close fd on ReadFromFile error
llvm-svn: 331789
Changpeng Fang [Tue, 8 May 2018 18:32:35 +0000 (18:32 +0000)]
AMDGPU: Use eraseFromParent to delete am instruction when it is no longer needed.
Reviewer: Nicolai
Differential Revision:
https://reviews.llvm.org/D46438
llvm-svn: 331788
Lei Huang [Tue, 8 May 2018 18:23:31 +0000 (18:23 +0000)]
[Power9]Legalize and emit code for truncate and convert QP to DW
Legalize and emit code for:
* xscvqpsdz : VSX Scalar truncate & Convert Quad-Precision to Signed Dword
* xscvqpudz : VSX Scalar truncate & Convert Quad-Precision to Unsigned Dword
Differential Revision: https://reviews.llvm.org/D45553
llvm-svn: 331787
Zachary Turner [Tue, 8 May 2018 18:20:10 +0000 (18:20 +0000)]
[lit] Fix running tests that require 'examples'.
Differential Revision: https://reviews.llvm.org/D46514
Patch by Nikolai Kosjar.
llvm-svn: 331786
Vitaly Buka [Tue, 8 May 2018 17:59:44 +0000 (17:59 +0000)]
[sanitizer] Fix InternalMmapVectorNoCtor reserve and resize
Remap on reserve of more than the current size.
Don't remap on downsize.
llvm-svn: 331784
Guozhi Wei [Tue, 8 May 2018 17:58:32 +0000 (17:58 +0000)]
[CodeGenPrepare] Move Extension Instructions Through Logical And Shift Instructions
CodeGenPrepare pass move extension instructions close to load instructions in different BB, so they can be combined later. But the extension instructions can't move through logical and shift instructions in current implementation. This patch enables this enhancement, so we can eliminate more extension instructions.
Differential Revision: https://reviews.llvm.org/D45537
llvm-svn: 331783
Rui Ueyama [Tue, 8 May 2018 17:50:54 +0000 (17:50 +0000)]
Refactor BitcodeCompiler::add(). NFC.
This change makes it explicit that the main loop iterates over a
parallel array, Syms and ObjSyms.
llvm-svn: 331780
Rui Ueyama [Tue, 8 May 2018 17:50:43 +0000 (17:50 +0000)]
Fix a bug that a copy of a large vector was created. NFC.
llvm-svn: 331779
Lei Huang [Tue, 8 May 2018 17:36:40 +0000 (17:36 +0000)]
[PowerPC] Unify handling for conversion of FP_TO_INT feeding a store
Existing DAG combine only handles conversions for FP_TO_SINT:
"{f32, f64} x { i32, i16 }"
This patch simplifies the code to handle:
"{ FP_TO_SINT, FP_TO_UINT } x { f64, f32 } x { i64, i32, i16, i8 }"
Differential Revision: https://reviews.llvm.org/D46102
llvm-svn: 331778
Greg Clayton [Tue, 8 May 2018 17:19:24 +0000 (17:19 +0000)]
Add support to object files for accessing the .debug_types section
In an effort to make the .debug_types patch smaller, breaking out the part that reads the .debug_types from object files into a separate patch
Differential Revision: https://reviews.llvm.org/D46529
llvm-svn: 331777
Alexander Shaposhnikov [Tue, 8 May 2018 17:12:54 +0000 (17:12 +0000)]
[llvm-objcopy] Fix exit code
Set the exit code to 1 if no arguments are specified.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D46547
llvm-svn: 331776
Stanislav Mekhanoshin [Tue, 8 May 2018 16:53:02 +0000 (16:53 +0000)]
[AMDGPU] Added checks for dpp_ctrl value
- Report error for invalid dpp_ctrl values.
- Changed the way it is reported, now the error will be emitted into
asm and will work with release build as well.
- Added dpp_ctrl value verifier for codegen.
- Added symbolic constants for dpp_ctrl.
Differential Revision: https://reviews.llvm.org/D46565
llvm-svn: 331775
Simon Atanasyan [Tue, 8 May 2018 16:11:40 +0000 (16:11 +0000)]
[ELF][MIPS] Fix test case in attempt to restore Windows build-bot. NFC
llvm-svn: 331774
Simon Pilgrim [Tue, 8 May 2018 15:55:14 +0000 (15:55 +0000)]
[X86] Tag PCONFIG instruction with WriteSystem scheduler class
llvm-svn: 331773
Simon Atanasyan [Tue, 8 May 2018 15:34:06 +0000 (15:34 +0000)]
[ELF][MIPS] Fix calculation of GP relative relocations in case of relocatable output
Some MIPS relocations depend on "gp" value. By default, this value has
0x7ff0 offset from a .got section. But relocatable files produced by a
compiler or a linker might redefine this default value and we have to
use it for a calculation of the relocation result. When we generate EXE
or DSO it's trivial. Generating a relocatable output is more difficult
case because the linker does calculate relocations in this case and
cannot store individual "gp" values used by each input object file.
As a workaround we add the "gp" value to the relocation addend.
This fixes https://llvm.org/pr31149
Differential revision: https://reviews.llvm.org/D45972
llvm-svn: 331772
Stefan Maksimovic [Tue, 8 May 2018 15:12:29 +0000 (15:12 +0000)]
[mips][msa] Pattern match the splat.d instruction
Introduced a new pattern for matching splat.d explicitly.
Both splat.d and splati.d can now be generated from the @llvm.mips.splat.d
intrinsic depending on whether an immediate value has been passed.
Differential Revision: https://reviews.llvm.org/D45683
llvm-svn: 331771
Simon Pilgrim [Tue, 8 May 2018 14:55:16 +0000 (14:55 +0000)]
[X86] Split off WriteIMul64 from WriteIMul schedule class (PR36931)
This fixes a couple of BtVer2 missing instructions that weren't been handled in the override.
NOTE: There are still a lot of overrides that still need cleaning up!
llvm-svn: 331770
Simon Pilgrim [Tue, 8 May 2018 14:20:25 +0000 (14:20 +0000)]
[llvm][x86] SandyBridge/IvyBridge don't support BMI1/BMI2
llvm-svn: 331769
Alexey Bataev [Tue, 8 May 2018 14:16:57 +0000 (14:16 +0000)]
[OPENMP, NVPTX] Fix linkage of the global entries.
The linkage of the global entries must be weak to enable support of
redefinition of the same target regions in multiple compilation units.
llvm-svn: 331768
Simon Pilgrim [Tue, 8 May 2018 13:51:45 +0000 (13:51 +0000)]
[X86] Split WriteIDiv into div/idiv 8/16/32/64 implementations (PR36930)
I've created the necessary classes but there are still a lot of overrides that need cleaning up.
NOTE: The Znver1 model was missing some div/idiv variants in the instregex patterns and wasn't setting the resource cycles at all in the overrides.
llvm-svn: 331767
Sven van Haastregt [Tue, 8 May 2018 13:47:43 +0000 (13:47 +0000)]
[OpenCL] Factor out language version printing
Generate a printable OpenCL language version number in a single place
and select between the OpenCL C or OpenCL C++ version accordingly.
Differential Revision: https://reviews.llvm.org/D46382
llvm-svn: 331766
Simon Pilgrim [Tue, 8 May 2018 13:30:58 +0000 (13:30 +0000)]
[llvm-mca][x86] Add div/idiv, mul/imul and inc/dec/neg/nop instruction tests
llvm-svn: 331765
Jonas Devlieghere [Tue, 8 May 2018 13:28:34 +0000 (13:28 +0000)]
[test] Re-enable TestUnicodeSymbols
Re-enable TestUnicodeSymbols now that we use the in-tree dsymutil. This
was disabled because the hashing of unicode symbols was out of sync
between llvm (dsymutil) and lldb.
llvm-svn: 331764
Roman Lebedev [Tue, 8 May 2018 13:14:21 +0000 (13:14 +0000)]
[clang-tidy] Profile is a per-AST (per-TU) data.
Summary:
As discussed in D45931, currently, profiling output of clang-tidy is somewhat not great.
It outputs one profile at the end of the execution, and that profile contains the data
from the last TU that was processed. So if the tool run on multiple TU's, the data is
not accumulated, it is simply discarded.
It would be nice to improve this.
This differential is the first step - make this profiling info per-TU,
and output it after the tool has finished processing each TU.
In particular, when `ClangTidyASTConsumer` destructor runs.
Next step will be to add a CSV (JSON?) printer to store said profiles under user-specified directory prefix.
Reviewers: alexfh, sbenza
Reviewed By: alexfh
Subscribers: Eugene.Zelenko, mgorny, xazax.hun, mgrang, klimek, cfe-commits
Tags: #clang-tools-extra
Differential Revision: https://reviews.llvm.org/D46504
llvm-svn: 331763
Aleksei Sidorin [Tue, 8 May 2018 12:45:21 +0000 (12:45 +0000)]
[ASTImporter] Properly import SourceLocations of Attrs
Patch by Rafael Stahl!
Differential Revision: https://reviews.llvm.org/D46115
llvm-svn: 331762
Martin Storsjo [Tue, 8 May 2018 12:33:54 +0000 (12:33 +0000)]
[llvm-rc] Update a stale comment. NFC.
The tokenizer handles comments since SVN r315207.
llvm-svn: 331761
Simon Pilgrim [Tue, 8 May 2018 12:17:55 +0000 (12:17 +0000)]
[X86] Add vector masked load/store scheduler classes (PR32857)
Split off from existing vector load/store classes to remove InstRW overrides.
llvm-svn: 331760
Gabor Horvath [Tue, 8 May 2018 11:53:32 +0000 (11:53 +0000)]
[ASTMatchers] Overload isConstexpr for ifStmts
Differential Revision: https://reviews.llvm.org/D46233
llvm-svn: 331759
Sander de Smalen [Tue, 8 May 2018 10:46:55 +0000 (10:46 +0000)]
[AArch64][SVE] Asm: Support for LD1R load-and-replicate scalar instructions.
Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, javed.absar
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D46251
llvm-svn: 331758
Simon Pilgrim [Tue, 8 May 2018 10:28:03 +0000 (10:28 +0000)]
[X86] Add SchedWriteFTest/SchedWriteVecTest TEST scheduler classes
Split off from SchedWriteVecLogic to remove InstRW overrides.
llvm-svn: 331757
Simon Dardis [Tue, 8 May 2018 10:16:21 +0000 (10:16 +0000)]
[mips] Mark various memory instructions as being in microMIPS (NFC)
Reviewers: atanasyan, abeserminji, smaksimovic
Differential Revision: https://reviews.llvm.org/D46388
llvm-svn: 331756
Sander de Smalen [Tue, 8 May 2018 10:01:04 +0000 (10:01 +0000)]
[AArch64] Disallow vector operand if FPR128 Q register is required.
Patch https://reviews.llvm.org/D41445 changed the behaviour of 'isReg()'
to also return 'true' if the parsed register operand is a vector
register. Code in the AsmMatcher checks if a register is a subclass of the
expected register class. However, even though both parsed registers map
to the same physical register, the 'v' register is of kind 'NeonVector',
where 'q' is of type Scalar, where isSubclass() does not distinguish
between the two cases.
The solution is to use an AsmOperand instead of the register directly,
and use the PredicateMethod to distinguish the two operands.
This fixes for example:
ldr v0, [x0] // 'v0' is an invalid operand for this instruction
ldr q0, [x0] // valid
Reviewers: aemerson, Gerolf, SjoerdMeijer, javed.absar
Reviewed By: aemerson
Differential Revision: https://reviews.llvm.org/D46310
llvm-svn: 331755
Simon Dardis [Tue, 8 May 2018 09:50:37 +0000 (09:50 +0000)]
[mips] Correct clo/clz predicates
Reviewers: smaksimovic, abeserminji, atanasyan
Differential Revision: https://reviews.llvm.org/D46125
llvm-svn: 331754