platform/upstream/llvm.git
23 months ago[AMDGPU] Disable fp atomic to s_denorm_mode hazard for GFX11
Jay Foad [Tue, 20 Sep 2022 12:29:39 +0000 (13:29 +0100)]
[AMDGPU] Disable fp atomic to s_denorm_mode hazard for GFX11

This hazard only exists on GFX10.

Differential Revision: https://reviews.llvm.org/D134276

23 months agoFix __builtin_assume_aligned incorrect type descriptor and C++ object polymorphic...
yronglin [Tue, 20 Sep 2022 16:35:18 +0000 (12:35 -0400)]
Fix __builtin_assume_aligned incorrect type descriptor and C++ object polymorphic address

Fix __builtin_assume_aligned incorrect type descriptor

example from @rsmith

struct A { int n; };
struct B { int n; };
struct C : A, B {};

void *f(C *c) {
  // Incorrectly returns `c` rather than the address of the B base class.
  return __builtin_assume_aligned((B*)c, 8);
}

Differential Revision: https://reviews.llvm.org/D133583

23 months ago[IPO] Reorder parameters of InlineFunction (NFC)
Kazu Hirata [Tue, 20 Sep 2022 16:09:38 +0000 (09:09 -0700)]
[IPO] Reorder parameters of InlineFunction (NFC)

With the recent addition of new parameter MergeAttributes (D134117),
callers need to specify several default parameters before getting to
specify the new parameter.

This patch reorders the parameters so that callers do not have to
specify as many default parameters.

Differential Revision: https://reviews.llvm.org/D134125

23 months ago[AArch64] Enable LSLFast for modern OoO cpus
David Green [Tue, 20 Sep 2022 16:09:14 +0000 (17:09 +0100)]
[AArch64] Enable LSLFast for modern OoO cpus

This patch enables the LSLFast feature for Cortex-A76, Cortex-A77,
Cortex-A78, Cortex-A78C, Cortex-A710, Cortex-X1, Cortex-X2, Neoverse N1,
Neoverse N2, Neoverse V1 and the Neoverse 512TB pseudo-cpu, in-line with
the software optimization guides for those CPUs.

Differntial revision: https://reviews.llvm.org/D134273

23 months ago[HLSL] Pass flags to cc1 based on language
Chris Bieneman [Tue, 20 Sep 2022 15:41:43 +0000 (10:41 -0500)]
[HLSL] Pass flags to cc1 based on language

Having the flags only pass through if you're using the dxc-driver means
that the clang driver doesn't work for HLSL, which is undesirable. This
change switches to instead passing flags based on the language mode
similar to how OpenCL does it. This allows the clang driver to be used
for HLSL source files as well.

Reviewed By: python3kgae

Differential Revision: https://reviews.llvm.org/D133958

23 months agoRevert "[Utils] Refactor update_cc_test_checks.py to use shutil"
Ben Dunbobbin [Tue, 20 Sep 2022 15:50:18 +0000 (16:50 +0100)]
Revert "[Utils] Refactor update_cc_test_checks.py to use shutil"

This reverts commit 2e6c50855b7d879ded3776ba87b3d960e2035b89.

This caused failures on windows bots:
- https://lab.llvm.org/buildbot/#/builders/216/builds/10030
- https://ci.chromium.org/ui/p/fuchsia/builders/toolchain.ci/clang-windows-x64/b8802513693562827489/overview

23 months ago[InstCombine] Fold ult(add(x,-1),c) -> ule(x,c) iff x != 0 (PR57635)
Simon Pilgrim [Tue, 20 Sep 2022 15:44:26 +0000 (16:44 +0100)]
[InstCombine] Fold ult(add(x,-1),c) -> ule(x,c) iff x != 0 (PR57635)

Alive2: https://alive2.llvm.org/ce/z/sZ6wwS

As detailed on Issue #57635 and #37628 - for unsigned comparisons, we can compare prior to a decrement iff the value is known never to be zero.

Differential Revision: https://reviews.llvm.org/D134172

23 months ago[CMake] [NFC] Add clang headers to IDE projects
Chris Bieneman [Mon, 19 Sep 2022 15:22:33 +0000 (10:22 -0500)]
[CMake] [NFC] Add clang headers to IDE projects

This just adds the clang headers into a source group so that they get
collected and added into generated IDE projects.

23 months ago[GlobalISel][Legalizer] Fix lowerSelect() not sign-extending the mask value.
Amara Emerson [Mon, 19 Sep 2022 23:21:55 +0000 (00:21 +0100)]
[GlobalISel][Legalizer] Fix lowerSelect() not sign-extending the mask value.

I'm not sure why the SEXT_INREG was gated on a bitwidth check of the mask
vs element size.

This fixes a miscompile in chromium's skia library.

Differential Revision: https://reviews.llvm.org/D134236

23 months ago[mlir][arith] Add comparison-based integration tests
Jakub Kuderski [Tue, 20 Sep 2022 15:37:26 +0000 (11:37 -0400)]
[mlir][arith] Add comparison-based integration tests

Introduces a simple framework for runtime tests of the wide integer emulation.

In these tests, we are only interested in checking that both wide and narrow calculation
produce the same results, and do not check for exact results. This allows us to cover
more of the input space, as we do not have to hardcode each of the expected outputs.

Introduce common helper functions to check the results, print a message on mismatch,
and sample the input space.

Implement runtime comparrison tests for `arith.muli` and `arith.shrui`.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D134184

23 months ago[mlir][arith] Add integration test for shrui emulation
Jakub Kuderski [Tue, 20 Sep 2022 15:27:48 +0000 (11:27 -0400)]
[mlir][arith] Add integration test for shrui emulation

The new test cases focus on known edge cases in the current implementation.
Specifically, we check for low (0, 1), mid (7, 8, 9) and high (15) shift amounts with i16 operands.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D134182

23 months ago[mlir][arith] Add test pass for wide integer emulation
Jakub Kuderski [Tue, 20 Sep 2022 15:03:37 +0000 (11:03 -0400)]
[mlir][arith] Add test pass for wide integer emulation

The new test pass allows for running wide integer emulation conversion
within specified functions only.

I intend to use it in integration tests in a way that allows me print both
original and emulated results in the same format, or even compare both results
at runtime and print on mismatch only.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D134120

23 months ago[llvm] Remove libcxx, libcxxabi and libunwind from supported LLVM_ENABLE_PROJECTS
Louis Dionne [Tue, 23 Aug 2022 15:22:55 +0000 (11:22 -0400)]
[llvm] Remove libcxx, libcxxabi and libunwind from supported LLVM_ENABLE_PROJECTS

This is a breaking change. If you were passing one of those three runtimes
in LLVM_ENABLE_PROJECTS, you need to start passing them in LLVM_ENABLE_RUNTIMES
instead. The runtimes in LLVM_ENABLE_RUNTIMES will start being built using
the "bootstrapping build" instead, which means that they will be built
using the just-built Clang. This is usually what you wanted anyway.

If you were using LLVM_ENABLE_PROJECTS=all with the explicit goal of
building these three runtimes, you can now use LLVM_ENABLE_RUNTIMES=all
and these runtimes will be built using the bootstrapping build.

Differential Revision: https://reviews.llvm.org/D132480

23 months ago[Support][NFC] Clarify function comment
Eric Li [Tue, 20 Sep 2022 15:10:16 +0000 (11:10 -0400)]
[Support][NFC] Clarify function comment

Follow-up to 86118ec2 that addresses the comments in D134072, which
were accidentally left off of the commit.

23 months ago[Support] Provide access to the full mapping in llvm::Annotations
Eric Li [Fri, 16 Sep 2022 20:07:26 +0000 (16:07 -0400)]
[Support] Provide access to the full mapping in llvm::Annotations

Providing access to the mapping of annotations allows test helpers to
be expressive by using the annotations as expectations. For example, a
matcher could verify that all annotated points were matched by a
matcher, or that an refactoring surgically modifies specific ranges.

Differential Revision: https://reviews.llvm.org/D134072

23 months ago[AMDGPU][GFX11] Use VGPR_32_Lo128 for VOP1,2,C
Joe Nash [Wed, 13 Jul 2022 18:14:48 +0000 (14:14 -0400)]
[AMDGPU][GFX11] Use VGPR_32_Lo128 for VOP1,2,C

    Due to the encoding changes in GFX11, we had a hack in place that
    disables the use of VGPRs above 128. This patch removes the need for
    that hack.

    We introduce a new register class VGPR_32_Lo128 which is used for 16-bit
    operands of VOP1, VOP2, and VOPC instructions. This register class only has the
    low 128 VGPRs, but is otherwise identical to VGPR_32. Therefore, 16-bit VOP1,
    VOP2, and VOPC instructions are correctly limited to use the first 128
    VGPRs, while the other instructions can freely use all 256.

    We introduce new pseduo-instructions used on GFX11 which have the suffix
    t16 (True 16) to use the VGPR_32_Lo128 register class.

Reviewed By: foad, rampitec, #amdgpu

Differential Revision: https://reviews.llvm.org/D133723

23 months ago[libc] Fix TWS issues in .td files
Jeff Bailey [Tue, 20 Sep 2022 14:25:16 +0000 (14:25 +0000)]
[libc] Fix TWS issues in .td files

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D134256

23 months ago[libc] Remove unneeded extra include
Jeff Bailey [Tue, 20 Sep 2022 14:24:21 +0000 (14:24 +0000)]
[libc] Remove unneeded extra include

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D134255

23 months ago[LV] Remove unused widenCallInstruction declaration (NFC).
Florian Hahn [Tue, 20 Sep 2022 14:20:27 +0000 (15:20 +0100)]
[LV] Remove unused widenCallInstruction declaration (NFC).

The definition and uses have been removed a while ago. Clean up the
unused declaration.

23 months ago[lld-macho] Support -dyld_env
Vy Nguyen [Fri, 16 Sep 2022 17:38:20 +0000 (13:38 -0400)]
[lld-macho] Support -dyld_env

This arg is undocumented but from looking at the code + experiment, it's used to add additional DYLD_ENVIRONMENT load commands to the output.

Differential Revision: https://reviews.llvm.org/D134058

23 months agoAnalysis: Remove redundant assertion
Matt Arsenault [Tue, 20 Sep 2022 13:26:32 +0000 (09:26 -0400)]
Analysis: Remove redundant assertion

This assert guards the same assertion inside getTypeStoreSizeInBits

23 months agoAnalysis: Pass AssumptionCache through isKnownNonZero
Matt Arsenault [Tue, 20 Sep 2022 12:53:25 +0000 (08:53 -0400)]
Analysis: Pass AssumptionCache through isKnownNonZero

Pass this through now that isDereferenceableAndAlignedPointer has
access to this.

23 months agoFix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFCI.
Simon Pilgrim [Tue, 20 Sep 2022 13:23:59 +0000 (14:23 +0100)]
Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFCI.

23 months ago[InstCombine] Precommit test for D134142
Markus Böck [Tue, 20 Sep 2022 12:37:05 +0000 (14:37 +0200)]
[InstCombine] Precommit test for D134142

23 months ago[InstCombine] Add test coverage for D134172 / Issue #57635
Simon Pilgrim [Tue, 20 Sep 2022 12:36:09 +0000 (13:36 +0100)]
[InstCombine] Add test coverage for D134172 / Issue #57635

23 months ago[LLVM][AArch64] Replace aarch64.sve.ld by aarch64.sve.ldN.sret
Caroline Concatto [Tue, 30 Aug 2022 10:17:08 +0000 (11:17 +0100)]
[LLVM][AArch64] Replace aarch64.sve.ld by aarch64.sve.ldN.sret

This patch removes the intrinsic aarch64.sve.ldN from tablegen in favour of
using arch64.sve.ldN.sret.

Depends on: D133023

Differential Revision: https://reviews.llvm.org/D133025

23 months ago[LoongArch] Add codegen support for fmaxnum_ieee and fminnum_ieee
gonglingqin [Tue, 20 Sep 2022 11:05:08 +0000 (19:05 +0800)]
[LoongArch] Add codegen support for fmaxnum_ieee and fminnum_ieee

Thanks for @xry111's previous bug fixes.
See https://github.com/loongson/llvm-project/pull/1 for more details.

Differential Revision: https://reviews.llvm.org/D133478

23 months agoRecommit "[AggressiveInstCombine] Lower Table Based CTTZ
Djordje Todorovic [Tue, 13 Sep 2022 13:13:58 +0000 (15:13 +0200)]
Recommit "[AggressiveInstCombine] Lower Table Based CTTZ

The bug reported on the [0] has been fixed.
The issue was we have not checked if the global variables that
represent cttz tables was constant.
There is a new negative test added in negative-lower-table-based-cttz.ll
that represents this.

[0] https://reviews.llvm.org/rGdf868edee561eb973edd85ec9df41c67aa0bff6b

23 months ago[LICM] Add test for PR57780 (NFC)
Nikita Popov [Tue, 20 Sep 2022 11:06:35 +0000 (13:06 +0200)]
[LICM] Add test for PR57780 (NFC)

23 months ago[Sanitizer] Bump macOS deployment target for sanitizer unit test binary to support...
Blue Gaston [Fri, 16 Sep 2022 22:49:44 +0000 (15:49 -0700)]
[Sanitizer] Bump macOS deployment target for sanitizer unit test binary to support C++17 requirements.

This patch fixes a test failure on Apple caused by changing standard to c++17.
sanitizer_allocator_test.cpp requires language features introducied in 10.13 for c++17.
After initial investigation, it was not clear how to add this flag to a single file:
https://reviews.llvm.org/D133878

Becuase of this, we have upped the min version of this test suite to 10.13, the min version necessary to support necessary language features.

We felt this was a better option than upping the min version of the product to support a single test.
We are raising deployment target for a single test suite, rather than the product.

Differential Revision: https://reviews.llvm.org/D134091

rdar://98737270

23 months agoAAArch64: disable asynchronous unwind by default for MachO.
Tim Northover [Fri, 9 Sep 2022 09:46:23 +0000 (10:46 +0100)]
AAArch64: disable asynchronous unwind by default for MachO.

AArch64 MachO has a compact unwind format where most functions' unwind info can
be represented in just 4 bytes. But this cannot represent any asynchronous CFI
function, so it's essentially disabled when that's used. This is a large
code-size hit that we'd rather not take unless explicitly requested.

23 months agoRefactor unwind table driver interface to expose default level. NFC.
Tim Northover [Fri, 9 Sep 2022 09:01:02 +0000 (10:01 +0100)]
Refactor unwind table driver interface to expose default level. NFC.

23 months ago[LLD] [test] Add a missing REQUIRES: x86
Martin Storsjö [Tue, 20 Sep 2022 09:38:37 +0000 (12:38 +0300)]
[LLD] [test] Add a missing REQUIRES: x86

This was missed in 365d0a5cd867cdf414b70c9f4fd5122146287b01.

23 months agoFix MSVC "result of 32-bit shift implicitly converted to 64 bits" warnings. NFCI.
Simon Pilgrim [Tue, 20 Sep 2022 09:33:29 +0000 (10:33 +0100)]
Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warnings. NFCI.

23 months agoFix an unused warning in release build
Dmitri Gribenko [Tue, 20 Sep 2022 09:28:20 +0000 (11:28 +0200)]
Fix an unused warning in release build

23 months ago[lldb] Log when we cannot find an equivalent for a gdb register type
David Spickett [Thu, 12 May 2022 15:38:43 +0000 (15:38 +0000)]
[lldb] Log when we cannot find an equivalent for a gdb register type

This happens if the type is described elsewhere in target xml as a
<flags> or <struct>.

Also hardcode the function names into the log messages because
if you use __FUNCTION__ in a lambda you just get "operator()".

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D134043

23 months ago[LLDB] Make instruction emulation context type private
David Spickett [Mon, 1 Aug 2022 10:17:02 +0000 (10:17 +0000)]
[LLDB] Make instruction emulation context type private

This is the first step to being able to handle non
trivial types in the union.

info_type effects the lifetime of the objects in the union,
so making it private means we know you have to call one of the
Set<...> functions to change it.

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D134039

23 months ago[clang] Update ReleaseNotes about a crash fix (Issue 53628)
Dmitry Polukhin [Sat, 17 Sep 2022 15:30:30 +0000 (08:30 -0700)]
[clang] Update ReleaseNotes about a crash fix (Issue 53628)

Update ReleaseNotes about a crash fix (Issue 53628)

Test Plan: none

Differential Revision: https://reviews.llvm.org/D134112

23 months ago[LLDB] Format lldb-server's target XML
David Spickett [Wed, 17 Aug 2022 13:58:28 +0000 (13:58 +0000)]
[LLDB] Format lldb-server's target XML

So that the XML isn't one giant line. Which wasn't
a problem for lldb but was for me trying to troubleshoot
it using the logs.

It now looks like:
```
<?xml version="1.0"?>
<target version="1.0">
  <architecture>aarch64</architecture>
  <feature>
    <...>
    <reg name="fpcr" .../>
  </feature>
</target>
```

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D134035

23 months ago[AArch64][NFC] Correctly rename mangling name for ldN.sret
Caroline Concatto [Wed, 31 Aug 2022 13:05:03 +0000 (14:05 +0100)]
[AArch64][NFC] Correctly rename mangling name for ldN.sret

Remove from the function name the predicate type and pointer type, because:
 The predicate type in the name(nxvNi1)  can be deduced from the overloaded
element count(nxvNEltTy).
 The pointer type(p0EltTy) can be deduced from the overloaded element type.

Differential Revision: https://reviews.llvm.org/D133023

23 months ago[Utils] Refactor update_cc_test_checks.py to use shutil
John McIver [Tue, 20 Sep 2022 08:39:40 +0000 (09:39 +0100)]
[Utils] Refactor update_cc_test_checks.py to use shutil

The package distutils is deprecated and removal is planned for Python 3.12.
All calls to distutils.spawn.find_executable are replaced with shutil.which.

Differential Revision: https://reviews.llvm.org/D134015

23 months ago[flang] Deallocate WHERE masks after all assignments
Jean Perier [Tue, 20 Sep 2022 08:39:39 +0000 (10:39 +0200)]
[flang] Deallocate WHERE masks after all assignments

Allocatable assignments were triggering lowering to clean-up
any WHERE mask temporaries, even if some assignments where left
in the WHERE construct.

This is because allocatable assignments lowering was being passed the
wrong statement context. Fix this by selecting the where/forall statement
context instead of a local one when there is one.

Differential Revision: https://reviews.llvm.org/D134197

23 months ago[LSR] Fold terminating condition to other IV when possible
eopXD [Tue, 20 Sep 2022 02:07:43 +0000 (19:07 -0700)]
[LSR] Fold terminating condition to other IV when possible

When the IV is only used by the terminating condition (say IV-A) and the loop
has a predictable back-edge count and we have another IV (say IV-B) that is an
affine add recursion, we will be able to calculate the terminating value of
IV-B in the loop pre-header. This patch adds attempts to replace IV-B as the
new terminating condition and remove IV-A. It is safe to do so since IV-A is
only used as the terminating condition.

This transformation is suitable to be appended after LSR as it may optimize the
loop into the situation mentioned above. The transformation can reduce number of
IV-s in the loop by one.

A cli option `lsr-term-fold` is added and default disabled.

Reviewed By: mcberg2021, craig.topper

Differential Revision: https://reviews.llvm.org/D132443

23 months ago[flang] fix optional pointer TARGET argument lowering in ASSOCIATED
Jean Perier [Tue, 20 Sep 2022 08:15:15 +0000 (10:15 +0200)]
[flang] fix optional pointer TARGET argument lowering in ASSOCIATED

The TARGET argument of ASSOCIATED has a special lowering to deal with
POINTER and ALLOCATABLE optional actual arguments because they may be
dynamically absent. The previous code was doing a ternary
(mlir::SelectOp) to deal with this case, but generated invalid
code for the unused argument (loading a nullptr fir.ref<fir.box>). This
was not detected until D133779 was merged and modified how fir.load are
lowered to LLVM for fir.box types.

Replace the select by a proper if to prevent the fir.load from being
reachable in context where it should not.

Differential Revision: https://reviews.llvm.org/D134174

23 months ago[gn build] Port 55158efe1045
LLVM GN Syncbot [Tue, 20 Sep 2022 08:12:06 +0000 (08:12 +0000)]
[gn build] Port 55158efe1045

23 months ago[libc++] Remove MSVC code
Nikolas Klauser [Tue, 30 Aug 2022 12:57:17 +0000 (14:57 +0200)]
[libc++] Remove MSVC code

It's been one and a half months now and nobody said anything, so I guess this code can be removed.

Reviewed By: ldionne, #libc

Spies: Mordante, libcxx-commits, mgorny, mstorsjo

Differential Revision: https://reviews.llvm.org/D132943

23 months ago[libc++][NFC] Refactor enable_ifs in vector
Nikolas Klauser [Mon, 15 Aug 2022 12:09:49 +0000 (14:09 +0200)]
[libc++][NFC] Refactor enable_ifs in vector

Using the `enable_if_t<..., int> = 0` style has the benefit that it works in all cases and makes function declarations easier to read because the function arguments and return type and SFINAE are separated. Unifying the style also makes it easier for people not super familiar with SFINAE to make sense of the code.

Reviewed By: Mordante, var-const, #libc, huixie90

Spies: huixie90, libcxx-commits

Differential Revision: https://reviews.llvm.org/D131868

23 months ago[TargetLibraryInfo] Mark memrchr as unavailable on Windows
Mateusz Mikuła [Tue, 20 Sep 2022 07:49:41 +0000 (10:49 +0300)]
[TargetLibraryInfo] Mark memrchr as unavailable on Windows

Otherwise LLVM will optimise strrchr into memrchr on Windows resulting in linker error:
```
$ cat memrchr_test.c
int main(int argc, char **argv) {
    return (long)strrchr("KkMm", argv[argc-1][0]);
}

$ clang memrchr_test.c -O
memrchr_test.c:3:12: warning: cast to smaller integer type 'long' from 'char *' [-Wpointer-to-int-cast]
    return (long)strrchr("KkMm", argv[argc-1][0]);
           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1 warning generated.
ld.lld: error: undefined symbol: memrchr
>>> referenced by D:/msys64/tmp/memrchr_test-e7aabd.o:(main)
clang: error: linker command failed with exit code 1 (use -v to see invocation)
```

Example taken from MSYS2 Discord and tested with windows-gnu target.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D134134

23 months ago[LLD][COFF] Add load config checks to warn if incorrect for CFGuard
Alvin Wong [Tue, 20 Sep 2022 07:49:01 +0000 (10:49 +0300)]
[LLD][COFF] Add load config checks to warn if incorrect for CFGuard

Control Flow Guard requires specific flags and VA's be included in the
load config directory to be functional. In case CFGuard is enabled via
linker flags, we can check to make sure this is the case and give the
user a warning if otherwise.

MSVC provides a proper `_load_config_used` by default, so this is more
relevant for the MinGW target in which current versions of mingw-w64
does not provide this symbol.

The checks (only if CFGuard is enabled) include:

- The `_load_config_used` struct shall exist.
- Alignment of the `_load_config_used` struct (shall be aligned to
  pointer size.)
- The `_load_config_used` struct shall be large enough to contain the
  required fields.
- The values of the following fields are checked against the expected
  values:
  - GuardCFFunctionTable
  - GuardCFFunctionCount
  - GuardFlags
  - GuardAddressTakenIatEntryTable
  - GuardAddressTakenIatEntryCount
  - GuardLongJumpTargetTable
  - GuardLongJumpTargetCount
  - GuardEHContinuationTable
  - GuardEHContinuationCount

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D133099

23 months ago[LLD][COFF] Improve symbol table info for import thunk
Alvin Wong [Tue, 20 Sep 2022 07:44:45 +0000 (10:44 +0300)]
[LLD][COFF] Improve symbol table info for import thunk

Import thunks themselves contain a jump or branch, which is code by
nature. Therefore the import thunk symbol should be marked as function
type in the symbol table to help with debugging.

The `__imp_` import symbol associated to the import thunk is also useful
for debugging. However, when the import symbol isn't directly referenced
outside of the import thunk, it doesn't normally get added to the symbol
table. This change teaches LLD to add the import symbol explicitly.

Reviewed By: mstorsjo

Differential Revision: https://reviews.llvm.org/D134169

23 months ago[llvm-rc] [test] Fix the windres-preproc test with other mingw triple forms. NFC.
Martin Storsjö [Sun, 18 Sep 2022 21:08:41 +0000 (00:08 +0300)]
[llvm-rc] [test] Fix the windres-preproc test with other mingw triple forms. NFC.

When invoking the preprocessor, llvm-windres produces a mingw
triple; if the llvm default target triple is a mingw target, it
is used as is - if not, a mingw style triple is generated.

Relax the testcase, to not strictly require "w64" as vendor (allow
the vendor field to be missing entirely), and allow both
"mingw32" and "windows-gnu" as OS/environment (where both forms are
common, while the latter is the normalized form).

Differential Revision: https://reviews.llvm.org/D134148

23 months ago[clang] [Driver] Do not transform explicit --config filename
Michał Górny [Mon, 19 Sep 2022 18:23:44 +0000 (20:23 +0200)]
[clang] [Driver] Do not transform explicit --config filename

Disable transformations (e.g. attempting to replace target architecture)
in the config filename that is passed explicitly via `--config`.  This
behavior is surprising and confusing -- if user passes an explicit
config filename, Clang should use it as is.  The transformations are
still applied when the name is deduced from filename.

Update the tests accordingly.  This primarily ensures that full filename
with .cfg suffix is passed to --config (appending `.cfg` implicitly is
not documented, and would collide with use of filenames with other
suffixes).  The config-file2.c suite is removed entirely as it tested
the transformations on the argument to --config.  However, the aspects
of that that were not tested as part of config-file3.c are now added
there (based on config filename deduced from executable).

This change streamlines the code in Driver::loadConfigFile(), opening
the possibility of further changes, including support for handling
multiple --config options and refactoring of filename deduction.

Differential Revision: https://reviews.llvm.org/D134208

23 months agoremove the internal signatures from perf binaries
wlei [Tue, 20 Sep 2022 05:30:24 +0000 (22:30 -0700)]
remove the internal signatures from perf binaries

23 months ago[lldb] Actually support more than 32 logging categories
Jonas Devlieghere [Mon, 19 Sep 2022 23:20:50 +0000 (16:20 -0700)]
[lldb] Actually support more than 32 logging categories

In January, Greg put up a patch (D117382) to support, among other
things, more than 32 log categories. That led to a bunch of nice
cleanups, but categories remained constrained because different parts of
the code were still using uint32_t. This patch fixes the remaining
issues and makes it possible to add a 32nd log category.

Differential revision: https://reviews.llvm.org/D134245

23 months ago[X86][GlobalISel] Add support for sret demotion
Serge Pavlov [Mon, 19 Sep 2022 07:14:00 +0000 (14:14 +0700)]
[X86][GlobalISel] Add support for sret demotion

The change add support for the cases when return value is passed in
memory rathen than in registers.

Differential Revision: https://reviews.llvm.org/D134181

23 months ago[flang] Give explicit convert= specifiers precedence over FORT_CONVERT
Jonathon Penix [Fri, 2 Sep 2022 03:04:18 +0000 (20:04 -0700)]
[flang] Give explicit convert= specifiers precedence over FORT_CONVERT

Currently, the FORT_CONVERT environment variable has the highest priority when
setting the endianness conversion for unformatted files. In discussing the
appropriate priority for the fconvert option, convert specifiers were decided
to take highest priority.

This patch also initializes the open statement convert state to unknown
to disambiguate cases where the convert specifier was not provided from
cases where convert=native was set. This makes it possible to defer to the
environment setting where appropriate.

Differential Revision: https://reviews.llvm.org/D133237

23 months ago[MemorySSA] Add test that all incoming values of phi node could be translated
luxufan [Mon, 19 Sep 2022 02:02:49 +0000 (02:02 +0000)]
[MemorySSA] Add test that all incoming values of phi node could be translated

Differential Revision: https://reviews.llvm.org/D134160

23 months ago[MemorySSA][NFC] Use const whenever possible
luxufan [Mon, 19 Sep 2022 02:24:10 +0000 (02:24 +0000)]
[MemorySSA][NFC] Use const whenever possible

Differential Revision: https://reviews.llvm.org/D134162

23 months ago[LSR] Precommit test for D132443
eopXD [Tue, 23 Aug 2022 08:44:15 +0000 (01:44 -0700)]
[LSR] Precommit test for D132443

Pre-commit test for D132443

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D132452

23 months agorevert 684f76643 [Clang][OpenMP] Codegen generation for has_device_addr claues.
Ron Lieberman [Tue, 20 Sep 2022 01:30:34 +0000 (01:30 +0000)]
revert 684f76643 [Clang][OpenMP] Codegen generation for has_device_addr claues.

breaks amdgpu buildbot

23 months ago[X86][fastcall][vectorcall] Move capability check before free register update
Phoebe Wang [Tue, 20 Sep 2022 00:44:11 +0000 (08:44 +0800)]
[X86][fastcall][vectorcall] Move capability check before free register update

When passing arguments with `__fastcall` or `__vectorcall` in 32-bit MSVC, the following arguments have chance to be passed by register if the current one failed. `__regcall` from ICC is on the contrary: https://godbolt.org/z/4MPbzhaMG
All the three calling conversions are not supported in GCC.

Fixes: #57737

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D133920

23 months ago[msan] Handle shadow of masked instruction
Vitaly Buka [Mon, 12 Sep 2022 05:00:37 +0000 (22:00 -0700)]
[msan] Handle shadow of masked instruction

Origin handling is not implemented yet.

Reviewed By: kda

Differential Revision: https://reviews.llvm.org/D133682

23 months ago[lldb] Appease the MSCV compiler
Jonas Devlieghere [Tue, 20 Sep 2022 00:36:19 +0000 (17:36 -0700)]
[lldb] Appease the MSCV compiler

Fix error C2027: use of undefined type 'llvm::MemoryBuffer'.

23 months agoFix test case which is not working for AMDGPU.
Jennifer Yu [Tue, 20 Sep 2022 00:04:09 +0000 (17:04 -0700)]
Fix test case which is not working for AMDGPU.

This is for the change of
Differential Revision: https://reviews.llvm.org/D134186

23 months agoAMDGPU: Add some tests for atomics with excess alignment
Matt Arsenault [Mon, 19 Sep 2022 23:08:10 +0000 (19:08 -0400)]
AMDGPU: Add some tests for atomics with excess alignment

23 months agoVectorCombine: Pass through AssumptionCache
Matt Arsenault [Mon, 19 Sep 2022 22:09:39 +0000 (18:09 -0400)]
VectorCombine: Pass through AssumptionCache

23 months agoMemCpyOpt: Pass through AssumptionCache
Matt Arsenault [Mon, 19 Sep 2022 22:05:31 +0000 (18:05 -0400)]
MemCpyOpt: Pass through AssumptionCache

23 months agoSLPVectorizer: Pass through AssumptionCache
Matt Arsenault [Mon, 19 Sep 2022 21:49:16 +0000 (17:49 -0400)]
SLPVectorizer: Pass through AssumptionCache

23 months agoLoopVectorize: Pass through AssumptionCache
Matt Arsenault [Mon, 19 Sep 2022 21:02:40 +0000 (17:02 -0400)]
LoopVectorize: Pass through AssumptionCache

23 months agoGVN: Pass through AssumptionCache to queries
Matt Arsenault [Mon, 19 Sep 2022 20:52:54 +0000 (16:52 -0400)]
GVN: Pass through AssumptionCache to queries

23 months agoAnalysis: Add AssumptionCache to isSafeToSpeculativelyExecute
Matt Arsenault [Mon, 19 Sep 2022 20:51:42 +0000 (16:51 -0400)]
Analysis: Add AssumptionCache to isSafeToSpeculativelyExecute

Does not update any of the uses.

23 months ago[Clang][OpenMP] Codegen generation for has_device_addr claues.
Jennifer Yu [Mon, 12 Sep 2022 23:57:27 +0000 (16:57 -0700)]
[Clang][OpenMP] Codegen generation for has_device_addr claues.

Summary: This patch add codegen support for the has_device_addr clause.  It
use the same logic of is_device_ptr.

Differential Revision: https://reviews.llvm.org/D134186

23 months agoInstCombine: Pass AssumptionCache through isDereferenceablePointer
Matt Arsenault [Mon, 19 Sep 2022 19:59:13 +0000 (15:59 -0400)]
InstCombine: Pass AssumptionCache through isDereferenceablePointer

23 months agoGlobalISel: Pass through AssumptionCache
Matt Arsenault [Mon, 19 Sep 2022 19:25:29 +0000 (15:25 -0400)]
GlobalISel: Pass through AssumptionCache

23 months agoSelectionDAG: Add AssumptionCache analysis dependency
Matt Arsenault [Mon, 19 Sep 2022 19:25:37 +0000 (15:25 -0400)]
SelectionDAG: Add AssumptionCache analysis dependency

Fixes compile time regression after
bb70b5d40652207c0bd3d385def10ef3ef1d45b4

23 months ago[RISCV] Make computeIncomingVLVTYPE more conservative when merging predecessor state.
Craig Topper [Mon, 19 Sep 2022 22:57:55 +0000 (15:57 -0700)]
[RISCV] Make computeIncomingVLVTYPE more conservative when merging predecessor state.

If we have already calculated the incoming state before, use that
as our starting point to ensure we are conservative.

This fixes an infinite loop found in our downstream where we
we allowed two waves of updates to propagate through a loop and
the merge points allowed us to toggle back and forth between states.
No small reproducer right now.

Differential Revision: https://reviews.llvm.org/D134229

23 months agoAnalysis: Add AssumptionCache argument to isDereferenceableAndAlignedPointer
Matt Arsenault [Mon, 19 Sep 2022 19:06:08 +0000 (15:06 -0400)]
Analysis: Add AssumptionCache argument to isDereferenceableAndAlignedPointer

This does not try to pass it through from the end users.

23 months agoAMDGPU: Update baseline test checks
Matt Arsenault [Mon, 19 Sep 2022 22:17:38 +0000 (18:17 -0400)]
AMDGPU: Update baseline test checks

23 months ago[OpenMP] Add LoongArch64 support
SignKirigami [Mon, 19 Sep 2022 22:49:15 +0000 (22:49 +0000)]
[OpenMP] Add LoongArch64 support

GCC, glibc, binutils, and LLVM have added support for LoongArch64.
This patch adds support for LLVM OpenMP following D59880 for RISCV64.

Reviewed By: MaskRay, SixWeining

Differential Revision: https://reviews.llvm.org/D132925

23 months ago[llvm][TextAPI] add driverkit as supported platform for older tbd
Cyndy Ishida [Mon, 19 Sep 2022 22:05:20 +0000 (15:05 -0700)]
[llvm][TextAPI] add driverkit as supported platform for older tbd
versions

 It looks like being able to write it was added, but missed the ability
  to read it.

23 months ago[clang-format] Update removed brace's next token's WhitespaceRange
owenca [Sun, 18 Sep 2022 20:32:05 +0000 (13:32 -0700)]
[clang-format] Update removed brace's next token's WhitespaceRange

Fixes #57803.

Differential Revision: https://reviews.llvm.org/D134146

23 months ago[clang-doc] Add support for explicitly typed enums
Brett Wilson [Mon, 19 Sep 2022 21:52:24 +0000 (21:52 +0000)]
[clang-doc] Add support for explicitly typed enums

Add support for explicitly typed enums:
  enum Foo : unsigned { ... };
to the internal representation and to the YAML output.

Add support for getting the value of an enum constant, as well as accessing the original expression that produced it. This changes the YAML output of enums from an array of strings for the enum members to an array of dictionaries. These dictionaries now report the name, value, and original expression.

The markdown and HTML outputs are unchanged, they still output the name from the new enhanced internal schema.

Reviewed By: paulkirth

Differential Revision: https://reviews.llvm.org/D134055

23 months ago[mlir][scf] Support simple symbolic expression when simplify loops
Peiming Liu [Mon, 19 Sep 2022 18:41:54 +0000 (18:41 +0000)]
[mlir][scf] Support simple symbolic expression when simplify loops

Reviewed By: aartbik, ThomasRaoux

Differential Revision: https://reviews.llvm.org/D134204

23 months ago[gn build] Port 70599d70273b
LLVM GN Syncbot [Mon, 19 Sep 2022 21:43:51 +0000 (21:43 +0000)]
[gn build] Port 70599d70273b

23 months ago[lldb] Remove LLDB reproducers
Jonas Devlieghere [Mon, 19 Sep 2022 17:47:09 +0000 (10:47 -0700)]
[lldb] Remove LLDB reproducers

This patch removes the remaining reproducer code. The SBReproducer class
remains for ABI stability but is just an empty shell. This completes the
removal process outlined on the mailing list [1].

[1] https://lists.llvm.org/pipermail/lldb-dev/2021-September/017045.html

23 months ago[AMDGPU] SIFixSGPRCopies reworking to use one pass over the MIR for analysis and...
Alexander Timofeev [Wed, 7 Sep 2022 14:14:38 +0000 (16:14 +0200)]
[AMDGPU] SIFixSGPRCopies reworking to use one pass over the MIR for analysis and lowering.

This change finalizes the series of patches aiming to replace the old strategy of VGPR to SGPR copy lowering.

  # Following the https://reviews.llvm.org/D128252 and https://reviews.llvm.org/D130367 code parts that are no longer used were removed.
  # The first pass over the MachineFunctoin collects all the necessary information.
  # Lowering is done in 3 phases:
     - VGPR to SGPR copies analysis  lowering
     - REG_SEQUENCE, PHIs, and SGPR to VGPR copies lowering
     - SCC copies lowering is done in a separate pass over the Machine Function

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D131246

23 months ago[RISCV] Manage the InQueue flag in insertvli correctly.
Craig Topper [Mon, 19 Sep 2022 21:28:22 +0000 (14:28 -0700)]
[RISCV] Manage the InQueue flag in insertvli correctly.

We were only setting this flag the first time we added the blocks
not when we mark them for revisiting.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D134193

23 months ago[Clang] Implement fix for DR2628
Roy Jacobson [Sun, 18 Sep 2022 20:07:25 +0000 (23:07 +0300)]
[Clang] Implement fix for DR2628

Implement suggested fix for [[ https://cplusplus.github.io/CWG/issues/2628.html | DR2628. ]] Couldn't update the DR docs because there hasn't been a DR index since it was filed, but the tests still run in CI.

Note: I only transfer the constructor constraints, not the struct constraints. I think that's OK because the struct constraints are the same
for all constructors so they don't affect the overload resolution, and if they deduce to something that doesn't pass the constraints
we catch it anyway. So (hopefully) that should be more efficient without sacrificing correctness.

Closes:
https://github.com/llvm/llvm-project/issues/57646
https://github.com/llvm/llvm-project/issues/43829

Reviewed By: erichkeane

Differential Revision: https://reviews.llvm.org/D134145

23 months ago[SLP][NFC]Reorder gather nodes with reused scalars, NFC.
Alexey Bataev [Mon, 19 Sep 2022 19:43:30 +0000 (12:43 -0700)]
[SLP][NFC]Reorder gather nodes with reused scalars, NFC.

The compiler does not reorder the gather nodes with reused scalars, just
does it for opernads of the user nodes. This currently does not affect
the compiler but breaks internal logic of the SLP graph. In future, it
is supposed to actually use all nodes instead of just list of operands
and this will affect the vectorization result.
Also, did some early check to avoid complex logic in cost estimation
analysis, should improve compiler time a bit.

23 months ago[RISCV] Adding missing test from a4a29438f
Philip Reames [Mon, 19 Sep 2022 20:40:20 +0000 (13:40 -0700)]
[RISCV] Adding missing test from a4a29438f

This change was originally reviewed as part of what became a4a29438f, but apparently forgot to git-add it when applying the patch.  Oops.

23 months agoAdd auto deduce source map setting
Jeffrey Tan [Thu, 8 Sep 2022 18:21:08 +0000 (11:21 -0700)]
Add auto deduce source map setting

    This patch adds a new "target.auto-source-map-relative" setting.

    If enabled, this setting may auto deduce a source map entry based on requested
    breakpoint path and the original path stored in debug info for resolved
    breakpoint.

    As an example, if debug info contains "./a/b/c/main.cpp", user sets a source
    breakpoint at "/root/repo/x/y/z/a/b/c/main.cpp". The breakpoint will resolve
    correctly now with Greg's patch https://reviews.llvm.org/D130401. However, the
    resolved breakpoint will use "./a/b/c/main.cpp" to locate source file during
    stop event which would fail most of the time.

    With the new "target.auto-source-map-relative" setting enabled, a auto deduced
    source map entry "." => "/root/repo/x/y/z" will be added. This new mapping will
    help lldb to map resolved breakpoint path "./a/b/c/main.cpp" back to
    "/root/repo/x/y/z/a/b/c/main.cpp" and locate it on disk.

    If an existing source map entry is used the patch also concatenates the auto
    deduced entry with any stripped reverse mapping prefix (see example below).

    As a second example, debug info contains "./a/b/c/main.cpp" and user sets
    breakpoint at "/root/repo/x/y/z/a/b/c/main.cpp". Let's say there is an existing
    source map entry "." => "/root/repo"; this mapping would strip the prefix out of
    "/root/repo/x/y/z/a/b/c/main.cpp" and use "x/y/z/a/b/c/main.cpp" to resolve
    breakpoint. "target.auto-source-map-relative" setting would auto deduce a new
    potential mapping of "." => "x/y/z", then it detects that there is a stripped
    prefix from reverse mapping and concatenates it as the new mapping:
     "." => "/root/repo/x/y/z" which would correct map "./a/b/c/main.cpp" path to
    new path in disk.

    This patches depends on https://reviews.llvm.org/D130401 to use new added
    SBDebugger::GetSetting() API for testing.

Differential Revision: https://reviews.llvm.org/D133042

23 months ago[BOLT] Control aggregation mode output profile file format
Amir Ayupov [Mon, 19 Sep 2022 20:36:50 +0000 (13:36 -0700)]
[BOLT] Control aggregation mode output profile file format

In perf2bolt and `-aggregate-only` BOLT mode, the output profile file is written
in fdata format by default. Provide a knob `-profile-format=[fdata,yaml]` to
control the format.
Note that `-w` option still dumps in YAML format.

Reviewed By: #bolt, maksfb

Differential Revision: https://reviews.llvm.org/D133995

23 months ago[msan] Check mask and pointers shadow
Vitaly Buka [Sun, 11 Sep 2022 20:17:46 +0000 (13:17 -0700)]
[msan] Check mask and pointers shadow

Msan has default handler for unknown instructions which
previously applied to these as well. However depending on
mask, not all pointers or passthru part will be used. This
allows other passes to insert undef into sum arguments.
As result,  default strict instruction handler can produce false reports.

Reviewed By: kda, kstoimenov

Differential Revision: https://reviews.llvm.org/D133678

23 months ago[clang] Add support for #pragma strict_gs_check
David Majnemer [Mon, 12 Sep 2022 21:32:39 +0000 (21:32 +0000)]
[clang] Add support for #pragma strict_gs_check

23 months ago[mlir][Tensor] Fix ExtractSliceFromReshape transform edge case
Christopher Bate [Fri, 16 Sep 2022 22:11:46 +0000 (16:11 -0600)]
[mlir][Tensor] Fix ExtractSliceFromReshape transform edge case

The transformation would fail if none of the sliced dimensions were
linearized by the producing `tensor.collapse_shape`. This is a trivial
edge case but it wasn't correctly tested. Fixes the issue and adds a test.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D134088

23 months ago[test] Update llvm-dwp/X86/nocompress.test
Fangrui Song [Mon, 19 Sep 2022 19:58:50 +0000 (12:58 -0700)]
[test] Update llvm-dwp/X86/nocompress.test

23 months ago[CostModel][X86] Add CostKinds test coverage for min/max intrinsics
Simon Pilgrim [Mon, 19 Sep 2022 19:50:21 +0000 (20:50 +0100)]
[CostModel][X86] Add CostKinds test coverage for min/max intrinsics

23 months ago[docs] Fix build-docs.sh
Tobias Hieta [Mon, 19 Sep 2022 19:42:42 +0000 (21:42 +0200)]
[docs] Fix build-docs.sh

If libcxxabi is not included CMake will error out:

Cannot find target libcxxabi-SHARED

I ran into this doing the 15.0.0 release

Differential Revision: https://reviews.llvm.org/D133475

23 months ago[CUDA][HIP] Fix new driver crashing when using -save-temps in RDC-mode
Joseph Huber [Mon, 19 Sep 2022 15:24:21 +0000 (10:24 -0500)]
[CUDA][HIP] Fix new driver crashing when using -save-temps in RDC-mode

Previously when using the `clang-offload-packager` we did not pass the
active offloading kinds. Then in Clang when we attempted to detect when
there was host-offloading action that needed to be embedded in the host
we did not find it. This patch adds the active offloading kinds so we
know when there is input to be embedded.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D134189

23 months ago[libc++] Document the format of _LIBCPP_VERSION
Louis Dionne [Mon, 19 Sep 2022 15:27:50 +0000 (11:27 -0400)]
[libc++] Document the format of _LIBCPP_VERSION

Differential Revision: https://reviews.llvm.org/D134187