Konstantin Seurer [Thu, 26 May 2022 19:12:33 +0000 (21:12 +0200)]
nir,spirv: Preserve inbounds access information
Preserving information about inbounds access and
the required bit size for the bounds will help
with avoiding 64-bit operations when lowering io.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16729>
Boris Brezillon [Thu, 9 Jun 2022 14:02:33 +0000 (16:02 +0200)]
dzn: Enable depth-bounds testing
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16948>
Boris Brezillon [Thu, 9 Jun 2022 14:02:13 +0000 (16:02 +0200)]
dzn: Use CreatePipelineState()
This way we can easily extend the logic to support new features, like
depth-bounds testing.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16948>
Boris Brezillon [Thu, 9 Jun 2022 14:00:30 +0000 (16:00 +0200)]
dzn: Drop an unused argument passed to dzn_graphics_pipeline_translate_vi()
The 'out' argument is not used, let's drop it.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16948>
Boris Brezillon [Thu, 9 Jun 2022 13:58:05 +0000 (15:58 +0200)]
dzn: Switch to ID3D12Device2
So we can use the CreatePipelineState method and unlock new features
like depth-bounds tests.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16948>
Mike Blumenkrantz [Wed, 8 Jun 2022 17:52:47 +0000 (13:52 -0400)]
zink: always create descriptor templates
the 'notemplates' debug mode is somewhat misleading since there's no
uncached+notemplates mechanism, meaning that if the descriptor cache
explodes it'll still use templates for updating in the fallback path
Fixes:
4e3768914d4 ("zink: add ZINK_DESCRIPTORS env var to explicitly set a mode")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16927>
Mike Blumenkrantz [Wed, 8 Jun 2022 17:49:56 +0000 (13:49 -0400)]
zink: fix buffer descriptor hashing
since all the buffers are now an array descriptor, hashing needs
to iterate over all the descriptors in order to be accurate
Fixes:
a7327c7cac9 ("zink: implement indirect buffer indexing")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16927>
Mike Blumenkrantz [Tue, 7 Jun 2022 22:24:36 +0000 (18:24 -0400)]
zink: simplify some compiler bo code
this is a bit easier to read
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16927>
Yurii Kolesnykov [Thu, 2 Jun 2022 21:46:04 +0000 (00:46 +0300)]
Init macOS GitHub Action
Closes #6517
Signed-off-by: Yurii Kolesnykov <root@yurikoles.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16875>
Yurii Kolesnykov [Wed, 18 May 2022 23:35:56 +0000 (02:35 +0300)]
Remove Travis CI config
Closes #4919
Signed-off-by: Yurii Kolesnykov <root@yurikoles.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16875>
Juan A. Suarez Romero [Wed, 8 Jun 2022 09:49:29 +0000 (11:49 +0200)]
v3d: add ARB_polygon_offset_clamp extension support
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16925>
Icecream95 [Thu, 5 May 2022 01:50:16 +0000 (13:50 +1200)]
panfrost: Constant stencil value tracking
If stencil is constant across the resource, then it can be treated as
if it was cleared.
Improves performance in applications which create a stencil buffer but
do not use it. Originally the same was done for depth to help some 2D
applications, but that gave mixed results so the patch was dropped.
v2: Don't do anything if a fragment job wouldn't be needed otherwise.
v3: Set stencil_value when a batch is cleared (Alyssa)
v4: Handle clears when the stencil is already known (Alyssa)
v5: Make sure shared resources are not used (Alyssa)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16646>
Samuel Pitoiset [Thu, 17 Feb 2022 09:12:33 +0000 (10:12 +0100)]
radv: advertise VK_EXT_primitives_generated_query
Pass all dEQP-VK.transform_feedback.primitives_generated_query.*.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15639>
Samuel Pitoiset [Tue, 29 Mar 2022 09:28:57 +0000 (11:28 +0200)]
radv: implement VK_EXT_primitives_generated_query
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15639>
Samuel Pitoiset [Tue, 29 Mar 2022 09:24:19 +0000 (11:24 +0200)]
radv: add few helpers related to streamout
Streamout must be enabled for the PRIMITIVES_GENERATED query to work.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15639>
Samuel Pitoiset [Fri, 27 May 2022 11:51:39 +0000 (13:51 +0200)]
radv: flush the NGG query state when the argument is declared
When primitives generated query is used, the driver also needs to
emulate counting for NGG VS/TES.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15639>
Samuel Pitoiset [Fri, 27 May 2022 11:51:12 +0000 (13:51 +0200)]
ac/nir/ngg: count the number of generated primitives for VS and TES
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15639>
Samuel Pitoiset [Fri, 29 Apr 2022 14:25:57 +0000 (16:25 +0200)]
radv: declare the NGG query argument for primitives generated query
To emulare counting for NGG VS/TES.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15639>
Samuel Pitoiset [Wed, 8 Jun 2022 12:28:12 +0000 (14:28 +0200)]
radv: add primitives_generated_query to the graphics pipeline key
Different shader variants will be used to not hurt when the features
aren't enabled.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15639>
Samuel Pitoiset [Wed, 8 Jun 2022 12:27:09 +0000 (14:27 +0200)]
radv: track if primitives generated query features are enabled
This will be used to conditionally declare the NGG query argument
for NGG VS/TES and also adjust the NGG shaders.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15639>
Samuel Pitoiset [Fri, 29 Apr 2022 14:05:55 +0000 (16:05 +0200)]
radv: rename ngg_gs_state to ngg_query_state
This state will be used by NGG VS and NGG TES too.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15639>
Erico Nunes [Wed, 8 Jun 2022 14:46:51 +0000 (16:46 +0200)]
lima/ci: Don't skip piglit opengl 1 tests
Some extensions and features we support only get covered in this space.
We still get a 10min runtime, so it makes sense to include them from
now on.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16928>
Charmaine Lee [Wed, 8 Jun 2022 03:29:04 +0000 (20:29 -0700)]
svga: fix shared memory index
State tracker only declares one shared memory for GLSL and all
references to the shared memory are with index 0.
So fix the shared memory index in the declaration to use 0 index.
Fixes spec@arb_compute_shader@execution@shared*
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16930>
Charmaine Lee [Wed, 8 Jun 2022 00:46:30 +0000 (17:46 -0700)]
svga: fix reference to NULL offset for atomic counter
ntt does not supply an offset source for HWATOMIC.
So no need to reference the offset source for HWATOMIC.
Fixes spec@arb_compute_shader@execution@basic*
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16930>
Timothy Arceri [Wed, 8 Jun 2022 04:54:46 +0000 (14:54 +1000)]
glsl: inline do_common_optimization() call
The function was previously a helper for when some drivers still
called the GLSL IR optimisations in a loop. No drivers do that
anymore.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16924>
Timothy Arceri [Wed, 8 Jun 2022 04:34:24 +0000 (14:34 +1000)]
glsl: remove never true do_dead_code() parameter
Since we have now switched all drivers to using NIR and therefore
the NIR based uniform linker this param never needs to be set to
true so remove it.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16924>
Dylan Baker [Wed, 8 Jun 2022 19:40:44 +0000 (12:40 -0700)]
docs: link releases notes for 21.3.9
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16931>
Dylan Baker [Wed, 8 Jun 2022 19:38:22 +0000 (12:38 -0700)]
docs Add sha256 sums for 21.3.9
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16931>
Dylan Baker [Wed, 8 Jun 2022 18:13:28 +0000 (11:13 -0700)]
docs: add release notes for 21.3.9
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16931>
Jason Ekstrand [Mon, 6 Jun 2022 17:29:15 +0000 (12:29 -0500)]
nir/deref: Handle RESTRICT for SSBO deref bindings
Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
Jason Ekstrand [Mon, 6 Jun 2022 17:13:02 +0000 (12:13 -0500)]
nir/deref: Handle SSBO array bindings specially
Instead of just checking for the variables to match, check that the
entire deref up to the interface type matches.
Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
Jason Ekstrand [Wed, 8 Jun 2022 18:48:23 +0000 (13:48 -0500)]
nir/vars_tests: Use nir_var_mem_global instead of ssbo
We're about to add a bunch of SSBO special cases which will depend on
SSBOs always being either structs or arrays of structs. All those
little vector SSBOs we're creating will no longer be valid. Switch to
nir_var_mem_global to avoid this.
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
Jason Ekstrand [Wed, 8 Jun 2022 18:47:31 +0000 (13:47 -0500)]
nir: Increase nir_variable_data::mode to 16 bits
This is required if we want to have variables with nir_var_mem_global
which we will for CL eventually. Also, they're useful in unit tests
because they're the most generic thing imaginable and can't get
eliminated by normal means.
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
Jason Ekstrand [Fri, 3 Jun 2022 20:06:46 +0000 (15:06 -0500)]
nir/deref: Re-arrange variable checks in compare_deref_paths
Instead of having a bunch of mode checks as special cases, assert that
the modes equal and then switch on the mode. This should make the
special cases a bit easier to understand. Handling of `a_var == b_var`
looks redundant now but it won't be in the next patch.
Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
Jason Ekstrand [Fri, 3 Jun 2022 21:06:33 +0000 (16:06 -0500)]
nir/deref: Make compare_deref_paths take a stop callback
This will let us use it to compare only the first part of a pair of
deref paths and continue the comparison later.
Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
Jason Ekstrand [Fri, 3 Jun 2022 21:03:03 +0000 (16:03 -0500)]
nir/deref: Use an index in compare_deref_paths
Instead of incrementing pointers, use an integer index. This makes it
clear that we always increment them together. It'll also make the next
change a bit easier. We use a pointer to an integer because the next
patch is going to let us abort the walk and we want to be able to
continue where we left off.
Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
Jason Ekstrand [Fri, 3 Jun 2022 20:45:37 +0000 (15:45 -0500)]
nir/deref: Break out a helper for compare_deref_paths
Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
Rhys Perry [Fri, 20 May 2022 13:28:29 +0000 (14:28 +0100)]
nir/deref: stop assuming coherent accesses of different SSBOs may alias
Whether it's coherent should be irrelevant and the ACCESS_RESTRICT check
above should consider all cases aliasing unless NIR makes it clear they're
not.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Tested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Cc: mesa-stable@lists.freedesktop.org
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16894>
Georg Lehmann [Sat, 4 Jun 2022 19:26:45 +0000 (21:26 +0200)]
radv, aco: Round texture array layer in NIR.
Foz-DB Navi21:
Totals from 9100 (6.75% of 134913) affected shaders:
VGPRs: 609912 -> 610104 (+0.03%); split: -0.01%, +0.05%
SpillSGPRs: 1459 -> 1489 (+2.06%)
CodeSize:
66705920 ->
66620288 (-0.13%); split: -0.13%, +0.00%
MaxWaves: 148546 -> 148518 (-0.02%); split: +0.00%, -0.02%
Instrs:
12278485 ->
12255821 (-0.18%); split: -0.19%, +0.00%
Latency:
277414916 ->
277261192 (-0.06%); split: -0.08%, +0.02%
InvThroughput:
48431180 ->
48394637 (-0.08%); split: -0.11%, +0.03%
VClause: 250866 -> 251062 (+0.08%); split: -0.04%, +0.11%
SClause: 498377 -> 498173 (-0.04%); split: -0.08%, +0.04%
Copies: 652835 -> 655371 (+0.39%); split: -0.09%, +0.48%
Branches: 284367 -> 284371 (+0.00%); split: -0.00%, +0.00%
PreSGPRs: 498580 -> 498477 (-0.02%)
PreVGPRs: 558436 -> 558709 (+0.05%); split: -0.01%, +0.06%
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16871>
Georg Lehmann [Wed, 8 Jun 2022 09:16:57 +0000 (11:16 +0200)]
nir/lower_tex: Add lower_array_layer_round_even option.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16871>
Konstantin Seurer [Tue, 10 May 2022 13:51:30 +0000 (15:51 +0200)]
radv: Advertise VK_KHR_ray_tracing_maintenance1
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
Konstantin Seurer [Thu, 12 May 2022 18:22:59 +0000 (20:22 +0200)]
radv: vkCmdTraceRaysIndirect2KHR
This changes the trace rays logic to always use
VkTraceRaysIndirectCommand2KHR and implements
vkCmdTraceRaysIndirect2KHR. I renamed the
load_sbt_amd to sbt_base_amd and moved the SBT
load lowering from ACO to NIR.
Note that we can not just upload one pointer to
all the trace parameters because that would
be incompatible with traceRaysIndirect.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
Konstantin Seurer [Thu, 12 May 2022 18:13:40 +0000 (20:13 +0200)]
nir: Handle ray_launch_size_addr in opt_preamble
Found this while working on traceRaysIndirect2.
I don't think this is relevant for now at least
since we don't use the pass in RADV.
Fixes: 938c9d9 ("nir: Add a ray launch size addr intrinsic")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
Konstantin Seurer [Tue, 10 May 2022 14:30:46 +0000 (16:30 +0200)]
radv: PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_COPY
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
Konstantin Seurer [Tue, 10 May 2022 14:26:38 +0000 (16:26 +0200)]
radv: ACCESS_2_SHADER_BINDING_TABLE_READ_BIT_KHR
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
Konstantin Seurer [Tue, 10 May 2022 14:21:46 +0000 (16:21 +0200)]
radv: Add accel struct queries for maintenance1
Implements the new
VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SERIALIZATION_BOTTOM_LEVEL_POINTERS_KHR
and
VK_QUERY_TYPE_ACCELERATION_STRUCTURE_SIZE_KHR
query types.
The documentation is a bit lacking for now but
the fist type probably refers to the instance
count and the second type refers to the
acceleration structure size which we already
store in radv_acceleration_structure. To support
size queries, this commit adds a size member
to the acceleration structure header.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
Konstantin Seurer [Tue, 10 May 2022 14:15:02 +0000 (16:15 +0200)]
radv: ray cull mask
Lower the cull_mask system value to rt variable
load and advertise the corresponding capability.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
Konstantin Seurer [Tue, 10 May 2022 14:10:31 +0000 (16:10 +0200)]
spirv: Add plumbing for ray_cull_mask
Add a new cull_mask system value that is exposed
by the ray_cull_mask capability of
SPV_KHR_ray_cull_mask.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
Konstantin Seurer [Thu, 2 Jun 2022 15:19:23 +0000 (17:19 +0200)]
vulkan: Spec update to 1.3.216
Update the vulkan headers and xml to 1.3.216
including the spirv headers. The new spirv spec
added new OpAlias*INTEL ops, which we ignore in
vtn_gather_types_c.py.
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16430>
Vasily Khoruzhick [Wed, 8 Jun 2022 05:18:12 +0000 (22:18 -0700)]
u_transfer_helper: flush temporary transfer first for MSAA
vtbl->transfer_map may return staging buffer and not real one and it
exposes a problem in MSAA resolve path, since u_transfer_helper does
blit from a resource that is still mapped and it's not flushed yet.
Add explicit flush_region() for a temporary transfer before doing flush
for MSAA resolve.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16923>
Mike Blumenkrantz [Mon, 6 Jun 2022 13:25:56 +0000 (09:25 -0400)]
aux/tc: handle link_shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16906>
Mike Blumenkrantz [Mon, 6 Jun 2022 13:25:41 +0000 (09:25 -0400)]
aux/trace: add pipe_context::link_shader
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16906>
Alyssa Rosenzweig [Tue, 7 Jun 2022 16:02:58 +0000 (12:02 -0400)]
panvk: Drop support for Midgard
We've discussed this at length and have agreed that Midgard + Vulkan is DOA, but
have let the code linger. Now it's getting in the way of forward progress for
PanVK... That means it's time to drop the code paths and commit t to not
supporting it.
Midgard is only *barely* Vulkan 1.0 capable, Arm's driver was mainly
experimental. Today, there are no known workloads today for hardware of that
class, given the relatively weak CPU and GPU, Linux, and arm64. Even with a
perfect Vulkan driver, FEX + DXVK on RK3399 won't be performant.
There is a risk here: in the future, 2D workloads (like desktop compositors)
might hard depend on Vulkan. It seems this is bound to happen but about a decade
out. I worry about contributing to hardware obsolescence due to missing Vulkan
drivers, however such a change would obsolete far more than Midgard v5...
There's plenty of GL2 hardware that's still alive and well, for one. It doesn't
look like Utgard will be going anywhere, even then.
For the record: I think depending on Vulkan for 2D workloads is a bad idea. It's
unfortunately on brand for some compositors.
Getting conformant Vulkan 1.0 on Midgard would be a massive amount of work on
top of conformant Bifrost/Valhall PanVK, and the performance would make it
useless for interesting 3D workloads -- especially by 2025 standards.
If there's a retrocomputing urge in the future to build a Midgard + Vulkan
driver, that could happen later. But it would be a lot more work than reverting
this commit. The compiler would need significant work to be appropriate for
anything newer than OpenGL ES 3.0, even dEQP-GLES31 tortures it pretty bad.
Support for non-32bit types is lacklustre. Piles of basic shader features in
Vulkan 1.0 are missing or broken in the Midgard compiler. Even if you got
everything working, basic extensions like subgroup ops are architecturally
impossible to implement.
On the core driver side, we would need support for indirect draws -- on Vulkan,
stalling and doing it on the CPU is a nonoption. In fact, the indirect draw code
is needed for plain indexed draws in Vulkan, meaning Zink + PanVK can be
expected to have terrible performance on anything older than Valhall. (As far as
workloads to justify building a Vulkan driver, Zink/ANGLE are the worst
examples. The existing GL driver works well and is not much work to maintain. If
it were, sticking it in Amber branch would still be less work than trying to
build a competent Vulkan driver for that hardware.)
Where does PanVK fit in? Android, for one. High end Valhall devices might run
FEX + DXVK acceptably. For whatever it's worth, Valhall is the first Mali
hardware that can support Vulkan properly, even Bifrost Vulkan is a slow mess
that you wouldn't want to use for anything if you had another option.
In theory Arm ships Vulkan drivers for this class of hardware. In practice,
Arm's drivers have long sucked on Linux, assuming you could get your hands on a
build. It didn't take much for Panfrost to win the Linux/Mali market.
The highest end Midgard getting wide use with Panfrost is the RK3399 with the
Mali-T860, as in the Pinebook Pro. Even by today's standards, RK3399 is showing
its limits. It seems unlikely that its users in 10 years from now will also be
using Vulkan-required 2030 desktop environment eye candy. Graphically, the
nicest experience on RK3399 is sway or weston, with GLES2 renderers.
Realistically, sway won't go Vulkan-only for a long-time.
Making ourselves crazy trying to support Midgard poorly in PanVK seems like
letting perfect (Vulkan support) be the enemy of good (Vulkan support). In that
light, future developers making core 2D software Vulkan-only (forcing software
rasterization instead of using the hardware OpenGL) are doing a lot more
e-wasting than us simply not providing Midgard Vulkan drivers because we don't
have the resources to do so, and keeping the broken code in-tree will just get
in the way of forward progress for shipping PanVK at all.
There are good reasons, after all, that turnip starts with a6xx.
(If proper Vulkan support only began with Valhall, will we support Bifrost
long term? Unclear. There are some good arguments on both sides here.)
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16915>
Michel Zou [Tue, 7 Jun 2022 19:31:54 +0000 (21:31 +0200)]
lavapipe: allow null handleTypes
handleTypes is allowed to be null with VK_STRUCTURE_TYPE_EXPORT_MEMORY_ALLOCATE_INFO
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Closes #6501
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16590>
Boris Brezillon [Fri, 29 Apr 2022 15:21:13 +0000 (08:21 -0700)]
microsoft/compiler: Drop the auto_link parameter passed to nir_to_dxil()
Now that all nir_to_dxil() have transitioned to explicit linking, we
can drop the auto_link parameter and simplify the signature logic along
the way.
Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Fri, 29 Apr 2022 15:15:17 +0000 (08:15 -0700)]
microsoft/spirv_to_dxil: Let spirv_to_dxil() handle the linking
That's still a dummy linking we do here, and it's likely to be
incorrect for complex scenarios. Not sure the previous situation
was any better though, and at least, doing that allows us to
get rid of the special cases we have in dxil_signature.c.
Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Wed, 8 Jun 2022 10:42:16 +0000 (03:42 -0700)]
dzn: Fix vertex input handling
Vertex shaders are allowed to define input variables pointing to the
same location but a different, or even variables that overlap other
variables, as long as only one of them is used in a shader invocation.
One way to support that case would be to merge overlapping variables,
but we can also declare one input element per variable, and make those
point to the same input slot/offset. The only limitation with the
second approach is the maximum number of VS input registers, meaning
that only (32 - num_sysvals) input variables can be defined.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Tue, 7 Jun 2022 14:20:23 +0000 (07:20 -0700)]
dzn: Fix unitialized var access in dzn_meta_compile_shader()
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Thu, 28 Apr 2022 10:14:58 +0000 (03:14 -0700)]
dzn: Handle varying linking explicitly
Now that dxil_spirv_nir.h exposes an helper to run the
DXIL-SPIRV specific passes, we can handle the varying linking
on our side and tell nir_to_dxil() we don't want automatic
varying index/register assignment, which should fix a bunch
of compiler errors.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Fri, 29 Apr 2022 13:22:17 +0000 (15:22 +0200)]
dzn: Fix maxVertexInputAttributes limit
The current implementation doesn't allow more than
MAX_VERTEX_GENERIC_ATTRIBS vertex attributes.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Wed, 8 Jun 2022 07:39:23 +0000 (00:39 -0700)]
microsoft/spirv_to_dxil: vectorize IOs
DXIL doesn't like when 2 different variables occupy the same slot, so
let's vectorize IOs to avoid that.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Thu, 28 Apr 2022 13:05:18 +0000 (15:05 +0200)]
microsoft/compiler: Allow vulkan users to handle varyings linking
Letting the compiler decide which slot should be used for varyings when
it doesn't know about the varyings written/read by the previous/next
stage doesn't work well. So let's the caller decide when it wants
automatic index/register assignment through a dedicated parameter,
instead of assuming Vulkan users always want that.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Fri, 29 Apr 2022 13:21:35 +0000 (15:21 +0200)]
microsoft/spirv_to_dxil: Add a linking helper
Linking should be done in reverse order, starting from the last
pipeline stage and going backward, so we can eliminate outputs from the
previous stage that are never used by the next stage, and possibly
kill some instructions and input variables too.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Wed, 8 Jun 2022 07:23:12 +0000 (00:23 -0700)]
microsoft/spirv_to_dxil: Remove dead IO vars at the end of dxil_spirv_nir_passes()
No need to keep them around if they're unused. Moreover, this should
allow the linking step to get rid of outputs when the next stage
doesn't use them.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Thu, 28 Apr 2022 17:27:17 +0000 (10:27 -0700)]
microsoft/compiler: Make input_mappings immune to driver_location holes
Right now, nir_to_dxil() assumes driver_location on inputs will be
contiguous, which is true for GL, and also true for Vulkan shaders
with the current implementation. But we are trying to delegate
the varying linking step to Dozen, and that means the driver will
assign the driver_location field.
For everything except vertex shaders this works fine, because we
are in control of the ID we assign to each variable, and can make
sure no holes exists in this assignment, but vertex inputs expect
the index value (which is directly extracted from the
driver_location field) to match the input index defined at pipeline
creation time. The compiler has a hack to treat Vulkan differently
and extract the index from the var->data.location field instead,
but that's a bit confusing.
Moreover, the input_mappings[] array is already indexed with
the var->data.driver_location field in the input load emission
path, so it makes sense to index it with the same field when
emitting signatures.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Fri, 29 Apr 2022 13:08:07 +0000 (06:08 -0700)]
microsoft/spirv_to_dxil: Constify the descriptor binding mapping fields
spirv_to_dxil() doesn't modify those, so let's constify them.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Thu, 28 Apr 2022 08:10:54 +0000 (01:10 -0700)]
microsoft/spirv_to_dxil: Extract NIR passes out of spirv_to_dxil()
Extract NIR passes out of spirv_to_dxil() so we can re-use them
without separately and do the varying linking in Dozen. This way
we will also be able to use vk_shader_module_to_nir() which
takes care of the SPIRV -> NIR translation, plus a bunch of
common lowering passes.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Tue, 7 Jun 2022 12:49:45 +0000 (05:49 -0700)]
microsoft/compiler: Make sure all SV_Position components are written
Not entirely sure if writing to only some components of
gl_Position/SPIRV-PositionBuiltin from a vertex-processing stage is
allowed, but
https://github.com/dneto0/spirv-samples/blob/main/spvasm/SpvModuleScopeVarParserTest_BuiltinPosition_StorePositionMember_OneAccessChain.spvasm
does exactly that.
Let's make sure all SV_Position components are written, otherwise the
DXIL validator complains.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Tue, 7 Jun 2022 08:57:59 +0000 (01:57 -0700)]
microsoft/spirv2dxil: Add a debug option
So we can dump NIR shaders.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Boris Brezillon [Tue, 7 Jun 2022 10:00:42 +0000 (03:00 -0700)]
ci/windows: Bump spirv-samples commit-ID
We need the fix adding a Block decoration to the BuiltIn struct in
SpvModuleScopeVarParserTest_BuiltinPosition_BuiltIn_Position_Initializer.spvasm.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16221>
Rhys Perry [Wed, 26 Jan 2022 14:17:33 +0000 (14:17 +0000)]
gitlab: ask that reporters don't include long logs in descriptions
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14733>
Rhys Perry [Wed, 26 Jan 2022 14:17:12 +0000 (14:17 +0000)]
gitlab: ask for useful titles
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14733>
Alyssa Rosenzweig [Sun, 22 May 2022 03:22:27 +0000 (23:22 -0400)]
asahi,agx: Don't set PIPE_CAP_POINT_COORD_ORIGIN_UPPER_LEFT
Tell the state tracker our point coordinates have a lower left origin
instead of an upper left origin, and remove our point coordinate
flipping code. Saves an instruction in any shader that reads
gl_PointCoord.y
Note: the OpenGL blob also emits an "fadd $y', ^y.neg, 1.0" to flip
point coordinates, so this isn't just a Metal weirdness.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16829>
Alyssa Rosenzweig [Thu, 2 Jun 2022 00:41:58 +0000 (20:41 -0400)]
mesa,gallium: Make point coord origin a CAP
When lower_wpos_pntc is used, the state tracker inserts code to
transform gl_PointCoord.y according to a uniform, to account for
API-requested point coordinate origin and framebuffer orientation. With
the transformation, driver-supplied point coordinates are expected to
have an upper left origin.
If the hardware point coordinate supports (only) a lower left origin,
the backend has to use lower_wpos_pntc and then lower *again* to flip
back. This ends up transforming twice, which is wasteful:
a = load point coord Y with lower left origin
a' = 1.0 - a
a'' = uniform_transform(a')
However, lower_wpos_pntc is quite capable of transforming for a lower
left origin too, it just needs to flip the transformation. Add a CAP
specifying the point coordinate origin convention, rather than assuming
upper-left. This simplifies the Asahi code greatly.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16829>
Alyssa Rosenzweig [Mon, 6 Jun 2022 17:56:50 +0000 (13:56 -0400)]
pan/perf: Fix performance counters on G57
The performance counter layout depends on the number of L2 blocks and the number
of shader cores. It doesn't make a ton of sense to hardcode these into the XML
files. Instead, let's make the coutner offsets in the XML files relative to the
categories (blocks), so we can calculate the offsets of the categories
themselves at runtime based on the computed layout. This fixes performance
counters on Mali-G57 as implemented on MT8192.
There is little code change here, mainly churn from changing the XML definition.
Postprocessing for the XML to make it suitable for Mesa uses Antonio Caggiano's
https://gitlab.freedesktop.org/panfrost/hwc-helper tool.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16803>
Alyssa Rosenzweig [Wed, 25 May 2022 18:34:39 +0000 (14:34 -0400)]
panfrost: Add panfrost_query_l2_slices helper
The number of L2 performance counter blocks equals the number of L2 slices, so
add a query to get this. This information isn't needed by the Mesa driver, so
don't get it in the default device initialization path.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16803>
Alyssa Rosenzweig [Tue, 7 Jun 2022 20:10:43 +0000 (16:10 -0400)]
panfrost: Remove is_64b assignments
These are redundant with GenXML defaults, they're just noise.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16916>
Alyssa Rosenzweig [Tue, 7 Jun 2022 20:03:47 +0000 (16:03 -0400)]
panfrost: Remove redundant first_tag access
This already happens in the common prepare_rsd call.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16916>
Alyssa Rosenzweig [Tue, 7 Jun 2022 19:45:56 +0000 (15:45 -0400)]
panfrost: Deduplicate indirect dispatch structs
The input is specified in two identical structs, tear that apart.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16916>
Alyssa Rosenzweig [Tue, 7 Jun 2022 19:17:02 +0000 (15:17 -0400)]
panvk: Use push constants for copy shaders
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16916>
Alyssa Rosenzweig [Tue, 7 Jun 2022 19:16:51 +0000 (15:16 -0400)]
panvk: Use push constants for clear
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16916>
Alyssa Rosenzweig [Tue, 7 Jun 2022 19:16:41 +0000 (15:16 -0400)]
panfrost: Use push constants for indirect draws
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16916>
Alyssa Rosenzweig [Tue, 7 Jun 2022 19:15:51 +0000 (15:15 -0400)]
panfrost: Use push constants for indirect dispatch
Much simpler than creating a UBO and relying on it getting optimized to a push
constant, with possible reordering.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16916>
Alyssa Rosenzweig [Tue, 7 Jun 2022 19:15:04 +0000 (15:15 -0400)]
pan/bi: Don't reorder push with no_ubo_to_push
Otherwise, load_push_constant won't work properly. This could probably be made
to work if we tried hard enough, but we still don't want reordering for internal
(meta) shaders which are layed out deliberately.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16916>
Alyssa Rosenzweig [Tue, 7 Jun 2022 19:13:11 +0000 (15:13 -0400)]
pan/bi: Implement load_push_constant
Bifrost supports "fast access uniforms" loaded from a single contiguous buffer.
This maps directly to Vulkan push constants, with some caveats:
* No indirect access. Indirects need to be lowered to a UBO pull.
* Strict alignment requirements. These will be met in practice.
Implement the NIR intrinsic and map it to the native hardware construct.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16916>
Alyssa Rosenzweig [Mon, 6 Jun 2022 20:48:57 +0000 (16:48 -0400)]
panfrost: Fix inverted indirect dispatch condition
Inverted condition -- indirect dispatch gets disabled when WLS is in use, not
the other way around. Not sure how this worked before...
Fixes:
fd7b44882ce ("panfrost: Use direct dispatch with shared memory")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16916>
Chia-I Wu [Thu, 26 May 2022 21:40:49 +0000 (14:40 -0700)]
turnip: consider render pass costs in autotune
To be able to sum drawcall cost and render pass cost, the units of costs
are changed to bytes. With that, tu_autotune_use_bypass can make
decisions by comparing the costs of sysmem rendering and gmem rendering.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16733>
Chia-I Wu [Thu, 26 May 2022 16:22:40 +0000 (09:22 -0700)]
turnip: estimate render pass costs
They will be used by autotuner.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16733>
Chia-I Wu [Thu, 26 May 2022 21:32:17 +0000 (14:32 -0700)]
turnip: include stencil test for drawcall costs
Stencil test reads from and writes to the stencil buffer.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16733>
Chia-I Wu [Thu, 26 May 2022 21:18:02 +0000 (14:18 -0700)]
turnip: base pipeline draw costs on colorWriteMask
drawcall_base_cost estimates the memory bandwidth per sample.
colorWriteMask should be more accurate than fs outputs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16733>
Chia-I Wu [Thu, 26 May 2022 21:14:54 +0000 (14:14 -0700)]
turnip: if-checks autotune debug macros
This avoids bitrot while the compiler can easily optimize away those
checks.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16733>
Marek Olšák [Mon, 6 Jun 2022 01:13:20 +0000 (21:13 -0400)]
radeonsi: set the max UBO size same as the max SSBO size
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16901>
Marek Olšák [Mon, 6 Jun 2022 00:26:30 +0000 (20:26 -0400)]
radeonsi: compute PIPE_CAP_MAX_TEXEL_BUFFER_ELEMENTS_UINT correctly
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16901>
Marek Olšák [Sun, 5 Jun 2022 21:32:27 +0000 (17:32 -0400)]
radeonsi: change max TBO/SSBO sizes again and rework max alloc size
Allow 1/4 of the max heap size, but maximum of 512 MB on 32-bit
architectures.
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16901>
Marek Olšák [Mon, 6 Jun 2022 00:24:49 +0000 (20:24 -0400)]
radeonsi: clamp against MAX_TEXEL_BUFFER_ELEMENTS correctly
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16901>
Marek Olšák [Mon, 6 Jun 2022 01:46:14 +0000 (21:46 -0400)]
radeonsi: report correct maximum compute grid sizes
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16901>
Marek Olšák [Mon, 6 Jun 2022 01:45:43 +0000 (21:45 -0400)]
radeonsi: increase the max compute LDS size to 64KB for gfx7+
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16901>
Matt Coster [Thu, 5 May 2022 10:10:53 +0000 (11:10 +0100)]
pvr: debug: Implement PVR_DEBUG variable
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16907>
Matt Coster [Thu, 12 May 2022 11:00:44 +0000 (12:00 +0100)]
pvr: csbgen: Add *_unpack() functions for all generated struct types
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16884>
Matt Coster [Fri, 13 May 2022 09:47:33 +0000 (10:47 +0100)]
pvr: csbgen: Fix "local variable may be undefined" lints
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16884>